2 * head.S - Common startup code for 68000 core based CPU's
4 * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
5 * 68000 core based CPU's. Based on the sources from:
6 * Coldfire by Greg Ungerer <gerg@snapgear.com>
7 * 68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
8 * Kenneth Albanowski <kjahds@kjahds.com>,
9 * The Silver Hammer Group, Ltd.
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/asm-offsets.h>
16 #include <asm/thread_info.h>
19 /*****************************************************************************
20 * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
21 *****************************************************************************/
22 #ifdef CONFIG_MEMORY_RESERVE
23 #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
25 #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
27 /*****************************************************************************/
35 #if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
39 /* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
40 /* #define DEBUG_HEAD_CODE */
41 #undef DEBUG_HEAD_CODE
45 /*****************************************************************************
46 * RAM setup pointers. Used by the kernel to determine RAM location and size.
47 *****************************************************************************/
60 /*****************************************************************************
61 * Entry point, where all begins!
62 *****************************************************************************/
66 /* Pilot need this specific signature at the start of ROM */
68 .byte 0x4e, 0xfa, 0x00, 0x0a /* bra opcode (jmp 10 bytes) */
69 .byte 'b', 'o', 'o', 't'
73 movew %d0, 0xfffff618 /* Watchdog off */
74 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
75 #endif /* CONFIG_PILOT */
77 movew #0x2700, %sr /* disable all interrupts */
79 /*****************************************************************************
80 * Setup PLL and wait for it to settle (in 68x328 cpu's).
81 * Also, if enabled, init serial port.
82 *****************************************************************************/
83 #if defined(CONFIG_M68328) || \
84 defined(CONFIG_M68EZ328) || \
85 defined(CONFIG_M68VZ328)
87 /* Serial port setup. Should only be needed if debugging this startup code. */
88 #ifdef DEBUG_HEAD_CODE
89 movew #0x0800, 0xfffff906 /* Ignore CTS */
90 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
91 movew #0xe100, 0xfffff900 /* enable */
92 #endif /* DEBUG_HEAD */
95 movew #0x2410, 0xfffff200 /* PLLCR */
97 movew #0x2400, 0xfffff200 /* PLLCR */
99 movew #0x0123, 0xfffff202 /* PLLFSR */
101 movew #16384, %d0 /* PLL settle wait loop */
105 #endif /* CONFIG_M68x328 */
108 /*****************************************************************************
109 * If running kernel from ROM some specific initialization has to be done.
110 * (Assuming that everything is already init'ed when running from RAM)
111 *****************************************************************************/
112 #ifdef CONFIG_ROMKERNEL
114 /*****************************************************************************
115 * Init chip registers (uCsimm specific)
116 *****************************************************************************/
118 moveb #0x00, 0xfffffb0b /* Watchdog off */
119 moveb #0x10, 0xfffff000 /* SCR */
120 moveb #0x00, 0xfffff40b /* enable chip select */
121 moveb #0x00, 0xfffff423 /* enable /DWE */
122 moveb #0x08, 0xfffffd0d /* disable hardmap */
123 moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
124 movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
125 movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
126 movew #0x8f00, 0xfffffc00 /* DRAM configuration */
127 movew #0x9667, 0xfffffc02 /* DRAM control */
128 movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
129 movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
130 moveb #0x40, 0xfffff300 /* IVR */
131 movel #0x007FFFFF, %d0 /* IMR */
132 movel %d0, 0xfffff304
133 moveb 0xfffff42b, %d0
135 moveb %d0, 0xfffff42b
138 /*****************************************************************************
139 * Init LCD controller.
140 * (Assuming that LCD controller is already init'ed when running from RAM)
141 *****************************************************************************/
142 #ifdef CONFIG_INIT_LCD
144 moveb #0, 0xfffffA27 /* LCKCON */
145 movel #_start, 0xfffffA00 /* LSSA */
146 moveb #0xa, 0xfffffA05 /* LVPW */
147 movew #0x9f, 0xFFFFFa08 /* LXMAX */
148 movew #0x9f, 0xFFFFFa0a /* LYMAX */
149 moveb #9, 0xfffffa29 /* LBAR */
150 moveb #0, 0xfffffa25 /* LPXCD */
151 moveb #0x04, 0xFFFFFa20 /* LPICF */
152 moveb #0x58, 0xfffffA27 /* LCKCON */
153 moveb #0x85, 0xfffff429 /* PFDATA */
154 moveb #0xd8, 0xfffffA27 /* LCKCON */
155 moveb #0xc5, 0xfffff429 /* PFDATA */
156 moveb #0xd5, 0xfffff429 /* PFDATA */
157 movel #bootlogo_bits, 0xFFFFFA00 /* LSSA */
158 moveb #10, 0xFFFFFA05 /* LVPW */
159 movew #160, 0xFFFFFA08 /* LXMAX */
160 movew #160, 0xFFFFFA0A /* LYMAX */
161 #else /* CONFIG_PILOT */
162 movel #bootlogo_bits, 0xfffffA00 /* LSSA */
163 moveb #0x28, 0xfffffA05 /* LVPW */
164 movew #0x280, 0xFFFFFa08 /* LXMAX */
165 movew #0x1df, 0xFFFFFa0a /* LYMAX */
166 moveb #0, 0xfffffa29 /* LBAR */
167 moveb #0, 0xfffffa25 /* LPXCD */
168 moveb #0x08, 0xFFFFFa20 /* LPICF */
169 moveb #0x01, 0xFFFFFA21 /* -ve pol */
170 moveb #0x81, 0xfffffA27 /* LCKCON */
171 movew #0xff00, 0xfffff412 /* LCD pins */
172 #endif /* CONFIG_PILOT */
173 #endif /* CONFIG_INIT_LCD */
175 /*****************************************************************************
176 * Kernel is running from FLASH/ROM (XIP)
177 * Copy init text & data to RAM
178 *****************************************************************************/
181 moveal #__bss_start, %a2
186 #endif /* CONFIG_ROMKERNEL */
188 /*****************************************************************************
189 * Setup basic memory information for kernel
190 *****************************************************************************/
191 movel #CONFIG_VECTORBASE,_ramvec /* set vector base location */
192 movel #CONFIG_RAMBASE,_rambase /* set the base of RAM */
193 movel #RAMEND, _ramend /* set end ram addr */
197 /*****************************************************************************
198 * If the kernel is in RAM, move romfs to right above bss and
199 * adjust _ramstart to where romfs ends.
201 * (Do this only if CONFIG_MTD_UCLINUX is true)
202 *****************************************************************************/
204 #if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
205 defined(CONFIG_MTD_UCLINUX)
206 lea __bss_start, %a0 /* get start of bss */
207 lea __bss_stop, %a1 /* set up destination */
208 movel %a0, %a2 /* copy of bss start */
210 movel 8(%a0), %d0 /* get size of ROMFS */
211 addql #8, %d0 /* allow for rounding */
212 andl #0xfffffffc, %d0 /* whole words */
214 addl %d0, %a0 /* copy from end */
215 addl %d0, %a1 /* copy from end */
216 movel %a1, _ramstart /* set start of ram */
218 movel -(%a0), -(%a1) /* copy dword */
219 cmpl %a0, %a2 /* check if at end */
221 #endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
223 /*****************************************************************************
225 *****************************************************************************/
226 lea __bss_start, %a0 /* get start of bss */
227 lea __bss_stop, %a1 /* get end of bss */
229 movel #0, (%a0)+ /* clear each word */
230 cmpl %a0, %a1 /* check if at end */
233 /*****************************************************************************
234 * Load the current task pointer and stack.
235 *****************************************************************************/
236 lea init_thread_union,%a0
237 lea THREAD_SIZE(%a0),%sp
238 jsr start_kernel /* start Linux kernel */
240 jmp _exit /* should never get here */