1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner Hantro G2 VPU codec driver
5 * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com>
12 static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = {
14 .fourcc = V4L2_PIX_FMT_NV12,
15 .codec_mode = HANTRO_MODE_NONE,
16 .postprocessed = true,
20 static const struct hantro_fmt sunxi_vpu_dec_fmts[] = {
22 .fourcc = V4L2_PIX_FMT_NV12_4L4,
23 .codec_mode = HANTRO_MODE_NONE,
26 .fourcc = V4L2_PIX_FMT_VP9_FRAME,
27 .codec_mode = HANTRO_MODE_VP9_DEC,
40 static int sunxi_vpu_hw_init(struct hantro_dev *vpu)
42 clk_set_rate(vpu->clocks[0].clk, 300000000);
47 static void sunxi_vpu_reset(struct hantro_ctx *ctx)
49 struct hantro_dev *vpu = ctx->dev;
51 reset_control_reset(vpu->resets);
54 static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = {
55 [HANTRO_MODE_VP9_DEC] = {
56 .run = hantro_g2_vp9_dec_run,
57 .done = hantro_g2_vp9_dec_done,
58 .reset = sunxi_vpu_reset,
59 .init = hantro_vp9_dec_init,
60 .exit = hantro_vp9_dec_exit,
64 static const struct hantro_irq sunxi_irqs[] = {
65 { NULL, hantro_g2_irq },
68 static const char * const sunxi_clk_names[] = { "mod", "bus" };
70 const struct hantro_variant sunxi_vpu_variant = {
71 .dec_fmts = sunxi_vpu_dec_fmts,
72 .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts),
73 .postproc_fmts = sunxi_vpu_postproc_fmts,
74 .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts),
75 .postproc_ops = &hantro_g2_postproc_ops,
76 .codec = HANTRO_VP9_DECODER,
77 .codec_ops = sunxi_vpu_codec_ops,
78 .init = sunxi_vpu_hw_init,
80 .num_irqs = ARRAY_SIZE(sunxi_irqs),
81 .clk_names = sunxi_clk_names,
82 .num_clocks = ARRAY_SIZE(sunxi_clk_names),