2 * MIPI Display Bus Interface (DBI) LCD controller support
4 * Copyright 2016 Noralf Trønnes
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <drm/drm_gem_framebuffer_helper.h>
13 #include <drm/tinydrm/mipi-dbi.h>
14 #include <drm/tinydrm/tinydrm-helpers.h>
15 #include <linux/debugfs.h>
16 #include <linux/dma-buf.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/module.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/spi/spi.h>
21 #include <video/mipi_display.h>
23 #define MIPI_DBI_MAX_SPI_READ_SPEED 2000000 /* 2MHz */
25 #define DCS_POWER_MODE_DISPLAY BIT(2)
26 #define DCS_POWER_MODE_DISPLAY_NORMAL_MODE BIT(3)
27 #define DCS_POWER_MODE_SLEEP_MODE BIT(4)
28 #define DCS_POWER_MODE_PARTIAL_MODE BIT(5)
29 #define DCS_POWER_MODE_IDLE_MODE BIT(6)
30 #define DCS_POWER_MODE_RESERVED_MASK (BIT(0) | BIT(1) | BIT(7))
35 * This library provides helpers for MIPI Display Bus Interface (DBI)
36 * compatible display controllers.
38 * Many controllers for tiny lcd displays are MIPI compliant and can use this
39 * library. If a controller uses registers 0x2A and 0x2B to set the area to
40 * update and uses register 0x2C to write to frame memory, it is most likely
43 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
45 * There are 3 MIPI DBI implementation types:
47 * A. Motorola 6800 type parallel bus
49 * B. Intel 8080 type parallel bus
51 * C. SPI type with 3 options:
53 * 1. 9-bit with the Data/Command signal as the ninth bit
54 * 2. Same as above except it's sent as 16 bits
55 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
57 * Currently mipi_dbi only supports Type C options 1 and 3 with
58 * mipi_dbi_spi_init().
61 #define MIPI_DBI_DEBUG_COMMAND(cmd, data, len) \
64 DRM_DEBUG_DRIVER("cmd=%02x\n", cmd); \
66 DRM_DEBUG_DRIVER("cmd=%02x, par=%*ph\n", cmd, (int)len, data);\
68 DRM_DEBUG_DRIVER("cmd=%02x, len=%zu\n", cmd, len); \
71 static const u8 mipi_dbi_dcs_read_commands[] = {
72 MIPI_DCS_GET_DISPLAY_ID,
73 MIPI_DCS_GET_RED_CHANNEL,
74 MIPI_DCS_GET_GREEN_CHANNEL,
75 MIPI_DCS_GET_BLUE_CHANNEL,
76 MIPI_DCS_GET_DISPLAY_STATUS,
77 MIPI_DCS_GET_POWER_MODE,
78 MIPI_DCS_GET_ADDRESS_MODE,
79 MIPI_DCS_GET_PIXEL_FORMAT,
80 MIPI_DCS_GET_DISPLAY_MODE,
81 MIPI_DCS_GET_SIGNAL_MODE,
82 MIPI_DCS_GET_DIAGNOSTIC_RESULT,
83 MIPI_DCS_READ_MEMORY_START,
84 MIPI_DCS_READ_MEMORY_CONTINUE,
85 MIPI_DCS_GET_SCANLINE,
86 MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
87 MIPI_DCS_GET_CONTROL_DISPLAY,
88 MIPI_DCS_GET_POWER_SAVE,
89 MIPI_DCS_GET_CABC_MIN_BRIGHTNESS,
90 MIPI_DCS_READ_DDB_START,
91 MIPI_DCS_READ_DDB_CONTINUE,
95 static bool mipi_dbi_command_is_read(struct mipi_dbi *mipi, u8 cmd)
99 if (!mipi->read_commands)
102 for (i = 0; i < 0xff; i++) {
103 if (!mipi->read_commands[i])
105 if (cmd == mipi->read_commands[i])
113 * mipi_dbi_command_read - MIPI DCS read command
114 * @mipi: MIPI structure
118 * Send MIPI DCS read command to the controller.
121 * Zero on success, negative error code on failure.
123 int mipi_dbi_command_read(struct mipi_dbi *mipi, u8 cmd, u8 *val)
125 if (!mipi->read_commands)
128 if (!mipi_dbi_command_is_read(mipi, cmd))
131 return mipi_dbi_command_buf(mipi, cmd, val, 1);
133 EXPORT_SYMBOL(mipi_dbi_command_read);
136 * mipi_dbi_command_buf - MIPI DCS command with parameter(s) in an array
137 * @mipi: MIPI structure
139 * @data: Parameter buffer
140 * @len: Buffer length
143 * Zero on success, negative error code on failure.
145 int mipi_dbi_command_buf(struct mipi_dbi *mipi, u8 cmd, u8 *data, size_t len)
150 /* SPI requires dma-safe buffers */
151 cmdbuf = kmemdup(&cmd, 1, GFP_KERNEL);
155 mutex_lock(&mipi->cmdlock);
156 ret = mipi->command(mipi, cmdbuf, data, len);
157 mutex_unlock(&mipi->cmdlock);
163 EXPORT_SYMBOL(mipi_dbi_command_buf);
165 /* This should only be used by mipi_dbi_command() */
166 int mipi_dbi_command_stackbuf(struct mipi_dbi *mipi, u8 cmd, u8 *data, size_t len)
171 buf = kmemdup(data, len, GFP_KERNEL);
175 ret = mipi_dbi_command_buf(mipi, cmd, buf, len);
181 EXPORT_SYMBOL(mipi_dbi_command_stackbuf);
184 * mipi_dbi_buf_copy - Copy a framebuffer, transforming it if necessary
185 * @dst: The destination buffer
186 * @fb: The source framebuffer
187 * @clip: Clipping rectangle of the area to be copied
188 * @swap: When true, swap MSB/LSB of 16-bit values
191 * Zero on success, negative error code on failure.
193 int mipi_dbi_buf_copy(void *dst, struct drm_framebuffer *fb,
194 struct drm_clip_rect *clip, bool swap)
196 struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
197 struct dma_buf_attachment *import_attach = cma_obj->base.import_attach;
198 struct drm_format_name_buf format_name;
199 void *src = cma_obj->vaddr;
203 ret = dma_buf_begin_cpu_access(import_attach->dmabuf,
209 switch (fb->format->format) {
210 case DRM_FORMAT_RGB565:
212 tinydrm_swab16(dst, src, fb, clip);
214 tinydrm_memcpy(dst, src, fb, clip);
216 case DRM_FORMAT_XRGB8888:
217 tinydrm_xrgb8888_to_rgb565(dst, src, fb, clip, swap);
220 dev_err_once(fb->dev->dev, "Format is not supported: %s\n",
221 drm_get_format_name(fb->format->format,
227 ret = dma_buf_end_cpu_access(import_attach->dmabuf,
231 EXPORT_SYMBOL(mipi_dbi_buf_copy);
233 static int mipi_dbi_fb_dirty(struct drm_framebuffer *fb,
234 struct drm_file *file_priv,
235 unsigned int flags, unsigned int color,
236 struct drm_clip_rect *clips,
237 unsigned int num_clips)
239 struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
240 struct tinydrm_device *tdev = fb->dev->dev_private;
241 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
242 bool swap = mipi->swap_bytes;
243 struct drm_clip_rect clip;
251 full = tinydrm_merge_clips(&clip, clips, num_clips, flags,
252 fb->width, fb->height);
254 DRM_DEBUG("Flushing [FB:%d] x1=%u, x2=%u, y1=%u, y2=%u\n", fb->base.id,
255 clip.x1, clip.x2, clip.y1, clip.y2);
257 if (!mipi->dc || !full || swap ||
258 fb->format->format == DRM_FORMAT_XRGB8888) {
260 ret = mipi_dbi_buf_copy(mipi->tx_buf, fb, &clip, swap);
267 mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS,
268 (clip.x1 >> 8) & 0xFF, clip.x1 & 0xFF,
269 (clip.x2 >> 8) & 0xFF, (clip.x2 - 1) & 0xFF);
270 mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS,
271 (clip.y1 >> 8) & 0xFF, clip.y1 & 0xFF,
272 (clip.y2 >> 8) & 0xFF, (clip.y2 - 1) & 0xFF);
274 ret = mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START, tr,
275 (clip.x2 - clip.x1) * (clip.y2 - clip.y1) * 2);
280 static const struct drm_framebuffer_funcs mipi_dbi_fb_funcs = {
281 .destroy = drm_gem_fb_destroy,
282 .create_handle = drm_gem_fb_create_handle,
283 .dirty = tinydrm_fb_dirty,
287 * mipi_dbi_enable_flush - MIPI DBI enable helper
288 * @mipi: MIPI DBI structure
289 * @crtc_state: CRTC state
290 * @plane_state: Plane state
292 * This function sets &mipi_dbi->enabled, flushes the whole framebuffer and
293 * enables the backlight. Drivers can use this in their
294 * &drm_simple_display_pipe_funcs->enable callback.
296 void mipi_dbi_enable_flush(struct mipi_dbi *mipi,
297 struct drm_crtc_state *crtc_state,
298 struct drm_plane_state *plane_state)
300 struct tinydrm_device *tdev = &mipi->tinydrm;
301 struct drm_framebuffer *fb = plane_state->fb;
303 mipi->enabled = true;
305 tdev->fb_dirty(fb, NULL, 0, 0, NULL, 0);
307 backlight_enable(mipi->backlight);
309 EXPORT_SYMBOL(mipi_dbi_enable_flush);
311 static void mipi_dbi_blank(struct mipi_dbi *mipi)
313 struct drm_device *drm = mipi->tinydrm.drm;
314 u16 height = drm->mode_config.min_height;
315 u16 width = drm->mode_config.min_width;
316 size_t len = width * height * 2;
318 memset(mipi->tx_buf, 0, len);
320 mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS, 0, 0,
321 (width >> 8) & 0xFF, (width - 1) & 0xFF);
322 mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS, 0, 0,
323 (height >> 8) & 0xFF, (height - 1) & 0xFF);
324 mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START,
325 (u8 *)mipi->tx_buf, len);
329 * mipi_dbi_pipe_disable - MIPI DBI pipe disable helper
330 * @pipe: Display pipe
332 * This function disables backlight if present, if not the display memory is
333 * blanked. The regulator is disabled if in use. Drivers can use this as their
334 * &drm_simple_display_pipe_funcs->disable callback.
336 void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe)
338 struct tinydrm_device *tdev = pipe_to_tinydrm(pipe);
339 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
343 mipi->enabled = false;
346 backlight_disable(mipi->backlight);
348 mipi_dbi_blank(mipi);
351 regulator_disable(mipi->regulator);
353 EXPORT_SYMBOL(mipi_dbi_pipe_disable);
355 static const uint32_t mipi_dbi_formats[] = {
361 * mipi_dbi_init - MIPI DBI initialization
362 * @dev: Parent device
363 * @mipi: &mipi_dbi structure to initialize
364 * @pipe_funcs: Display pipe functions
365 * @driver: DRM driver
366 * @mode: Display mode
367 * @rotation: Initial rotation in degrees Counter Clock Wise
369 * This function initializes a &mipi_dbi structure and it's underlying
370 * @tinydrm_device. It also sets up the display pipeline.
372 * Supported formats: Native RGB565 and emulated XRGB8888.
374 * Objects created by this function will be automatically freed on driver
378 * Zero on success, negative error code on failure.
380 int mipi_dbi_init(struct device *dev, struct mipi_dbi *mipi,
381 const struct drm_simple_display_pipe_funcs *pipe_funcs,
382 struct drm_driver *driver,
383 const struct drm_display_mode *mode, unsigned int rotation)
385 size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16);
386 struct tinydrm_device *tdev = &mipi->tinydrm;
392 mutex_init(&mipi->cmdlock);
394 mipi->tx_buf = devm_kmalloc(dev, bufsize, GFP_KERNEL);
398 ret = devm_tinydrm_init(dev, tdev, &mipi_dbi_fb_funcs, driver);
402 tdev->fb_dirty = mipi_dbi_fb_dirty;
404 /* TODO: Maybe add DRM_MODE_CONNECTOR_SPI */
405 ret = tinydrm_display_pipe_init(tdev, pipe_funcs,
406 DRM_MODE_CONNECTOR_VIRTUAL,
408 ARRAY_SIZE(mipi_dbi_formats), mode,
413 tdev->drm->mode_config.preferred_depth = 16;
414 mipi->rotation = rotation;
416 drm_mode_config_reset(tdev->drm);
418 DRM_DEBUG_KMS("preferred_depth=%u, rotation = %u\n",
419 tdev->drm->mode_config.preferred_depth, rotation);
423 EXPORT_SYMBOL(mipi_dbi_init);
426 * mipi_dbi_hw_reset - Hardware reset of controller
427 * @mipi: MIPI DBI structure
429 * Reset controller if the &mipi_dbi->reset gpio is set.
431 void mipi_dbi_hw_reset(struct mipi_dbi *mipi)
436 gpiod_set_value_cansleep(mipi->reset, 0);
437 usleep_range(20, 1000);
438 gpiod_set_value_cansleep(mipi->reset, 1);
441 EXPORT_SYMBOL(mipi_dbi_hw_reset);
444 * mipi_dbi_display_is_on - Check if display is on
445 * @mipi: MIPI DBI structure
447 * This function checks the Power Mode register (if readable) to see if
448 * display output is turned on. This can be used to see if the bootloader
449 * has already turned on the display avoiding flicker when the pipeline is
453 * true if the display can be verified to be on, false otherwise.
455 bool mipi_dbi_display_is_on(struct mipi_dbi *mipi)
459 if (mipi_dbi_command_read(mipi, MIPI_DCS_GET_POWER_MODE, &val))
462 val &= ~DCS_POWER_MODE_RESERVED_MASK;
464 /* The poweron/reset value is 08h DCS_POWER_MODE_DISPLAY_NORMAL_MODE */
465 if (val != (DCS_POWER_MODE_DISPLAY |
466 DCS_POWER_MODE_DISPLAY_NORMAL_MODE | DCS_POWER_MODE_SLEEP_MODE))
469 DRM_DEBUG_DRIVER("Display is ON\n");
473 EXPORT_SYMBOL(mipi_dbi_display_is_on);
475 static int mipi_dbi_poweron_reset_conditional(struct mipi_dbi *mipi, bool cond)
477 struct device *dev = mipi->tinydrm.drm->dev;
480 if (mipi->regulator) {
481 ret = regulator_enable(mipi->regulator);
483 DRM_DEV_ERROR(dev, "Failed to enable regulator (%d)\n", ret);
488 if (cond && mipi_dbi_display_is_on(mipi))
491 mipi_dbi_hw_reset(mipi);
492 ret = mipi_dbi_command(mipi, MIPI_DCS_SOFT_RESET);
494 DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n", ret);
496 regulator_disable(mipi->regulator);
501 * If we did a hw reset, we know the controller is in Sleep mode and
502 * per MIPI DSC spec should wait 5ms after soft reset. If we didn't,
503 * we assume worst case and wait 120ms.
506 usleep_range(5000, 20000);
514 * mipi_dbi_poweron_reset - MIPI DBI poweron and reset
515 * @mipi: MIPI DBI structure
517 * This function enables the regulator if used and does a hardware and software
521 * Zero on success, or a negative error code.
523 int mipi_dbi_poweron_reset(struct mipi_dbi *mipi)
525 return mipi_dbi_poweron_reset_conditional(mipi, false);
527 EXPORT_SYMBOL(mipi_dbi_poweron_reset);
530 * mipi_dbi_poweron_conditional_reset - MIPI DBI poweron and conditional reset
531 * @mipi: MIPI DBI structure
533 * This function enables the regulator if used and if the display is off, it
534 * does a hardware and software reset. If mipi_dbi_display_is_on() determines
535 * that the display is on, no reset is performed.
538 * Zero if the controller was reset, 1 if the display was already on, or a
539 * negative error code.
541 int mipi_dbi_poweron_conditional_reset(struct mipi_dbi *mipi)
543 return mipi_dbi_poweron_reset_conditional(mipi, true);
545 EXPORT_SYMBOL(mipi_dbi_poweron_conditional_reset);
547 #if IS_ENABLED(CONFIG_SPI)
550 * mipi_dbi_spi_cmd_max_speed - get the maximum SPI bus speed
552 * @len: The transfer buffer length.
554 * Many controllers have a max speed of 10MHz, but can be pushed way beyond
555 * that. Increase reliability by running pixel data at max speed and the rest
556 * at 10MHz, preventing transfer glitches from messing up the init settings.
558 u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)
561 return 0; /* use default */
563 return min_t(u32, 10000000, spi->max_speed_hz);
565 EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed);
568 * MIPI DBI Type C Option 1
570 * If the SPI controller doesn't have 9 bits per word support,
571 * use blocks of 9 bytes to send 8x 9-bit words using a 8-bit SPI transfer.
572 * Pad partial blocks with MIPI_DCS_NOP (zero).
573 * This is how the D/C bit (x) is added:
585 static int mipi_dbi_spi1e_transfer(struct mipi_dbi *mipi, int dc,
586 const void *buf, size_t len,
589 bool swap_bytes = (bpw == 16 && tinydrm_machine_little_endian());
590 size_t chunk, max_chunk = mipi->tx_buf9_len;
591 struct spi_device *spi = mipi->spi;
592 struct spi_transfer tr = {
593 .tx_buf = mipi->tx_buf9,
596 struct spi_message m;
601 if (drm_debug & DRM_UT_DRIVER)
602 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
603 __func__, dc, max_chunk);
605 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
606 spi_message_init_with_transfers(&m, &tr, 1);
609 if (WARN_ON_ONCE(len != 1))
612 /* Command: pad no-op's (zeroes) at beginning of block */
618 tinydrm_dbg_spi_message(spi, &m);
620 return spi_sync(spi, &m);
623 /* max with room for adding one bit per byte */
624 max_chunk = max_chunk / 9 * 8;
625 /* but no bigger than len */
626 max_chunk = min(max_chunk, len);
628 max_chunk = max_t(size_t, 8, max_chunk & ~0x7);
633 chunk = min(len, max_chunk);
640 /* Data: pad no-op's (zeroes) at end of block */
644 for (i = 1; i < (chunk + 1); i++) {
646 *dst++ = carry | BIT(8 - i) | (val >> i);
647 carry = val << (8 - i);
650 *dst++ = carry | BIT(8 - i) | (val >> i);
651 carry = val << (8 - i);
656 for (i = 1; i < (chunk + 1); i++) {
658 *dst++ = carry | BIT(8 - i) | (val >> i);
659 carry = val << (8 - i);
667 for (i = 0; i < chunk; i += 8) {
669 *dst++ = BIT(7) | (src[1] >> 1);
670 *dst++ = (src[1] << 7) | BIT(6) | (src[0] >> 2);
671 *dst++ = (src[0] << 6) | BIT(5) | (src[3] >> 3);
672 *dst++ = (src[3] << 5) | BIT(4) | (src[2] >> 4);
673 *dst++ = (src[2] << 4) | BIT(3) | (src[5] >> 5);
674 *dst++ = (src[5] << 3) | BIT(2) | (src[4] >> 6);
675 *dst++ = (src[4] << 2) | BIT(1) | (src[7] >> 7);
676 *dst++ = (src[7] << 1) | BIT(0);
679 *dst++ = BIT(7) | (src[0] >> 1);
680 *dst++ = (src[0] << 7) | BIT(6) | (src[1] >> 2);
681 *dst++ = (src[1] << 6) | BIT(5) | (src[2] >> 3);
682 *dst++ = (src[2] << 5) | BIT(4) | (src[3] >> 4);
683 *dst++ = (src[3] << 4) | BIT(3) | (src[4] >> 5);
684 *dst++ = (src[4] << 3) | BIT(2) | (src[5] >> 6);
685 *dst++ = (src[5] << 2) | BIT(1) | (src[6] >> 7);
686 *dst++ = (src[6] << 1) | BIT(0);
695 tr.len = chunk + added;
697 tinydrm_dbg_spi_message(spi, &m);
698 ret = spi_sync(spi, &m);
706 static int mipi_dbi_spi1_transfer(struct mipi_dbi *mipi, int dc,
707 const void *buf, size_t len,
710 struct spi_device *spi = mipi->spi;
711 struct spi_transfer tr = {
714 const u16 *src16 = buf;
715 const u8 *src8 = buf;
716 struct spi_message m;
721 if (!tinydrm_spi_bpw_supported(spi, 9))
722 return mipi_dbi_spi1e_transfer(mipi, dc, buf, len, bpw);
724 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
725 max_chunk = mipi->tx_buf9_len;
726 dst16 = mipi->tx_buf9;
728 if (drm_debug & DRM_UT_DRIVER)
729 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
730 __func__, dc, max_chunk);
732 max_chunk = min(max_chunk / 2, len);
734 spi_message_init_with_transfers(&m, &tr, 1);
738 size_t chunk = min(len, max_chunk);
741 if (bpw == 16 && tinydrm_machine_little_endian()) {
742 for (i = 0; i < (chunk * 2); i += 2) {
743 dst16[i] = *src16 >> 8;
744 dst16[i + 1] = *src16++ & 0xFF;
747 dst16[i + 1] |= 0x0100;
751 for (i = 0; i < chunk; i++) {
761 tinydrm_dbg_spi_message(spi, &m);
762 ret = spi_sync(spi, &m);
770 static int mipi_dbi_typec1_command(struct mipi_dbi *mipi, u8 *cmd,
771 u8 *parameters, size_t num)
773 unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8;
776 if (mipi_dbi_command_is_read(mipi, *cmd))
779 MIPI_DBI_DEBUG_COMMAND(*cmd, parameters, num);
781 ret = mipi_dbi_spi1_transfer(mipi, 0, cmd, 1, 8);
785 return mipi_dbi_spi1_transfer(mipi, 1, parameters, num, bpw);
788 /* MIPI DBI Type C Option 3 */
790 static int mipi_dbi_typec3_command_read(struct mipi_dbi *mipi, u8 *cmd,
791 u8 *data, size_t len)
793 struct spi_device *spi = mipi->spi;
794 u32 speed_hz = min_t(u32, MIPI_DBI_MAX_SPI_READ_SPEED,
795 spi->max_speed_hz / 2);
796 struct spi_transfer tr[2] = {
798 .speed_hz = speed_hz,
802 .speed_hz = speed_hz,
806 struct spi_message m;
814 * Support non-standard 24-bit and 32-bit Nokia read commands which
815 * start with a dummy clock, so we need to read an extra byte.
817 if (*cmd == MIPI_DCS_GET_DISPLAY_ID ||
818 *cmd == MIPI_DCS_GET_DISPLAY_STATUS) {
819 if (!(len == 3 || len == 4))
825 buf = kmalloc(tr[1].len, GFP_KERNEL);
830 gpiod_set_value_cansleep(mipi->dc, 0);
832 spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr));
833 ret = spi_sync(spi, &m);
837 tinydrm_dbg_spi_message(spi, &m);
839 if (tr[1].len == len) {
840 memcpy(data, buf, len);
844 for (i = 0; i < len; i++)
845 data[i] = (buf[i] << 1) | !!(buf[i + 1] & BIT(7));
848 MIPI_DBI_DEBUG_COMMAND(*cmd, data, len);
856 static int mipi_dbi_typec3_command(struct mipi_dbi *mipi, u8 *cmd,
859 struct spi_device *spi = mipi->spi;
860 unsigned int bpw = 8;
864 if (mipi_dbi_command_is_read(mipi, *cmd))
865 return mipi_dbi_typec3_command_read(mipi, cmd, par, num);
867 MIPI_DBI_DEBUG_COMMAND(*cmd, par, num);
869 gpiod_set_value_cansleep(mipi->dc, 0);
870 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
871 ret = tinydrm_spi_transfer(spi, speed_hz, NULL, 8, cmd, 1);
875 if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
878 gpiod_set_value_cansleep(mipi->dc, 1);
879 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
881 return tinydrm_spi_transfer(spi, speed_hz, NULL, bpw, par, num);
885 * mipi_dbi_spi_init - Initialize MIPI DBI SPI interfaced controller
887 * @mipi: &mipi_dbi structure to initialize
888 * @dc: D/C gpio (optional)
890 * This function sets &mipi_dbi->command, enables &mipi->read_commands for the
891 * usual read commands. It should be followed by a call to mipi_dbi_init() or
892 * a driver-specific init.
894 * If @dc is set, a Type C Option 3 interface is assumed, if not
897 * If the SPI master driver doesn't support the necessary bits per word,
898 * the following transformation is used:
900 * - 9-bit: reorder buffer as 9x 8-bit words, padded with no-op command.
901 * - 16-bit: if big endian send as 8-bit, if little endian swap bytes
904 * Zero on success, negative error code on failure.
906 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
907 struct gpio_desc *dc)
909 size_t tx_size = tinydrm_spi_max_transfer_size(spi, 0);
910 struct device *dev = &spi->dev;
914 DRM_ERROR("SPI transmit buffer too small: %zu\n", tx_size);
919 * Even though it's not the SPI device that does DMA (the master does),
920 * the dma mask is necessary for the dma_alloc_wc() in
921 * drm_gem_cma_create(). The dma_addr returned will be a physical
922 * adddress which might be different from the bus address, but this is
923 * not a problem since the address will not be used.
924 * The virtual address is used in the transfer and the SPI core
925 * re-maps it on the SPI master device using the DMA streaming API
928 if (!dev->coherent_dma_mask) {
929 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
931 dev_warn(dev, "Failed to set dma mask %d\n", ret);
937 mipi->read_commands = mipi_dbi_dcs_read_commands;
940 mipi->command = mipi_dbi_typec3_command;
942 if (tinydrm_machine_little_endian() &&
943 !tinydrm_spi_bpw_supported(spi, 16))
944 mipi->swap_bytes = true;
946 mipi->command = mipi_dbi_typec1_command;
947 mipi->tx_buf9_len = tx_size;
948 mipi->tx_buf9 = devm_kmalloc(dev, tx_size, GFP_KERNEL);
953 DRM_DEBUG_DRIVER("SPI speed: %uMHz\n", spi->max_speed_hz / 1000000);
957 EXPORT_SYMBOL(mipi_dbi_spi_init);
959 #endif /* CONFIG_SPI */
961 #ifdef CONFIG_DEBUG_FS
963 static ssize_t mipi_dbi_debugfs_command_write(struct file *file,
964 const char __user *ubuf,
965 size_t count, loff_t *ppos)
967 struct seq_file *m = file->private_data;
968 struct mipi_dbi *mipi = m->private;
969 u8 val, cmd = 0, parameters[64];
970 char *buf, *pos, *token;
974 buf = memdup_user_nul(ubuf, count);
978 /* strip trailing whitespace */
979 for (i = count - 1; i > 0; i--)
987 token = strsep(&pos, " ");
993 ret = kstrtou8(token, 16, &val);
1000 parameters[i++] = val;
1008 ret = mipi_dbi_command_buf(mipi, cmd, parameters, i);
1013 return ret < 0 ? ret : count;
1016 static int mipi_dbi_debugfs_command_show(struct seq_file *m, void *unused)
1018 struct mipi_dbi *mipi = m->private;
1023 for (cmd = 0; cmd < 255; cmd++) {
1024 if (!mipi_dbi_command_is_read(mipi, cmd))
1028 case MIPI_DCS_READ_MEMORY_START:
1029 case MIPI_DCS_READ_MEMORY_CONTINUE:
1032 case MIPI_DCS_GET_DISPLAY_ID:
1035 case MIPI_DCS_GET_DISPLAY_STATUS:
1043 seq_printf(m, "%02x: ", cmd);
1044 ret = mipi_dbi_command_buf(mipi, cmd, val, len);
1046 seq_puts(m, "XX\n");
1049 seq_printf(m, "%*phN\n", (int)len, val);
1055 static int mipi_dbi_debugfs_command_open(struct inode *inode,
1058 return single_open(file, mipi_dbi_debugfs_command_show,
1062 static const struct file_operations mipi_dbi_debugfs_command_fops = {
1063 .owner = THIS_MODULE,
1064 .open = mipi_dbi_debugfs_command_open,
1066 .llseek = seq_lseek,
1067 .release = single_release,
1068 .write = mipi_dbi_debugfs_command_write,
1072 * mipi_dbi_debugfs_init - Create debugfs entries
1075 * This function creates a 'command' debugfs file for sending commands to the
1076 * controller or getting the read command values.
1077 * Drivers can use this as their &drm_driver->debugfs_init callback.
1080 * Zero on success, negative error code on failure.
1082 int mipi_dbi_debugfs_init(struct drm_minor *minor)
1084 struct tinydrm_device *tdev = minor->dev->dev_private;
1085 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
1086 umode_t mode = S_IFREG | S_IWUSR;
1088 if (mipi->read_commands)
1090 debugfs_create_file("command", mode, minor->debugfs_root, mipi,
1091 &mipi_dbi_debugfs_command_fops);
1095 EXPORT_SYMBOL(mipi_dbi_debugfs_init);
1099 MODULE_LICENSE("GPL");