gpu/drm/mediatek/mtk_drm_drv.c

   1 /*
   2  * Copyright (c) 2015 MediaTek Inc.
   3  * Author: YT SHEN <yt.shen@mediatek.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <drm/drmP.h>
  16 #include <drm/drm_atomic.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_gem.h>
  20 #include <drm/drm_gem_cma_helper.h>
  21 #include <drm/drm_of.h>
  22 #include <linux/component.h>
  23 #include <linux/iommu.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_platform.h>
  26 #include <linux/pm_runtime.h>
  27
  28 #include "mtk_drm_crtc.h"
  29 #include "mtk_drm_ddp.h"
  30 #include "mtk_drm_ddp_comp.h"
  31 #include "mtk_drm_drv.h"
  32 #include "mtk_drm_fb.h"
  33 #include "mtk_drm_gem.h"
  34
  35 #define DRIVER_NAME "mediatek"
  36 #define DRIVER_DESC "Mediatek SoC DRM"
  37 #define DRIVER_DATE "20150513"
  38 #define DRIVER_MAJOR 1
  39 #define DRIVER_MINOR 0
  40
  41 static void mtk_atomic_schedule(struct mtk_drm_private *private,
  42                                 struct drm_atomic_state *state)
  43 {
  44         private->commit.state = state;
  45         schedule_work(&private->commit.work);
  46 }
  47
  48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
  49 {
  50         struct drm_plane *plane;
  51         struct drm_plane_state *new_plane_state;
  52         int i;
  53
  54         for_each_new_plane_in_state(state, plane, new_plane_state, i)
  55                 mtk_fb_wait(new_plane_state->fb);
  56 }
  57
  58 static void mtk_atomic_complete(struct mtk_drm_private *private,
  59                                 struct drm_atomic_state *state)
  60 {
  61         struct drm_device *drm = private->drm;
  62
  63         mtk_atomic_wait_for_fences(state);
  64
  65         /*
  66          * Mediatek drm supports runtime PM, so plane registers cannot be
  67          * written when their crtc is disabled.
  68          *
  69          * The comment for drm_atomic_helper_commit states:
  70          *     For drivers supporting runtime PM the recommended sequence is
  71          *
  72          *     drm_atomic_helper_commit_modeset_disables(dev, state);
  73          *     drm_atomic_helper_commit_modeset_enables(dev, state);
  74          *     drm_atomic_helper_commit_planes(dev, state,
  75          *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);
  76          *
  77          * See the kerneldoc entries for these three functions for more details.
  78          */
  79         drm_atomic_helper_commit_modeset_disables(drm, state);
  80         drm_atomic_helper_commit_modeset_enables(drm, state);
  81         drm_atomic_helper_commit_planes(drm, state,
  82                                         DRM_PLANE_COMMIT_ACTIVE_ONLY);
  83
  84         drm_atomic_helper_wait_for_vblanks(drm, state);
  85
  86         drm_atomic_helper_cleanup_planes(drm, state);
  87         drm_atomic_state_put(state);
  88 }
  89
  90 static void mtk_atomic_work(struct work_struct *work)
  91 {
  92         struct mtk_drm_private *private = container_of(work,
  93                         struct mtk_drm_private, commit.work);
  94
  95         mtk_atomic_complete(private, private->commit.state);
  96 }
  97
  98 static int mtk_atomic_commit(struct drm_device *drm,
  99                              struct drm_atomic_state *state,
 100                              bool async)
 101 {
 102         struct mtk_drm_private *private = drm->dev_private;
 103         int ret;
 104
 105         ret = drm_atomic_helper_prepare_planes(drm, state);
 106         if (ret)
 107                 return ret;
 108
 109         mutex_lock(&private->commit.lock);
 110         flush_work(&private->commit.work);
 111
 112         ret = drm_atomic_helper_swap_state(state, true);
 113         if (ret) {
 114                 mutex_unlock(&private->commit.lock);
 115                 drm_atomic_helper_cleanup_planes(drm, state);
 116                 return ret;
 117         }
 118
 119         drm_atomic_state_get(state);
 120         if (async)
 121                 mtk_atomic_schedule(private, state);
 122         else
 123                 mtk_atomic_complete(private, state);
 124
 125         mutex_unlock(&private->commit.lock);
 126
 127         return 0;
 128 }
 129
 130 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
 131         .fb_create = mtk_drm_mode_fb_create,
 132         .atomic_check = drm_atomic_helper_check,
 133         .atomic_commit = mtk_atomic_commit,
 134 };
 135
 136 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
 137         DDP_COMPONENT_OVL0,
 138         DDP_COMPONENT_RDMA0,
 139         DDP_COMPONENT_COLOR0,
 140         DDP_COMPONENT_BLS,
 141         DDP_COMPONENT_DSI0,
 142 };
 143
 144 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
 145         DDP_COMPONENT_RDMA1,
 146         DDP_COMPONENT_DPI0,
 147 };
 148
 149 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
 150         DDP_COMPONENT_OVL0,
 151         DDP_COMPONENT_COLOR0,
 152         DDP_COMPONENT_AAL0,
 153         DDP_COMPONENT_OD0,
 154         DDP_COMPONENT_RDMA0,
 155         DDP_COMPONENT_DPI0,
 156         DDP_COMPONENT_PWM0,
 157 };
 158
 159 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
 160         DDP_COMPONENT_OVL1,
 161         DDP_COMPONENT_COLOR1,
 162         DDP_COMPONENT_AAL1,
 163         DDP_COMPONENT_OD1,
 164         DDP_COMPONENT_RDMA1,
 165         DDP_COMPONENT_DPI1,
 166         DDP_COMPONENT_PWM1,
 167 };
 168
 169 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
 170         DDP_COMPONENT_RDMA2,
 171         DDP_COMPONENT_DSI3,
 172         DDP_COMPONENT_PWM2,
 173 };
 174
 175 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
 176         DDP_COMPONENT_OVL0,
 177         DDP_COMPONENT_COLOR0,
 178         DDP_COMPONENT_AAL0,
 179         DDP_COMPONENT_OD0,
 180         DDP_COMPONENT_RDMA0,
 181         DDP_COMPONENT_UFOE,
 182         DDP_COMPONENT_DSI0,
 183         DDP_COMPONENT_PWM0,
 184 };
 185
 186 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
 187         DDP_COMPONENT_OVL1,
 188         DDP_COMPONENT_COLOR1,
 189         DDP_COMPONENT_GAMMA,
 190         DDP_COMPONENT_RDMA1,
 191         DDP_COMPONENT_DPI0,
 192 };
 193
 194 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
 195         .main_path = mt2701_mtk_ddp_main,
 196         .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
 197         .ext_path = mt2701_mtk_ddp_ext,
 198         .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
 199         .shadow_register = true,
 200 };
 201
 202 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
 203         .main_path = mt2712_mtk_ddp_main,
 204         .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
 205         .ext_path = mt2712_mtk_ddp_ext,
 206         .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
 207         .third_path = mt2712_mtk_ddp_third,
 208         .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
 209 };
 210
 211 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
 212         .main_path = mt8173_mtk_ddp_main,
 213         .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
 214         .ext_path = mt8173_mtk_ddp_ext,
 215         .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
 216 };
 217
 218 static int mtk_drm_kms_init(struct drm_device *drm)
 219 {
 220         struct mtk_drm_private *private = drm->dev_private;
 221         struct platform_device *pdev;
 222         struct device_node *np;
 223         struct device *dma_dev;
 224         int ret;
 225
 226         if (!iommu_present(&platform_bus_type))
 227                 return -EPROBE_DEFER;
 228
 229         pdev = of_find_device_by_node(private->mutex_node);
 230         if (!pdev) {
 231                 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
 232                         private->mutex_node);
 233                 of_node_put(private->mutex_node);
 234                 return -EPROBE_DEFER;
 235         }
 236         private->mutex_dev = &pdev->dev;
 237
 238         drm_mode_config_init(drm);
 239
 240         drm->mode_config.min_width = 64;
 241         drm->mode_config.min_height = 64;
 242
 243         /*
 244          * set max width and height as default value(4096x4096).
 245          * this value would be used to check framebuffer size limitation
 246          * at drm_mode_addfb().
 247          */
 248         drm->mode_config.max_width = 4096;
 249         drm->mode_config.max_height = 4096;
 250         drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
 251
 252         ret = component_bind_all(drm->dev, drm);
 253         if (ret)
 254                 goto err_config_cleanup;
 255
 256         /*
 257          * We currently support two fixed data streams, each optional,
 258          * and each statically assigned to a crtc:
 259          * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
 260          */
 261         ret = mtk_drm_crtc_create(drm, private->data->main_path,
 262                                   private->data->main_len);
 263         if (ret < 0)
 264                 goto err_component_unbind;
 265         /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
 266         ret = mtk_drm_crtc_create(drm, private->data->ext_path,
 267                                   private->data->ext_len);
 268         if (ret < 0)
 269                 goto err_component_unbind;
 270
 271         ret = mtk_drm_crtc_create(drm, private->data->third_path,
 272                                   private->data->third_len);
 273         if (ret < 0)
 274                 goto err_component_unbind;
 275
 276         /* Use OVL device for all DMA memory allocations */
 277         np = private->comp_node[private->data->main_path[0]] ?:
 278              private->comp_node[private->data->ext_path[0]];
 279         pdev = of_find_device_by_node(np);
 280         if (!pdev) {
 281                 ret = -ENODEV;
 282                 dev_err(drm->dev, "Need at least one OVL device\n");
 283                 goto err_component_unbind;
 284         }
 285
 286         dma_dev = &pdev->dev;
 287         private->dma_dev = dma_dev;
 288
 289         /*
 290          * Configure the DMA segment size to make sure we get contiguous IOVA
 291          * when importing PRIME buffers.
 292          */
 293         if (!dma_dev->dma_parms) {
 294                 private->dma_parms_allocated = true;
 295                 dma_dev->dma_parms =
 296                         devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms),
 297                                      GFP_KERNEL);
 298         }
 299         if (!dma_dev->dma_parms) {
 300                 ret = -ENOMEM;
 301                 goto err_component_unbind;
 302         }
 303
 304         ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32));
 305         if (ret) {
 306                 dev_err(dma_dev, "Failed to set DMA segment size\n");
 307                 goto err_unset_dma_parms;
 308         }
 309
 310         /*
 311          * We don't use the drm_irq_install() helpers provided by the DRM
 312          * core, so we need to set this manually in order to allow the
 313          * DRM_IOCTL_WAIT_VBLANK to operate correctly.
 314          */
 315         drm->irq_enabled = true;
 316         ret = drm_vblank_init(drm, MAX_CRTC);
 317         if (ret < 0)
 318                 goto err_unset_dma_parms;
 319
 320         drm_kms_helper_poll_init(drm);
 321         drm_mode_config_reset(drm);
 322
 323         return 0;
 324
 325 err_unset_dma_parms:
 326         if (private->dma_parms_allocated)
 327                 dma_dev->dma_parms = NULL;
 328 err_component_unbind:
 329         component_unbind_all(drm->dev, drm);
 330 err_config_cleanup:
 331         drm_mode_config_cleanup(drm);
 332
 333         return ret;
 334 }
 335
 336 static void mtk_drm_kms_deinit(struct drm_device *drm)
 337 {
 338         struct mtk_drm_private *private = drm->dev_private;
 339
 340         drm_kms_helper_poll_fini(drm);
 341         drm_atomic_helper_shutdown(drm);
 342
 343         if (private->dma_parms_allocated)
 344                 private->dma_dev->dma_parms = NULL;
 345
 346         component_unbind_all(drm->dev, drm);
 347         drm_mode_config_cleanup(drm);
 348 }
 349
 350 static const struct file_operations mtk_drm_fops = {
 351         .owner = THIS_MODULE,
 352         .open = drm_open,
 353         .release = drm_release,
 354         .unlocked_ioctl = drm_ioctl,
 355         .mmap = mtk_drm_gem_mmap,
 356         .poll = drm_poll,
 357         .read = drm_read,
 358         .compat_ioctl = drm_compat_ioctl,
 359 };
 360
 361 /*
 362  * We need to override this because the device used to import the memory is
 363  * not dev->dev, as drm_gem_prime_import() expects.
 364  */
 365 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
 366                                                 struct dma_buf *dma_buf)
 367 {
 368         struct mtk_drm_private *private = dev->dev_private;
 369
 370         return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
 371 }
 372
 373 static struct drm_driver mtk_drm_driver = {
 374         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
 375                            DRIVER_ATOMIC,
 376
 377         .gem_free_object_unlocked = mtk_drm_gem_free_object,
 378         .gem_vm_ops = &drm_gem_cma_vm_ops,
 379         .dumb_create = mtk_drm_gem_dumb_create,
 380
 381         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 382         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 383         .gem_prime_export = drm_gem_prime_export,
 384         .gem_prime_import = mtk_drm_gem_prime_import,
 385         .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
 386         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
 387         .gem_prime_mmap = mtk_drm_gem_mmap_buf,
 388         .fops = &mtk_drm_fops,
 389
 390         .name = DRIVER_NAME,
 391         .desc = DRIVER_DESC,
 392         .date = DRIVER_DATE,
 393         .major = DRIVER_MAJOR,
 394         .minor = DRIVER_MINOR,
 395 };
 396
 397 static int compare_of(struct device *dev, void *data)
 398 {
 399         return dev->of_node == data;
 400 }
 401
 402 static int mtk_drm_bind(struct device *dev)
 403 {
 404         struct mtk_drm_private *private = dev_get_drvdata(dev);
 405         struct drm_device *drm;
 406         int ret;
 407
 408         drm = drm_dev_alloc(&mtk_drm_driver, dev);
 409         if (IS_ERR(drm))
 410                 return PTR_ERR(drm);
 411
 412         drm->dev_private = private;
 413         private->drm = drm;
 414
 415         ret = mtk_drm_kms_init(drm);
 416         if (ret < 0)
 417                 goto err_free;
 418
 419         ret = drm_dev_register(drm, 0);
 420         if (ret < 0)
 421                 goto err_deinit;
 422
 423         return 0;
 424
 425 err_deinit:
 426         mtk_drm_kms_deinit(drm);
 427 err_free:
 428         drm_dev_put(drm);
 429         return ret;
 430 }
 431
 432 static void mtk_drm_unbind(struct device *dev)
 433 {
 434         struct mtk_drm_private *private = dev_get_drvdata(dev);
 435
 436         drm_dev_unregister(private->drm);
 437         mtk_drm_kms_deinit(private->drm);
 438         drm_dev_put(private->drm);
 439         private->num_pipes = 0;
 440         private->drm = NULL;
 441 }
 442
 443 static const struct component_master_ops mtk_drm_ops = {
 444         .bind           = mtk_drm_bind,
 445         .unbind         = mtk_drm_unbind,
 446 };
 447
 448 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
 449         { .compatible = "mediatek,mt2701-disp-ovl",
 450           .data = (void *)MTK_DISP_OVL },
 451         { .compatible = "mediatek,mt8173-disp-ovl",
 452           .data = (void *)MTK_DISP_OVL },
 453         { .compatible = "mediatek,mt2701-disp-rdma",
 454           .data = (void *)MTK_DISP_RDMA },
 455         { .compatible = "mediatek,mt8173-disp-rdma",
 456           .data = (void *)MTK_DISP_RDMA },
 457         { .compatible = "mediatek,mt8173-disp-wdma",
 458           .data = (void *)MTK_DISP_WDMA },
 459         { .compatible = "mediatek,mt2701-disp-color",
 460           .data = (void *)MTK_DISP_COLOR },
 461         { .compatible = "mediatek,mt8173-disp-color",
 462           .data = (void *)MTK_DISP_COLOR },
 463         { .compatible = "mediatek,mt8173-disp-aal",
 464           .data = (void *)MTK_DISP_AAL},
 465         { .compatible = "mediatek,mt8173-disp-gamma",
 466           .data = (void *)MTK_DISP_GAMMA, },
 467         { .compatible = "mediatek,mt8173-disp-ufoe",
 468           .data = (void *)MTK_DISP_UFOE },
 469         { .compatible = "mediatek,mt2701-dsi",
 470           .data = (void *)MTK_DSI },
 471         { .compatible = "mediatek,mt8173-dsi",
 472           .data = (void *)MTK_DSI },
 473         { .compatible = "mediatek,mt8173-dpi",
 474           .data = (void *)MTK_DPI },
 475         { .compatible = "mediatek,mt2701-disp-mutex",
 476           .data = (void *)MTK_DISP_MUTEX },
 477         { .compatible = "mediatek,mt2712-disp-mutex",
 478           .data = (void *)MTK_DISP_MUTEX },
 479         { .compatible = "mediatek,mt8173-disp-mutex",
 480           .data = (void *)MTK_DISP_MUTEX },
 481         { .compatible = "mediatek,mt2701-disp-pwm",
 482           .data = (void *)MTK_DISP_BLS },
 483         { .compatible = "mediatek,mt8173-disp-pwm",
 484           .data = (void *)MTK_DISP_PWM },
 485         { .compatible = "mediatek,mt8173-disp-od",
 486           .data = (void *)MTK_DISP_OD },
 487         { }
 488 };
 489
 490 static int mtk_drm_probe(struct platform_device *pdev)
 491 {
 492         struct device *dev = &pdev->dev;
 493         struct mtk_drm_private *private;
 494         struct resource *mem;
 495         struct device_node *node;
 496         struct component_match *match = NULL;
 497         int ret;
 498         int i;
 499
 500         private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
 501         if (!private)
 502                 return -ENOMEM;
 503
 504         mutex_init(&private->commit.lock);
 505         INIT_WORK(&private->commit.work, mtk_atomic_work);
 506         private->data = of_device_get_match_data(dev);
 507
 508         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 509         private->config_regs = devm_ioremap_resource(dev, mem);
 510         if (IS_ERR(private->config_regs)) {
 511                 ret = PTR_ERR(private->config_regs);
 512                 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
 513                         ret);
 514                 return ret;
 515         }
 516
 517         /* Iterate over sibling DISP function blocks */
 518         for_each_child_of_node(dev->of_node->parent, node) {
 519                 const struct of_device_id *of_id;
 520                 enum mtk_ddp_comp_type comp_type;
 521                 int comp_id;
 522
 523                 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
 524                 if (!of_id)
 525                         continue;
 526
 527                 if (!of_device_is_available(node)) {
 528                         dev_dbg(dev, "Skipping disabled component %pOF\n",
 529                                 node);
 530                         continue;
 531                 }
 532
 533                 comp_type = (enum mtk_ddp_comp_type)of_id->data;
 534
 535                 if (comp_type == MTK_DISP_MUTEX) {
 536                         private->mutex_node = of_node_get(node);
 537                         continue;
 538                 }
 539
 540                 comp_id = mtk_ddp_comp_get_id(node, comp_type);
 541                 if (comp_id < 0) {
 542                         dev_warn(dev, "Skipping unknown component %pOF\n",
 543                                  node);
 544                         continue;
 545                 }
 546
 547                 private->comp_node[comp_id] = of_node_get(node);
 548
 549                 /*
 550                  * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
 551                  * separate component platform drivers and initialize their own
 552                  * DDP component structure. The others are initialized here.
 553                  */
 554                 if (comp_type == MTK_DISP_COLOR ||
 555                     comp_type == MTK_DISP_OVL ||
 556                     comp_type == MTK_DISP_RDMA ||
 557                     comp_type == MTK_DSI ||
 558                     comp_type == MTK_DPI) {
 559                         dev_info(dev, "Adding component match for %pOF\n",
 560                                  node);
 561                         drm_of_component_match_add(dev, &match, compare_of,
 562                                                    node);
 563                 } else {
 564                         struct mtk_ddp_comp *comp;
 565
 566                         comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
 567                         if (!comp) {
 568                                 ret = -ENOMEM;
 569                                 of_node_put(node);
 570                                 goto err_node;
 571                         }
 572
 573                         ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
 574                         if (ret) {
 575                                 of_node_put(node);
 576                                 goto err_node;
 577                         }
 578
 579                         private->ddp_comp[comp_id] = comp;
 580                 }
 581         }
 582
 583         if (!private->mutex_node) {
 584                 dev_err(dev, "Failed to find disp-mutex node\n");
 585                 ret = -ENODEV;
 586                 goto err_node;
 587         }
 588
 589         pm_runtime_enable(dev);
 590
 591         platform_set_drvdata(pdev, private);
 592
 593         ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
 594         if (ret)
 595                 goto err_pm;
 596
 597         return 0;
 598
 599 err_pm:
 600         pm_runtime_disable(dev);
 601 err_node:
 602         of_node_put(private->mutex_node);
 603         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) {
 604                 of_node_put(private->comp_node[i]);
 605                 if (private->ddp_comp[i]) {
 606                         put_device(private->ddp_comp[i]->larb_dev);
 607                         private->ddp_comp[i] = NULL;
 608                 }
 609         }
 610         return ret;
 611 }
 612
 613 static int mtk_drm_remove(struct platform_device *pdev)
 614 {
 615         struct mtk_drm_private *private = platform_get_drvdata(pdev);
 616         int i;
 617
 618         component_master_del(&pdev->dev, &mtk_drm_ops);
 619         pm_runtime_disable(&pdev->dev);
 620         of_node_put(private->mutex_node);
 621         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
 622                 of_node_put(private->comp_node[i]);
 623
 624         return 0;
 625 }
 626
 627 #ifdef CONFIG_PM_SLEEP
 628 static int mtk_drm_sys_suspend(struct device *dev)
 629 {
 630         struct mtk_drm_private *private = dev_get_drvdata(dev);
 631         struct drm_device *drm = private->drm;
 632         int ret;
 633
 634         ret = drm_mode_config_helper_suspend(drm);
 635         DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
 636
 637         return ret;
 638 }
 639
 640 static int mtk_drm_sys_resume(struct device *dev)
 641 {
 642         struct mtk_drm_private *private = dev_get_drvdata(dev);
 643         struct drm_device *drm = private->drm;
 644         int ret;
 645
 646         ret = drm_mode_config_helper_resume(drm);
 647         DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
 648
 649         return ret;
 650 }
 651 #endif
 652
 653 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
 654                          mtk_drm_sys_resume);
 655
 656 static const struct of_device_id mtk_drm_of_ids[] = {
 657         { .compatible = "mediatek,mt2701-mmsys",
 658           .data = &mt2701_mmsys_driver_data},
 659         { .compatible = "mediatek,mt2712-mmsys",
 660           .data = &mt2712_mmsys_driver_data},
 661         { .compatible = "mediatek,mt8173-mmsys",
 662           .data = &mt8173_mmsys_driver_data},
 663         { }
 664 };
 665
 666 static struct platform_driver mtk_drm_platform_driver = {
 667         .probe  = mtk_drm_probe,
 668         .remove = mtk_drm_remove,
 669         .driver = {
 670                 .name   = "mediatek-drm",
 671                 .of_match_table = mtk_drm_of_ids,
 672                 .pm     = &mtk_drm_pm_ops,
 673         },
 674 };
 675
 676 static struct platform_driver * const mtk_drm_drivers[] = {
 677         &mtk_ddp_driver,
 678         &mtk_disp_color_driver,
 679         &mtk_disp_ovl_driver,
 680         &mtk_disp_rdma_driver,
 681         &mtk_dpi_driver,
 682         &mtk_drm_platform_driver,
 683         &mtk_dsi_driver,
 684         &mtk_mipi_tx_driver,
 685 };
 686
 687 static int __init mtk_drm_init(void)
 688 {
 689         return platform_register_drivers(mtk_drm_drivers,
 690                                          ARRAY_SIZE(mtk_drm_drivers));
 691 }
 692
 693 static void __exit mtk_drm_exit(void)
 694 {
 695         platform_unregister_drivers(mtk_drm_drivers,
 696                                     ARRAY_SIZE(mtk_drm_drivers));
 697 }
 698
 699 module_init(mtk_drm_init);
 700 module_exit(mtk_drm_exit);
 701
 702 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
 703 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
 704 MODULE_LICENSE("GPL v2");