2 * SPDX-License-Identifier: MIT
4 * Copyright © 2014-2016 Intel Corporation
7 #include <linux/anon_inodes.h>
8 #include <linux/mman.h>
9 #include <linux/pfn_t.h>
10 #include <linux/sizes.h>
12 #include "gt/intel_gt.h"
13 #include "gt/intel_gt_requests.h"
16 #include "i915_gem_gtt.h"
17 #include "i915_gem_ioctls.h"
18 #include "i915_gem_object.h"
19 #include "i915_gem_mman.h"
20 #include "i915_trace.h"
21 #include "i915_user_extensions.h"
25 __vma_matches(struct vm_area_struct *vma, struct file *filp,
26 unsigned long addr, unsigned long size)
28 if (vma->vm_file != filp)
31 return vma->vm_start == addr &&
32 (vma->vm_end - vma->vm_start) == PAGE_ALIGN(size);
36 * i915_gem_mmap_ioctl - Maps the contents of an object, returning the address
39 * @data: ioctl data blob
42 * While the mapping holds a reference on the contents of the object, it doesn't
43 * imply a ref on the object itself.
47 * DRM driver writers who look a this function as an example for how to do GEM
48 * mmap support, please don't implement mmap support like here. The modern way
49 * to implement DRM mmap support is with an mmap offset ioctl (like
50 * i915_gem_mmap_gtt) and then using the mmap syscall on the DRM fd directly.
51 * That way debug tooling like valgrind will understand what's going on, hiding
52 * the mmap call in a driver private ioctl will break that. The i915 driver only
53 * does cpu mmaps this way because we didn't know better.
56 i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
57 struct drm_file *file)
59 struct drm_i915_gem_mmap *args = data;
60 struct drm_i915_gem_object *obj;
63 if (args->flags & ~(I915_MMAP_WC))
66 if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT))
69 obj = i915_gem_object_lookup(file, args->handle);
73 /* prime objects have no backing filp to GEM mmap
76 if (!obj->base.filp) {
81 if (range_overflows(args->offset, args->size, (u64)obj->base.size)) {
86 addr = vm_mmap(obj->base.filp, 0, args->size,
87 PROT_READ | PROT_WRITE, MAP_SHARED,
89 if (IS_ERR_VALUE(addr))
92 if (args->flags & I915_MMAP_WC) {
93 struct mm_struct *mm = current->mm;
94 struct vm_area_struct *vma;
96 if (mmap_write_lock_killable(mm)) {
100 vma = find_vma(mm, addr);
101 if (vma && __vma_matches(vma, obj->base.filp, addr, args->size))
103 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
106 mmap_write_unlock(mm);
107 if (IS_ERR_VALUE(addr))
110 i915_gem_object_put(obj);
112 args->addr_ptr = (u64)addr;
116 i915_gem_object_put(obj);
120 static unsigned int tile_row_pages(const struct drm_i915_gem_object *obj)
122 return i915_gem_object_get_tile_row_size(obj) >> PAGE_SHIFT;
126 * i915_gem_mmap_gtt_version - report the current feature set for GTT mmaps
128 * A history of the GTT mmap interface:
130 * 0 - Everything had to fit into the GTT. Both parties of a memcpy had to
131 * aligned and suitable for fencing, and still fit into the available
132 * mappable space left by the pinned display objects. A classic problem
133 * we called the page-fault-of-doom where we would ping-pong between
134 * two objects that could not fit inside the GTT and so the memcpy
135 * would page one object in at the expense of the other between every
138 * 1 - Objects can be any size, and have any compatible fencing (X Y, or none
139 * as set via i915_gem_set_tiling() [DRM_I915_GEM_SET_TILING]). If the
140 * object is too large for the available space (or simply too large
141 * for the mappable aperture!), a view is created instead and faulted
142 * into userspace. (This view is aligned and sized appropriately for
145 * 2 - Recognise WC as a separate cache domain so that we can flush the
146 * delayed writes via GTT before performing direct access via WC.
148 * 3 - Remove implicit set-domain(GTT) and synchronisation on initial
149 * pagefault; swapin remains transparent.
151 * 4 - Support multiple fault handlers per object depending on object's
152 * backing storage (a.k.a. MMAP_OFFSET).
156 * * snoopable objects cannot be accessed via the GTT. It can cause machine
157 * hangs on some architectures, corruption on others. An attempt to service
158 * a GTT page fault from a snoopable object will generate a SIGBUS.
160 * * the object must be able to fit into RAM (physical memory, though no
161 * limited to the mappable aperture).
166 * * a new GTT page fault will synchronize rendering from the GPU and flush
167 * all data to system memory. Subsequent access will not be synchronized.
169 * * all mappings are revoked on runtime device suspend.
171 * * there are only 8, 16 or 32 fence registers to share between all users
172 * (older machines require fence register for display and blitter access
173 * as well). Contention of the fence registers will cause the previous users
174 * to be unmapped and any new access will generate new page faults.
176 * * running out of memory while servicing a fault may generate a SIGBUS,
177 * rather than the expected SIGSEGV.
179 int i915_gem_mmap_gtt_version(void)
184 static inline struct i915_ggtt_view
185 compute_partial_view(const struct drm_i915_gem_object *obj,
189 struct i915_ggtt_view view;
191 if (i915_gem_object_is_tiled(obj))
192 chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
194 view.type = I915_GGTT_VIEW_PARTIAL;
195 view.partial.offset = rounddown(page_offset, chunk);
197 min_t(unsigned int, chunk,
198 (obj->base.size >> PAGE_SHIFT) - view.partial.offset);
200 /* If the partial covers the entire object, just create a normal VMA. */
201 if (chunk >= obj->base.size >> PAGE_SHIFT)
202 view.type = I915_GGTT_VIEW_NORMAL;
207 static vm_fault_t i915_error_to_vmf_fault(int err)
211 WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);
213 case -EIO: /* shmemfs failure from swap device */
214 case -EFAULT: /* purged object */
215 case -ENODEV: /* bad object, how did you get here! */
216 case -ENXIO: /* unable to access backing store (on device) */
217 return VM_FAULT_SIGBUS;
219 case -ENOMEM: /* our allocation failure */
224 case -ENOSPC: /* transient failure to evict? */
225 case -ENOBUFS: /* temporarily out of fences? */
230 * EBUSY is ok: this just means that another thread
231 * already did the job.
233 return VM_FAULT_NOPAGE;
237 static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
239 struct vm_area_struct *area = vmf->vma;
240 struct i915_mmap_offset *mmo = area->vm_private_data;
241 struct drm_i915_gem_object *obj = mmo->obj;
242 resource_size_t iomap;
245 /* Sanity check that we allow writing into this object */
246 if (unlikely(i915_gem_object_is_readonly(obj) &&
247 area->vm_flags & VM_WRITE))
248 return VM_FAULT_SIGBUS;
250 err = i915_gem_object_pin_pages(obj);
255 if (!i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE)) {
256 iomap = obj->mm.region->iomap.base;
257 iomap -= obj->mm.region->region.start;
260 /* PTEs are revoked in obj->ops->put_pages() */
261 err = remap_io_sg(area,
262 area->vm_start, area->vm_end - area->vm_start,
263 obj->mm.pages->sgl, iomap);
265 if (area->vm_flags & VM_WRITE) {
266 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
267 obj->mm.dirty = true;
270 i915_gem_object_unpin_pages(obj);
273 return i915_error_to_vmf_fault(err);
276 static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
278 #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT)
279 struct vm_area_struct *area = vmf->vma;
280 struct i915_mmap_offset *mmo = area->vm_private_data;
281 struct drm_i915_gem_object *obj = mmo->obj;
282 struct drm_device *dev = obj->base.dev;
283 struct drm_i915_private *i915 = to_i915(dev);
284 struct intel_runtime_pm *rpm = &i915->runtime_pm;
285 struct i915_ggtt *ggtt = &i915->ggtt;
286 bool write = area->vm_flags & VM_WRITE;
287 struct i915_gem_ww_ctx ww;
288 intel_wakeref_t wakeref;
289 struct i915_vma *vma;
294 /* We don't use vmf->pgoff since that has the fake offset */
295 page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT;
297 trace_i915_gem_object_fault(obj, page_offset, true, write);
299 wakeref = intel_runtime_pm_get(rpm);
301 i915_gem_ww_ctx_init(&ww, true);
303 ret = i915_gem_object_lock(obj, &ww);
307 /* Sanity check that we allow writing into this object */
308 if (i915_gem_object_is_readonly(obj) && write) {
313 ret = i915_gem_object_pin_pages(obj);
317 ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu);
321 /* Now pin it into the GTT as needed */
322 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, NULL, 0, 0,
324 PIN_NONBLOCK /* NOWARN */ |
326 if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
327 /* Use a partial view if it is bigger than available space */
328 struct i915_ggtt_view view =
329 compute_partial_view(obj, page_offset, MIN_CHUNK_PAGES);
332 flags = PIN_MAPPABLE | PIN_NOSEARCH;
333 if (view.type == I915_GGTT_VIEW_NORMAL)
334 flags |= PIN_NONBLOCK; /* avoid warnings for pinned */
337 * Userspace is now writing through an untracked VMA, abandon
338 * all hope that the hardware is able to track future writes.
341 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
342 if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
343 flags = PIN_MAPPABLE;
344 view.type = I915_GGTT_VIEW_PARTIAL;
345 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
348 /* The entire mappable GGTT is pinned? Unexpected! */
349 GEM_BUG_ON(vma == ERR_PTR(-ENOSPC));
356 /* Access to snoopable pages through the GTT is incoherent. */
357 if (obj->cache_level != I915_CACHE_NONE && !HAS_LLC(i915)) {
362 ret = i915_vma_pin_fence(vma);
366 /* Finally, remap it using the new GTT offset */
367 ret = remap_io_mapping(area,
368 area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
369 (ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT,
370 min_t(u64, vma->size, area->vm_end - area->vm_start),
375 assert_rpm_wakelock_held(rpm);
377 /* Mark as being mmapped into userspace for later revocation */
378 mutex_lock(&i915->ggtt.vm.mutex);
379 if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
380 list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
381 mutex_unlock(&i915->ggtt.vm.mutex);
383 /* Track the mmo associated with the fenced vma */
386 if (IS_ACTIVE(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND))
387 intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
388 msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
391 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
392 i915_vma_set_ggtt_write(vma);
393 obj->mm.dirty = true;
397 i915_vma_unpin_fence(vma);
399 __i915_vma_unpin(vma);
401 intel_gt_reset_unlock(ggtt->vm.gt, srcu);
403 i915_gem_object_unpin_pages(obj);
405 if (ret == -EDEADLK) {
406 ret = i915_gem_ww_ctx_backoff(&ww);
410 i915_gem_ww_ctx_fini(&ww);
411 intel_runtime_pm_put(rpm, wakeref);
412 return i915_error_to_vmf_fault(ret);
416 vm_access(struct vm_area_struct *area, unsigned long addr,
417 void *buf, int len, int write)
419 struct i915_mmap_offset *mmo = area->vm_private_data;
420 struct drm_i915_gem_object *obj = mmo->obj;
423 if (i915_gem_object_is_readonly(obj) && write)
426 addr -= area->vm_start;
427 if (range_overflows_t(u64, addr, len, obj->base.size))
430 /* As this is primarily for debugging, let's focus on simplicity */
431 vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC);
433 return PTR_ERR(vaddr);
436 memcpy(vaddr + addr, buf, len);
437 __i915_gem_object_flush_map(obj, addr, len);
439 memcpy(buf, vaddr + addr, len);
442 i915_gem_object_unpin_map(obj);
447 void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
449 struct i915_vma *vma;
451 GEM_BUG_ON(!obj->userfault_count);
453 for_each_ggtt_vma(vma, obj)
454 i915_vma_revoke_mmap(vma);
456 GEM_BUG_ON(obj->userfault_count);
460 * It is vital that we remove the page mapping if we have mapped a tiled
461 * object through the GTT and then lose the fence register due to
462 * resource pressure. Similarly if the object has been moved out of the
463 * aperture, than pages mapped into userspace must be revoked. Removing the
464 * mapping will then trigger a page fault on the next user access, allowing
465 * fixup by vm_fault_gtt().
467 void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
469 struct drm_i915_private *i915 = to_i915(obj->base.dev);
470 intel_wakeref_t wakeref;
473 * Serialisation between user GTT access and our code depends upon
474 * revoking the CPU's PTE whilst the mutex is held. The next user
475 * pagefault then has to wait until we release the mutex.
477 * Note that RPM complicates somewhat by adding an additional
478 * requirement that operations to the GGTT be made holding the RPM
481 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
482 mutex_lock(&i915->ggtt.vm.mutex);
484 if (!obj->userfault_count)
487 __i915_gem_object_release_mmap_gtt(obj);
490 * Ensure that the CPU's PTE are revoked and there are not outstanding
491 * memory transactions from userspace before we return. The TLB
492 * flushing implied above by changing the PTE above *should* be
493 * sufficient, an extra barrier here just provides us with a bit
494 * of paranoid documentation about our requirement to serialise
495 * memory writes before touching registers / GSM.
500 mutex_unlock(&i915->ggtt.vm.mutex);
501 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
504 void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
506 struct i915_mmap_offset *mmo, *mn;
508 spin_lock(&obj->mmo.lock);
509 rbtree_postorder_for_each_entry_safe(mmo, mn,
510 &obj->mmo.offsets, offset) {
512 * vma_node_unmap for GTT mmaps handled already in
513 * __i915_gem_object_release_mmap_gtt
515 if (mmo->mmap_type == I915_MMAP_TYPE_GTT)
518 spin_unlock(&obj->mmo.lock);
519 drm_vma_node_unmap(&mmo->vma_node,
520 obj->base.dev->anon_inode->i_mapping);
521 spin_lock(&obj->mmo.lock);
523 spin_unlock(&obj->mmo.lock);
526 static struct i915_mmap_offset *
527 lookup_mmo(struct drm_i915_gem_object *obj,
528 enum i915_mmap_type mmap_type)
532 spin_lock(&obj->mmo.lock);
533 rb = obj->mmo.offsets.rb_node;
535 struct i915_mmap_offset *mmo =
536 rb_entry(rb, typeof(*mmo), offset);
538 if (mmo->mmap_type == mmap_type) {
539 spin_unlock(&obj->mmo.lock);
543 if (mmo->mmap_type < mmap_type)
548 spin_unlock(&obj->mmo.lock);
553 static struct i915_mmap_offset *
554 insert_mmo(struct drm_i915_gem_object *obj, struct i915_mmap_offset *mmo)
556 struct rb_node *rb, **p;
558 spin_lock(&obj->mmo.lock);
560 p = &obj->mmo.offsets.rb_node;
562 struct i915_mmap_offset *pos;
565 pos = rb_entry(rb, typeof(*pos), offset);
567 if (pos->mmap_type == mmo->mmap_type) {
568 spin_unlock(&obj->mmo.lock);
569 drm_vma_offset_remove(obj->base.dev->vma_offset_manager,
575 if (pos->mmap_type < mmo->mmap_type)
580 rb_link_node(&mmo->offset, rb, p);
581 rb_insert_color(&mmo->offset, &obj->mmo.offsets);
582 spin_unlock(&obj->mmo.lock);
587 static struct i915_mmap_offset *
588 mmap_offset_attach(struct drm_i915_gem_object *obj,
589 enum i915_mmap_type mmap_type,
590 struct drm_file *file)
592 struct drm_i915_private *i915 = to_i915(obj->base.dev);
593 struct i915_mmap_offset *mmo;
596 mmo = lookup_mmo(obj, mmap_type);
600 mmo = kmalloc(sizeof(*mmo), GFP_KERNEL);
602 return ERR_PTR(-ENOMEM);
605 mmo->mmap_type = mmap_type;
606 drm_vma_node_reset(&mmo->vma_node);
608 err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
609 &mmo->vma_node, obj->base.size / PAGE_SIZE);
613 /* Attempt to reap some mmap space from dead objects */
614 err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT);
618 i915_gem_drain_freed_objects(i915);
619 err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
620 &mmo->vma_node, obj->base.size / PAGE_SIZE);
625 mmo = insert_mmo(obj, mmo);
626 GEM_BUG_ON(lookup_mmo(obj, mmap_type) != mmo);
629 drm_vma_node_allow(&mmo->vma_node, file);
638 __assign_mmap_offset(struct drm_file *file,
640 enum i915_mmap_type mmap_type,
643 struct drm_i915_gem_object *obj;
644 struct i915_mmap_offset *mmo;
647 obj = i915_gem_object_lookup(file, handle);
651 if (i915_gem_object_never_mmap(obj)) {
656 if (mmap_type != I915_MMAP_TYPE_GTT &&
657 !i915_gem_object_type_has(obj,
658 I915_GEM_OBJECT_HAS_STRUCT_PAGE |
659 I915_GEM_OBJECT_HAS_IOMEM)) {
664 mmo = mmap_offset_attach(obj, mmap_type, file);
670 *offset = drm_vma_node_offset_addr(&mmo->vma_node);
673 i915_gem_object_put(obj);
678 i915_gem_dumb_mmap_offset(struct drm_file *file,
679 struct drm_device *dev,
683 enum i915_mmap_type mmap_type;
685 if (boot_cpu_has(X86_FEATURE_PAT))
686 mmap_type = I915_MMAP_TYPE_WC;
687 else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
690 mmap_type = I915_MMAP_TYPE_GTT;
692 return __assign_mmap_offset(file, handle, mmap_type, offset);
696 * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing
698 * @data: GTT mapping ioctl data
699 * @file: GEM object info
701 * Simply returns the fake offset to userspace so it can mmap it.
702 * The mmap call will end up in drm_gem_mmap(), which will set things
703 * up so we can get faults in the handler above.
705 * The fault handler will take care of binding the object into the GTT
706 * (since it may have been evicted to make room for something), allocating
707 * a fence register, and mapping the appropriate aperture address into
711 i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
712 struct drm_file *file)
714 struct drm_i915_private *i915 = to_i915(dev);
715 struct drm_i915_gem_mmap_offset *args = data;
716 enum i915_mmap_type type;
720 * Historically we failed to check args.pad and args.offset
721 * and so we cannot use those fields for user input and we cannot
722 * add -EINVAL for them as the ABI is fixed, i.e. old userspace
723 * may be feeding in garbage in those fields.
725 * if (args->pad) return -EINVAL; is verbotten!
728 err = i915_user_extensions(u64_to_user_ptr(args->extensions),
733 switch (args->flags) {
734 case I915_MMAP_OFFSET_GTT:
735 if (!i915_ggtt_has_aperture(&i915->ggtt))
737 type = I915_MMAP_TYPE_GTT;
740 case I915_MMAP_OFFSET_WC:
741 if (!boot_cpu_has(X86_FEATURE_PAT))
743 type = I915_MMAP_TYPE_WC;
746 case I915_MMAP_OFFSET_WB:
747 type = I915_MMAP_TYPE_WB;
750 case I915_MMAP_OFFSET_UC:
751 if (!boot_cpu_has(X86_FEATURE_PAT))
753 type = I915_MMAP_TYPE_UC;
760 return __assign_mmap_offset(file, args->handle, type, &args->offset);
763 static void vm_open(struct vm_area_struct *vma)
765 struct i915_mmap_offset *mmo = vma->vm_private_data;
766 struct drm_i915_gem_object *obj = mmo->obj;
769 i915_gem_object_get(obj);
772 static void vm_close(struct vm_area_struct *vma)
774 struct i915_mmap_offset *mmo = vma->vm_private_data;
775 struct drm_i915_gem_object *obj = mmo->obj;
778 i915_gem_object_put(obj);
781 static const struct vm_operations_struct vm_ops_gtt = {
782 .fault = vm_fault_gtt,
788 static const struct vm_operations_struct vm_ops_cpu = {
789 .fault = vm_fault_cpu,
795 static int singleton_release(struct inode *inode, struct file *file)
797 struct drm_i915_private *i915 = file->private_data;
799 cmpxchg(&i915->gem.mmap_singleton, file, NULL);
800 drm_dev_put(&i915->drm);
805 static const struct file_operations singleton_fops = {
806 .owner = THIS_MODULE,
807 .release = singleton_release,
810 static struct file *mmap_singleton(struct drm_i915_private *i915)
815 file = READ_ONCE(i915->gem.mmap_singleton);
816 if (file && !get_file_rcu(file))
822 file = anon_inode_getfile("i915.gem", &singleton_fops, i915, O_RDWR);
826 /* Everyone shares a single global address space */
827 file->f_mapping = i915->drm.anon_inode->i_mapping;
829 smp_store_mb(i915->gem.mmap_singleton, file);
830 drm_dev_get(&i915->drm);
836 * This overcomes the limitation in drm_gem_mmap's assignment of a
837 * drm_gem_object as the vma->vm_private_data. Since we need to
838 * be able to resolve multiple mmap offsets which could be tied
839 * to a single gem object.
841 int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
843 struct drm_vma_offset_node *node;
844 struct drm_file *priv = filp->private_data;
845 struct drm_device *dev = priv->minor->dev;
846 struct drm_i915_gem_object *obj = NULL;
847 struct i915_mmap_offset *mmo = NULL;
850 if (drm_dev_is_unplugged(dev))
854 drm_vma_offset_lock_lookup(dev->vma_offset_manager);
855 node = drm_vma_offset_exact_lookup_locked(dev->vma_offset_manager,
858 if (node && drm_vma_node_is_allowed(node, priv)) {
860 * Skip 0-refcnted objects as it is in the process of being
861 * destroyed and will be invalid when the vma manager lock
864 mmo = container_of(node, struct i915_mmap_offset, vma_node);
865 obj = i915_gem_object_get_rcu(mmo->obj);
867 drm_vma_offset_unlock_lookup(dev->vma_offset_manager);
870 return node ? -EACCES : -EINVAL;
872 if (i915_gem_object_is_readonly(obj)) {
873 if (vma->vm_flags & VM_WRITE) {
874 i915_gem_object_put(obj);
877 vma->vm_flags &= ~VM_MAYWRITE;
880 anon = mmap_singleton(to_i915(dev));
882 i915_gem_object_put(obj);
883 return PTR_ERR(anon);
886 vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
887 vma->vm_private_data = mmo;
890 * We keep the ref on mmo->obj, not vm_file, but we require
891 * vma->vm_file->f_mapping, see vma_link(), for later revocation.
892 * Our userspace is accustomed to having per-file resource cleanup
893 * (i.e. contexts, objects and requests) on their close(fd), which
894 * requires avoiding extraneous references to their filp, hence why
895 * we prefer to use an anonymous file for their mmaps.
900 switch (mmo->mmap_type) {
901 case I915_MMAP_TYPE_WC:
903 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
904 vma->vm_ops = &vm_ops_cpu;
907 case I915_MMAP_TYPE_WB:
908 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
909 vma->vm_ops = &vm_ops_cpu;
912 case I915_MMAP_TYPE_UC:
914 pgprot_noncached(vm_get_page_prot(vma->vm_flags));
915 vma->vm_ops = &vm_ops_cpu;
918 case I915_MMAP_TYPE_GTT:
920 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
921 vma->vm_ops = &vm_ops_gtt;
924 vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
929 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
930 #include "selftests/i915_gem_mman.c"