2 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
3 * FireStream 50 (MB86695) device driver
6 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
8 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
27 system and in the file COPYING in the Linux kernel source.
31 #include <linux/module.h>
32 #include <linux/sched.h>
33 #include <linux/kernel.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/errno.h>
38 #include <linux/atm.h>
39 #include <linux/atmdev.h>
40 #include <linux/sonet.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/delay.h>
44 #include <linux/ioport.h> /* for request_region */
45 #include <linux/uio.h>
46 #include <linux/init.h>
47 #include <linux/interrupt.h>
48 #include <linux/capability.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <asm/byteorder.h>
52 #include <asm/string.h>
54 #include <linux/atomic.h>
55 #include <linux/uaccess.h>
56 #include <linux/wait.h>
58 #include "firestream.h"
60 static int loopback = 0;
63 /* According to measurements (but they look suspicious to me!) done in
64 * '97, 37% of the packets are one cell in size. So it pays to have
65 * buffers allocated at that size. A large jump in percentage of
66 * packets occurs at packets around 536 bytes in length. So it also
67 * pays to have those pre-allocated. Unfortunately, we can't fully
68 * take advantage of this as the majority of the packets is likely to
69 * be TCP/IP (As where obviously the measurement comes from) There the
70 * link would be opened with say a 1500 byte MTU, and we can't handle
71 * smaller buffers more efficiently than the larger ones. -- REW
74 /* Due to the way Linux memory management works, specifying "576" as
75 * an allocation size here isn't going to help. They are allocated
76 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
77 * large), it doesn't pay to allocate the smallest size (64) -- REW */
79 /* This is all guesswork. Hard numbers to back this up or disprove this,
80 * are appreciated. -- REW */
82 /* The last entry should be about 64k. However, the "buffer size" is
83 * passed to the chip in a 16 bit field. I don't know how "65536"
84 * would be interpreted. -- REW */
86 #define NP FS_NR_FREE_POOLS
87 static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
88 /* log2: 7 8 9 10 11 12 14 16 */
91 static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
94 static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
96 /* log2: 10 10 9 8 7 6 5 5 */
97 /* sumlog2: 17 18 18 18 18 18 19 21 */
98 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
99 /* tot mem: almost 4M */
101 /* NP is shorter, so that it fits on a single line. */
105 /* Small hardware gotcha:
107 The FS50 CAM (VP/VC match registers) always take the lowest channel
108 number that matches. This is not a problem.
110 However, they also ignore whether the channel is enabled or
111 not. This means that if you allocate channel 0 to 1.2 and then
112 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
113 match channel for channel 0 will "steal" the traffic from channel
114 1, even if you correctly disable channel 0.
118 - When disabling channels, write an invalid VP/VC value to the
119 match register. (We use 0xffffffff, which in the worst case
120 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
121 anything as some "when not in use, program to 0" bits are now
124 - Don't initialize the match registers to 0, as 0.0 is a valid
129 /* Optimization hints and tips.
131 The FireStream chips are very capable of reducing the amount of
132 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
133 action. You could try to minimize this a bit.
135 Besides that, the userspace->kernel copy and the PCI bus are the
136 performance limiting issues for this driver.
138 You could queue up a bunch of outgoing packets without telling the
139 FireStream. I'm not sure that's going to win you much though. The
140 Linux layer won't tell us in advance when it's not going to give us
141 any more packets in a while. So this is tricky to implement right without
142 introducing extra delays.
150 /* The strings that define what the RX queue entry is all about. */
151 /* Fujitsu: Please tell me which ones can have a pointer to a
152 freepool descriptor! */
153 static char *res_strings[] = {
154 "RX OK: streaming not EOP",
155 "RX OK: streaming EOP",
156 "RX OK: Single buffer packet",
157 "RX OK: packet mode",
158 "RX OK: F4 OAM (end to end)",
159 "RX OK: F4 OAM (Segment)",
160 "RX OK: F5 OAM (end to end)",
161 "RX OK: F5 OAM (Segment)",
163 "RX OK: TRANSP cell",
164 "RX OK: TRANSPC cell",
171 "reassembly abort: AAL5 abort",
173 "packet ageing timeout",
174 "channel ageing timeout",
175 "calculated length error",
176 "programmed length limit error",
178 "oam transp or transpc crc10 error",
184 "reserved 30", /* FIXME: The strings between 30-40 might be wrong. */
185 "reassembly abort: no buffers",
186 "receive buffer overflow",
188 "receive buffer full",
189 "low priority discard - no receive descriptor",
190 "low priority discard - missing end of packet",
220 static char *irq_bitname[] = {
252 #define PHY_CLEARALL -2
254 struct reginit_item {
259 static struct reginit_item PHY_NTC_INIT[] = {
260 { PHY_CLEARALL, 0x40 },
266 { 0x39, 0x0006 }, /* changed here to make loopback */
270 { PHY_EOF, 0}, /* -1 signals end of list */
274 /* Safetyfeature: If the card interrupts more than this number of times
275 in a jiffy (1/100th of a second) then we just disable the interrupt and
276 print a message. This prevents the system from hanging.
278 150000 packets per second is close to the limit a PC is going to have
279 anyway. We therefore have to disable this for production. -- REW */
280 #undef IRQ_RATE_LIMIT // 100
282 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
283 that great without interrupts. -- REW */
284 #undef FS_POLL_FREQ // 100
287 This driver can spew a whole lot of debugging output at you. If you
288 need maximum performance, you should disable the DEBUG define. To
289 aid in debugging in the field, I'm leaving the compile-time debug
290 features enabled, and disable them "runtime". That allows me to
291 instruct people with problems to enable debugging without requiring
292 them to recompile... -- REW
297 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
299 #define fs_dprintk(f, str...) /* nothing */
303 static int fs_keystream = 0;
306 /* I didn't forget to set this to zero before shipping. Hit me with a stick
307 if you get this with the debug default not set to zero again. -- REW */
308 static int fs_debug = 0;
315 module_param(fs_debug, int, 0644);
317 module_param(loopback, int, 0);
318 module_param(num, int, 0);
319 module_param(fs_keystream, int, 0);
320 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
324 #define FS_DEBUG_FLOW 0x00000001
325 #define FS_DEBUG_OPEN 0x00000002
326 #define FS_DEBUG_QUEUE 0x00000004
327 #define FS_DEBUG_IRQ 0x00000008
328 #define FS_DEBUG_INIT 0x00000010
329 #define FS_DEBUG_SEND 0x00000020
330 #define FS_DEBUG_PHY 0x00000040
331 #define FS_DEBUG_CLEANUP 0x00000080
332 #define FS_DEBUG_QOS 0x00000100
333 #define FS_DEBUG_TXQ 0x00000200
334 #define FS_DEBUG_ALLOC 0x00000400
335 #define FS_DEBUG_TXMEM 0x00000800
336 #define FS_DEBUG_QSIZE 0x00001000
339 #define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
340 #define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __func__)
343 static struct fs_dev *fs_boards = NULL;
347 static void my_hd (void *addr, int len)
350 unsigned char *ptr = addr;
354 for (j=0;j < ((len < 16)?len:16);j++) {
355 printk ("%02x %s", ptr[j], (j==7)?" ":"");
358 printk (" %s", (j==7)?" ":"");
360 for (j=0;j < ((len < 16)?len:16);j++) {
362 printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
370 static void my_hd (void *addr, int len){}
373 /********** free an skb (as per ATM device driver documentation) **********/
375 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
376 * I copied it over from the ambassador driver. -- REW */
378 static inline void fs_kfree_skb (struct sk_buff * skb)
380 if (ATM_SKB(skb)->vcc->pop)
381 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
383 dev_kfree_skb_any (skb);
389 /* It seems the ATM forum recommends this horribly complicated 16bit
390 * floating point format. Turns out the Ambassador uses the exact same
391 * encoding. I just copied it over. If Mitch agrees, I'll move it over
392 * to the atm_misc file or something like that. (and remove it from
393 * here and the ambassador driver) -- REW
396 /* The good thing about this format is that it is monotonic. So,
397 a conversion routine need not be very complicated. To be able to
398 round "nearest" we need to take along a few extra bits. Lets
399 put these after 16 bits, so that we can just return the top 16
400 bits of the 32bit number as the result:
402 int mr (unsigned int rate, int r)
405 static int round[4]={0, 0, 0xffff, 0x8000};
407 while (rate & 0xfc000000) {
411 while (! (rate & 0xfe000000)) {
416 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
418 // Next add in the exponent
420 // And perform the rounding:
421 return (rate + round[r]) >> 16;
424 14 lines-of-code. Compare that with the 120 that the Ambassador
425 guys needed. (would be 8 lines shorter if I'd try to really reduce
428 int mr (unsigned int rate, int r)
431 static int round[4]={0, 0, 0xffff, 0x8000};
433 for (; rate & 0xfc000000 ;rate >>= 1, e++);
434 for (;!(rate & 0xfe000000);rate <<= 1, e--);
435 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
438 Exercise for the reader: Remove one more line-of-code, without
439 cheating. (Just joining two lines is cheating). (I know it's
440 possible, don't think you've beat me if you found it... If you
441 manage to lose two lines or more, keep me updated! ;-)
448 #define ROUND_NEAREST 3
449 /********** make rate (not quite as much fun as Horizon) **********/
451 static int make_rate(unsigned int rate, int r,
452 u16 *bits, unsigned int *actual)
454 unsigned char exp = -1; /* hush gcc */
455 unsigned int man = -1; /* hush gcc */
457 fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
459 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
460 given 5-bit e and 9-bit m:
461 rate = EITHER (1+m/2^9)*2^e OR 0
462 bits = EITHER 1<<14 | e<<9 | m OR 0
463 (bit 15 is "reserved", bit 14 "non-zero")
464 smallest rate is 0 (special representation)
465 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
466 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
468 find position of top bit, this gives e
469 remove top bit and shift (rounding if feeling clever) by 9-e
471 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
472 representable. // This should move into the ambassador driver
473 when properly merged. -- REW */
475 if (rate > 0xffc00000U) {
476 /* larger than largest representable rate */
486 /* representable rate */
491 /* invariant: rate = man*2^(exp-31) */
492 while (!(man & (1<<31))) {
497 /* man has top bit set
498 rate = (2^31+(man-2^31))*2^(exp-31)
499 rate = (1+(man-2^31)/2^31)*2^exp
502 man &= 0xffffffffU; /* a nop on 32-bit systems */
503 /* rate = (1+man/2^32)*2^exp
505 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
506 time to lose significance... we want m in the range 0 to 2^9-1
507 rounding presents a minor problem... we first decide which way
508 we are rounding (based on given rounding direction and possibly
509 the bits of the mantissa that are to be discarded).
519 /* check all bits that we are discarding */
520 if (man & (~0U>>9)) {
521 man = (man>>(32-9)) + 1;
523 /* no need to check for round up outside of range */
532 case ROUND_NEAREST: {
533 /* check msb that we are discarding */
534 if (man & (1<<(32-9-1))) {
535 man = (man>>(32-9)) + 1;
537 /* no need to check for round up outside of range */
549 /* zero rate - not representable */
551 if (r == ROUND_DOWN) {
559 fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
562 *bits = /* (1<<14) | */ (exp<<9) | man;
566 ? (1 << exp) + (man << (exp-9))
567 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
575 /* FireStream access routines */
576 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
577 certain registers or to just log all accesses. */
579 static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
581 writel (val, dev->base + offset);
585 static inline u32 read_fs (struct fs_dev *dev, int offset)
587 return readl (dev->base + offset);
592 static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
594 return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
598 static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
601 struct FS_QENTRY *cqe;
603 /* XXX Sanity check: the write pointer can be checked to be
604 still the same as the value passed as qe... -- REW */
606 while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
607 fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n",
613 cqe = bus_to_virt (wp);
615 fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
618 write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
625 rp = read_fs (dev, Q_RP(q->offset));
626 wp = read_fs (dev, Q_WP(q->offset));
627 fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n",
628 q->offset, rp, wp, wp-rp);
634 static struct FS_QENTRY pq[60];
637 static struct FS_BPENTRY dq[60];
642 static void submit_queue (struct fs_dev *dev, struct queue *q,
643 u32 cmd, u32 p1, u32 p2, u32 p3)
645 struct FS_QENTRY *qe;
647 qe = get_qentry (dev, q);
652 submit_qentry (dev, q, qe);
660 if (qp >= 60) qp = 0;
664 /* Test the "other" way one day... -- REW */
666 #define submit_command submit_queue
669 static void submit_command (struct fs_dev *dev, struct queue *q,
670 u32 cmd, u32 p1, u32 p2, u32 p3)
672 write_fs (dev, CMDR0, cmd);
673 write_fs (dev, CMDR1, p1);
674 write_fs (dev, CMDR2, p2);
675 write_fs (dev, CMDR3, p3);
681 static void process_return_queue (struct fs_dev *dev, struct queue *q)
684 struct FS_QENTRY *qe;
687 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
688 fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq);
689 qe = bus_to_virt (rq);
691 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n",
692 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
694 switch (STATUS_CODE (qe)) {
696 tc = bus_to_virt (qe->p0);
697 fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
702 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
707 static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
711 struct FS_QENTRY *qe;
713 struct FS_BPENTRY *td;
715 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
716 fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq);
717 qe = bus_to_virt (rq);
719 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n",
720 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
722 if (STATUS_CODE (qe) != 2)
723 fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n",
724 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
727 switch (STATUS_CODE (qe)) {
728 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
731 /* Process a real txdone entry. */
734 printk (KERN_WARNING "td not aligned: %ld\n", tmp);
736 td = bus_to_virt (tmp);
738 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n",
739 td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
742 if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
743 FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
744 wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
752 fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
756 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
758 fs_dprintk (FS_DEBUG_TXMEM, "i");
759 fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
762 fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td);
763 memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY));
767 /* Here we get the tx purge inhibit command ... */
768 /* Action, I believe, is "don't do anything". -- REW */
772 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
777 static void process_incoming (struct fs_dev *dev, struct queue *q)
780 struct FS_QENTRY *qe;
781 struct FS_BPENTRY *pe;
784 struct atm_vcc *atm_vcc;
786 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
787 fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq);
788 qe = bus_to_virt (rq);
790 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ",
791 qe->cmd, qe->p0, qe->p1, qe->p2);
793 fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n",
795 res_strings[STATUS_CODE(qe)]);
797 pe = bus_to_virt (qe->p0);
798 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n",
799 pe->flags, pe->next, pe->bsa, pe->aal_bufsize,
802 channo = qe->cmd & 0xffff;
804 if (channo < dev->nchannels)
805 atm_vcc = dev->atm_vccs[channo];
809 /* Single buffer packet */
810 switch (STATUS_CODE (qe)) {
812 /* Fall through for streaming mode */
813 case 0x2:/* Packet received OK.... */
818 fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
819 if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
821 skb_put (skb, qe->p1 & 0xffff);
822 ATM_SKB(skb)->vcc = atm_vcc;
823 atomic_inc(&atm_vcc->stats->rx);
824 __net_timestamp(skb);
825 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
826 atm_vcc->push (atm_vcc, skb);
827 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
830 printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
833 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
834 has been consumed and needs to be processed. -- REW */
835 if (qe->p1 & 0xffff) {
836 pe = bus_to_virt (qe->p0);
838 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
839 dev_kfree_skb_any (pe->skb);
840 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
844 atomic_inc(&atm_vcc->stats->rx_drop);
846 case 0x1f: /* Reassembly abort: no buffers. */
847 /* Silently increment error counter. */
849 atomic_inc(&atm_vcc->stats->rx_drop);
851 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
852 printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n",
853 STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
855 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
861 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
863 static int fs_open(struct atm_vcc *atm_vcc)
867 struct fs_transmit_config *tc;
868 struct atm_trafprm * txtp;
869 struct atm_trafprm * rxtp;
870 /* struct fs_receive_config *rc;*/
871 /* struct FS_QENTRY *qe; */
876 short vpi = atm_vcc->vpi;
877 int vci = atm_vcc->vci;
881 dev = FS_DEV(atm_vcc->dev);
882 fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n",
885 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
886 set_bit(ATM_VF_ADDR, &atm_vcc->flags);
888 if ((atm_vcc->qos.aal != ATM_AAL5) &&
889 (atm_vcc->qos.aal != ATM_AAL2))
890 return -EINVAL; /* XXX AAL0 */
892 fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n",
893 atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);
895 /* XXX handle qos parameters (rate limiting) ? */
897 vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
898 fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%zd)\n", vcc, sizeof(struct fs_vcc));
900 clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
904 atm_vcc->dev_data = vcc;
905 vcc->last_skb = NULL;
907 init_waitqueue_head (&vcc->close_wait);
909 txtp = &atm_vcc->qos.txtp;
910 rxtp = &atm_vcc->qos.rxtp;
912 if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
914 /* Increment the channel numer: take a free one next time. */
915 for (to=33;to;to--, dev->channo++) {
916 /* We only have 32 channels */
917 if (dev->channo >= 32)
919 /* If we need to do RX, AND the RX is inuse, try the next */
920 if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
922 /* If we need to do TX, AND the TX is inuse, try the next */
923 if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
925 /* Ok, both are free! (or not needed) */
929 printk ("No more free channels for FS50..\n");
933 vcc->channo = dev->channo;
934 dev->channo &= dev->channel_mask;
937 vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
938 if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
939 ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
940 printk ("Channel is in use for FS155.\n");
945 fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n",
946 vcc->channo, vcc->channo);
949 if (DO_DIRECTION (txtp)) {
950 tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
951 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%zd)\n",
952 tc, sizeof (struct fs_transmit_config));
954 fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
959 /* Allocate the "open" entry from the high priority txq. This makes
960 it most likely that the chip will notice it. It also prevents us
961 from having to wait for completion. On the other hand, we may
962 need to wait for completion anyway, to see if it completed
965 switch (atm_vcc->qos.aal) {
969 | TC_FLAGS_TRANSPARENT_PAYLOAD
972 | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
978 | TC_FLAGS_PACKET /* ??? */
983 printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
986 /* Docs are vague about this atm_hdr field. By the way, the FS
987 * chip makes odd errors if lower bits are set.... -- REW */
988 tc->atm_hdr = (vpi << 20) | (vci << 4);
991 int pcr = atm_pcr_goal (txtp);
993 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
995 /* XXX Hmm. officially we're only allowed to do this if rounding
996 is round_down -- REW */
998 if (pcr > 51840000/53/8) pcr = 51840000/53/8;
1000 if (pcr > 155520000/53/8) pcr = 155520000/53/8;
1004 tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
1013 error = make_rate (pcr, r, &tmc0, NULL);
1020 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1023 tc->TMC[0] = tmc0 | 0x4000;
1024 tc->TMC[1] = 0; /* Unused */
1025 tc->TMC[2] = 0; /* Unused */
1026 tc->TMC[3] = 0; /* Unused */
1028 tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1029 tc->rtag[0] = 0; /* What should I do with routing tags???
1030 -- Not used -- AS -- Thanks -- REW*/
1034 if (fs_debug & FS_DEBUG_OPEN) {
1035 fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1036 my_hd (tc, sizeof (*tc));
1039 /* We now use the "submit_command" function to submit commands to
1040 the firestream. There is a define up near the definition of
1041 that routine that switches this routine between immediate write
1042 to the immediate command registers and queuing the commands in
1043 the HPTXQ for execution. This last technique might be more
1044 efficient if we know we're going to submit a whole lot of
1045 commands in one go, but this driver is not setup to be able to
1046 use such a construct. So it probably doen't matter much right
1049 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1050 submit_command (dev, &dev->hp_txq,
1051 QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1052 virt_to_bus (tc), 0, 0);
1054 submit_command (dev, &dev->hp_txq,
1055 QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1057 set_bit (vcc->channo, dev->tx_inuse);
1060 if (DO_DIRECTION (rxtp)) {
1061 dev->atm_vccs[vcc->channo] = atm_vcc;
1063 for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1064 if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1065 if (bfp >= FS_NR_FREE_POOLS) {
1066 fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n",
1067 atm_vcc->qos.rxtp.max_sdu);
1068 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1070 /* XXX clear tx inuse. Close TX part? */
1071 dev->atm_vccs[vcc->channo] = NULL;
1076 switch (atm_vcc->qos.aal) {
1079 submit_command (dev, &dev->hp_txq,
1080 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1082 RC_FLAGS_BFPS_BFP * bfp |
1083 RC_FLAGS_RXBM_PSB, 0, 0);
1086 submit_command (dev, &dev->hp_txq,
1087 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1089 RC_FLAGS_BFPS_BFP * bfp |
1090 RC_FLAGS_RXBM_PSB, 0, 0);
1093 if (IS_FS50 (dev)) {
1094 submit_command (dev, &dev->hp_txq,
1095 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1097 (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1099 submit_command (dev, &dev->hp_txq,
1100 QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1104 /* Indicate we're done! */
1105 set_bit(ATM_VF_READY, &atm_vcc->flags);
1112 static void fs_close(struct atm_vcc *atm_vcc)
1114 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1115 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1116 struct atm_trafprm * txtp;
1117 struct atm_trafprm * rxtp;
1121 clear_bit(ATM_VF_READY, &atm_vcc->flags);
1123 fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1124 if (vcc->last_skb) {
1125 fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n",
1127 /* We're going to wait for the last packet to get sent on this VC. It would
1128 be impolite not to send them don't you think?
1130 We don't know which packets didn't get sent. So if we get interrupted in
1131 this sleep_on, we'll lose any reference to these packets. Memory leak!
1132 On the other hand, it's awfully convenient that we can abort a "close" that
1133 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1134 wait_event_interruptible(vcc->close_wait, !vcc->last_skb);
1137 txtp = &atm_vcc->qos.txtp;
1138 rxtp = &atm_vcc->qos.rxtp;
1141 /* See App note XXX (Unpublished as of now) for the reason for the
1142 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1144 if (DO_DIRECTION (txtp)) {
1145 submit_command (dev, &dev->hp_txq,
1146 QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1147 clear_bit (vcc->channo, dev->tx_inuse);
1150 if (DO_DIRECTION (rxtp)) {
1151 submit_command (dev, &dev->hp_txq,
1152 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1153 dev->atm_vccs [vcc->channo] = NULL;
1155 /* This means that this is configured as a receive channel */
1156 if (IS_FS50 (dev)) {
1157 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1158 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1159 (0xfff...) -- REW */
1160 submit_command (dev, &dev->hp_txq,
1161 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1162 0x80 + vcc->channo, -1, 0 );
1166 fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1173 static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1175 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1176 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1177 struct FS_BPENTRY *td;
1181 fs_dprintk (FS_DEBUG_TXMEM, "I");
1182 fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1183 atm_vcc, skb, vcc, dev);
1185 fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1187 ATM_SKB(skb)->vcc = atm_vcc;
1189 vcc->last_skb = skb;
1191 td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1192 fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%zd)\n", td, sizeof (struct FS_BPENTRY));
1194 /* Oops out of mem */
1198 fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n",
1199 *(int *) skb->data);
1201 td->flags = TD_EPI | TD_DATA | skb->len;
1203 td->bsa = virt_to_bus (skb->data);
1210 dq[qd].flags = td->flags;
1211 dq[qd].next = td->next;
1212 dq[qd].bsa = td->bsa;
1213 dq[qd].skb = td->skb;
1214 dq[qd].dev = td->dev;
1216 if (qd >= 60) qd = 0;
1219 submit_queue (dev, &dev->hp_txq,
1220 QE_TRANSMIT_DE | vcc->channo,
1221 virt_to_bus (td), 0,
1224 fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n",
1225 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1226 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1227 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1228 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1235 /* Some function placeholders for functions we don't yet support. */
1238 static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1242 return -ENOIOCTLCMD;
1246 static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1247 void __user *optval,int optlen)
1255 static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1256 void __user *optval,unsigned int optlen)
1264 static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1272 static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1280 static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1290 static const struct atmdev_ops ops = {
1294 .owner = THIS_MODULE,
1295 /* ioctl: fs_ioctl, */
1296 /* getsockopt: fs_getsockopt, */
1297 /* setsockopt: fs_setsockopt, */
1298 /* change_qos: fs_change_qos, */
1300 /* For now implement these internally here... */
1301 /* phy_put: fs_phy_put, */
1302 /* phy_get: fs_phy_get, */
1306 static void undocumented_pci_fix(struct pci_dev *pdev)
1310 /* The Windows driver says: */
1311 /* Switch off FireStream Retry Limit Threshold
1314 /* The register at 0x28 is documented as "reserved", no further
1317 pci_read_config_dword (pdev, 0x28, &tint);
1320 pci_write_config_dword (pdev, 0x28, tint);
1326 /**************************************************************************
1328 **************************************************************************/
1330 static void write_phy(struct fs_dev *dev, int regnum, int val)
1332 submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1336 static int init_phy(struct fs_dev *dev, struct reginit_item *reginit)
1341 while (reginit->reg != PHY_EOF) {
1342 if (reginit->reg == PHY_CLEARALL) {
1343 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1344 for (i=0;i<reginit->val;i++) {
1345 write_phy (dev, i, 0);
1348 write_phy (dev, reginit->reg, reginit->val);
1356 static void reset_chip (struct fs_dev *dev)
1360 write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1362 /* Undocumented delay */
1365 /* The "internal registers are documented to all reset to zero, but
1366 comments & code in the Windows driver indicates that the pools are
1368 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1369 write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1370 write_fs (dev, FP_SA (RXB_FP(i)), 0);
1371 write_fs (dev, FP_EA (RXB_FP(i)), 0);
1372 write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1373 write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1376 /* The same goes for the match channel registers, although those are
1377 NOT documented that way in the Windows driver. -- REW */
1378 /* The Windows driver DOES write 0 to these registers somewhere in
1379 the init sequence. However, a small hardware-feature, will
1380 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1381 allocated happens to have no disabled channels that have a lower
1384 /* Clear the match channel registers. */
1385 if (IS_FS50 (dev)) {
1386 for (i=0;i<FS50_NR_CHANNELS;i++) {
1387 write_fs (dev, 0x200 + i * 4, -1);
1392 static void *aligned_kmalloc(int size, gfp_t flags, int alignment)
1396 if (alignment <= 0x10) {
1397 t = kmalloc (size, flags);
1398 if ((unsigned long)t & (alignment-1)) {
1399 printk ("Kmalloc doesn't align things correctly! %p\n", t);
1401 return aligned_kmalloc (size, flags, alignment * 4);
1405 printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1409 static int init_q(struct fs_dev *dev, struct queue *txq, int queue,
1410 int nentries, int is_rq)
1412 int sz = nentries * sizeof (struct FS_QENTRY);
1413 struct FS_QENTRY *p;
1417 fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n",
1420 p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1421 fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1425 write_fs (dev, Q_SA(queue), virt_to_bus(p));
1426 write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1427 write_fs (dev, Q_WP(queue), virt_to_bus(p));
1428 write_fs (dev, Q_RP(queue), virt_to_bus(p));
1430 /* Configuration for the receive queue: 0: interrupt immediately,
1431 no pre-warning to empty queues: We do our best to keep the
1432 queue filled anyway. */
1433 write_fs (dev, Q_CNF(queue), 0 );
1438 txq->offset = queue;
1445 static int init_fp(struct fs_dev *dev, struct freepool *fp, int queue,
1446 int bufsize, int nr_buffers)
1450 fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue);
1452 write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1453 write_fs (dev, FP_SA(queue), 0);
1454 write_fs (dev, FP_EA(queue), 0);
1455 write_fs (dev, FP_CTU(queue), 0);
1456 write_fs (dev, FP_CNT(queue), 0);
1459 fp->bufsize = bufsize;
1460 fp->nr_buffers = nr_buffers;
1467 static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1470 /* This seems to be unreliable.... */
1471 return read_fs (dev, FP_CNT (fp->offset));
1478 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1479 does. I've seen "receive abort: no buffers" and things started
1480 working again after that... -- REW */
1482 static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
1485 struct FS_BPENTRY *qe, *ne;
1486 struct sk_buff *skb;
1490 fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n",
1491 fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n,
1493 while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1495 skb = alloc_skb (fp->bufsize, gfp_flags);
1496 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1498 ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1499 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%zd)\n", ne, sizeof (struct FS_BPENTRY));
1501 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1502 dev_kfree_skb_any (skb);
1506 fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ",
1507 skb, ne, skb->data, skb->head);
1509 ne->flags = FP_FLAGS_EPI | fp->bufsize;
1510 ne->next = virt_to_bus (NULL);
1511 ne->bsa = virt_to_bus (skb->data);
1512 ne->aal_bufsize = fp->bufsize;
1517 * FIXME: following code encodes and decodes
1518 * machine pointers (could be 64-bit) into a
1522 qe_tmp = read_fs (dev, FP_EA(fp->offset));
1523 fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp);
1525 qe = bus_to_virt ((long) qe_tmp);
1526 qe->next = virt_to_bus(ne);
1527 qe->flags &= ~FP_FLAGS_EPI;
1529 write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1531 write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1532 fp->n++; /* XXX Atomic_inc? */
1533 write_fs (dev, FP_CTU(fp->offset), 1);
1536 fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1539 static void free_queue(struct fs_dev *dev, struct queue *txq)
1543 write_fs (dev, Q_SA(txq->offset), 0);
1544 write_fs (dev, Q_EA(txq->offset), 0);
1545 write_fs (dev, Q_RP(txq->offset), 0);
1546 write_fs (dev, Q_WP(txq->offset), 0);
1547 /* Configuration ? */
1549 fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1555 static void free_freepool(struct fs_dev *dev, struct freepool *fp)
1559 write_fs (dev, FP_CNF(fp->offset), 0);
1560 write_fs (dev, FP_SA (fp->offset), 0);
1561 write_fs (dev, FP_EA (fp->offset), 0);
1562 write_fs (dev, FP_CNT(fp->offset), 0);
1563 write_fs (dev, FP_CTU(fp->offset), 0);
1570 static irqreturn_t fs_irq (int irq, void *dev_id)
1574 struct fs_dev *dev = dev_id;
1576 status = read_fs (dev, ISR);
1582 #ifdef IRQ_RATE_LIMIT
1583 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1584 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1589 if (lastjif == jiffies) {
1590 if (++nintr > IRQ_RATE_LIMIT) {
1591 free_irq (dev->irq, dev_id);
1592 printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n",
1601 fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n",
1602 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1603 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1604 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1605 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1607 /* print the bits in the ISR register. */
1608 if (fs_debug & FS_DEBUG_IRQ) {
1609 /* The FS_DEBUG things are unnecessary here. But this way it is
1610 clear for grep that these are debug prints. */
1611 fs_dprintk (FS_DEBUG_IRQ, "IRQ status:");
1613 if (status & (1 << i))
1614 fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1615 fs_dprintk (FS_DEBUG_IRQ, "\n");
1618 if (status & ISR_RBRQ0_W) {
1619 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1620 process_incoming (dev, &dev->rx_rq[0]);
1621 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1622 top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1623 top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1626 if (status & ISR_RBRQ1_W) {
1627 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1628 process_incoming (dev, &dev->rx_rq[1]);
1629 top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1630 top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1633 if (status & ISR_RBRQ2_W) {
1634 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1635 process_incoming (dev, &dev->rx_rq[2]);
1636 top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1637 top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1640 if (status & ISR_RBRQ3_W) {
1641 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1642 process_incoming (dev, &dev->rx_rq[3]);
1643 top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1644 top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1647 if (status & ISR_CSQ_W) {
1648 fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1649 process_return_queue (dev, &dev->st_q);
1652 if (status & ISR_TBRQ_W) {
1653 fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n");
1654 process_txdone_queue (dev, &dev->tx_relq);
1663 static void fs_poll (unsigned long data)
1665 struct fs_dev *dev = (struct fs_dev *) data;
1668 dev->timer.expires = jiffies + FS_POLL_FREQ;
1669 add_timer (&dev->timer);
1673 static int fs_init(struct fs_dev *dev)
1675 struct pci_dev *pci_dev;
1680 pci_dev = dev->pci_dev;
1682 printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n",
1683 IS_FS50(dev)?50:155,
1684 (unsigned long long)pci_resource_start(pci_dev, 0),
1687 if (fs_debug & FS_DEBUG_INIT)
1688 my_hd ((unsigned char *) dev, sizeof (*dev));
1690 undocumented_pci_fix (pci_dev);
1692 dev->hw_base = pci_resource_start(pci_dev, 0);
1694 dev->base = ioremap(dev->hw_base, 0x1000);
1698 write_fs (dev, SARMODE0, 0
1699 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1700 | (1 * SARMODE0_INTMODE_READCLEAR)
1701 | (1 * SARMODE0_CWRE)
1702 | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
1703 SARMODE0_PRPWT_FS155_3)
1704 | (1 * SARMODE0_CALSUP_1)
1705 | (IS_FS50(dev) ? (0
1707 | SARMODE0_ABRVCS_32
1708 | SARMODE0_TXVCS_32):
1711 | SARMODE0_ABRVCS_1k
1712 | SARMODE0_TXVCS_1k)));
1714 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1718 isr = read_fs (dev, ISR);
1720 /* This bit is documented as "RESERVED" */
1721 if (isr & ISR_INIT_ERR) {
1722 printk (KERN_ERR "Error initializing the FS... \n");
1725 if (isr & ISR_INIT) {
1726 fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1730 /* Try again after 10ms. */
1735 printk (KERN_ERR "timeout initializing the FS... \n");
1739 /* XXX fix for fs155 */
1740 dev->channel_mask = 0x1f;
1744 write_fs (dev, SARMODE1, 0
1745 | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1746 | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1747 | (1 * SARMODE1_DCRM)
1748 | (1 * SARMODE1_DCOAM)
1749 | (0 * SARMODE1_OAMCRC)
1750 | (0 * SARMODE1_DUMPE)
1751 | (0 * SARMODE1_GPLEN)
1752 | (0 * SARMODE1_GNAM)
1753 | (0 * SARMODE1_GVAS)
1754 | (0 * SARMODE1_GPAS)
1755 | (1 * SARMODE1_GPRI)
1756 | (0 * SARMODE1_PMS)
1757 | (0 * SARMODE1_GFCR)
1758 | (1 * SARMODE1_HECM2)
1759 | (1 * SARMODE1_HECM1)
1760 | (1 * SARMODE1_HECM0)
1761 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1762 | (0 * 0xff) /* XXX FS155 */);
1765 /* Cal prescale etc */
1768 write_fs (dev, TMCONF, 0x0000000f);
1769 write_fs (dev, CALPRESCALE, 0x01010101 * num);
1770 write_fs (dev, 0x80, 0x000F00E4);
1773 write_fs (dev, CELLOSCONF, 0
1774 | ( 0 * CELLOSCONF_CEN)
1776 | (0x80 * CELLOSCONF_COBS)
1777 | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */
1778 | (num * CELLOSCONF_COST));/* after a hint from Hang.
1779 * performance jumped 50->70... */
1781 /* Magic value by Hang */
1782 write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1784 if (IS_FS50 (dev)) {
1785 write_fs (dev, RAS0, RAS0_DCD_XHLT);
1786 dev->atm_dev->ci_range.vpi_bits = 12;
1787 dev->atm_dev->ci_range.vci_bits = 16;
1788 dev->nchannels = FS50_NR_CHANNELS;
1790 write_fs (dev, RAS0, RAS0_DCD_XHLT
1791 | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1792 | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1793 /* We can chose the split arbitrarily. We might be able to
1794 support more. Whatever. This should do for now. */
1795 dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1796 dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1798 /* Address bits we can't use should be compared to 0. */
1799 write_fs (dev, RAC, 0);
1801 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1802 * too. I can't find ASF1 anywhere. Anyway, we AND with just the
1803 * other bits, then compare with 0, which is exactly what we
1805 write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1806 dev->nchannels = FS155_NR_CHANNELS;
1808 dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *),
1810 fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%zd)\n",
1811 dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1813 if (!dev->atm_vccs) {
1814 printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1815 /* XXX Clean up..... */
1819 dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1820 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n",
1821 dev->atm_vccs, dev->nchannels / 8);
1823 if (!dev->tx_inuse) {
1824 printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1825 /* XXX Clean up..... */
1828 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1829 /* -- RAS2 : FS50 only: Default is OK. */
1831 /* DMAMODE, default should be OK. -- REW */
1832 write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1834 init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1835 init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1836 init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1837 init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1839 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1840 init_fp (dev, &dev->rx_fp[i], RXB_FP(i),
1841 rx_buf_sizes[i], rx_pool_sizes[i]);
1842 top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1846 for (i=0;i < FS_NR_RX_QUEUES;i++)
1847 init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1849 dev->irq = pci_dev->irq;
1850 if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) {
1851 printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1852 /* XXX undo all previous stuff... */
1855 fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1857 /* We want to be notified of most things. Just the statistics count
1858 overflows are not interesting */
1859 write_fs (dev, IMR, 0
1867 write_fs (dev, SARMODE0, 0
1868 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1869 | (1 * SARMODE0_GINT)
1870 | (1 * SARMODE0_INTMODE_READCLEAR)
1871 | (0 * SARMODE0_CWRE)
1872 | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5:
1873 SARMODE0_PRPWT_FS155_3)
1874 | (1 * SARMODE0_CALSUP_1)
1877 | SARMODE0_ABRVCS_32
1878 | SARMODE0_TXVCS_32):
1881 | SARMODE0_ABRVCS_1k
1882 | SARMODE0_TXVCS_1k))
1883 | (1 * SARMODE0_RUN));
1885 init_phy (dev, PHY_NTC_INIT);
1887 if (loopback == 2) {
1888 write_phy (dev, 0x39, 0x000e);
1892 init_timer (&dev->timer);
1893 dev->timer.data = (unsigned long) dev;
1894 dev->timer.function = fs_poll;
1895 dev->timer.expires = jiffies + FS_POLL_FREQ;
1896 add_timer (&dev->timer);
1899 dev->atm_dev->dev_data = dev;
1908 static int firestream_init_one(struct pci_dev *pci_dev,
1909 const struct pci_device_id *ent)
1911 struct atm_dev *atm_dev;
1912 struct fs_dev *fs_dev;
1914 if (pci_enable_device(pci_dev))
1917 fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL);
1918 fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%zd)\n",
1919 fs_dev, sizeof (struct fs_dev));
1922 atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL);
1924 goto err_out_free_fs_dev;
1926 fs_dev->pci_dev = pci_dev;
1927 fs_dev->atm_dev = atm_dev;
1928 fs_dev->flags = ent->driver_data;
1930 if (fs_init(fs_dev))
1931 goto err_out_free_atm_dev;
1933 fs_dev->next = fs_boards;
1937 err_out_free_atm_dev:
1938 atm_dev_deregister(atm_dev);
1939 err_out_free_fs_dev:
1945 static void firestream_remove_one(struct pci_dev *pdev)
1948 struct fs_dev *dev, *nxtdev;
1950 struct FS_BPENTRY *fp, *nxt;
1955 printk ("hptxq:\n");
1956 for (i=0;i<60;i++) {
1957 printk ("%d: %08x %08x %08x %08x \n",
1958 i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1960 if (qp >= 60) qp = 0;
1963 printk ("descriptors:\n");
1964 for (i=0;i<60;i++) {
1965 printk ("%d: %p: %08x %08x %p %p\n",
1966 i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1968 if (qd >= 60) qd = 0;
1972 for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1973 fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1975 /* XXX Hit all the tx channels too! */
1977 for (i=0;i < dev->nchannels;i++) {
1978 if (dev->atm_vccs[i]) {
1979 vcc = FS_VCC (dev->atm_vccs[i]);
1980 submit_command (dev, &dev->hp_txq,
1981 QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1982 submit_command (dev, &dev->hp_txq,
1983 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1988 /* XXX Wait a while for the chip to release all buffers. */
1990 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1991 for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1992 !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1993 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1994 dev_kfree_skb_any (fp->skb);
1995 nxt = bus_to_virt (fp->next);
1996 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1999 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
2000 dev_kfree_skb_any (fp->skb);
2001 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
2005 /* Hang the chip in "reset", prevent it clobbering memory that is
2009 fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
2010 free_irq (dev->irq, dev);
2011 del_timer_sync (&dev->timer);
2013 atm_dev_deregister(dev->atm_dev);
2014 free_queue (dev, &dev->hp_txq);
2015 free_queue (dev, &dev->lp_txq);
2016 free_queue (dev, &dev->tx_relq);
2017 free_queue (dev, &dev->st_q);
2019 fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
2020 kfree (dev->atm_vccs);
2022 for (i=0;i< FS_NR_FREE_POOLS;i++)
2023 free_freepool (dev, &dev->rx_fp[i]);
2025 for (i=0;i < FS_NR_RX_QUEUES;i++)
2026 free_queue (dev, &dev->rx_rq[i]);
2029 fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2037 static const struct pci_device_id firestream_pci_tbl[] = {
2038 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2039 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2043 MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2045 static struct pci_driver firestream_driver = {
2046 .name = "firestream",
2047 .id_table = firestream_pci_tbl,
2048 .probe = firestream_init_one,
2049 .remove = firestream_remove_one,
2052 static int __init firestream_init_module (void)
2057 error = pci_register_driver(&firestream_driver);
2062 static void __exit firestream_cleanup_module(void)
2064 pci_unregister_driver(&firestream_driver);
2067 module_init(firestream_init_module);
2068 module_exit(firestream_cleanup_module);
2070 MODULE_LICENSE("GPL");