2 * FB driver for the SSD1306 OLED Controller
4 * Copyright (C) 2013 Noralf Tronnes
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/gpio.h>
21 #include <linux/delay.h>
25 #define DRVNAME "fb_ssd1306"
32 * This doesn't work because D/C has to be LOW for both values:
33 * write_reg(par, val1, val2);
36 * write_reg(par, val1);
37 * write_reg(par, val2);
40 /* Init sequence taken from the Adafruit SSD1306 Arduino library */
41 static int init_display(struct fbtft_par *par)
43 par->fbtftops.reset(par);
45 if (par->gamma.curves[0] == 0) {
46 mutex_lock(&par->gamma.lock);
47 if (par->info->var.yres == 64)
48 par->gamma.curves[0] = 0xCF;
50 par->gamma.curves[0] = 0x8F;
51 mutex_unlock(&par->gamma.lock);
57 /* Set Display Clock Divide Ratio/ Oscillator Frequency */
61 /* Set Multiplex Ratio */
63 if (par->info->var.yres == 64)
65 else if (par->info->var.yres == 48)
70 /* Set Display Offset */
74 /* Set Display Start Line */
75 write_reg(par, 0x40 | 0x0);
77 /* Charge Pump Setting */
79 /* A[2] = 1b, Enable charge pump during display on */
82 /* Set Memory Addressing Mode */
84 /* Vertical addressing mode */
87 /* Set Segment Re-map */
88 /* column address 127 is mapped to SEG0 */
89 write_reg(par, 0xA0 | 0x1);
91 /* Set COM Output Scan Direction */
92 /* remapped mode. Scan from COM[N-1] to COM0 */
95 /* Set COM Pins Hardware Configuration */
97 if (par->info->var.yres == 64)
98 /* A[4]=1b, Alternative COM pin configuration */
100 else if (par->info->var.yres == 48)
101 /* A[4]=1b, Alternative COM pin configuration */
102 write_reg(par, 0x12);
104 /* A[4]=0b, Sequential COM pin configuration */
105 write_reg(par, 0x02);
107 /* Set Pre-charge Period */
108 write_reg(par, 0xD9);
109 write_reg(par, 0xF1);
111 /* Set VCOMH Deselect Level */
112 write_reg(par, 0xDB);
113 /* according to the datasheet, this value is out of bounds */
114 write_reg(par, 0x40);
116 /* Entire Display ON */
117 /* Resume to RAM content display. Output follows RAM content */
118 write_reg(par, 0xA4);
120 /* Set Normal Display
121 * 0 in RAM: OFF in display panel
122 * 1 in RAM: ON in display panel
124 write_reg(par, 0xA6);
127 write_reg(par, 0xAF);
132 static void set_addr_win_64x48(struct fbtft_par *par)
134 /* Set Column Address */
135 write_reg(par, 0x21);
136 write_reg(par, 0x20);
137 write_reg(par, 0x5F);
139 /* Set Page Address */
140 write_reg(par, 0x22);
145 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
147 /* Set Lower Column Start Address for Page Addressing Mode */
148 write_reg(par, 0x00 | 0x0);
149 /* Set Higher Column Start Address for Page Addressing Mode */
150 write_reg(par, 0x10 | 0x0);
151 /* Set Display Start Line */
152 write_reg(par, 0x40 | 0x0);
154 if (par->info->var.xres == 64 && par->info->var.yres == 48)
155 set_addr_win_64x48(par);
158 static int blank(struct fbtft_par *par, bool on)
160 fbtft_par_dbg(DEBUG_BLANK, par, "%s(blank=%s)\n",
161 __func__, on ? "true" : "false");
164 write_reg(par, 0xAE);
166 write_reg(par, 0xAF);
170 /* Gamma is used to control Contrast */
171 static int set_gamma(struct fbtft_par *par, u32 *curves)
176 /* Set Contrast Control for BANK0 */
177 write_reg(par, 0x81);
178 write_reg(par, curves[0]);
183 static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
185 u16 *vmem16 = (u16 *)par->info->screen_buffer;
186 u32 xres = par->info->var.xres;
187 u32 yres = par->info->var.yres;
188 u8 *buf = par->txbuf.buf;
192 for (x = 0; x < xres; x++) {
193 for (y = 0; y < yres / 8; y++) {
195 for (i = 0; i < 8; i++)
196 *buf |= (vmem16[(y * 8 + i) * xres + x] ? 1 : 0) << i;
202 gpio_set_value(par->gpio.dc, 1);
203 ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8);
205 dev_err(par->info->device, "write failed and returned: %d\n",
211 static struct fbtft_display display = {
219 .write_vmem = write_vmem,
220 .init_display = init_display,
221 .set_addr_win = set_addr_win,
223 .set_gamma = set_gamma,
227 FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1306", &display);
229 MODULE_ALIAS("spi:" DRVNAME);
230 MODULE_ALIAS("platform:" DRVNAME);
231 MODULE_ALIAS("spi:ssd1306");
232 MODULE_ALIAS("platform:ssd1306");
234 MODULE_DESCRIPTION("SSD1306 OLED Driver");
235 MODULE_AUTHOR("Noralf Tronnes");
236 MODULE_LICENSE("GPL");