2 * drivers/usb/gadget/emxx_udc.c
3 * EMXX FCD (Function Controller Driver) for USB.
5 * Copyright (C) 2010 Renesas Electronics Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/errno.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/proc_fs.h>
27 #include <linux/clk.h>
28 #include <linux/ctype.h>
29 #include <linux/string.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/workqueue.h>
32 #include <linux/device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb/gadget.h>
37 #include <linux/irq.h>
38 #include <linux/gpio.h>
42 #define DRIVER_DESC "EMXX UDC driver"
43 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
45 static const char driver_name[] = "emxx_udc";
46 static const char driver_desc[] = DRIVER_DESC;
48 /*===========================================================================*/
50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
60 /*===========================================================================*/
62 #define _nbu2ss_zero_len_pkt(udc, epnum) \
63 _nbu2ss_ep_in_end(udc, epnum, 0, 0)
65 /*===========================================================================*/
67 struct nbu2ss_udc udc_controller;
69 /*-------------------------------------------------------------------------*/
71 static inline u32 _nbu2ss_readl(void *address)
73 return __raw_readl(address);
76 /*-------------------------------------------------------------------------*/
78 static inline void _nbu2ss_writel(void *address, u32 udata)
80 __raw_writel(udata, address);
83 /*-------------------------------------------------------------------------*/
85 static inline void _nbu2ss_bitset(void *address, u32 udata)
87 u32 reg_dt = __raw_readl(address) | (udata);
89 __raw_writel(reg_dt, address);
92 /*-------------------------------------------------------------------------*/
94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
96 u32 reg_dt = __raw_readl(address) & ~(udata);
98 __raw_writel(reg_dt, address);
101 #ifdef UDC_DEBUG_DUMP
102 /*-------------------------------------------------------------------------*/
103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
108 pr_info("=== %s()\n", __func__);
111 pr_err("%s udc == NULL\n", __func__);
115 spin_unlock(&udc->lock);
117 dev_dbg(&udc->dev, "\n-USB REG-\n");
118 for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
119 reg_data = _nbu2ss_readl(
120 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
121 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
123 reg_data = _nbu2ss_readl(
124 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
125 dev_dbg(&udc->dev, " %08x", (int)reg_data);
127 reg_data = _nbu2ss_readl(
128 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
129 dev_dbg(&udc->dev, " %08x", (int)reg_data);
131 reg_data = _nbu2ss_readl(
132 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
133 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
136 spin_lock(&udc->lock);
138 #endif /* UDC_DEBUG_DUMP */
140 /*-------------------------------------------------------------------------*/
141 /* Endpoint 0 Callback (Complete) */
142 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
147 struct usb_ctrlrequest *p_ctrl;
148 struct nbu2ss_udc *udc;
150 if ((!_ep) || (!_req))
153 udc = (struct nbu2ss_udc *)_req->context;
155 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
156 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
157 /*-------------------------------------------------*/
159 recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
160 selector = p_ctrl->wValue;
161 if ((recipient == USB_RECIP_DEVICE) &&
162 (selector == USB_DEVICE_TEST_MODE)) {
163 test_mode = (u32)(p_ctrl->wIndex >> 8);
164 _nbu2ss_set_test_mode(udc, test_mode);
170 /*-------------------------------------------------------------------------*/
171 /* Initialization usb_request */
172 static void _nbu2ss_create_ep0_packet(
173 struct nbu2ss_udc *udc,
178 udc->ep0_req.req.buf = p_buf;
179 udc->ep0_req.req.length = length;
180 udc->ep0_req.req.dma = 0;
181 udc->ep0_req.req.zero = TRUE;
182 udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
183 udc->ep0_req.req.status = -EINPROGRESS;
184 udc->ep0_req.req.context = udc;
185 udc->ep0_req.req.actual = 0;
188 /*-------------------------------------------------------------------------*/
189 /* Acquisition of the first address of RAM(FIFO) */
190 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
193 u32 data, last_ram_adr, use_ram_size;
195 struct ep_regs *p_ep_regs;
197 last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
200 for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
201 p_ep_regs = &udc->p_regs->EP_REGS[num];
202 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
203 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPN_BUF_TYPE;
206 use_ram_size += (data & EPN_MPKT) / sizeof(u32);
209 use_ram_size += ((data & EPN_MPKT) / sizeof(u32)) * 2;
212 if ((data >> 16) > last_ram_adr)
213 last_ram_adr = data >> 16;
216 return last_ram_adr + use_ram_size;
219 /*-------------------------------------------------------------------------*/
220 /* Construction of Endpoint */
221 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
232 /*-------------------------------------------------------------*/
233 /* RAM Transfer Address */
234 begin_adrs = _nbu2ss_get_begin_ram_address(udc);
235 data = (begin_adrs << 16) | ep->ep.maxpacket;
236 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
238 /*-------------------------------------------------------------*/
239 /* Interrupt Enable */
240 data = 1 << (ep->epnum + 8);
241 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
243 /*-------------------------------------------------------------*/
244 /* Endpoint Type(Mode) */
245 /* Bulk, Interrupt, ISO */
246 switch (ep->ep_type) {
247 case USB_ENDPOINT_XFER_BULK:
251 case USB_ENDPOINT_XFER_INT:
252 data = EPN_BUF_SINGLE | EPN_INTERRUPT;
255 case USB_ENDPOINT_XFER_ISOC:
264 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
265 _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum | ep->direct));
267 if (ep->direct == USB_DIR_OUT) {
268 /*---------------------------------------------------------*/
270 data = EPN_EN | EPN_BCLR | EPN_DIR0;
271 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
273 data = EPN_ONAK | EPN_OSTL_EN | EPN_OSTL;
274 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
276 data = EPN_OUT_EN | EPN_OUT_END_EN;
277 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
279 /*---------------------------------------------------------*/
281 data = EPN_EN | EPN_BCLR | EPN_AUTO;
282 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
285 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
287 data = EPN_IN_EN | EPN_IN_END_EN;
288 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
294 /*-------------------------------------------------------------------------*/
295 /* Release of Endpoint */
296 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
301 if ((ep->epnum == 0) || (udc->vbus_active == 0))
306 /*-------------------------------------------------------------*/
307 /* RAM Transfer Address */
308 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
310 /*-------------------------------------------------------------*/
311 /* Interrupt Disable */
312 data = 1 << (ep->epnum + 8);
313 _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
315 if (ep->direct == USB_DIR_OUT) {
316 /*---------------------------------------------------------*/
318 data = EPN_ONAK | EPN_BCLR;
319 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
321 data = EPN_EN | EPN_DIR0;
322 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
324 data = EPN_OUT_EN | EPN_OUT_END_EN;
325 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
327 /*---------------------------------------------------------*/
330 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
332 data = EPN_EN | EPN_AUTO;
333 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
335 data = EPN_IN_EN | EPN_IN_END_EN;
336 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
342 /*-------------------------------------------------------------------------*/
343 /* DMA setting (without Endpoint 0) */
344 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
349 data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
350 if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
351 return; /* Not Support DMA */
355 if (ep->direct == USB_DIR_OUT) {
356 /*---------------------------------------------------------*/
358 data = ep->ep.maxpacket;
359 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
361 /*---------------------------------------------------------*/
362 /* Transfer Direct */
363 data = DCR1_EPN_DIR0;
364 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
366 /*---------------------------------------------------------*/
368 data = EPN_STOP_MODE | EPN_STOP_SET | EPN_DMAMODE0;
369 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
371 /*---------------------------------------------------------*/
373 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPN_AUTO);
375 /*---------------------------------------------------------*/
377 data = EPN_BURST_SET | EPN_DMAMODE0;
378 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
382 /*-------------------------------------------------------------------------*/
383 /* DMA setting release */
384 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
388 struct fc_regs *preg = udc->p_regs;
390 if (udc->vbus_active == 0)
391 return; /* VBUS OFF */
393 data = _nbu2ss_readl(&preg->USBSSCONF);
394 if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
395 return; /* Not Support DMA */
399 _nbu2ss_ep_dma_abort(udc, ep);
401 if (ep->direct == USB_DIR_OUT) {
402 /*---------------------------------------------------------*/
404 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
405 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_DIR0);
406 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
408 /*---------------------------------------------------------*/
410 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
411 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
415 /*-------------------------------------------------------------------------*/
417 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
419 struct fc_regs *preg = udc->p_regs;
421 _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPN_REQEN);
422 mdelay(DMA_DISABLE_TIME); /* DCR1_EPN_REQEN Clear */
423 _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPN_DMA_EN);
426 /*-------------------------------------------------------------------------*/
427 /* Start IN Transfer */
428 static void _nbu2ss_ep_in_end(
429 struct nbu2ss_udc *udc,
437 struct fc_regs *preg = udc->p_regs;
439 if (length >= sizeof(u32))
443 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
445 /* Writing of 1-4 bytes */
447 _nbu2ss_writel(&preg->EP0_WRITE, data32);
449 data = ((length << 5) & EP0_DW) | EP0_DEND;
450 _nbu2ss_writel(&preg->EP0_CONTROL, data);
452 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
456 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
458 /* Writing of 1-4 bytes */
460 _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
462 data = (((length) << 5) & EPN_DW) | EPN_DEND;
463 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
465 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
470 /*-------------------------------------------------------------------------*/
471 static void _nbu2ss_dma_map_single(
472 struct nbu2ss_udc *udc,
473 struct nbu2ss_ep *ep,
474 struct nbu2ss_req *req,
478 if (req->req.dma == DMA_ADDR_INVALID) {
479 if (req->unaligned) {
480 req->req.dma = ep->phys_buf;
482 req->req.dma = dma_map_single(
483 udc->gadget.dev.parent,
486 (direct == USB_DIR_IN)
487 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
492 dma_sync_single_for_device(
493 udc->gadget.dev.parent,
496 (direct == USB_DIR_IN)
497 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
503 /*-------------------------------------------------------------------------*/
504 static void _nbu2ss_dma_unmap_single(
505 struct nbu2ss_udc *udc,
506 struct nbu2ss_ep *ep,
507 struct nbu2ss_req *req,
515 if (direct == USB_DIR_OUT) {
516 count = req->req.actual % 4;
519 p += (req->req.actual - count);
520 memcpy(data, p, count);
525 if (req->unaligned) {
526 if (direct == USB_DIR_OUT)
527 memcpy(req->req.buf, ep->virt_buf,
528 req->req.actual & 0xfffffffc);
530 dma_unmap_single(udc->gadget.dev.parent,
531 req->req.dma, req->req.length,
532 (direct == USB_DIR_IN)
536 req->req.dma = DMA_ADDR_INVALID;
540 dma_sync_single_for_cpu(udc->gadget.dev.parent,
541 req->req.dma, req->req.length,
542 (direct == USB_DIR_IN)
549 p += (req->req.actual - count);
550 memcpy(p, data, count);
555 /*-------------------------------------------------------------------------*/
556 /* Endpoint 0 OUT Transfer (PIO) */
557 static int ep0_out_pio(struct nbu2ss_udc *udc, u8 *buf, u32 length)
560 u32 numreads = length / sizeof(u32);
561 union usb_reg_access *buf32 = (union usb_reg_access *)buf;
567 for (i = 0; i < numreads; i++) {
568 buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
572 return numreads * sizeof(u32);
575 /*-------------------------------------------------------------------------*/
576 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
577 static int ep0_out_overbytes(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
581 union usb_reg_access temp_32;
582 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
584 if ((length > 0) && (length < sizeof(u32))) {
585 temp_32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
586 for (i = 0 ; i < length ; i++)
587 p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
588 i_read_size += length;
594 /*-------------------------------------------------------------------------*/
595 /* Endpoint 0 IN Transfer (PIO) */
596 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
599 u32 i_max_length = EP0_PACKETSIZE;
600 u32 i_word_length = 0;
601 u32 i_write_length = 0;
602 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
604 /*------------------------------------------------------------*/
605 /* Transfer Length */
606 if (i_max_length < length)
607 i_word_length = i_max_length / sizeof(u32);
609 i_word_length = length / sizeof(u32);
611 /*------------------------------------------------------------*/
613 for (i = 0; i < i_word_length; i++) {
614 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, p_buf_32->dw);
616 i_write_length += sizeof(u32);
619 return i_write_length;
622 /*-------------------------------------------------------------------------*/
623 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
624 static int ep0_in_overbytes(struct nbu2ss_udc *udc,
629 union usb_reg_access temp_32;
630 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
632 if ((i_remain_size > 0) && (i_remain_size < sizeof(u32))) {
633 for (i = 0 ; i < i_remain_size ; i++)
634 temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
635 _nbu2ss_ep_in_end(udc, 0, temp_32.dw, i_remain_size);
637 return i_remain_size;
643 /*-------------------------------------------------------------------------*/
644 /* Transfer NULL Packet (Epndoint 0) */
645 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
649 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
650 data &= ~(u32)EP0_INAK;
653 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
655 data |= (EP0_INAK_EN | EP0_DEND);
657 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
662 /*-------------------------------------------------------------------------*/
663 /* Receive NULL Packet (Endpoint 0) */
664 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
668 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
669 data &= ~(u32)EP0_ONAK;
674 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
679 /*-------------------------------------------------------------------------*/
680 static int _nbu2ss_ep0_in_transfer(
681 struct nbu2ss_udc *udc,
682 struct nbu2ss_req *req
685 u8 *p_buffer; /* IN Data Buffer */
687 u32 i_remain_size = 0;
690 /*-------------------------------------------------------------*/
691 /* End confirmation */
692 if (req->req.actual == req->req.length) {
693 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
696 EP0_send_NULL(udc, FALSE);
701 return 0; /* Transfer End */
704 /*-------------------------------------------------------------*/
706 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
708 data &= ~(u32)EP0_INAK;
709 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
711 i_remain_size = req->req.length - req->req.actual;
712 p_buffer = (u8 *)req->req.buf;
713 p_buffer += req->req.actual;
715 /*-------------------------------------------------------------*/
717 result = EP0_in_PIO(udc, p_buffer, i_remain_size);
719 req->div_len = result;
720 i_remain_size -= result;
722 if (i_remain_size == 0) {
723 EP0_send_NULL(udc, FALSE);
727 if ((i_remain_size < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
729 result += ep0_in_overbytes(udc, p_buffer, i_remain_size);
730 req->div_len = result;
736 /*-------------------------------------------------------------------------*/
737 static int _nbu2ss_ep0_out_transfer(
738 struct nbu2ss_udc *udc,
739 struct nbu2ss_req *req
748 /*-------------------------------------------------------------*/
749 /* Receive data confirmation */
750 i_recv_length = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
751 if (i_recv_length != 0) {
754 i_remain_size = req->req.length - req->req.actual;
755 p_buffer = (u8 *)req->req.buf;
756 p_buffer += req->req.actual;
758 result = ep0_out_pio(udc, p_buffer
759 , min(i_remain_size, i_recv_length));
763 req->req.actual += result;
764 i_recv_length -= result;
766 if ((i_recv_length > 0) && (i_recv_length < sizeof(u32))) {
768 i_remain_size -= result;
770 result = ep0_out_overbytes(udc, p_buffer
771 , min(i_remain_size, i_recv_length));
772 req->req.actual += result;
778 /*-------------------------------------------------------------*/
779 /* End confirmation */
780 if (req->req.actual == req->req.length) {
781 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
784 EP0_receive_NULL(udc, FALSE);
789 return 0; /* Transfer End */
792 if ((req->req.actual % EP0_PACKETSIZE) != 0)
793 return 0; /* Short Packet Transfer End */
795 if (req->req.actual > req->req.length) {
796 dev_err(udc->dev, " *** Overrun Error\n");
800 if (f_rcv_zero != 0) {
801 i_remain_size = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
802 if (i_remain_size & EP0_ONAK) {
803 /*---------------------------------------------------*/
805 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
813 /*-------------------------------------------------------------------------*/
814 static int _nbu2ss_out_dma(
815 struct nbu2ss_udc *udc,
816 struct nbu2ss_req *req,
827 int result = -EINVAL;
828 struct fc_regs *preg = udc->p_regs;
831 return 1; /* DMA is forwarded */
833 req->dma_flag = TRUE;
834 p_buffer = req->req.dma;
835 p_buffer += req->req.actual;
838 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
840 /* Number of transfer packets */
841 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
842 dmacnt = length / mpkt;
843 lmpkt = (length % mpkt) & ~(u32)0x03;
845 if (dmacnt > DMA_MAX_COUNT) {
846 dmacnt = DMA_MAX_COUNT;
848 } else if (lmpkt != 0) {
850 burst = 0; /* Burst OFF */
854 data = mpkt | (lmpkt << 16);
855 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
857 data = ((dmacnt & 0xff) << 16) | DCR1_EPN_DIR0 | DCR1_EPN_REQEN;
858 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
861 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
862 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
864 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
866 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
868 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
870 result = length & ~(u32)0x03;
871 req->div_len = result;
876 /*-------------------------------------------------------------------------*/
877 static int _nbu2ss_epn_out_pio(
878 struct nbu2ss_udc *udc,
879 struct nbu2ss_ep *ep,
880 struct nbu2ss_req *req,
888 union usb_reg_access temp_32;
889 union usb_reg_access *p_buf_32;
891 struct fc_regs *preg = udc->p_regs;
894 return 1; /* DMA is forwarded */
899 p_buffer = (u8 *)req->req.buf;
900 p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
902 i_word_length = length / sizeof(u32);
903 if (i_word_length > 0) {
904 /*---------------------------------------------------------*/
905 /* Copy of every four bytes */
906 for (i = 0; i < i_word_length; i++) {
908 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
911 result = i_word_length * sizeof(u32);
914 data = length - result;
916 /*---------------------------------------------------------*/
917 /* Copy of fraction byte */
919 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
920 for (i = 0 ; i < data ; i++)
921 p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
925 req->req.actual += result;
927 if ((req->req.actual == req->req.length) ||
928 ((req->req.actual % ep->ep.maxpacket) != 0)) {
935 /*-------------------------------------------------------------------------*/
936 static int _nbu2ss_epn_out_data(
937 struct nbu2ss_udc *udc,
938 struct nbu2ss_ep *ep,
939 struct nbu2ss_req *req,
952 i_buf_size = min((req->req.length - req->req.actual), data_size);
954 if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
955 (i_buf_size >= sizeof(u32))) {
956 nret = _nbu2ss_out_dma(udc, req, num, i_buf_size);
958 i_buf_size = min_t(u32, i_buf_size, ep->ep.maxpacket);
959 nret = _nbu2ss_epn_out_pio(udc, ep, req, i_buf_size);
965 /*-------------------------------------------------------------------------*/
966 static int _nbu2ss_epn_out_transfer(
967 struct nbu2ss_udc *udc,
968 struct nbu2ss_ep *ep,
969 struct nbu2ss_req *req
975 struct fc_regs *preg = udc->p_regs;
982 /*-------------------------------------------------------------*/
985 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPN_LDATA;
987 if (i_recv_length != 0) {
988 result = _nbu2ss_epn_out_data(udc, ep, req, i_recv_length);
989 if (i_recv_length < ep->ep.maxpacket) {
990 if (i_recv_length == result) {
991 req->req.actual += result;
996 if ((req->req.actual == req->req.length) ||
997 ((req->req.actual % ep->ep.maxpacket) != 0)) {
1003 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1011 if (req->req.actual > req->req.length) {
1012 dev_err(udc->dev, " Overrun Error\n");
1013 dev_err(udc->dev, " actual = %d, length = %d\n",
1014 req->req.actual, req->req.length);
1015 result = -EOVERFLOW;
1021 /*-------------------------------------------------------------------------*/
1022 static int _nbu2ss_in_dma(
1023 struct nbu2ss_udc *udc,
1024 struct nbu2ss_ep *ep,
1025 struct nbu2ss_req *req,
1030 dma_addr_t p_buffer;
1031 u32 mpkt; /* MaxPacketSize */
1032 u32 lmpkt; /* Last Packet Data Size */
1033 u32 dmacnt; /* IN Data Size */
1036 int result = -EINVAL;
1037 struct fc_regs *preg = udc->p_regs;
1040 return 1; /* DMA is forwarded */
1043 if (req->req.actual == 0)
1044 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1046 req->dma_flag = TRUE;
1048 /* MAX Packet Size */
1049 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
1051 if ((DMA_MAX_COUNT * mpkt) < length)
1052 i_write_length = DMA_MAX_COUNT * mpkt;
1054 i_write_length = length;
1056 /*------------------------------------------------------------*/
1057 /* Number of transmission packets */
1058 if (mpkt < i_write_length) {
1059 dmacnt = i_write_length / mpkt;
1060 lmpkt = (i_write_length % mpkt) & ~(u32)0x3;
1064 lmpkt = mpkt & ~(u32)0x3;
1068 lmpkt = i_write_length & ~(u32)0x3;
1071 /* Packet setting */
1072 data = mpkt | (lmpkt << 16);
1073 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1075 /* Address setting */
1076 p_buffer = req->req.dma;
1077 p_buffer += req->req.actual;
1078 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
1080 /* Packet and DMA setting */
1081 data = ((dmacnt & 0xff) << 16) | DCR1_EPN_REQEN;
1082 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1084 /* Packet setting of EPC */
1085 data = dmacnt << 16;
1086 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1088 /*DMA setting of EPC */
1089 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
1091 result = i_write_length & ~(u32)0x3;
1092 req->div_len = result;
1097 /*-------------------------------------------------------------------------*/
1098 static int _nbu2ss_epn_in_pio(
1099 struct nbu2ss_udc *udc,
1100 struct nbu2ss_ep *ep,
1101 struct nbu2ss_req *req,
1109 union usb_reg_access temp_32;
1110 union usb_reg_access *p_buf_32 = NULL;
1112 struct fc_regs *preg = udc->p_regs;
1115 return 1; /* DMA is forwarded */
1118 p_buffer = (u8 *)req->req.buf;
1119 p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
1121 i_word_length = length / sizeof(u32);
1122 if (i_word_length > 0) {
1123 for (i = 0; i < i_word_length; i++) {
1125 &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1131 result = i_word_length * sizeof(u32);
1135 if (result != ep->ep.maxpacket) {
1136 data = length - result;
1138 for (i = 0 ; i < data ; i++)
1139 temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
1141 _nbu2ss_ep_in_end(udc, ep->epnum, temp_32.dw, data);
1145 req->div_len = result;
1150 /*-------------------------------------------------------------------------*/
1151 static int _nbu2ss_epn_in_data(
1152 struct nbu2ss_udc *udc,
1153 struct nbu2ss_ep *ep,
1154 struct nbu2ss_req *req,
1164 num = ep->epnum - 1;
1166 if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
1167 (data_size >= sizeof(u32))) {
1168 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1170 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1171 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1177 /*-------------------------------------------------------------------------*/
1178 static int _nbu2ss_epn_in_transfer(
1179 struct nbu2ss_udc *udc,
1180 struct nbu2ss_ep *ep,
1181 struct nbu2ss_req *req
1192 num = ep->epnum - 1;
1194 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1196 /*-------------------------------------------------------------*/
1197 /* State confirmation of FIFO */
1198 if (req->req.actual == 0) {
1199 if ((status & EPN_IN_EMPTY) == 0)
1200 return 1; /* Not Empty */
1203 if ((status & EPN_IN_FULL) != 0)
1204 return 1; /* Not Empty */
1207 /*-------------------------------------------------------------*/
1208 /* Start transfer */
1209 i_buf_size = req->req.length - req->req.actual;
1211 result = _nbu2ss_epn_in_data(udc, ep, req, i_buf_size);
1212 else if (req->req.length == 0)
1213 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1218 /*-------------------------------------------------------------------------*/
1219 static int _nbu2ss_start_transfer(
1220 struct nbu2ss_udc *udc,
1221 struct nbu2ss_ep *ep,
1222 struct nbu2ss_req *req,
1227 req->dma_flag = FALSE;
1230 if (req->req.length == 0) {
1233 if ((req->req.length % ep->ep.maxpacket) == 0)
1234 req->zero = req->req.zero;
1239 if (ep->epnum == 0) {
1241 switch (udc->ep0state) {
1242 case EP0_IN_DATA_PHASE:
1243 nret = _nbu2ss_ep0_in_transfer(udc, req);
1246 case EP0_OUT_DATA_PHASE:
1247 nret = _nbu2ss_ep0_out_transfer(udc, req);
1250 case EP0_IN_STATUS_PHASE:
1251 nret = EP0_send_NULL(udc, TRUE);
1260 if (ep->direct == USB_DIR_OUT) {
1263 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1266 nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1273 /*-------------------------------------------------------------------------*/
1274 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1278 struct nbu2ss_req *req;
1280 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1284 if (ep->epnum > 0) {
1285 length = _nbu2ss_readl(
1286 &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1288 length &= EPN_LDATA;
1289 if (length < ep->ep.maxpacket)
1293 _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1296 /*-------------------------------------------------------------------------*/
1297 /* Endpoint Toggle Reset */
1298 static void _nbu2ss_endpoint_toggle_reset(
1299 struct nbu2ss_udc *udc,
1305 if ((ep_adrs == 0) || (ep_adrs == 0x80))
1308 num = (ep_adrs & 0x7F) - 1;
1310 if (ep_adrs & USB_DIR_IN)
1313 data = EPN_BCLR | EPN_OPIDCLR;
1315 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1318 /*-------------------------------------------------------------------------*/
1319 /* Endpoint STALL set */
1320 static void _nbu2ss_set_endpoint_stall(
1321 struct nbu2ss_udc *udc,
1327 struct nbu2ss_ep *ep;
1328 struct fc_regs *preg = udc->p_regs;
1330 if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1333 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1336 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1339 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1341 ep = &udc->ep[epnum];
1347 if (ep_adrs & USB_DIR_IN)
1348 data = EPN_BCLR | EPN_ISTL;
1350 data = EPN_OSTL_EN | EPN_OSTL;
1352 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1355 ep->stalled = FALSE;
1356 if (ep_adrs & USB_DIR_IN) {
1357 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1361 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1364 data |= EPN_OSTL_EN;
1366 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1370 ep->stalled = FALSE;
1373 _nbu2ss_restert_transfer(ep);
1379 /*-------------------------------------------------------------------------*/
1380 /* Device Descriptor */
1381 static struct usb_device_descriptor device_desc = {
1382 .bLength = sizeof(device_desc),
1383 .bDescriptorType = USB_DT_DEVICE,
1384 .bcdUSB = cpu_to_le16(0x0200),
1385 .bDeviceClass = USB_CLASS_VENDOR_SPEC,
1386 .bDeviceSubClass = 0x00,
1387 .bDeviceProtocol = 0x00,
1388 .bMaxPacketSize0 = 64,
1389 .idVendor = cpu_to_le16(0x0409),
1390 .idProduct = cpu_to_le16(0xfff0),
1391 .bcdDevice = 0xffff,
1392 .iManufacturer = 0x00,
1394 .iSerialNumber = 0x00,
1395 .bNumConfigurations = 0x01,
1398 /*-------------------------------------------------------------------------*/
1399 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1403 if (mode > MAX_TEST_MODE_NUM)
1406 dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1408 data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1409 data &= ~TEST_FORCE_ENABLE;
1410 data |= mode << TEST_MODE_SHIFT;
1412 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1413 _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1416 /*-------------------------------------------------------------------------*/
1417 static int _nbu2ss_set_feature_device(
1418 struct nbu2ss_udc *udc,
1423 int result = -EOPNOTSUPP;
1426 case USB_DEVICE_REMOTE_WAKEUP:
1427 if (wIndex == 0x0000) {
1428 udc->remote_wakeup = U2F_ENABLE;
1433 case USB_DEVICE_TEST_MODE:
1435 if (wIndex <= MAX_TEST_MODE_NUM)
1446 /*-------------------------------------------------------------------------*/
1447 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1450 u32 data = 0, bit_data;
1451 struct fc_regs *preg = udc->p_regs;
1453 epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1455 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1459 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1460 if ((data & EPN_EN) == 0)
1463 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1464 bit_data = EPN_ISTL;
1466 bit_data = EPN_OSTL;
1469 if ((data & bit_data) == 0)
1474 /*-------------------------------------------------------------------------*/
1475 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1477 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1478 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1479 u16 selector = udc->ctrl.wValue;
1480 u16 wIndex = udc->ctrl.wIndex;
1482 int result = -EOPNOTSUPP;
1484 if ((udc->ctrl.wLength != 0x0000) ||
1485 (direction != USB_DIR_OUT)) {
1489 switch (recipient) {
1490 case USB_RECIP_DEVICE:
1493 _nbu2ss_set_feature_device(udc, selector, wIndex);
1496 case USB_RECIP_ENDPOINT:
1497 if (0x0000 == (wIndex & 0xFF70)) {
1498 if (selector == USB_ENDPOINT_HALT) {
1499 ep_adrs = wIndex & 0xFF;
1501 _nbu2ss_endpoint_toggle_reset(
1505 _nbu2ss_set_endpoint_stall(
1506 udc, ep_adrs, bset);
1518 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1523 /*-------------------------------------------------------------------------*/
1524 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1527 enum usb_device_speed speed = USB_SPEED_FULL;
1529 data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1530 if (data & HIGH_SPEED)
1531 speed = USB_SPEED_HIGH;
1536 /*-------------------------------------------------------------------------*/
1537 static void _nbu2ss_epn_set_stall(
1538 struct nbu2ss_udc *udc,
1539 struct nbu2ss_ep *ep
1546 struct fc_regs *preg = udc->p_regs;
1548 if (ep->direct == USB_DIR_IN) {
1550 ; limit_cnt < IN_DATA_EMPTY_COUNT
1552 regdata = _nbu2ss_readl(
1553 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1555 if ((regdata & EPN_IN_DATA) == 0)
1562 ep_adrs = ep->epnum | ep->direct;
1563 _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1566 /*-------------------------------------------------------------------------*/
1567 static int std_req_get_status(struct nbu2ss_udc *udc)
1570 u16 status_data = 0;
1571 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1572 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1574 int result = -EINVAL;
1576 if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN))
1579 length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1581 switch (recipient) {
1582 case USB_RECIP_DEVICE:
1583 if (udc->ctrl.wIndex == 0x0000) {
1584 if (udc->gadget.is_selfpowered)
1585 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1587 if (udc->remote_wakeup)
1588 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1594 case USB_RECIP_ENDPOINT:
1595 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1596 ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1597 result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1600 status_data |= (1 << USB_ENDPOINT_HALT);
1609 memcpy(udc->ep0_buf, &status_data, length);
1610 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1611 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1614 dev_err(udc->dev, " Error GET_STATUS\n");
1620 /*-------------------------------------------------------------------------*/
1621 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1623 return _nbu2ss_req_feature(udc, FALSE);
1626 /*-------------------------------------------------------------------------*/
1627 static int std_req_set_feature(struct nbu2ss_udc *udc)
1629 return _nbu2ss_req_feature(udc, TRUE);
1632 /*-------------------------------------------------------------------------*/
1633 static int std_req_set_address(struct nbu2ss_udc *udc)
1636 u32 wValue = udc->ctrl.wValue;
1638 if ((udc->ctrl.bRequestType != 0x00) ||
1639 (udc->ctrl.wIndex != 0x0000) ||
1640 (udc->ctrl.wLength != 0x0000)) {
1644 if (wValue != (wValue & 0x007F))
1647 wValue <<= USB_ADRS_SHIFT;
1649 _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1650 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1655 /*-------------------------------------------------------------------------*/
1656 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1658 u32 config_value = (u32)(udc->ctrl.wValue & 0x00ff);
1660 if ((udc->ctrl.wIndex != 0x0000) ||
1661 (udc->ctrl.wLength != 0x0000) ||
1662 (udc->ctrl.bRequestType != 0x00)) {
1666 udc->curr_config = config_value;
1668 if (config_value > 0) {
1669 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1670 udc->devstate = USB_STATE_CONFIGURED;
1673 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1674 udc->devstate = USB_STATE_ADDRESS;
1680 /*-------------------------------------------------------------------------*/
1681 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1683 if ((!udc) && (!pdata))
1686 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1688 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1691 /*-------------------------------------------------------------------------*/
1692 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1694 bool bcall_back = TRUE;
1696 struct usb_ctrlrequest *p_ctrl;
1698 p_ctrl = &udc->ctrl;
1699 _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1701 /* ep0 state control */
1702 if (p_ctrl->wLength == 0) {
1703 udc->ep0state = EP0_IN_STATUS_PHASE;
1706 if (p_ctrl->bRequestType & USB_DIR_IN)
1707 udc->ep0state = EP0_IN_DATA_PHASE;
1709 udc->ep0state = EP0_OUT_DATA_PHASE;
1712 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1713 switch (p_ctrl->bRequest) {
1714 case USB_REQ_GET_STATUS:
1715 nret = std_req_get_status(udc);
1719 case USB_REQ_CLEAR_FEATURE:
1720 nret = std_req_clear_feature(udc);
1724 case USB_REQ_SET_FEATURE:
1725 nret = std_req_set_feature(udc);
1729 case USB_REQ_SET_ADDRESS:
1730 nret = std_req_set_address(udc);
1734 case USB_REQ_SET_CONFIGURATION:
1735 nret = std_req_set_configuration(udc);
1744 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1746 /*--------------------------------------*/
1748 nret = EP0_send_NULL(udc, TRUE);
1753 spin_unlock(&udc->lock);
1754 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1755 spin_lock(&udc->lock);
1759 udc->ep0state = EP0_IDLE;
1764 /*-------------------------------------------------------------------------*/
1765 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1768 struct nbu2ss_req *req;
1769 struct nbu2ss_ep *ep = &udc->ep[0];
1771 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1773 req = &udc->ep0_req;
1775 req->req.actual += req->div_len;
1778 nret = _nbu2ss_ep0_in_transfer(udc, req);
1780 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1781 EP0_receive_NULL(udc, TRUE);
1787 /*-------------------------------------------------------------------------*/
1788 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1791 struct nbu2ss_req *req;
1792 struct nbu2ss_ep *ep = &udc->ep[0];
1794 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1796 req = &udc->ep0_req;
1798 nret = _nbu2ss_ep0_out_transfer(udc, req);
1800 udc->ep0state = EP0_IN_STATUS_PHASE;
1801 EP0_send_NULL(udc, TRUE);
1803 } else if (nret < 0) {
1804 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1805 req->req.status = nret;
1811 /*-------------------------------------------------------------------------*/
1812 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1814 struct nbu2ss_req *req;
1815 struct nbu2ss_ep *ep = &udc->ep[0];
1817 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1819 req = &udc->ep0_req;
1820 if (req->req.complete)
1821 req->req.complete(&ep->ep, &req->req);
1824 if (req->req.complete)
1825 _nbu2ss_ep_done(ep, req, 0);
1828 udc->ep0state = EP0_IDLE;
1833 /*-------------------------------------------------------------------------*/
1834 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1841 status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1842 intr = status & EP0_STATUS_RW_BIT;
1843 _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);
1845 status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1846 | STG_END_INT | EP0_OUT_NULL_INT);
1849 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1850 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1854 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1855 udc->gadget.speed = _nbu2ss_get_speed(udc);
1857 for (i = 0; i < EP0_END_XFER; i++) {
1858 switch (udc->ep0state) {
1860 if (status & SETUP_INT) {
1862 nret = _nbu2ss_decode_request(udc);
1866 case EP0_IN_DATA_PHASE:
1867 if (status & EP0_IN_INT) {
1868 status &= ~EP0_IN_INT;
1869 nret = _nbu2ss_ep0_in_data_stage(udc);
1873 case EP0_OUT_DATA_PHASE:
1874 if (status & EP0_OUT_INT) {
1875 status &= ~EP0_OUT_INT;
1876 nret = _nbu2ss_ep0_out_data_stage(udc);
1880 case EP0_IN_STATUS_PHASE:
1881 if ((status & STG_END_INT) || (status & SETUP_INT)) {
1882 status &= ~(STG_END_INT | EP0_IN_INT);
1883 nret = _nbu2ss_ep0_status_stage(udc);
1887 case EP0_OUT_STATUS_PAHSE:
1888 if ((status & STG_END_INT) || (status & SETUP_INT) ||
1889 (status & EP0_OUT_NULL_INT)) {
1890 status &= ~(STG_END_INT
1892 | EP0_OUT_NULL_INT);
1894 nret = _nbu2ss_ep0_status_stage(udc);
1910 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1914 /*-------------------------------------------------------------------------*/
1915 static void _nbu2ss_ep_done(
1916 struct nbu2ss_ep *ep,
1917 struct nbu2ss_req *req,
1920 struct nbu2ss_udc *udc = ep->udc;
1922 list_del_init(&req->queue);
1924 if (status == -ECONNRESET)
1925 _nbu2ss_fifo_flush(udc, ep);
1927 if (likely(req->req.status == -EINPROGRESS))
1928 req->req.status = status;
1931 _nbu2ss_epn_set_stall(udc, ep);
1933 if (!list_empty(&ep->queue))
1934 _nbu2ss_restert_transfer(ep);
1938 if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1939 (req->req.dma != 0))
1940 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1943 spin_unlock(&udc->lock);
1944 req->req.complete(&ep->ep, &req->req);
1945 spin_lock(&udc->lock);
1948 /*-------------------------------------------------------------------------*/
1949 static inline void _nbu2ss_epn_in_int(
1950 struct nbu2ss_udc *udc,
1951 struct nbu2ss_ep *ep,
1952 struct nbu2ss_req *req)
1957 struct fc_regs *preg = udc->p_regs;
1960 return; /* DMA is forwarded */
1962 req->req.actual += req->div_len;
1965 if (req->req.actual != req->req.length) {
1966 /*---------------------------------------------------------*/
1967 /* remainder of data */
1968 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1971 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1973 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1975 if ((status & EPN_IN_FULL) == 0) {
1976 /*-----------------------------------------*/
1977 /* 0 Length Packet */
1979 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1986 /*---------------------------------------------------------*/
1988 _nbu2ss_ep_done(ep, req, result);
1992 /*-------------------------------------------------------------------------*/
1993 static inline void _nbu2ss_epn_out_int(
1994 struct nbu2ss_udc *udc,
1995 struct nbu2ss_ep *ep,
1996 struct nbu2ss_req *req)
2000 result = _nbu2ss_epn_out_transfer(udc, ep, req);
2002 _nbu2ss_ep_done(ep, req, result);
2005 /*-------------------------------------------------------------------------*/
2006 static inline void _nbu2ss_epn_in_dma_int(
2007 struct nbu2ss_udc *udc,
2008 struct nbu2ss_ep *ep,
2009 struct nbu2ss_req *req)
2013 struct usb_request *preq;
2020 preq->actual += req->div_len;
2022 req->dma_flag = FALSE;
2025 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2028 if (preq->actual != preq->length) {
2029 _nbu2ss_epn_in_transfer(udc, ep, req);
2031 mpkt = ep->ep.maxpacket;
2032 size = preq->actual % mpkt;
2034 if (((preq->actual & 0x03) == 0) && (size < mpkt))
2035 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2037 _nbu2ss_epn_in_int(udc, ep, req);
2042 /*-------------------------------------------------------------------------*/
2043 static inline void _nbu2ss_epn_out_dma_int(
2044 struct nbu2ss_udc *udc,
2045 struct nbu2ss_ep *ep,
2046 struct nbu2ss_req *req)
2050 u32 dmacnt, ep_dmacnt;
2052 struct fc_regs *preg = udc->p_regs;
2054 num = ep->epnum - 1;
2056 if (req->req.actual == req->req.length) {
2057 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2059 req->dma_flag = FALSE;
2060 _nbu2ss_ep_done(ep, req, 0);
2065 ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2069 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2070 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2073 if (ep_dmacnt == dmacnt)
2077 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_REQEN);
2080 mpkt = ep->ep.maxpacket;
2081 if ((req->div_len % mpkt) == 0)
2082 req->div_len -= mpkt * dmacnt;
2085 if ((req->req.actual % ep->ep.maxpacket) > 0) {
2086 if (req->req.actual == req->div_len) {
2088 req->dma_flag = FALSE;
2089 _nbu2ss_ep_done(ep, req, 0);
2094 req->req.actual += req->div_len;
2096 req->dma_flag = FALSE;
2098 _nbu2ss_epn_out_int(udc, ep, req);
2101 /*-------------------------------------------------------------------------*/
2102 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2107 struct nbu2ss_req *req;
2108 struct nbu2ss_ep *ep = &udc->ep[epnum];
2112 /* Interrupt Status */
2113 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2115 /* Interrupt Clear */
2116 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
2118 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2120 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2124 if (status & EPN_OUT_END_INT) {
2125 status &= ~EPN_OUT_INT;
2126 _nbu2ss_epn_out_dma_int(udc, ep, req);
2129 if (status & EPN_OUT_INT)
2130 _nbu2ss_epn_out_int(udc, ep, req);
2132 if (status & EPN_IN_END_INT) {
2133 status &= ~EPN_IN_INT;
2134 _nbu2ss_epn_in_dma_int(udc, ep, req);
2137 if (status & EPN_IN_INT)
2138 _nbu2ss_epn_in_int(udc, ep, req);
2141 /*-------------------------------------------------------------------------*/
2142 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2145 _nbu2ss_ep0_int(udc);
2147 _nbu2ss_epn_int(udc, epnum);
2150 /*-------------------------------------------------------------------------*/
2151 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2153 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2154 _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2157 /*-------------------------------------------------------------------------*/
2158 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2159 struct nbu2ss_ep *ep,
2162 struct nbu2ss_req *req, *n;
2164 /* Endpoint Disable */
2165 _nbu2ss_epn_exit(udc, ep);
2168 _nbu2ss_ep_dma_exit(udc, ep);
2170 if (list_empty(&ep->queue))
2173 /* called with irqs blocked */
2174 list_for_each_entry_safe(req, n, &ep->queue, queue) {
2175 _nbu2ss_ep_done(ep, req, status);
2181 /*-------------------------------------------------------------------------*/
2182 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2184 struct nbu2ss_ep *ep;
2186 udc->gadget.speed = USB_SPEED_UNKNOWN;
2188 _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2191 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2192 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2196 /*-------------------------------------------------------------------------*/
2197 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2201 if (udc->vbus_active == 0)
2207 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2208 | PUE2) & ~(u32)CONNECTB;
2210 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2215 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2218 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2219 udc->gadget.speed = USB_SPEED_UNKNOWN;
2225 /*-------------------------------------------------------------------------*/
2226 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2228 struct fc_regs *p = udc->p_regs;
2230 if (udc->vbus_active == 0)
2233 if (ep->epnum == 0) {
2235 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2239 _nbu2ss_ep_dma_abort(udc, ep);
2240 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPN_BCLR);
2244 /*-------------------------------------------------------------------------*/
2245 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2249 if (udc->udc_enabled)
2253 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2254 udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
2256 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2257 mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2259 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2261 _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2263 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2264 HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2266 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2268 udelay(1); /* 1us wait */
2269 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2270 dev_err(udc->dev, "*** Reset Cancel failed\n");
2275 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2277 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2280 _nbu2ss_ep0_enable(udc);
2282 /* USB Interrupt Enable */
2283 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2285 udc->udc_enabled = TRUE;
2290 /*-------------------------------------------------------------------------*/
2291 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2293 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2294 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2297 /*-------------------------------------------------------------------------*/
2298 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2300 if (udc->udc_enabled) {
2301 udc->udc_enabled = FALSE;
2302 _nbu2ss_reset_controller(udc);
2303 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2307 /*-------------------------------------------------------------------------*/
2308 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2314 mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
2317 reg_dt = gpio_get_value(VBUS_VALUE);
2319 udc->linux_suspended = 0;
2321 _nbu2ss_reset_controller(udc);
2322 dev_info(udc->dev, " ----- VBUS OFF\n");
2324 if (udc->vbus_active == 1) {
2326 udc->vbus_active = 0;
2327 if (udc->usb_suspended) {
2328 udc->usb_suspended = 0;
2329 /* _nbu2ss_reset_controller(udc); */
2331 udc->devstate = USB_STATE_NOTATTACHED;
2333 _nbu2ss_quiesce(udc);
2335 spin_unlock(&udc->lock);
2336 udc->driver->disconnect(&udc->gadget);
2337 spin_lock(&udc->lock);
2340 _nbu2ss_disable_controller(udc);
2343 mdelay(5); /* wait (5ms) */
2344 reg_dt = gpio_get_value(VBUS_VALUE);
2348 dev_info(udc->dev, " ----- VBUS ON\n");
2350 if (udc->linux_suspended)
2353 if (udc->vbus_active == 0) {
2355 udc->vbus_active = 1;
2356 udc->devstate = USB_STATE_POWERED;
2358 nret = _nbu2ss_enable_controller(udc);
2360 _nbu2ss_disable_controller(udc);
2361 udc->vbus_active = 0;
2365 _nbu2ss_pullup(udc, 1);
2367 #ifdef UDC_DEBUG_DUMP
2368 _nbu2ss_dump_register(udc);
2369 #endif /* UDC_DEBUG_DUMP */
2372 if (udc->devstate == USB_STATE_POWERED)
2373 _nbu2ss_pullup(udc, 1);
2378 /*-------------------------------------------------------------------------*/
2379 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2381 udc->devstate = USB_STATE_DEFAULT;
2382 udc->remote_wakeup = 0;
2384 _nbu2ss_quiesce(udc);
2386 udc->ep0state = EP0_IDLE;
2389 /*-------------------------------------------------------------------------*/
2390 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2392 if (udc->usb_suspended == 1) {
2393 udc->usb_suspended = 0;
2394 if (udc->driver && udc->driver->resume) {
2395 spin_unlock(&udc->lock);
2396 udc->driver->resume(&udc->gadget);
2397 spin_lock(&udc->lock);
2402 /*-------------------------------------------------------------------------*/
2403 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2407 if (udc->usb_suspended == 0) {
2408 reg_dt = gpio_get_value(VBUS_VALUE);
2413 udc->usb_suspended = 1;
2414 if (udc->driver && udc->driver->suspend) {
2415 spin_unlock(&udc->lock);
2416 udc->driver->suspend(&udc->gadget);
2417 spin_lock(&udc->lock);
2420 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2424 /*-------------------------------------------------------------------------*/
2425 /* VBUS (GPIO153) Interrupt */
2426 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2428 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2430 spin_lock(&udc->lock);
2431 _nbu2ss_check_vbus(udc);
2432 spin_unlock(&udc->lock);
2437 /*-------------------------------------------------------------------------*/
2438 /* Interrupt (udc) */
2439 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2441 u8 suspend_flag = 0;
2445 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2446 struct fc_regs *preg = udc->p_regs;
2448 if (gpio_get_value(VBUS_VALUE) == 0) {
2449 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2450 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2454 spin_lock(&udc->lock);
2457 if (gpio_get_value(VBUS_VALUE) == 0) {
2458 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2459 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2462 status = _nbu2ss_readl(&preg->USB_INT_STA);
2468 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2470 if (status & USB_RST_INT) {
2472 _nbu2ss_int_bus_reset(udc);
2475 if (status & RSUM_INT) {
2477 _nbu2ss_int_usb_resume(udc);
2480 if (status & SPND_INT) {
2485 if (status & EPN_INT) {
2487 int_bit = status >> 8;
2489 for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2491 _nbu2ss_ep_int(udc, epnum);
2502 _nbu2ss_int_usb_suspend(udc);
2504 spin_unlock(&udc->lock);
2509 /*-------------------------------------------------------------------------*/
2511 static int nbu2ss_ep_enable(
2513 const struct usb_endpoint_descriptor *desc)
2516 unsigned long flags;
2518 struct nbu2ss_ep *ep;
2519 struct nbu2ss_udc *udc;
2521 if ((!_ep) || (!desc)) {
2522 pr_err(" *** %s, bad param\n", __func__);
2526 ep = container_of(_ep, struct nbu2ss_ep, ep);
2527 if ((!ep) || (!ep->udc)) {
2528 pr_err(" *** %s, ep == NULL !!\n", __func__);
2532 ep_type = usb_endpoint_type(desc);
2533 if ((ep_type == USB_ENDPOINT_XFER_CONTROL) ||
2534 (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2535 pr_err(" *** %s, bat bmAttributes\n", __func__);
2540 if (udc->vbus_active == 0)
2543 if ((!udc->driver) || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2544 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2548 spin_lock_irqsave(&udc->lock, flags);
2551 ep->epnum = usb_endpoint_num(desc);
2552 ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2553 ep->ep_type = ep_type;
2556 ep->stalled = FALSE;
2558 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2561 _nbu2ss_ep_dma_init(udc, ep);
2563 /* Endpoint setting */
2564 _nbu2ss_ep_init(udc, ep);
2566 spin_unlock_irqrestore(&udc->lock, flags);
2571 /*-------------------------------------------------------------------------*/
2572 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2574 struct nbu2ss_ep *ep;
2575 struct nbu2ss_udc *udc;
2576 unsigned long flags;
2579 pr_err(" *** %s, bad param\n", __func__);
2583 ep = container_of(_ep, struct nbu2ss_ep, ep);
2584 if ((!ep) || (!ep->udc)) {
2585 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2590 if (udc->vbus_active == 0)
2593 spin_lock_irqsave(&udc->lock, flags);
2594 _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
2595 spin_unlock_irqrestore(&udc->lock, flags);
2600 /*-------------------------------------------------------------------------*/
2601 static struct usb_request *nbu2ss_ep_alloc_request(
2605 struct nbu2ss_req *req;
2607 req = kzalloc(sizeof(*req), gfp_flags);
2612 req->req.dma = DMA_ADDR_INVALID;
2614 INIT_LIST_HEAD(&req->queue);
2619 /*-------------------------------------------------------------------------*/
2620 static void nbu2ss_ep_free_request(
2622 struct usb_request *_req)
2624 struct nbu2ss_req *req;
2627 req = container_of(_req, struct nbu2ss_req, req);
2633 /*-------------------------------------------------------------------------*/
2634 static int nbu2ss_ep_queue(
2636 struct usb_request *_req,
2639 struct nbu2ss_req *req;
2640 struct nbu2ss_ep *ep;
2641 struct nbu2ss_udc *udc;
2642 unsigned long flags;
2644 int result = -EINVAL;
2646 /* catch various bogus parameters */
2647 if ((!_ep) || (!_req)) {
2649 pr_err("udc: %s --- _ep == NULL\n", __func__);
2652 pr_err("udc: %s --- _req == NULL\n", __func__);
2657 req = container_of(_req, struct nbu2ss_req, req);
2658 if (unlikely(!_req->complete ||
2660 !list_empty(&req->queue))) {
2661 if (!_req->complete)
2662 pr_err("udc: %s --- !_req->complete\n", __func__);
2665 pr_err("udc:%s --- !_req->buf\n", __func__);
2667 if (!list_empty(&req->queue))
2668 pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2673 ep = container_of(_ep, struct nbu2ss_ep, ep);
2676 if (udc->vbus_active == 0) {
2677 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2681 if (unlikely(!udc->driver)) {
2682 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2687 spin_lock_irqsave(&udc->lock, flags);
2690 if ((uintptr_t)req->req.buf & 0x3)
2691 req->unaligned = TRUE;
2693 req->unaligned = FALSE;
2695 if (req->unaligned) {
2697 ep->virt_buf = (u8 *)dma_alloc_coherent(
2699 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2700 if (ep->epnum > 0) {
2701 if (ep->direct == USB_DIR_IN)
2702 memcpy(ep->virt_buf, req->req.buf,
2707 if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2708 (req->req.dma != 0))
2709 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2712 _req->status = -EINPROGRESS;
2715 bflag = list_empty(&ep->queue);
2716 list_add_tail(&req->queue, &ep->queue);
2718 if (bflag && !ep->stalled) {
2719 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2721 dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2723 list_del(&req->queue);
2724 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2726 if (req->req.length < 4 &&
2727 req->req.length == req->req.actual)
2729 if (req->req.length == req->req.actual)
2731 _nbu2ss_ep_done(ep, req, result);
2735 spin_unlock_irqrestore(&udc->lock, flags);
2740 /*-------------------------------------------------------------------------*/
2741 static int nbu2ss_ep_dequeue(
2743 struct usb_request *_req)
2745 struct nbu2ss_req *req;
2746 struct nbu2ss_ep *ep;
2747 struct nbu2ss_udc *udc;
2748 unsigned long flags;
2750 /* catch various bogus parameters */
2751 if ((!_ep) || (!_req)) {
2752 /* pr_err("%s, bad param(1)\n", __func__); */
2756 ep = container_of(_ep, struct nbu2ss_ep, ep);
2758 pr_err("%s, ep == NULL !!\n", __func__);
2766 spin_lock_irqsave(&udc->lock, flags);
2768 /* make sure it's actually queued on this endpoint */
2769 list_for_each_entry(req, &ep->queue, queue) {
2770 if (&req->req == _req)
2773 if (&req->req != _req) {
2774 spin_unlock_irqrestore(&udc->lock, flags);
2775 pr_debug("%s no queue(EINVAL)\n", __func__);
2779 _nbu2ss_ep_done(ep, req, -ECONNRESET);
2781 spin_unlock_irqrestore(&udc->lock, flags);
2786 /*-------------------------------------------------------------------------*/
2787 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2790 unsigned long flags;
2792 struct nbu2ss_ep *ep;
2793 struct nbu2ss_udc *udc;
2796 pr_err("%s, bad param\n", __func__);
2800 ep = container_of(_ep, struct nbu2ss_ep, ep);
2802 pr_err("%s, bad ep\n", __func__);
2808 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2812 spin_lock_irqsave(&udc->lock, flags);
2814 ep_adrs = ep->epnum | ep->direct;
2816 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2817 ep->stalled = FALSE;
2819 if (list_empty(&ep->queue))
2820 _nbu2ss_epn_set_stall(udc, ep);
2828 spin_unlock_irqrestore(&udc->lock, flags);
2833 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2835 return nbu2ss_ep_set_halt(_ep, 1);
2838 /*-------------------------------------------------------------------------*/
2839 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2842 struct nbu2ss_ep *ep;
2843 struct nbu2ss_udc *udc;
2844 unsigned long flags;
2845 struct fc_regs *preg;
2848 pr_err("%s, bad param\n", __func__);
2852 ep = container_of(_ep, struct nbu2ss_ep, ep);
2854 pr_err("%s, bad ep\n", __func__);
2860 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2866 data = gpio_get_value(VBUS_VALUE);
2870 spin_lock_irqsave(&udc->lock, flags);
2872 if (ep->epnum == 0) {
2873 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2876 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2880 spin_unlock_irqrestore(&udc->lock, flags);
2885 /*-------------------------------------------------------------------------*/
2886 static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2889 struct nbu2ss_ep *ep;
2890 struct nbu2ss_udc *udc;
2891 unsigned long flags;
2894 pr_err("udc: %s, bad param\n", __func__);
2898 ep = container_of(_ep, struct nbu2ss_ep, ep);
2900 pr_err("udc: %s, bad ep\n", __func__);
2906 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2910 data = gpio_get_value(VBUS_VALUE);
2914 spin_lock_irqsave(&udc->lock, flags);
2915 _nbu2ss_fifo_flush(udc, ep);
2916 spin_unlock_irqrestore(&udc->lock, flags);
2919 /*-------------------------------------------------------------------------*/
2920 static const struct usb_ep_ops nbu2ss_ep_ops = {
2921 .enable = nbu2ss_ep_enable,
2922 .disable = nbu2ss_ep_disable,
2924 .alloc_request = nbu2ss_ep_alloc_request,
2925 .free_request = nbu2ss_ep_free_request,
2927 .queue = nbu2ss_ep_queue,
2928 .dequeue = nbu2ss_ep_dequeue,
2930 .set_halt = nbu2ss_ep_set_halt,
2931 .set_wedge = nbu2ss_ep_set_wedge,
2933 .fifo_status = nbu2ss_ep_fifo_status,
2934 .fifo_flush = nbu2ss_ep_fifo_flush,
2937 /*-------------------------------------------------------------------------*/
2938 /* usb_gadget_ops */
2940 /*-------------------------------------------------------------------------*/
2941 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2944 struct nbu2ss_udc *udc;
2947 pr_err("udc: %s, bad param\n", __func__);
2951 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2953 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2957 data = gpio_get_value(VBUS_VALUE);
2961 return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2964 /*-------------------------------------------------------------------------*/
2965 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2970 struct nbu2ss_udc *udc;
2973 pr_err("%s, bad param\n", __func__);
2977 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2979 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2983 data = gpio_get_value(VBUS_VALUE);
2985 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
2989 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
2991 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2992 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
2994 if (data & PLL_LOCK)
2998 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3003 /*-------------------------------------------------------------------------*/
3004 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3007 struct nbu2ss_udc *udc;
3008 unsigned long flags;
3011 pr_err("%s, bad param\n", __func__);
3015 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3017 spin_lock_irqsave(&udc->lock, flags);
3018 pgadget->is_selfpowered = (is_selfpowered != 0);
3019 spin_unlock_irqrestore(&udc->lock, flags);
3024 /*-------------------------------------------------------------------------*/
3025 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3030 /*-------------------------------------------------------------------------*/
3031 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3033 struct nbu2ss_udc *udc;
3034 unsigned long flags;
3037 pr_err("%s, bad param\n", __func__);
3041 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3043 spin_lock_irqsave(&udc->lock, flags);
3045 spin_unlock_irqrestore(&udc->lock, flags);
3050 /*-------------------------------------------------------------------------*/
3051 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3053 struct nbu2ss_udc *udc;
3054 unsigned long flags;
3057 pr_err("%s, bad param\n", __func__);
3061 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3064 pr_warn("%s, Not Regist Driver\n", __func__);
3068 if (udc->vbus_active == 0)
3071 spin_lock_irqsave(&udc->lock, flags);
3072 _nbu2ss_pullup(udc, is_on);
3073 spin_unlock_irqrestore(&udc->lock, flags);
3078 /*-------------------------------------------------------------------------*/
3079 static int nbu2ss_gad_ioctl(
3080 struct usb_gadget *pgadget,
3082 unsigned long param)
3087 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3088 .get_frame = nbu2ss_gad_get_frame,
3089 .wakeup = nbu2ss_gad_wakeup,
3090 .set_selfpowered = nbu2ss_gad_set_selfpowered,
3091 .vbus_session = nbu2ss_gad_vbus_session,
3092 .vbus_draw = nbu2ss_gad_vbus_draw,
3093 .pullup = nbu2ss_gad_pullup,
3094 .ioctl = nbu2ss_gad_ioctl,
3097 static const struct {
3099 const struct usb_ep_caps caps;
3100 } ep_info[NUM_ENDPOINTS] = {
3101 #define EP_INFO(_name, _caps) \
3108 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3110 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3112 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3113 EP_INFO("ep3in-int",
3114 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3116 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3118 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3120 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3122 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3123 EP_INFO("ep8in-int",
3124 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3126 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3128 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3130 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3132 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3133 EP_INFO("epdin-int",
3134 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3139 /*-------------------------------------------------------------------------*/
3140 static void nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3144 INIT_LIST_HEAD(&udc->gadget.ep_list);
3145 udc->gadget.ep0 = &udc->ep[0].ep;
3147 for (i = 0; i < NUM_ENDPOINTS; i++) {
3148 struct nbu2ss_ep *ep = &udc->ep[i];
3153 ep->ep.driver_data = NULL;
3154 ep->ep.name = ep_info[i].name;
3155 ep->ep.caps = ep_info[i].caps;
3156 ep->ep.ops = &nbu2ss_ep_ops;
3158 usb_ep_set_maxpacket_limit(&ep->ep,
3159 i == 0 ? EP0_PACKETSIZE
3162 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3163 INIT_LIST_HEAD(&ep->queue);
3166 list_del_init(&udc->ep[0].ep.ep_list);
3169 /*-------------------------------------------------------------------------*/
3170 /* platform_driver */
3171 static int nbu2ss_drv_contest_init(
3172 struct platform_device *pdev,
3173 struct nbu2ss_udc *udc)
3175 spin_lock_init(&udc->lock);
3176 udc->dev = &pdev->dev;
3178 udc->gadget.is_selfpowered = 1;
3179 udc->devstate = USB_STATE_NOTATTACHED;
3183 udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3186 nbu2ss_drv_ep_init(udc);
3189 udc->gadget.ops = &nbu2ss_gadget_ops;
3190 udc->gadget.ep0 = &udc->ep[0].ep;
3191 udc->gadget.speed = USB_SPEED_UNKNOWN;
3192 udc->gadget.name = driver_name;
3193 /* udc->gadget.is_dualspeed = 1; */
3195 device_initialize(&udc->gadget.dev);
3197 dev_set_name(&udc->gadget.dev, "gadget");
3198 udc->gadget.dev.parent = &pdev->dev;
3199 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3205 * probe - binds to the platform device
3207 static int nbu2ss_drv_probe(struct platform_device *pdev)
3209 int status = -ENODEV;
3210 struct nbu2ss_udc *udc;
3213 void __iomem *mmio_base;
3215 udc = &udc_controller;
3216 memset(udc, 0, sizeof(struct nbu2ss_udc));
3218 platform_set_drvdata(pdev, udc);
3220 /* require I/O memory and IRQ to be provided as resources */
3221 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3222 mmio_base = devm_ioremap_resource(&pdev->dev, r);
3223 if (IS_ERR(mmio_base))
3224 return PTR_ERR(mmio_base);
3226 irq = platform_get_irq(pdev, 0);
3228 dev_err(&pdev->dev, "failed to get IRQ\n");
3231 status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3232 0, driver_name, udc);
3235 udc->p_regs = (struct fc_regs *)mmio_base;
3237 /* USB Function Controller Interrupt */
3239 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3243 /* Driver Initialization */
3244 status = nbu2ss_drv_contest_init(pdev, udc);
3250 /* VBUS Interrupt */
3251 irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3252 status = request_irq(INT_VBUS,
3253 _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3256 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3263 /*-------------------------------------------------------------------------*/
3264 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3266 struct nbu2ss_udc *udc;
3268 udc = platform_get_drvdata(pdev);
3272 _nbu2ss_disable_controller(udc);
3275 /*-------------------------------------------------------------------------*/
3276 static int nbu2ss_drv_remove(struct platform_device *pdev)
3278 struct nbu2ss_udc *udc;
3279 struct nbu2ss_ep *ep;
3282 udc = &udc_controller;
3284 for (i = 0; i < NUM_ENDPOINTS; i++) {
3287 dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
3291 /* Interrupt Handler - Release */
3292 free_irq(INT_VBUS, udc);
3297 /*-------------------------------------------------------------------------*/
3298 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3300 struct nbu2ss_udc *udc;
3302 udc = platform_get_drvdata(pdev);
3306 if (udc->vbus_active) {
3307 udc->vbus_active = 0;
3308 udc->devstate = USB_STATE_NOTATTACHED;
3309 udc->linux_suspended = 1;
3311 if (udc->usb_suspended) {
3312 udc->usb_suspended = 0;
3313 _nbu2ss_reset_controller(udc);
3316 _nbu2ss_quiesce(udc);
3318 _nbu2ss_disable_controller(udc);
3323 /*-------------------------------------------------------------------------*/
3324 static int nbu2ss_drv_resume(struct platform_device *pdev)
3327 struct nbu2ss_udc *udc;
3329 udc = platform_get_drvdata(pdev);
3333 data = gpio_get_value(VBUS_VALUE);
3335 udc->vbus_active = 1;
3336 udc->devstate = USB_STATE_POWERED;
3337 _nbu2ss_enable_controller(udc);
3338 _nbu2ss_pullup(udc, 1);
3341 udc->linux_suspended = 0;
3346 static struct platform_driver udc_driver = {
3347 .probe = nbu2ss_drv_probe,
3348 .shutdown = nbu2ss_drv_shutdown,
3349 .remove = nbu2ss_drv_remove,
3350 .suspend = nbu2ss_drv_suspend,
3351 .resume = nbu2ss_drv_resume,
3353 .name = driver_name,
3357 module_platform_driver(udc_driver);
3359 MODULE_DESCRIPTION(DRIVER_DESC);
3360 MODULE_AUTHOR("Renesas Electronics Corporation");
3361 MODULE_LICENSE("GPL");