1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
11 * There's basically three types of memory:
12 * - data used only by the HCD ... kmalloc is fine
13 * - async and periodic schedules, shared by HC and HCD ... these
14 * need to use dma_pool or dma_alloc_coherent
15 * - driver buffers, read/written by HC ... single shot DMA mapped
17 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
18 * No memory seen by this driver is pageable.
21 /*-------------------------------------------------------------------------*/
23 /* Allocate the key transfer structures from the previously allocated pool */
25 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd,
28 memset (qtd, 0, sizeof *qtd);
30 qtd->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
31 qtd->hw_next = EHCI_LIST_END(ehci);
32 qtd->hw_alt_next = EHCI_LIST_END(ehci);
33 INIT_LIST_HEAD (&qtd->qtd_list);
36 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags)
41 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
43 ehci_qtd_init(ehci, qtd, dma);
48 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
50 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
54 static void qh_destroy(struct ehci_hcd *ehci, struct ehci_qh *qh)
56 /* clean qtds first, and know this is not linked */
57 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
58 ehci_dbg (ehci, "unused qh not empty!\n");
62 ehci_qtd_free (ehci, qh->dummy);
63 dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma);
67 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags)
72 qh = kzalloc(sizeof *qh, GFP_ATOMIC);
75 qh->hw = (struct ehci_qh_hw *)
76 dma_pool_zalloc(ehci->qh_pool, flags, &dma);
80 // INIT_LIST_HEAD (&qh->qh_list);
81 INIT_LIST_HEAD (&qh->qtd_list);
82 INIT_LIST_HEAD(&qh->unlink_node);
84 /* dummy td enables safe urb queuing */
85 qh->dummy = ehci_qtd_alloc (ehci, flags);
86 if (qh->dummy == NULL) {
87 ehci_dbg (ehci, "no dummy td\n");
93 dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma);
99 /*-------------------------------------------------------------------------*/
101 /* The queue heads and transfer descriptors are managed from pools tied
102 * to each of the "per device" structures.
103 * This is the initialisation and cleanup code.
106 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
109 qh_destroy(ehci, ehci->async);
113 qh_destroy(ehci, ehci->dummy);
116 /* DMA consistent memory and pools */
117 dma_pool_destroy(ehci->qtd_pool);
118 ehci->qtd_pool = NULL;
119 dma_pool_destroy(ehci->qh_pool);
120 ehci->qh_pool = NULL;
121 dma_pool_destroy(ehci->itd_pool);
122 ehci->itd_pool = NULL;
123 dma_pool_destroy(ehci->sitd_pool);
124 ehci->sitd_pool = NULL;
127 dma_free_coherent(ehci_to_hcd(ehci)->self.sysdev,
128 ehci->periodic_size * sizeof (u32),
129 ehci->periodic, ehci->periodic_dma);
130 ehci->periodic = NULL;
132 /* shadow periodic table */
133 kfree(ehci->pshadow);
134 ehci->pshadow = NULL;
137 /* remember to add cleanup code (above) if you add anything here */
138 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
142 /* QTDs for control/bulk/intr transfers */
143 ehci->qtd_pool = dma_pool_create ("ehci_qtd",
144 ehci_to_hcd(ehci)->self.sysdev,
145 sizeof (struct ehci_qtd),
146 32 /* byte alignment (for hw parts) */,
147 4096 /* can't cross 4K */);
148 if (!ehci->qtd_pool) {
152 /* QHs for control/bulk/intr transfers */
153 ehci->qh_pool = dma_pool_create ("ehci_qh",
154 ehci_to_hcd(ehci)->self.sysdev,
155 sizeof(struct ehci_qh_hw),
156 32 /* byte alignment (for hw parts) */,
157 4096 /* can't cross 4K */);
158 if (!ehci->qh_pool) {
161 ehci->async = ehci_qh_alloc (ehci, flags);
166 /* ITD for high speed ISO transfers */
167 ehci->itd_pool = dma_pool_create ("ehci_itd",
168 ehci_to_hcd(ehci)->self.sysdev,
169 sizeof (struct ehci_itd),
170 32 /* byte alignment (for hw parts) */,
171 4096 /* can't cross 4K */);
172 if (!ehci->itd_pool) {
176 /* SITD for full/low speed split ISO transfers */
177 ehci->sitd_pool = dma_pool_create ("ehci_sitd",
178 ehci_to_hcd(ehci)->self.sysdev,
179 sizeof (struct ehci_sitd),
180 32 /* byte alignment (for hw parts) */,
181 4096 /* can't cross 4K */);
182 if (!ehci->sitd_pool) {
186 /* Hardware periodic table */
187 ehci->periodic = (__le32 *)
188 dma_alloc_coherent(ehci_to_hcd(ehci)->self.sysdev,
189 ehci->periodic_size * sizeof(__le32),
190 &ehci->periodic_dma, flags);
191 if (ehci->periodic == NULL) {
195 if (ehci->use_dummy_qh) {
196 struct ehci_qh_hw *hw;
197 ehci->dummy = ehci_qh_alloc(ehci, flags);
201 hw = ehci->dummy->hw;
202 hw->hw_next = EHCI_LIST_END(ehci);
203 hw->hw_qtd_next = EHCI_LIST_END(ehci);
204 hw->hw_alt_next = EHCI_LIST_END(ehci);
205 ehci->dummy->hw = hw;
207 for (i = 0; i < ehci->periodic_size; i++)
208 ehci->periodic[i] = cpu_to_hc32(ehci,
209 ehci->dummy->qh_dma);
211 for (i = 0; i < ehci->periodic_size; i++)
212 ehci->periodic[i] = EHCI_LIST_END(ehci);
215 /* software shadow of hardware table */
216 ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags);
217 if (ehci->pshadow != NULL)
221 ehci_dbg (ehci, "couldn't init memory\n");
222 ehci_mem_cleanup (ehci);