2 * The file intends to implement the platform dependent EEH operations on pseries.
3 * Actually, the pseries platform is built based on RTAS heavily. That means the
4 * pseries platform dependent EEH operations will be built on RTAS calls. The functions
5 * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
8 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
9 * Copyright IBM Corporation 2001, 2005, 2006
10 * Copyright Dave Engebretsen & Todd Inglett 2001
11 * Copyright Linas Vepstas 2005, 2006
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/atomic.h>
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/init.h>
32 #include <linux/list.h>
34 #include <linux/pci.h>
35 #include <linux/proc_fs.h>
36 #include <linux/rbtree.h>
37 #include <linux/sched.h>
38 #include <linux/seq_file.h>
39 #include <linux/spinlock.h>
42 #include <asm/eeh_event.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
49 static int ibm_set_eeh_option;
50 static int ibm_set_slot_reset;
51 static int ibm_read_slot_reset_state;
52 static int ibm_read_slot_reset_state2;
53 static int ibm_slot_error_detail;
54 static int ibm_get_config_addr_info;
55 static int ibm_get_config_addr_info2;
56 static int ibm_configure_bridge;
57 static int ibm_configure_pe;
60 * Buffer for reporting slot-error-detail rtas calls. Its here
61 * in BSS, and not dynamically alloced, so that it ends up in
62 * RMO where RTAS can access it.
64 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
65 static DEFINE_SPINLOCK(slot_errbuf_lock);
66 static int eeh_error_buf_size;
69 * pseries_eeh_init - EEH platform dependent initialization
71 * EEH platform dependent initialization on pseries.
73 static int pseries_eeh_init(void)
75 /* figure out EEH RTAS function call tokens */
76 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
77 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
78 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
79 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
80 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
81 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
82 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
83 ibm_configure_pe = rtas_token("ibm,configure-pe");
84 ibm_configure_bridge = rtas_token("ibm,configure-bridge");
87 * Necessary sanity check. We needn't check "get-config-addr-info"
88 * and its variant since the old firmware probably support address
89 * of domain/bus/slot/function for EEH RTAS operations.
91 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE ||
92 ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE ||
93 (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
94 ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) ||
95 ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE ||
96 (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
97 ibm_configure_bridge == RTAS_UNKNOWN_SERVICE)) {
98 pr_info("EEH functionality not supported\n");
102 /* Initialize error log lock and size */
103 spin_lock_init(&slot_errbuf_lock);
104 eeh_error_buf_size = rtas_token("rtas-error-log-max");
105 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
106 pr_info("%s: unknown EEH error log size\n",
108 eeh_error_buf_size = 1024;
109 } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
110 pr_info("%s: EEH error log size %d exceeds the maximal %d\n",
111 __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
112 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
115 /* Set EEH probe mode */
116 eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
121 static int pseries_eeh_cap_start(struct pci_dn *pdn)
128 rtas_read_config(pdn, PCI_STATUS, 2, &status);
129 if (!(status & PCI_STATUS_CAP_LIST))
132 return PCI_CAPABILITY_LIST;
136 static int pseries_eeh_find_cap(struct pci_dn *pdn, int cap)
138 int pos = pseries_eeh_cap_start(pdn);
139 int cnt = 48; /* Maximal number of capabilities */
146 rtas_read_config(pdn, pos, 1, &pos);
150 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
155 pos += PCI_CAP_LIST_NEXT;
161 static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
163 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
166 int ttl = (4096 - 256) / 8;
168 if (!edev || !edev->pcie_cap)
170 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
176 if (PCI_EXT_CAP_ID(header) == cap && pos)
179 pos = PCI_EXT_CAP_NEXT(header);
183 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
191 * pseries_eeh_probe - EEH probe on the given device
192 * @pdn: PCI device node
195 * When EEH module is installed during system boot, all PCI devices
196 * are checked one by one to see if it supports EEH. The function
197 * is introduced for the purpose.
199 static void *pseries_eeh_probe(struct pci_dn *pdn, void *data)
201 struct eeh_dev *edev;
207 /* Retrieve OF node and eeh device */
208 edev = pdn_to_eeh_dev(pdn);
209 if (!edev || edev->pe)
212 /* Check class/vendor/device IDs */
213 if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code)
216 /* Skip for PCI-ISA bridge */
217 if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
221 * Update class code and mode of eeh device. We need
222 * correctly reflects that current device is root port
223 * or PCIe switch downstream port.
225 edev->class_code = pdn->class_code;
226 edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
227 edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
228 edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
229 edev->mode &= 0xFFFFFF00;
230 if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
231 edev->mode |= EEH_DEV_BRIDGE;
232 if (edev->pcie_cap) {
233 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
235 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
236 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
237 edev->mode |= EEH_DEV_ROOT_PORT;
238 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
239 edev->mode |= EEH_DEV_DS_PORT;
243 /* Initialize the fake PE */
244 memset(&pe, 0, sizeof(struct eeh_pe));
246 pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
248 /* Enable EEH on the device */
249 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
251 /* Retrieve PE address */
252 edev->config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
253 edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
254 pe.addr = edev->pe_config_addr;
256 /* Some older systems (Power4) allow the ibm,set-eeh-option
257 * call to succeed even on nodes where EEH is not supported.
258 * Verify support explicitly.
260 ret = eeh_ops->get_state(&pe, NULL);
261 if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
265 eeh_add_flag(EEH_ENABLED);
266 eeh_add_to_parent_pe(edev);
268 pr_debug("%s: EEH enabled on %02x:%02x.%01x PHB#%d-PE#%x\n",
269 __func__, pdn->busno, PCI_SLOT(pdn->devfn),
270 PCI_FUNC(pdn->devfn), pe.phb->global_number,
272 } else if (pdn->parent && pdn_to_eeh_dev(pdn->parent) &&
273 (pdn_to_eeh_dev(pdn->parent))->pe) {
274 /* This device doesn't support EEH, but it may have an
275 * EEH parent, in which case we mark it as supported.
277 edev->config_addr = pdn_to_eeh_dev(pdn->parent)->config_addr;
278 edev->pe_config_addr = pdn_to_eeh_dev(pdn->parent)->pe_config_addr;
279 eeh_add_to_parent_pe(edev);
283 /* Save memory bars */
290 * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
292 * @option: operation to be issued
294 * The function is used to control the EEH functionality globally.
295 * Currently, following options are support according to PAPR:
296 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
298 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
304 * When we're enabling or disabling EEH functioality on
305 * the particular PE, the PE config address is possibly
306 * unavailable. Therefore, we have to figure it out from
310 case EEH_OPT_DISABLE:
312 case EEH_OPT_THAW_MMIO:
313 case EEH_OPT_THAW_DMA:
314 config_addr = pe->config_addr;
316 config_addr = pe->addr;
318 case EEH_OPT_FREEZE_PE:
322 pr_err("%s: Invalid option %d\n",
327 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
328 config_addr, BUID_HI(pe->phb->buid),
329 BUID_LO(pe->phb->buid), option);
335 * pseries_eeh_get_pe_addr - Retrieve PE address
338 * Retrieve the assocated PE address. Actually, there're 2 RTAS
339 * function calls dedicated for the purpose. We need implement
340 * it through the new function and then the old one. Besides,
341 * you should make sure the config address is figured out from
342 * FDT node before calling the function.
344 * It's notable that zero'ed return value means invalid PE config
347 static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
352 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
354 * First of all, we need to make sure there has one PE
355 * associated with the device. Otherwise, PE address is
358 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
359 pe->config_addr, BUID_HI(pe->phb->buid),
360 BUID_LO(pe->phb->buid), 1);
361 if (ret || (rets[0] == 0))
364 /* Retrieve the associated PE config address */
365 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
366 pe->config_addr, BUID_HI(pe->phb->buid),
367 BUID_LO(pe->phb->buid), 0);
369 pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
370 __func__, pe->phb->global_number, pe->config_addr);
377 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
378 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
379 pe->config_addr, BUID_HI(pe->phb->buid),
380 BUID_LO(pe->phb->buid), 0);
382 pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
383 __func__, pe->phb->global_number, pe->config_addr);
394 * pseries_eeh_get_state - Retrieve PE state
396 * @state: return value
398 * Retrieve the state of the specified PE. On RTAS compliant
399 * pseries platform, there already has one dedicated RTAS function
400 * for the purpose. It's notable that the associated PE config address
401 * might be ready when calling the function. Therefore, endeavour to
402 * use the PE config address if possible. Further more, there're 2
403 * RTAS calls for the purpose, we need to try the new one and back
404 * to the old one if the new one couldn't work properly.
406 static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
413 /* Figure out PE config address if possible */
414 config_addr = pe->config_addr;
416 config_addr = pe->addr;
418 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
419 ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
420 config_addr, BUID_HI(pe->phb->buid),
421 BUID_LO(pe->phb->buid));
422 } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
423 /* Fake PE unavailable info */
425 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
426 config_addr, BUID_HI(pe->phb->buid),
427 BUID_LO(pe->phb->buid));
429 return EEH_STATE_NOT_SUPPORT;
435 /* Parse the result out */
437 return EEH_STATE_NOT_SUPPORT;
441 result = EEH_STATE_MMIO_ACTIVE |
442 EEH_STATE_DMA_ACTIVE;
445 result = EEH_STATE_RESET_ACTIVE |
446 EEH_STATE_MMIO_ACTIVE |
447 EEH_STATE_DMA_ACTIVE;
453 result = EEH_STATE_MMIO_ENABLED;
457 if (state) *state = rets[2];
458 result = EEH_STATE_UNAVAILABLE;
460 result = EEH_STATE_NOT_SUPPORT;
464 result = EEH_STATE_NOT_SUPPORT;
471 * pseries_eeh_reset - Reset the specified PE
473 * @option: reset option
475 * Reset the specified PE
477 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
482 /* Figure out PE address */
483 config_addr = pe->config_addr;
485 config_addr = pe->addr;
487 /* Reset PE through RTAS call */
488 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
489 config_addr, BUID_HI(pe->phb->buid),
490 BUID_LO(pe->phb->buid), option);
492 /* If fundamental-reset not supported, try hot-reset */
493 if (option == EEH_RESET_FUNDAMENTAL &&
495 option = EEH_RESET_HOT;
496 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
497 config_addr, BUID_HI(pe->phb->buid),
498 BUID_LO(pe->phb->buid), option);
501 /* We need reset hold or settlement delay */
502 if (option == EEH_RESET_FUNDAMENTAL ||
503 option == EEH_RESET_HOT)
504 msleep(EEH_PE_RST_HOLD_TIME);
506 msleep(EEH_PE_RST_SETTLE_TIME);
512 * pseries_eeh_wait_state - Wait for PE state
514 * @max_wait: maximal period in millisecond
516 * Wait for the state of associated PE. It might take some time
517 * to retrieve the PE's state.
519 static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
525 * According to PAPR, the state of PE might be temporarily
526 * unavailable. Under the circumstance, we have to wait
527 * for indicated time determined by firmware. The maximal
528 * wait time is 5 minutes, which is acquired from the original
529 * EEH implementation. Also, the original implementation
530 * also defined the minimal wait time as 1 second.
532 #define EEH_STATE_MIN_WAIT_TIME (1000)
533 #define EEH_STATE_MAX_WAIT_TIME (300 * 1000)
536 ret = pseries_eeh_get_state(pe, &mwait);
539 * If the PE's state is temporarily unavailable,
540 * we have to wait for the specified time. Otherwise,
541 * the PE's state will be returned immediately.
543 if (ret != EEH_STATE_UNAVAILABLE)
547 pr_warn("%s: Timeout when getting PE's state (%d)\n",
549 return EEH_STATE_NOT_SUPPORT;
553 pr_warn("%s: Firmware returned bad wait value %d\n",
555 mwait = EEH_STATE_MIN_WAIT_TIME;
556 } else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
557 pr_warn("%s: Firmware returned too long wait value %d\n",
559 mwait = EEH_STATE_MAX_WAIT_TIME;
566 return EEH_STATE_NOT_SUPPORT;
570 * pseries_eeh_get_log - Retrieve error log
572 * @severity: temporary or permanent error log
573 * @drv_log: driver log to be combined with retrieved error log
574 * @len: length of driver log
576 * Retrieve the temporary or permanent error from the PE.
577 * Actually, the error will be retrieved through the dedicated
580 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
586 spin_lock_irqsave(&slot_errbuf_lock, flags);
587 memset(slot_errbuf, 0, eeh_error_buf_size);
589 /* Figure out the PE address */
590 config_addr = pe->config_addr;
592 config_addr = pe->addr;
594 ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
595 BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
596 virt_to_phys(drv_log), len,
597 virt_to_phys(slot_errbuf), eeh_error_buf_size,
600 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
601 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
607 * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
610 * The function will be called to reconfigure the bridges included
611 * in the specified PE so that the mulfunctional PE would be recovered
614 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
618 /* Waiting 0.2s maximum before skipping configuration */
621 /* Figure out the PE address */
622 config_addr = pe->config_addr;
624 config_addr = pe->addr;
626 while (max_wait > 0) {
627 /* Use new configure-pe function, if supported */
628 if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
629 ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
630 config_addr, BUID_HI(pe->phb->buid),
631 BUID_LO(pe->phb->buid));
632 } else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
633 ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
634 config_addr, BUID_HI(pe->phb->buid),
635 BUID_LO(pe->phb->buid));
644 * If RTAS returns a delay value that's above 100ms, cut it
645 * down to 100ms in case firmware made a mistake. For more
646 * on how these delay values work see rtas_busy_delay_time
648 if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
649 ret <= RTAS_EXTENDED_DELAY_MAX)
650 ret = RTAS_EXTENDED_DELAY_MIN+2;
652 max_wait -= rtas_busy_delay_time(ret);
657 rtas_busy_delay(ret);
660 pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
661 __func__, pe->phb->global_number, pe->addr, ret);
666 * pseries_eeh_read_config - Read PCI config space
667 * @pdn: PCI device node
668 * @where: PCI address
669 * @size: size to read
672 * Read config space from the speicifed device
674 static int pseries_eeh_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
676 return rtas_read_config(pdn, where, size, val);
680 * pseries_eeh_write_config - Write PCI config space
681 * @pdn: PCI device node
682 * @where: PCI address
683 * @size: size to write
684 * @val: value to be written
686 * Write config space to the specified device
688 static int pseries_eeh_write_config(struct pci_dn *pdn, int where, int size, u32 val)
690 return rtas_write_config(pdn, where, size, val);
693 static struct eeh_ops pseries_eeh_ops = {
695 .init = pseries_eeh_init,
696 .probe = pseries_eeh_probe,
697 .set_option = pseries_eeh_set_option,
698 .get_pe_addr = pseries_eeh_get_pe_addr,
699 .get_state = pseries_eeh_get_state,
700 .reset = pseries_eeh_reset,
701 .wait_state = pseries_eeh_wait_state,
702 .get_log = pseries_eeh_get_log,
703 .configure_bridge = pseries_eeh_configure_bridge,
705 .read_config = pseries_eeh_read_config,
706 .write_config = pseries_eeh_write_config,
708 .restore_config = NULL
712 * eeh_pseries_init - Register platform dependent EEH operations
714 * EEH initialization on pseries platform. This function should be
715 * called before any EEH related functions.
717 static int __init eeh_pseries_init(void)
721 ret = eeh_ops_register(&pseries_eeh_ops);
723 pr_info("EEH: pSeries platform initialized\n");
725 pr_info("EEH: pSeries platform initialization failure (%d)\n",
730 machine_early_initcall(pseries, eeh_pseries_init);