2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
4 * Copyright (C) 2001-5, B2C2 inc.
6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@posteo.de>
8 * This driver is "hard-coded" to be used with the 1st generation of
9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11 * another device with a BCM3510, this is no problem.
13 * The driver works also with QAM64 DVB-C, but had an unreasonable high
14 * UNC. (Tested with the Air2PC ATSC 1st generation)
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but WITHOUT
23 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
27 * You should have received a copy of the GNU General Public License along with
28 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
29 * Ave, Cambridge, MA 02139, USA.
32 #include <linux/init.h>
33 #include <linux/module.h>
34 #include <linux/device.h>
35 #include <linux/firmware.h>
36 #include <linux/jiffies.h>
37 #include <linux/string.h>
38 #include <linux/slab.h>
39 #include <linux/mutex.h>
41 #include "dvb_frontend.h"
43 #include "bcm3510_priv.h"
45 /* Max transfer size done by bcm3510_do_hab_cmd() function */
46 #define MAX_XFER_SIZE 128
48 struct bcm3510_state {
50 struct i2c_adapter* i2c;
51 const struct bcm3510_config* config;
52 struct dvb_frontend frontend;
54 /* demodulator private data */
55 struct mutex hab_mutex;
58 unsigned long next_status_check;
59 unsigned long status_check_interval;
60 struct bcm3510_hab_cmd_status1 status1;
61 struct bcm3510_hab_cmd_status2 status2;
65 module_param(debug, int, 0644);
66 MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
68 #define dprintk(level,x...) if (level & debug) printk(x)
69 #define dbufout(b,l,m) {\
71 for (i = 0; i < l; i++) \
74 #define deb_info(args...) dprintk(0x01,args)
75 #define deb_i2c(args...) dprintk(0x02,args)
76 #define deb_hab(args...) dprintk(0x04,args)
78 /* transfer functions */
79 static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
83 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
86 memcpy(&b[1],buf,len);
88 deb_i2c("i2c wr %02x: ",reg);
89 dbufout(buf,len,deb_i2c);
92 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
94 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
95 __func__, state->config->demod_address, reg, err);
102 static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
104 struct i2c_msg msg[] = {
105 { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
106 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
112 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
113 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
114 __func__, state->config->demod_address, reg, err);
117 deb_i2c("i2c rd %02x: ",reg);
118 dbufout(buf,len,deb_i2c);
124 static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
126 return bcm3510_writebytes(state,reg,&v.raw,1);
129 static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
131 return bcm3510_readbytes(state,reg,&v->raw,1);
134 /* Host Access Buffer transfers */
135 static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
137 bcm3510_register_value v;
140 v.HABADR_a6.HABADR = 0;
141 if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
144 for (i = 0; i < len; i++) {
145 if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
147 buf[i] = v.HABDATA_a7;
152 static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
154 bcm3510_register_value v,hab;
158 /* Check if any previous HAB request still needs to be serviced by the
159 * Acquisition Processor before sending new request */
160 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
162 if (v.HABSTAT_a8.HABR) {
163 deb_info("HAB is running already - clearing it.\n");
164 v.HABSTAT_a8.HABR = 0;
165 bcm3510_writeB(st,0xa8,v);
169 /* Send the start HAB Address (automatically incremented after write of
170 * HABDATA) and write the HAB Data */
171 hab.HABADR_a6.HABADR = 0;
172 if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
175 for (i = 0; i < len; i++) {
176 hab.HABDATA_a7 = buf[i];
177 if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
181 /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
183 v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
184 if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
187 /* Polling method: Wait until the AP finishes processing the HAB request */
189 while (time_before(jiffies, t)) {
190 deb_info("waiting for HAB to complete\n");
192 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
195 if (!v.HABSTAT_a8.HABR)
199 deb_info("send_request execution timed out.\n");
203 static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
205 u8 ob[MAX_XFER_SIZE], ib[MAX_XFER_SIZE];
208 if (ilen + 2 > sizeof(ib)) {
209 deb_hab("do_hab_cmd: ilen=%d is too big!\n", ilen);
213 if (olen + 2 > sizeof(ob)) {
214 deb_hab("do_hab_cmd: olen=%d is too big!\n", olen);
220 memcpy(&ob[2],obuf,olen);
222 deb_hab("hab snd: ");
223 dbufout(ob,olen+2,deb_hab);
226 if (mutex_lock_interruptible(&st->hab_mutex) < 0)
229 if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
230 (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
233 deb_hab("hab get: ");
234 dbufout(ib,ilen+2,deb_hab);
237 memcpy(ibuf,&ib[2],ilen);
239 mutex_unlock(&st->hab_mutex);
244 /* not needed, we use a semaphore to prevent HAB races */
245 static int bcm3510_is_ap_ready(struct bcm3510_state *st)
247 bcm3510_register_value ap,hab;
250 if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
251 (ret = bcm3510_readB(st,0xa2,&ap) < 0))
254 if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
255 deb_info("AP is busy\n");
263 static int bcm3510_bert_reset(struct bcm3510_state *st)
265 bcm3510_register_value b;
268 if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
271 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
272 b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
273 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
274 b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
276 /* clear residual bit counter TODO */
280 static int bcm3510_refresh_state(struct bcm3510_state *st)
282 if (time_after(jiffies,st->next_status_check)) {
283 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
284 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
285 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
290 static int bcm3510_read_status(struct dvb_frontend *fe, enum fe_status *status)
292 struct bcm3510_state* st = fe->demodulator_priv;
293 bcm3510_refresh_state(st);
296 if (st->status1.STATUS1.RECEIVER_LOCK)
297 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
299 if (st->status1.STATUS1.FEC_LOCK)
300 *status |= FE_HAS_VITERBI;
302 if (st->status1.STATUS1.OUT_PLL_LOCK)
303 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
305 if (*status & FE_HAS_LOCK)
306 st->status_check_interval = 1500;
307 else /* more frequently checks if no lock has been achieved yet */
308 st->status_check_interval = 500;
310 deb_info("real_status: %02x\n",*status);
314 static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
316 struct bcm3510_state* st = fe->demodulator_priv;
317 bcm3510_refresh_state(st);
319 *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
323 static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
325 struct bcm3510_state* st = fe->demodulator_priv;
326 bcm3510_refresh_state(st);
327 *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
331 static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
333 struct bcm3510_state* st = fe->demodulator_priv;
336 bcm3510_refresh_state(st);
337 t = st->status2.SIGNAL;
346 /* normalize if necessary */
347 *strength = (t << 8) | t;
351 static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
353 struct bcm3510_state* st = fe->demodulator_priv;
354 bcm3510_refresh_state(st);
356 *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
360 /* tuner frontend programming */
361 static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
363 struct bcm3510_hab_cmd_tune c;
364 memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
366 /* I2C Mode disabled, set 16 control / Data pairs */
369 /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
370 * logic high (as Configuration) */
372 /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
373 c.TUNCTL_state = 0x40;
375 /* PRESCALER DIVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
376 c.ctl_dat[0].ctrl.size = BITS_8;
377 c.ctl_dat[0].data = 0x80 | bc;
379 /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
380 c.ctl_dat[1].ctrl.size = BITS_8;
381 c.ctl_dat[1].data = 4;
383 /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
384 c.ctl_dat[2].ctrl.size = BITS_3;
385 c.ctl_dat[2].data = 0x20;
387 /* control CS0 pin, pulse byte ? */
388 c.ctl_dat[3].ctrl.size = BITS_3;
389 c.ctl_dat[3].ctrl.clk_off = 1;
390 c.ctl_dat[3].ctrl.cs0 = 1;
391 c.ctl_dat[3].data = 0x40;
393 /* PGM_S18 to PGM_S11 */
394 c.ctl_dat[4].ctrl.size = BITS_8;
395 c.ctl_dat[4].data = n >> 3;
397 /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
398 c.ctl_dat[5].ctrl.size = BITS_8;
399 c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
401 /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
402 c.ctl_dat[6].ctrl.size = BITS_3;
403 c.ctl_dat[6].data = (a << 6) & 0xdf;
405 /* control CS0 pin, pulse byte ? */
406 c.ctl_dat[7].ctrl.size = BITS_3;
407 c.ctl_dat[7].ctrl.clk_off = 1;
408 c.ctl_dat[7].ctrl.cs0 = 1;
409 c.ctl_dat[7].data = 0x40;
411 /* PRESCALER DIVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
412 c.ctl_dat[8].ctrl.size = BITS_8;
413 c.ctl_dat[8].data = 0x80;
415 /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
416 c.ctl_dat[9].ctrl.size = BITS_8;
417 c.ctl_dat[9].data = 0x10;
419 /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
420 c.ctl_dat[10].ctrl.size = BITS_3;
421 c.ctl_dat[10].data = 0x20;
424 c.ctl_dat[11].ctrl.size = BITS_3;
425 c.ctl_dat[11].ctrl.clk_off = 1;
426 c.ctl_dat[11].ctrl.cs1 = 1;
427 c.ctl_dat[11].data = 0x40;
429 /* PGM_S18 to PGM_S11 */
430 c.ctl_dat[12].ctrl.size = BITS_8;
431 c.ctl_dat[12].data = 0x2a;
433 /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
434 c.ctl_dat[13].ctrl.size = BITS_8;
435 c.ctl_dat[13].data = 0x8e;
437 /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
438 c.ctl_dat[14].ctrl.size = BITS_3;
439 c.ctl_dat[14].data = 0;
442 c.ctl_dat[15].ctrl.size = BITS_3;
443 c.ctl_dat[15].ctrl.clk_off = 1;
444 c.ctl_dat[15].ctrl.cs1 = 1;
445 c.ctl_dat[15].data = 0x40;
447 return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
450 static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
454 s32 YIntercept,Tfvco1;
458 deb_info("%dkHz:",freq);
459 /* set Band Switch */
462 else if (freq <= 378000)
467 if (freq >= 470000) {
470 } else if (freq >= 90000) {
473 } else if (freq >= 76000){
481 Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
486 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
487 if (n >= 16 && n <= 2047)
488 return bcm3510_tuner_cmd(st,bc,n,a);
493 static int bcm3510_set_frontend(struct dvb_frontend *fe)
495 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
496 struct bcm3510_state* st = fe->demodulator_priv;
497 struct bcm3510_hab_cmd_ext_acquire cmd;
498 struct bcm3510_hab_cmd_bert_control bert;
501 memset(&cmd,0,sizeof(cmd));
502 switch (c->modulation) {
504 cmd.ACQUIRE0.MODE = 0x1;
505 cmd.ACQUIRE1.SYM_RATE = 0x1;
506 cmd.ACQUIRE1.IF_FREQ = 0x1;
509 cmd.ACQUIRE0.MODE = 0x2;
510 cmd.ACQUIRE1.SYM_RATE = 0x2;
511 cmd.ACQUIRE1.IF_FREQ = 0x1;
515 cmd.ACQUIRE0.MODE = 0x3;
518 cmd.ACQUIRE0.MODE = 0x4;
521 cmd.ACQUIRE0.MODE = 0x5;
524 cmd.ACQUIRE0.MODE = 0x6;
527 cmd.ACQUIRE0.MODE = 0x7;
531 cmd.ACQUIRE0.MODE = 0x8;
532 cmd.ACQUIRE1.SYM_RATE = 0x0;
533 cmd.ACQUIRE1.IF_FREQ = 0x0;
536 cmd.ACQUIRE0.MODE = 0x9;
537 cmd.ACQUIRE1.SYM_RATE = 0x0;
538 cmd.ACQUIRE1.IF_FREQ = 0x0;
542 cmd.ACQUIRE0.OFFSET = 0;
543 cmd.ACQUIRE0.NTSCSWEEP = 1;
547 /* if (enableOffset) {
551 cmd.SYM_OFFSET0 = xx;
552 cmd.SYM_OFFSET1 = xx;
553 if (enableNtscSweep) {
558 bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
560 /* doing it with different MSGIDs, data book and source differs */
563 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
564 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
566 bcm3510_bert_reset(st);
568 ret = bcm3510_set_freq(st, c->frequency);
572 memset(&st->status1,0,sizeof(st->status1));
573 memset(&st->status2,0,sizeof(st->status2));
574 st->status_check_interval = 500;
576 /* Give the AP some time */
582 static int bcm3510_sleep(struct dvb_frontend* fe)
587 static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
589 s->min_delay_ms = 1000;
595 static void bcm3510_release(struct dvb_frontend* fe)
597 struct bcm3510_state* state = fe->demodulator_priv;
601 /* firmware download:
602 * firmware file is build up like this:
603 * 16bit addr, 16bit length, 8byte of length
607 static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, const u8 *b,
611 bcm3510_register_value vH, vL,vD;
613 vH.MADRH_a9 = addr >> 8;
615 if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
616 if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
618 for (i = 0; i < len; i++) {
620 if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
627 static int bcm3510_download_firmware(struct dvb_frontend* fe)
629 struct bcm3510_state* st = fe->demodulator_priv;
630 const struct firmware *fw;
635 deb_info("requesting firmware\n");
636 if ((ret = st->config->request_firmware(fe, &fw, "/*(DEBLOBBED)*/")) < 0) {
637 err("could not load firmware (%s): %d","/*(DEBLOBBED)*/",ret);
640 deb_info("got firmware: %zu\n", fw->size);
643 for (i = 0; i < fw->size;) {
644 addr = le16_to_cpu(*((__le16 *)&b[i]));
645 len = le16_to_cpu(*((__le16 *)&b[i+2]));
646 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
647 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
648 err("firmware download failed: %d\n",ret);
653 release_firmware(fw);
654 deb_info("firmware download successfully completed\n");
658 static int bcm3510_check_firmware_version(struct bcm3510_state *st)
660 struct bcm3510_hab_cmd_get_version_info ver;
661 bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
663 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
664 ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
666 if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
667 ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
668 ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
671 deb_info("version check failed\n");
675 /* (un)resetting the AP */
676 static int bcm3510_reset(struct bcm3510_state *st)
680 bcm3510_register_value v;
682 bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
683 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
687 while (time_before(jiffies, t)) {
689 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
692 if (v.APSTAT1_a2.RESET)
695 deb_info("reset timed out\n");
699 static int bcm3510_clear_reset(struct bcm3510_state *st)
701 bcm3510_register_value v;
706 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
710 while (time_before(jiffies, t)) {
712 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
715 /* verify that reset is cleared */
716 if (!v.APSTAT1_a2.RESET)
719 deb_info("reset clear timed out\n");
723 static int bcm3510_init_cold(struct bcm3510_state *st)
726 bcm3510_register_value v;
728 /* read Acquisation Processor status register and check it is not in RUN mode */
729 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
731 if (v.APSTAT1_a2.RUN) {
732 deb_info("AP is already running - firmware already loaded.\n");
736 deb_info("reset?\n");
737 if ((ret = bcm3510_reset(st)) < 0)
740 deb_info("tristate?\n");
743 if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
746 deb_info("firmware?\n");
747 if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
748 (ret = bcm3510_clear_reset(st)) < 0)
751 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
756 static int bcm3510_init(struct dvb_frontend* fe)
758 struct bcm3510_state* st = fe->demodulator_priv;
759 bcm3510_register_value j;
760 struct bcm3510_hab_cmd_set_agc c;
763 if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
766 deb_info("JDEC: %02x\n",j.raw);
768 switch (j.JDEC_ca.JDEC) {
769 case JDEC_WAIT_AT_RAM:
770 deb_info("attempting to download firmware\n");
771 if ((ret = bcm3510_init_cold(st)) < 0)
773 case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
774 deb_info("firmware is loaded\n");
775 bcm3510_check_firmware_version(st);
783 bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
789 static struct dvb_frontend_ops bcm3510_ops;
791 struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
792 struct i2c_adapter *i2c)
794 struct bcm3510_state* state = NULL;
796 bcm3510_register_value v;
798 /* allocate memory for the internal state */
799 state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
803 /* setup the state */
805 state->config = config;
808 /* create dvb_frontend */
809 memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
810 state->frontend.demodulator_priv = state;
812 mutex_init(&state->hab_mutex);
814 if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
817 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
819 if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
820 (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
823 info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
825 bcm3510_reset(state);
827 return &state->frontend;
833 EXPORT_SYMBOL(bcm3510_attach);
835 static struct dvb_frontend_ops bcm3510_ops = {
836 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
838 .name = "Broadcom BCM3510 VSB/QAM frontend",
839 .frequency_min = 54000000,
840 .frequency_max = 803000000,
841 /* stepsize is just a guess */
842 .frequency_stepsize = 0,
844 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
845 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
846 FE_CAN_8VSB | FE_CAN_16VSB |
847 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
850 .release = bcm3510_release,
852 .init = bcm3510_init,
853 .sleep = bcm3510_sleep,
855 .set_frontend = bcm3510_set_frontend,
856 .get_tune_settings = bcm3510_get_tune_settings,
858 .read_status = bcm3510_read_status,
859 .read_ber = bcm3510_read_ber,
860 .read_signal_strength = bcm3510_read_signal_strength,
861 .read_snr = bcm3510_read_snr,
862 .read_ucblocks = bcm3510_read_unc,
865 MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
866 MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
867 MODULE_LICENSE("GPL");