1 Distributed Switch Architecture Device Tree Bindings
2 ----------------------------------------------------
4 Two bindings exist, one of which has been deprecated due to
10 Switches are true Linux devices and can be probes by any means. Once
11 probed, they register to the DSA framework, passing a node
12 pointer. This node is expected to fulfil the following binding, and
13 may contain additional properties as required by the device it is
18 - ports : A container for child nodes representing switch ports.
22 - dsa,member : A two element list indicates which DSA cluster, and position
23 within the cluster a switch takes. <0 0> is cluster 0,
24 switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
25 switch 0. A switch not part of any cluster (single device
26 hanging off a CPU port) must not specify this property
28 The ports container has the following properties
32 - #address-cells : Must be 1
33 - #size-cells : Must be 0
35 Each port children node must have the following mandatory properties:
36 - reg : Describes the port address in the switch
38 An uplink/downlink port between switches in the cluster has the following
41 - link : Should be a list of phandles to other switch's DSA
42 port. This port is used as the outgoing port
43 towards the phandle ports. The full routing
44 information must be given, not just the one hop
45 routes to neighbouring switches.
47 A CPU port has the following mandatory property:
49 - ethernet : Should be a phandle to a valid Ethernet device node.
50 This host device is what the switch port is
53 A user port has the following optional property:
55 - label : Describes the label associated with this port, which
56 will become the netdev name.
58 Port child nodes may also contain the following optional standardised
59 properties, described in binding documents:
61 - phy-handle : Phandle to a PHY on an MDIO bus. See
62 Documentation/devicetree/bindings/net/ethernet.txt
66 Documentation/devicetree/bindings/net/ethernet.txt
69 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
71 Documentation/devicetree/bindings/net/fixed-link.txt
76 The following example shows three switches on three MDIO busses,
77 linked into one DSA cluster.
84 compatible = "marvell,mv88e6085";
109 switch0port5: port@5 {
111 phy-mode = "rgmii-txid";
112 link = <&switch1port6
133 #address-cells = <1>;
137 compatible = "marvell,mv88e6085";
138 #address-cells = <1>;
145 #address-cells = <1>;
150 phy-handle = <&switch1phy0>;
156 phy-handle = <&switch1phy1>;
162 phy-handle = <&switch1phy2>;
165 switch1port5: port@5 {
167 link = <&switch2port9>;
168 phy-mode = "rgmii-txid";
175 switch1port6: port@6 {
177 phy-mode = "rgmii-txid";
178 link = <&switch0port5>;
186 #address-cells = <1>;
188 switch1phy0: switch1phy0@0 {
191 switch1phy1: switch1phy0@1 {
194 switch1phy2: switch1phy0@2 {
202 #address-cells = <1>;
206 compatible = "marvell,mv88e6085";
207 #address-cells = <1>;
214 #address-cells = <1>;
237 link-gpios = <&gpio6 2
248 link-gpios = <&gpio6 3
253 switch2port9: port@9 {
255 phy-mode = "rgmii-txid";
256 link = <&switch1port5
270 The deprecated binding makes use of a platform device to represent the
271 switches. The switches themselves are not Linux devices, and make use
272 of an MDIO bus for management.
275 - compatible : Should be "marvell,dsa"
276 - #address-cells : Must be 2, first cell is the address on the MDIO bus
277 and second cell is the address in the switch tree.
278 Second cell is used only when cascading/chaining.
279 - #size-cells : Must be 0
280 - dsa,ethernet : Should be a phandle to a valid Ethernet device node
281 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
284 - interrupts : property with a value describing the switch
285 interrupt number (not supported by the driver)
287 A DSA node can contain multiple switch chips which are therefore child nodes of
288 the parent DSA node. The maximum number of allowed child nodes is 4
290 Each of these switch child nodes should have the following required properties:
292 - reg : Contains two fields. The first one describes the
293 address on the MII bus. The second is the switch
294 number that must be unique in cascaded configurations
295 - #address-cells : Must be 1
296 - #size-cells : Must be 0
298 A switch child node has the following optional property:
300 - eeprom-length : Set to the length of an EEPROM connected to the
301 switch. Must be set if the switch can not detect
302 the presence and/or size of a connected EEPROM,
305 A switch may have multiple "port" children nodes
307 Each port children node must have the following mandatory properties:
308 - reg : Describes the port address in the switch
309 - label : Describes the label associated with this port, special
310 labels are "cpu" to indicate a CPU port and "dsa" to
311 indicate an uplink/downlink port.
313 Note that a port labelled "dsa" will imply checking for the uplink phandle
317 - link : Should be a list of phandles to another switch's DSA port.
318 This property is only used when switches are being
319 chained/cascaded together. This port is used as outgoing port
320 towards the phandle port, which can be more than one hop away.
322 - phy-handle : Phandle to a PHY on an external MDIO bus, not the
323 switch internal one. See
324 Documentation/devicetree/bindings/net/ethernet.txt
327 - phy-mode : String representing the connection to the designated
328 PHY node specified by the 'phy-handle' property. See
329 Documentation/devicetree/bindings/net/ethernet.txt
332 - mii-bus : Should be a phandle to a valid MDIO bus device node.
333 This mii-bus will be used in preference to the
334 global dsa,mii-bus defined above, for this switch.
337 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
339 Documentation/devicetree/bindings/net/fixed-link.txt
345 compatible = "marvell,dsa";
346 #address-cells = <2>;
350 dsa,ethernet = <ðernet0>;
351 dsa,mii-bus = <&mii_bus0>;
354 #address-cells = <1>;
356 reg = <16 0>; /* MDIO address 16, switch 0 in tree */
361 phy-handle = <&phy0>;
374 switch0port6: port@6 {
377 link = <&switch1port0
383 #address-cells = <1>;
385 reg = <17 1>; /* MDIO address 17, switch 1 in tree */
386 mii-bus = <&mii_bus1>;
387 reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
389 switch1port0: port@0 {
392 link = <&switch0port6>;
394 switch1port1: port@1 {
397 link = <&switch2port1>;
402 #address-cells = <1>;
404 reg = <18 2>; /* MDIO address 18, switch 2 in tree */
405 mii-bus = <&mii_bus1>;
407 switch2port0: port@0 {
410 link = <&switch1port1