1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Backend - Handles the virtual fields in the configuration space headers.
5 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
14 #include "conf_space.h"
26 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
27 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
29 /* Bits guests are allowed to control in permissive mode. */
30 #define PCI_COMMAND_GUEST (PCI_COMMAND_MASTER|PCI_COMMAND_SPECIAL| \
31 PCI_COMMAND_INVALIDATE|PCI_COMMAND_VGA_PALETTE| \
32 PCI_COMMAND_WAIT|PCI_COMMAND_FAST_BACK)
34 static void *command_init(struct pci_dev *dev, int offset)
36 struct pci_cmd_info *cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
40 return ERR_PTR(-ENOMEM);
42 err = pci_read_config_word(dev, PCI_COMMAND, &cmd->val);
51 static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data)
53 int ret = pci_read_config_word(dev, offset, value);
54 const struct pci_cmd_info *cmd = data;
56 *value &= PCI_COMMAND_GUEST;
57 *value |= cmd->val & ~PCI_COMMAND_GUEST;
62 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
64 struct xen_pcibk_dev_data *dev_data;
67 struct pci_cmd_info *cmd = data;
69 dev_data = pci_get_drvdata(dev);
70 if (!pci_is_enabled(dev) && is_enable_cmd(value)) {
71 dev_dbg(&dev->dev, "enable\n");
72 err = pci_enable_device(dev);
76 dev_data->enable_intx = 1;
77 } else if (pci_is_enabled(dev) && !is_enable_cmd(value)) {
78 dev_dbg(&dev->dev, "disable\n");
79 pci_disable_device(dev);
81 dev_data->enable_intx = 0;
84 if (!dev->is_busmaster && is_master_cmd(value)) {
85 dev_dbg(&dev->dev, "set bus master\n");
87 } else if (dev->is_busmaster && !is_master_cmd(value)) {
88 dev_dbg(&dev->dev, "clear bus master\n");
89 pci_clear_master(dev);
92 if (!(cmd->val & PCI_COMMAND_INVALIDATE) &&
93 (value & PCI_COMMAND_INVALIDATE)) {
94 dev_dbg(&dev->dev, "enable memory-write-invalidate\n");
95 err = pci_set_mwi(dev);
97 dev_warn(&dev->dev, "cannot enable memory-write-invalidate (%d)\n",
99 value &= ~PCI_COMMAND_INVALIDATE;
101 } else if ((cmd->val & PCI_COMMAND_INVALIDATE) &&
102 !(value & PCI_COMMAND_INVALIDATE)) {
103 dev_dbg(&dev->dev, "disable memory-write-invalidate\n");
107 if (dev_data && dev_data->allow_interrupt_control &&
108 ((cmd->val ^ value) & PCI_COMMAND_INTX_DISABLE))
109 pci_intx(dev, !(value & PCI_COMMAND_INTX_DISABLE));
113 if (!xen_pcibk_permissive && (!dev_data || !dev_data->permissive))
116 /* Only allow the guest to control certain bits. */
117 err = pci_read_config_word(dev, offset, &val);
118 if (err || val == value)
121 value &= PCI_COMMAND_GUEST;
122 value |= val & ~PCI_COMMAND_GUEST;
124 return pci_write_config_word(dev, offset, value);
127 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data)
129 struct pci_bar_info *bar = data;
131 if (unlikely(!bar)) {
132 dev_warn(&dev->dev, "driver data not found\n");
133 return XEN_PCI_ERR_op_failed;
136 /* A write to obtain the length must happen as a 32-bit write.
137 * This does not (yet) support writing individual bytes
139 if ((value | ~PCI_ROM_ADDRESS_MASK) == ~0U)
143 pci_read_config_dword(dev, offset, &tmpval);
144 if (tmpval != bar->val && value == bar->val) {
145 /* Allow restoration of bar value. */
146 pci_write_config_dword(dev, offset, bar->val);
151 /* Do we need to support enabling/disabling the rom address here? */
156 /* For the BARs, only allow writes which write ~0 or
157 * the correct resource information
158 * (Needed for when the driver probes the resource usage)
160 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data)
162 struct pci_bar_info *bar = data;
163 unsigned int pos = (offset - PCI_BASE_ADDRESS_0) / 4;
164 const struct resource *res = dev->resource;
167 if (unlikely(!bar)) {
168 dev_warn(&dev->dev, "driver data not found\n");
169 return XEN_PCI_ERR_op_failed;
172 /* A write to obtain the length must happen as a 32-bit write.
173 * This does not (yet) support writing individual bytes
175 if (res[pos].flags & IORESOURCE_IO)
176 mask = ~PCI_BASE_ADDRESS_IO_MASK;
177 else if (pos && (res[pos - 1].flags & IORESOURCE_MEM_64))
180 mask = ~PCI_BASE_ADDRESS_MEM_MASK;
181 if ((value | mask) == ~0U)
185 pci_read_config_dword(dev, offset, &tmpval);
186 if (tmpval != bar->val && value == bar->val) {
187 /* Allow restoration of bar value. */
188 pci_write_config_dword(dev, offset, bar->val);
196 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data)
198 struct pci_bar_info *bar = data;
200 if (unlikely(!bar)) {
201 dev_warn(&dev->dev, "driver data not found\n");
202 return XEN_PCI_ERR_op_failed;
205 *value = bar->which ? bar->len_val : bar->val;
210 static void *bar_init(struct pci_dev *dev, int offset)
213 const struct resource *res = dev->resource;
214 struct pci_bar_info *bar = kzalloc(sizeof(*bar), GFP_KERNEL);
217 return ERR_PTR(-ENOMEM);
219 if (offset == PCI_ROM_ADDRESS || offset == PCI_ROM_ADDRESS1)
220 pos = PCI_ROM_RESOURCE;
222 pos = (offset - PCI_BASE_ADDRESS_0) / 4;
223 if (pos && (res[pos - 1].flags & IORESOURCE_MEM_64)) {
224 bar->val = res[pos - 1].start >> 32;
225 bar->len_val = -resource_size(&res[pos - 1]) >> 32;
230 if (!res[pos].flags ||
231 (res[pos].flags & (IORESOURCE_DISABLED | IORESOURCE_UNSET |
235 bar->val = res[pos].start |
236 (res[pos].flags & PCI_REGION_FLAG_MASK);
237 bar->len_val = -resource_size(&res[pos]) |
238 (res[pos].flags & PCI_REGION_FLAG_MASK);
243 static void bar_reset(struct pci_dev *dev, int offset, void *data)
245 struct pci_bar_info *bar = data;
250 static void bar_release(struct pci_dev *dev, int offset, void *data)
255 static int xen_pcibk_read_vendor(struct pci_dev *dev, int offset,
256 u16 *value, void *data)
258 *value = dev->vendor;
263 static int xen_pcibk_read_device(struct pci_dev *dev, int offset,
264 u16 *value, void *data)
266 *value = dev->device;
271 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value,
274 *value = (u8) dev->irq;
279 static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data)
284 err = pci_read_config_byte(dev, offset, &cur_value);
288 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START)
289 || value == PCI_BIST_START)
290 err = pci_write_config_byte(dev, offset, value);
296 static const struct config_field header_common[] = {
298 .offset = PCI_VENDOR_ID,
300 .u.w.read = xen_pcibk_read_vendor,
303 .offset = PCI_DEVICE_ID,
305 .u.w.read = xen_pcibk_read_device,
308 .offset = PCI_COMMAND,
310 .init = command_init,
311 .release = bar_release,
312 .u.w.read = command_read,
313 .u.w.write = command_write,
316 .offset = PCI_INTERRUPT_LINE,
318 .u.b.read = interrupt_read,
321 .offset = PCI_INTERRUPT_PIN,
323 .u.b.read = xen_pcibk_read_config_byte,
326 /* Any side effects of letting driver domain control cache line? */
327 .offset = PCI_CACHE_LINE_SIZE,
329 .u.b.read = xen_pcibk_read_config_byte,
330 .u.b.write = xen_pcibk_write_config_byte,
333 .offset = PCI_LATENCY_TIMER,
335 .u.b.read = xen_pcibk_read_config_byte,
340 .u.b.read = xen_pcibk_read_config_byte,
341 .u.b.write = bist_write,
346 #define CFG_FIELD_BAR(reg_offset) \
348 .offset = reg_offset, \
351 .reset = bar_reset, \
352 .release = bar_release, \
353 .u.dw.read = bar_read, \
354 .u.dw.write = bar_write, \
357 #define CFG_FIELD_ROM(reg_offset) \
359 .offset = reg_offset, \
362 .reset = bar_reset, \
363 .release = bar_release, \
364 .u.dw.read = bar_read, \
365 .u.dw.write = rom_write, \
368 static const struct config_field header_0[] = {
369 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
370 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
371 CFG_FIELD_BAR(PCI_BASE_ADDRESS_2),
372 CFG_FIELD_BAR(PCI_BASE_ADDRESS_3),
373 CFG_FIELD_BAR(PCI_BASE_ADDRESS_4),
374 CFG_FIELD_BAR(PCI_BASE_ADDRESS_5),
375 CFG_FIELD_ROM(PCI_ROM_ADDRESS),
379 static const struct config_field header_1[] = {
380 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
381 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
382 CFG_FIELD_ROM(PCI_ROM_ADDRESS1),
386 int xen_pcibk_config_header_add_fields(struct pci_dev *dev)
390 err = xen_pcibk_config_add_fields(dev, header_common);
394 switch (dev->hdr_type) {
395 case PCI_HEADER_TYPE_NORMAL:
396 err = xen_pcibk_config_add_fields(dev, header_0);
399 case PCI_HEADER_TYPE_BRIDGE:
400 err = xen_pcibk_config_add_fields(dev, header_1);
405 dev_err(&dev->dev, "Unsupported header type %d!\n",