1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
4 #include <linux/bits.h>
6 #include <linux/delay.h>
7 #include <linux/interrupt.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/watchdog.h>
14 #include <linux/of_device.h>
24 #define QCOM_WDT_ENABLE BIT(0)
26 static const u32 reg_offset_data_apcs_tmr[] = {
30 [WDT_BARK_TIME] = 0x4C,
31 [WDT_BITE_TIME] = 0x5C,
34 static const u32 reg_offset_data_kpss[] = {
38 [WDT_BARK_TIME] = 0x10,
39 [WDT_BITE_TIME] = 0x14,
43 struct watchdog_device wdd;
49 static void __iomem *wdt_addr(struct qcom_wdt *wdt, enum wdt_reg reg)
51 return wdt->base + wdt->layout[reg];
55 struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
57 return container_of(wdd, struct qcom_wdt, wdd);
60 static irqreturn_t qcom_wdt_isr(int irq, void *arg)
62 struct watchdog_device *wdd = arg;
64 watchdog_notify_pretimeout(wdd);
69 static int qcom_wdt_start(struct watchdog_device *wdd)
71 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
72 unsigned int bark = wdd->timeout - wdd->pretimeout;
74 writel(0, wdt_addr(wdt, WDT_EN));
75 writel(1, wdt_addr(wdt, WDT_RST));
76 writel(bark * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME));
77 writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
78 writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN));
82 static int qcom_wdt_stop(struct watchdog_device *wdd)
84 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
86 writel(0, wdt_addr(wdt, WDT_EN));
90 static int qcom_wdt_ping(struct watchdog_device *wdd)
92 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
94 writel(1, wdt_addr(wdt, WDT_RST));
98 static int qcom_wdt_set_timeout(struct watchdog_device *wdd,
101 wdd->timeout = timeout;
102 return qcom_wdt_start(wdd);
105 static int qcom_wdt_set_pretimeout(struct watchdog_device *wdd,
106 unsigned int timeout)
108 wdd->pretimeout = timeout;
109 return qcom_wdt_start(wdd);
112 static int qcom_wdt_restart(struct watchdog_device *wdd, unsigned long action,
115 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
119 * Trigger watchdog bite:
120 * Setup BITE_TIME to be 128ms, and enable WDT.
122 timeout = 128 * wdt->rate / 1000;
124 writel(0, wdt_addr(wdt, WDT_EN));
125 writel(1, wdt_addr(wdt, WDT_RST));
126 writel(timeout, wdt_addr(wdt, WDT_BARK_TIME));
127 writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
128 writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN));
131 * Actually make sure the above sequence hits hardware before sleeping.
139 static const struct watchdog_ops qcom_wdt_ops = {
140 .start = qcom_wdt_start,
141 .stop = qcom_wdt_stop,
142 .ping = qcom_wdt_ping,
143 .set_timeout = qcom_wdt_set_timeout,
144 .set_pretimeout = qcom_wdt_set_pretimeout,
145 .restart = qcom_wdt_restart,
146 .owner = THIS_MODULE,
149 static const struct watchdog_info qcom_wdt_info = {
150 .options = WDIOF_KEEPALIVEPING
154 .identity = KBUILD_MODNAME,
157 static const struct watchdog_info qcom_wdt_pt_info = {
158 .options = WDIOF_KEEPALIVEPING
163 .identity = KBUILD_MODNAME,
166 static void qcom_clk_disable_unprepare(void *data)
168 clk_disable_unprepare(data);
171 static int qcom_wdt_probe(struct platform_device *pdev)
173 struct device *dev = &pdev->dev;
174 struct qcom_wdt *wdt;
175 struct resource *res;
176 struct device_node *np = dev->of_node;
182 regs = of_device_get_match_data(dev);
184 dev_err(dev, "Unsupported QCOM WDT module\n");
188 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
192 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
196 /* We use CPU0's DGT for the watchdog */
197 if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
200 res->start += percpu_offset;
201 res->end += percpu_offset;
203 wdt->base = devm_ioremap_resource(dev, res);
204 if (IS_ERR(wdt->base))
205 return PTR_ERR(wdt->base);
207 clk = devm_clk_get(dev, NULL);
209 dev_err(dev, "failed to get input clock\n");
213 ret = clk_prepare_enable(clk);
215 dev_err(dev, "failed to setup clock\n");
218 ret = devm_add_action_or_reset(dev, qcom_clk_disable_unprepare, clk);
223 * We use the clock rate to calculate the max timeout, so ensure it's
224 * not zero to avoid a divide-by-zero exception.
226 * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such
227 * that it would bite before a second elapses it's usefulness is
228 * limited. Bail if this is the case.
230 wdt->rate = clk_get_rate(clk);
231 if (wdt->rate == 0 ||
232 wdt->rate > 0x10000000U) {
233 dev_err(dev, "invalid clock rate\n");
237 /* check if there is pretimeout support */
238 irq = platform_get_irq_optional(pdev, 0);
240 ret = devm_request_irq(dev, irq, qcom_wdt_isr,
242 "wdt_bark", &wdt->wdd);
246 wdt->wdd.info = &qcom_wdt_pt_info;
247 wdt->wdd.pretimeout = 1;
249 if (irq == -EPROBE_DEFER)
250 return -EPROBE_DEFER;
252 wdt->wdd.info = &qcom_wdt_info;
255 wdt->wdd.ops = &qcom_wdt_ops;
256 wdt->wdd.min_timeout = 1;
257 wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
258 wdt->wdd.parent = dev;
261 if (readl(wdt_addr(wdt, WDT_STS)) & 1)
262 wdt->wdd.bootstatus = WDIOF_CARDRESET;
265 * If 'timeout-sec' unspecified in devicetree, assume a 30 second
266 * default, unless the max timeout is less than 30 seconds, then use
269 wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
270 watchdog_init_timeout(&wdt->wdd, 0, dev);
272 ret = devm_watchdog_register_device(dev, &wdt->wdd);
276 platform_set_drvdata(pdev, wdt);
280 static int __maybe_unused qcom_wdt_suspend(struct device *dev)
282 struct qcom_wdt *wdt = dev_get_drvdata(dev);
284 if (watchdog_active(&wdt->wdd))
285 qcom_wdt_stop(&wdt->wdd);
290 static int __maybe_unused qcom_wdt_resume(struct device *dev)
292 struct qcom_wdt *wdt = dev_get_drvdata(dev);
294 if (watchdog_active(&wdt->wdd))
295 qcom_wdt_start(&wdt->wdd);
300 static SIMPLE_DEV_PM_OPS(qcom_wdt_pm_ops, qcom_wdt_suspend, qcom_wdt_resume);
302 static const struct of_device_id qcom_wdt_of_table[] = {
303 { .compatible = "qcom,kpss-timer", .data = reg_offset_data_apcs_tmr },
304 { .compatible = "qcom,scss-timer", .data = reg_offset_data_apcs_tmr },
305 { .compatible = "qcom,kpss-wdt", .data = reg_offset_data_kpss },
308 MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
310 static struct platform_driver qcom_watchdog_driver = {
311 .probe = qcom_wdt_probe,
313 .name = KBUILD_MODNAME,
314 .of_match_table = qcom_wdt_of_table,
315 .pm = &qcom_wdt_pm_ops,
318 module_platform_driver(qcom_watchdog_driver);
320 MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver");
321 MODULE_LICENSE("GPL v2");