1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/err.h>
26 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
37 #define DRVNAME "f71808e_wdt"
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
49 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
50 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
51 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
52 #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */
53 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
54 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
56 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
57 #define SIO_F71808_ID 0x0901 /* Chipset ID */
58 #define SIO_F71858_ID 0x0507 /* Chipset ID */
59 #define SIO_F71862_ID 0x0601 /* Chipset ID */
60 #define SIO_F71868_ID 0x1106 /* Chipset ID */
61 #define SIO_F71869_ID 0x0814 /* Chipset ID */
62 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
63 #define SIO_F71882_ID 0x0541 /* Chipset ID */
64 #define SIO_F71889_ID 0x0723 /* Chipset ID */
65 #define SIO_F81865_ID 0x0704 /* Chipset ID */
66 #define SIO_F81866_ID 0x1010 /* Chipset ID */
68 #define F71808FG_REG_WDO_CONF 0xf0
69 #define F71808FG_REG_WDT_CONF 0xf5
70 #define F71808FG_REG_WD_TIME 0xf6
72 #define F71808FG_FLAG_WDOUT_EN 7
74 #define F71808FG_FLAG_WDTMOUT_STS 6
75 #define F71808FG_FLAG_WD_EN 5
76 #define F71808FG_FLAG_WD_PULSE 4
77 #define F71808FG_FLAG_WD_UNIT 3
79 #define F81865_REG_WDO_CONF 0xfa
80 #define F81865_FLAG_WDOUT_EN 0
83 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
84 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
85 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
87 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
90 static unsigned short force_id;
91 module_param(force_id, ushort, 0);
92 MODULE_PARM_DESC(force_id, "Override the detected device ID");
94 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
95 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
96 module_param(timeout, int, 0);
97 MODULE_PARM_DESC(timeout,
98 "Watchdog timeout in seconds. 1<= timeout <="
99 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
100 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
102 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
103 module_param(pulse_width, uint, 0);
104 MODULE_PARM_DESC(pulse_width,
105 "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
106 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
108 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
109 module_param(f71862fg_pin, uint, 0);
110 MODULE_PARM_DESC(f71862fg_pin,
111 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
112 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
114 static bool nowayout = WATCHDOG_NOWAYOUT;
115 module_param(nowayout, bool, 0444);
116 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
118 static unsigned int start_withtimeout;
119 module_param(start_withtimeout, uint, 0);
120 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
121 " given initial timeout. Zero (default) disables this feature.");
123 enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
126 static const char *f71808e_names[] = {
138 /* Super-I/O Function prototypes */
139 static inline int superio_inb(int base, int reg);
140 static inline int superio_inw(int base, int reg);
141 static inline void superio_outb(int base, int reg, u8 val);
142 static inline void superio_set_bit(int base, int reg, int bit);
143 static inline void superio_clear_bit(int base, int reg, int bit);
144 static inline int superio_enter(int base);
145 static inline void superio_select(int base, int ld);
146 static inline void superio_exit(int base);
148 struct watchdog_data {
149 unsigned short sioaddr;
151 unsigned long opened;
154 struct watchdog_info ident;
156 unsigned short timeout;
157 u8 timer_val; /* content for the wd_time register */
159 u8 pulse_val; /* pulse width flag */
160 char pulse_mode; /* enable pulse output mode? */
161 char caused_reboot; /* last reboot was by the watchdog */
164 static struct watchdog_data watchdog = {
165 .lock = __MUTEX_INITIALIZER(watchdog.lock),
168 /* Super I/O functions */
169 static inline int superio_inb(int base, int reg)
172 return inb(base + 1);
175 static int superio_inw(int base, int reg)
178 val = superio_inb(base, reg) << 8;
179 val |= superio_inb(base, reg + 1);
183 static inline void superio_outb(int base, int reg, u8 val)
189 static inline void superio_set_bit(int base, int reg, int bit)
191 unsigned long val = superio_inb(base, reg);
192 __set_bit(bit, &val);
193 superio_outb(base, reg, val);
196 static inline void superio_clear_bit(int base, int reg, int bit)
198 unsigned long val = superio_inb(base, reg);
199 __clear_bit(bit, &val);
200 superio_outb(base, reg, val);
203 static inline int superio_enter(int base)
205 /* Don't step on other drivers' I/O space by accident */
206 if (!request_muxed_region(base, 2, DRVNAME)) {
207 pr_err("I/O address 0x%04x already in use\n", (int)base);
211 /* according to the datasheet the key must be sent twice! */
212 outb(SIO_UNLOCK_KEY, base);
213 outb(SIO_UNLOCK_KEY, base);
218 static inline void superio_select(int base, int ld)
220 outb(SIO_REG_LDSEL, base);
224 static inline void superio_exit(int base)
226 outb(SIO_LOCK_KEY, base);
227 release_region(base, 2);
230 static int watchdog_set_timeout(int timeout)
233 || timeout > max_timeout) {
234 pr_err("watchdog timeout out of range\n");
238 mutex_lock(&watchdog.lock);
240 if (timeout > 0xff) {
241 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
242 watchdog.minutes_mode = true;
243 timeout = watchdog.timer_val * 60;
245 watchdog.timer_val = timeout;
246 watchdog.minutes_mode = false;
249 watchdog.timeout = timeout;
251 mutex_unlock(&watchdog.lock);
256 static int watchdog_set_pulse_width(unsigned int pw)
259 unsigned int t1 = 25, t2 = 125, t3 = 5000;
261 if (watchdog.type == f71868) {
267 mutex_lock(&watchdog.lock);
270 watchdog.pulse_val = 0;
271 } else if (pw <= t1) {
272 watchdog.pulse_val = 1;
273 } else if (pw <= t2) {
274 watchdog.pulse_val = 2;
275 } else if (pw <= t3) {
276 watchdog.pulse_val = 3;
278 pr_err("pulse width out of range\n");
283 watchdog.pulse_mode = pw;
286 mutex_unlock(&watchdog.lock);
290 static int watchdog_keepalive(void)
294 mutex_lock(&watchdog.lock);
295 err = superio_enter(watchdog.sioaddr);
298 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
300 if (watchdog.minutes_mode)
301 /* select minutes for timer units */
302 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
303 F71808FG_FLAG_WD_UNIT);
305 /* select seconds for timer units */
306 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
307 F71808FG_FLAG_WD_UNIT);
309 /* Set timer value */
310 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
313 superio_exit(watchdog.sioaddr);
316 mutex_unlock(&watchdog.lock);
320 static int f71862fg_pin_configure(unsigned short ioaddr)
322 /* When ioaddr is non-zero the calling function has to take care of
323 mutex handling and superio preparation! */
325 if (f71862fg_pin == 63) {
327 /* SPI must be disabled first to use this pin! */
328 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
329 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
331 } else if (f71862fg_pin == 56) {
333 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
335 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
341 static int watchdog_start(void)
343 /* Make sure we don't die as soon as the watchdog is enabled below */
344 int err = watchdog_keepalive();
348 mutex_lock(&watchdog.lock);
349 err = superio_enter(watchdog.sioaddr);
352 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
354 /* Watchdog pin configuration */
355 switch (watchdog.type) {
357 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
358 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
359 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
363 err = f71862fg_pin_configure(watchdog.sioaddr);
370 /* GPIO14 --> WDTRST# */
371 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
375 /* Set pin 56 to WDTRST# */
376 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
380 /* set pin 40 to WDTRST# */
381 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
382 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
386 /* Set pin 70 to WDTRST# */
387 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
391 /* Set pin 70 to WDTRST# */
392 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
394 superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
397 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
398 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
402 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1,
408 * 'default' label to shut up the compiler and catch
415 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
416 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
418 if (watchdog.type == f81865 || watchdog.type == f81866)
419 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
420 F81865_FLAG_WDOUT_EN);
422 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
423 F71808FG_FLAG_WDOUT_EN);
425 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
426 F71808FG_FLAG_WD_EN);
428 if (watchdog.pulse_mode) {
429 /* Select "pulse" output mode with given duration */
430 u8 wdt_conf = superio_inb(watchdog.sioaddr,
431 F71808FG_REG_WDT_CONF);
433 /* Set WD_PSWIDTH bits (1:0) */
434 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
435 /* Set WD_PULSE to "pulse" mode */
436 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
438 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
441 /* Select "level" output mode */
442 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
443 F71808FG_FLAG_WD_PULSE);
447 superio_exit(watchdog.sioaddr);
449 mutex_unlock(&watchdog.lock);
454 static int watchdog_stop(void)
458 mutex_lock(&watchdog.lock);
459 err = superio_enter(watchdog.sioaddr);
462 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
464 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
465 F71808FG_FLAG_WD_EN);
467 superio_exit(watchdog.sioaddr);
470 mutex_unlock(&watchdog.lock);
475 static int watchdog_get_status(void)
479 mutex_lock(&watchdog.lock);
480 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
481 mutex_unlock(&watchdog.lock);
486 static bool watchdog_is_running(void)
489 * if we fail to determine the watchdog's status assume it to be
490 * running to be on the safe side
492 bool is_running = true;
494 mutex_lock(&watchdog.lock);
495 if (superio_enter(watchdog.sioaddr))
497 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
499 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
500 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
501 & BIT(F71808FG_FLAG_WD_EN));
503 superio_exit(watchdog.sioaddr);
506 mutex_unlock(&watchdog.lock);
510 /* /dev/watchdog api */
512 static int watchdog_open(struct inode *inode, struct file *file)
516 /* If the watchdog is alive we don't need to start it again */
517 if (test_and_set_bit(0, &watchdog.opened))
520 err = watchdog_start();
522 clear_bit(0, &watchdog.opened);
527 __module_get(THIS_MODULE);
529 watchdog.expect_close = 0;
530 return nonseekable_open(inode, file);
533 static int watchdog_release(struct inode *inode, struct file *file)
535 clear_bit(0, &watchdog.opened);
537 if (!watchdog.expect_close) {
538 watchdog_keepalive();
539 pr_crit("Unexpected close, not stopping watchdog!\n");
540 } else if (!nowayout) {
548 * @file: file handle to the watchdog
549 * @buf: buffer to write
550 * @count: count of bytes
551 * @ppos: pointer to the position to write. No seeks allowed
553 * A write to a watchdog device is defined as a keepalive signal. Any
554 * write of data will do, as we we don't define content meaning.
557 static ssize_t watchdog_write(struct file *file, const char __user *buf,
558 size_t count, loff_t *ppos)
564 /* In case it was set long ago */
565 bool expect_close = false;
567 for (i = 0; i != count; i++) {
569 if (get_user(c, buf + i))
575 /* Properly order writes across fork()ed processes */
576 mutex_lock(&watchdog.lock);
577 watchdog.expect_close = expect_close;
578 mutex_unlock(&watchdog.lock);
581 /* someone wrote to us, we should restart timer */
582 watchdog_keepalive();
589 * @inode: inode of the device
590 * @file: file handle to the device
591 * @cmd: watchdog command
592 * @arg: argument pointer
594 * The watchdog API defines a common set of functions for all watchdogs
595 * according to their available features.
597 static long watchdog_ioctl(struct file *file, unsigned int cmd,
604 struct watchdog_info __user *ident;
608 uarg.i = (int __user *)arg;
611 case WDIOC_GETSUPPORT:
612 return copy_to_user(uarg.ident, &watchdog.ident,
613 sizeof(watchdog.ident)) ? -EFAULT : 0;
615 case WDIOC_GETSTATUS:
616 status = watchdog_get_status();
619 return put_user(status, uarg.i);
621 case WDIOC_GETBOOTSTATUS:
622 return put_user(0, uarg.i);
624 case WDIOC_SETOPTIONS:
625 if (get_user(new_options, uarg.i))
628 if (new_options & WDIOS_DISABLECARD)
631 if (new_options & WDIOS_ENABLECARD)
632 return watchdog_start();
635 case WDIOC_KEEPALIVE:
636 watchdog_keepalive();
639 case WDIOC_SETTIMEOUT:
640 if (get_user(new_timeout, uarg.i))
643 if (watchdog_set_timeout(new_timeout))
646 watchdog_keepalive();
649 case WDIOC_GETTIMEOUT:
650 return put_user(watchdog.timeout, uarg.i);
658 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
661 if (code == SYS_DOWN || code == SYS_HALT)
666 static const struct file_operations watchdog_fops = {
667 .owner = THIS_MODULE,
669 .open = watchdog_open,
670 .release = watchdog_release,
671 .write = watchdog_write,
672 .unlocked_ioctl = watchdog_ioctl,
675 static struct miscdevice watchdog_miscdev = {
676 .minor = WATCHDOG_MINOR,
678 .fops = &watchdog_fops,
681 static struct notifier_block watchdog_notifier = {
682 .notifier_call = watchdog_notify_sys,
685 static int __init watchdog_init(int sioaddr)
687 int wdt_conf, err = 0;
689 /* No need to lock watchdog.lock here because no entry points
690 * into the module have been registered yet.
692 watchdog.sioaddr = sioaddr;
693 watchdog.ident.options = WDIOF_MAGICCLOSE
694 | WDIOF_KEEPALIVEPING
697 snprintf(watchdog.ident.identity,
698 sizeof(watchdog.ident.identity), "%s watchdog",
699 f71808e_names[watchdog.type]);
701 err = superio_enter(sioaddr);
704 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
706 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
707 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
710 * We don't want WDTMOUT_STS to stick around till regular reboot.
711 * Write 1 to the bit to clear it to zero.
713 superio_outb(sioaddr, F71808FG_REG_WDT_CONF,
714 wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS));
716 superio_exit(sioaddr);
718 err = watchdog_set_timeout(timeout);
721 err = watchdog_set_pulse_width(pulse_width);
725 err = register_reboot_notifier(&watchdog_notifier);
729 err = misc_register(&watchdog_miscdev);
731 pr_err("cannot register miscdev on minor=%d\n",
732 watchdog_miscdev.minor);
736 if (start_withtimeout) {
737 if (start_withtimeout <= 0
738 || start_withtimeout > max_timeout) {
739 pr_err("starting timeout out of range\n");
744 err = watchdog_start();
746 pr_err("cannot start watchdog timer\n");
750 mutex_lock(&watchdog.lock);
751 err = superio_enter(sioaddr);
754 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
756 if (start_withtimeout > 0xff) {
757 /* select minutes for timer units */
758 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
759 F71808FG_FLAG_WD_UNIT);
760 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
761 DIV_ROUND_UP(start_withtimeout, 60));
763 /* select seconds for timer units */
764 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
765 F71808FG_FLAG_WD_UNIT);
766 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
770 superio_exit(sioaddr);
771 mutex_unlock(&watchdog.lock);
774 __module_get(THIS_MODULE);
776 pr_info("watchdog started with initial timeout of %u sec\n",
783 mutex_unlock(&watchdog.lock);
785 misc_deregister(&watchdog_miscdev);
787 unregister_reboot_notifier(&watchdog_notifier);
792 static int __init f71808e_find(int sioaddr)
795 int err = superio_enter(sioaddr);
799 devid = superio_inw(sioaddr, SIO_REG_MANID);
800 if (devid != SIO_FINTEK_ID) {
801 pr_debug("Not a Fintek device\n");
806 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
809 watchdog.type = f71808fg;
812 watchdog.type = f71862fg;
813 err = f71862fg_pin_configure(0); /* validate module parameter */
816 watchdog.type = f71868;
820 watchdog.type = f71869;
823 watchdog.type = f71882fg;
826 watchdog.type = f71889fg;
829 /* Confirmed (by datasheet) not to have a watchdog. */
833 watchdog.type = f81865;
836 watchdog.type = f81866;
839 pr_info("Unrecognized Fintek device: %04x\n",
840 (unsigned int)devid);
845 pr_info("Found %s watchdog chip, revision %d\n",
846 f71808e_names[watchdog.type],
847 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
849 superio_exit(sioaddr);
853 static int __init f71808e_init(void)
855 static const unsigned short addrs[] = { 0x2e, 0x4e };
859 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
860 err = f71808e_find(addrs[i]);
864 if (i == ARRAY_SIZE(addrs))
867 return watchdog_init(addrs[i]);
870 static void __exit f71808e_exit(void)
872 if (watchdog_is_running()) {
873 pr_warn("Watchdog timer still running, stopping it\n");
876 misc_deregister(&watchdog_miscdev);
877 unregister_reboot_notifier(&watchdog_notifier);
880 MODULE_DESCRIPTION("F71808E Watchdog Driver");
881 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
882 MODULE_LICENSE("GPL");
884 module_init(f71808e_init);
885 module_exit(f71808e_exit);