2 * Watchdog driver for Atmel AT91SAM9x processors.
4 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
13 * The Watchdog Timer Mode Register can be only written to once. If the
14 * timeout need to be set from Linux, be sure that the bootstrap or the
15 * bootloader doesn't write to this register.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/clk.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/platform_device.h>
29 #include <linux/reboot.h>
30 #include <linux/types.h>
31 #include <linux/watchdog.h>
32 #include <linux/jiffies.h>
33 #include <linux/timer.h>
34 #include <linux/bitops.h>
35 #include <linux/uaccess.h>
37 #include <linux/of_irq.h>
39 #include "at91sam9_wdt.h"
41 #define DRV_NAME "AT91SAM9 Watchdog"
43 #define wdt_read(wdt, field) \
44 readl_relaxed((wdt)->base + (field))
45 #define wdt_write(wtd, field, val) \
46 writel_relaxed((val), (wdt)->base + (field))
48 /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
49 * use this to convert a watchdog
50 * value from/to milliseconds.
52 #define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8)
53 #define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8)
54 #define ticks_to_secs(t) (((t) + 1) >> 8)
55 #define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0)
57 #define WDT_MR_RESET 0x3FFF2FFF
59 /* Watchdog max counter value in ticks */
60 #define WDT_COUNTER_MAX_TICKS 0xFFF
62 /* Watchdog max delta/value in secs */
63 #define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
65 /* Hardware timeout in seconds */
66 #define WDT_HW_TIMEOUT 2
68 /* Timer heartbeat (500ms) */
69 #define WDT_TIMEOUT (HZ/2)
71 /* User land timeout */
72 #define WDT_HEARTBEAT 15
74 module_param(heartbeat, int, 0);
75 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
76 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
78 static bool nowayout = WATCHDOG_NOWAYOUT;
79 module_param(nowayout, bool, 0);
80 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
81 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
83 #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
85 struct watchdog_device wdd;
87 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
88 struct timer_list timer; /* The timer that pings the watchdog */
91 unsigned long heartbeat; /* WDT heartbeat in jiffies */
97 /* ......................................................................... */
99 static irqreturn_t wdt_interrupt(int irq, void *dev_id)
101 struct at91wdt *wdt = (struct at91wdt *)dev_id;
103 if (wdt_read(wdt, AT91_WDT_SR)) {
104 pr_crit("at91sam9 WDT software reset\n");
106 pr_crit("Reboot didn't ?????\n");
113 * Reload the watchdog timer. (ie, pat the watchdog)
115 static inline void at91_wdt_reset(struct at91wdt *wdt)
117 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
123 static void at91_ping(unsigned long data)
125 struct at91wdt *wdt = (struct at91wdt *)data;
126 if (time_before(jiffies, wdt->next_heartbeat) ||
127 !watchdog_active(&wdt->wdd)) {
129 mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
131 pr_crit("I will reset your machine !\n");
135 static int at91_wdt_start(struct watchdog_device *wdd)
137 struct at91wdt *wdt = to_wdt(wdd);
138 /* calculate when the next userspace timeout will be */
139 wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
143 static int at91_wdt_stop(struct watchdog_device *wdd)
145 /* The watchdog timer hardware can not be stopped... */
149 static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
151 wdd->timeout = new_timeout;
152 return at91_wdt_start(wdd);
155 static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
161 u32 mask = wdt->mr_mask;
162 unsigned long min_heartbeat = 1;
163 unsigned long max_heartbeat;
164 struct device *dev = &pdev->dev;
166 tmp = wdt_read(wdt, AT91_WDT_MR);
167 if ((tmp & mask) != (wdt->mr & mask)) {
168 if (tmp == WDT_MR_RESET) {
169 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
170 tmp = wdt_read(wdt, AT91_WDT_MR);
174 if (tmp & AT91_WDT_WDDIS) {
175 if (wdt->mr & AT91_WDT_WDDIS)
177 dev_err(dev, "watchdog is disabled\n");
181 value = tmp & AT91_WDT_WDV;
182 delta = (tmp & AT91_WDT_WDD) >> 16;
185 min_heartbeat = ticks_to_hz_roundup(value - delta);
187 max_heartbeat = ticks_to_hz_rounddown(value);
188 if (!max_heartbeat) {
190 "heartbeat is too small for the system to handle it correctly\n");
195 * Try to reset the watchdog counter 4 or 2 times more often than
196 * actually requested, to avoid spurious watchdog reset.
197 * If this is not possible because of the min_heartbeat value, reset
198 * it at the min_heartbeat period.
200 if ((max_heartbeat / 4) >= min_heartbeat)
201 wdt->heartbeat = max_heartbeat / 4;
202 else if ((max_heartbeat / 2) >= min_heartbeat)
203 wdt->heartbeat = max_heartbeat / 2;
205 wdt->heartbeat = min_heartbeat;
207 if (max_heartbeat < min_heartbeat + 4)
209 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
211 if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
212 err = devm_request_irq(dev, wdt->irq, wdt_interrupt,
213 IRQF_SHARED | IRQF_IRQPOLL | IRQF_NO_SUSPEND,
219 if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
221 "watchdog already configured differently (mr = %x expecting %x)\n",
222 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
224 setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);
227 * Use min_heartbeat the first time to avoid spurious watchdog reset:
228 * we don't know for how long the watchdog counter is running, and
229 * - resetting it right now might trigger a watchdog fault reset
230 * - waiting for heartbeat time might lead to a watchdog timeout
233 mod_timer(&wdt->timer, jiffies + min_heartbeat);
235 /* Try to set timeout from device tree first */
236 if (watchdog_init_timeout(&wdt->wdd, 0, dev))
237 watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
238 watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
239 err = watchdog_register_device(&wdt->wdd);
243 wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
248 del_timer(&wdt->timer);
252 /* ......................................................................... */
254 static const struct watchdog_info at91_wdt_info = {
255 .identity = DRV_NAME,
256 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
260 static const struct watchdog_ops at91_wdt_ops = {
261 .owner = THIS_MODULE,
262 .start = at91_wdt_start,
263 .stop = at91_wdt_stop,
264 .set_timeout = at91_wdt_set_timeout,
267 #if defined(CONFIG_OF)
268 static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
271 u32 max = WDT_COUNTER_MAX_SECS;
274 /* Get the interrupts property */
275 wdt->irq = irq_of_parse_and_map(np, 0);
277 dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
279 if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
281 if (!max || max > WDT_COUNTER_MAX_SECS)
282 max = WDT_COUNTER_MAX_SECS;
284 if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
291 min = secs_to_ticks(min);
292 max = secs_to_ticks(max);
294 wdt->mr_mask = 0x3FFFFFFF;
296 if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
297 !strcmp(tmp, "software")) {
298 wdt->mr |= AT91_WDT_WDFIEN;
299 wdt->mr_mask &= ~AT91_WDT_WDRPROC;
301 wdt->mr |= AT91_WDT_WDRSTEN;
304 if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
305 !strcmp(tmp, "proc"))
306 wdt->mr |= AT91_WDT_WDRPROC;
308 if (of_property_read_bool(np, "atmel,disable")) {
309 wdt->mr |= AT91_WDT_WDDIS;
310 wdt->mr_mask &= AT91_WDT_WDDIS;
313 if (of_property_read_bool(np, "atmel,idle-halt"))
314 wdt->mr |= AT91_WDT_WDIDLEHLT;
316 if (of_property_read_bool(np, "atmel,dbg-halt"))
317 wdt->mr |= AT91_WDT_WDDBGHLT;
319 wdt->mr |= max | ((max - min) << 16);
324 static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
330 static int __init at91wdt_probe(struct platform_device *pdev)
336 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
340 wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
341 AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
342 wdt->mr_mask = 0x3FFFFFFF;
343 wdt->nowayout = nowayout;
344 wdt->wdd.parent = &pdev->dev;
345 wdt->wdd.info = &at91_wdt_info;
346 wdt->wdd.ops = &at91_wdt_ops;
347 wdt->wdd.timeout = WDT_HEARTBEAT;
348 wdt->wdd.min_timeout = 1;
349 wdt->wdd.max_timeout = 0xFFFF;
351 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
352 wdt->base = devm_ioremap_resource(&pdev->dev, r);
353 if (IS_ERR(wdt->base))
354 return PTR_ERR(wdt->base);
356 wdt->sclk = devm_clk_get(&pdev->dev, NULL);
357 if (IS_ERR(wdt->sclk))
358 return PTR_ERR(wdt->sclk);
360 err = clk_prepare_enable(wdt->sclk);
362 dev_err(&pdev->dev, "Could not enable slow clock\n");
366 if (pdev->dev.of_node) {
367 err = of_at91wdt_init(pdev->dev.of_node, wdt);
372 err = at91_wdt_init(pdev, wdt);
376 platform_set_drvdata(pdev, wdt);
378 pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
379 wdt->wdd.timeout, wdt->nowayout);
384 clk_disable_unprepare(wdt->sclk);
389 static int __exit at91wdt_remove(struct platform_device *pdev)
391 struct at91wdt *wdt = platform_get_drvdata(pdev);
392 watchdog_unregister_device(&wdt->wdd);
394 pr_warn("I quit now, hardware will probably reboot!\n");
395 del_timer(&wdt->timer);
396 clk_disable_unprepare(wdt->sclk);
401 #if defined(CONFIG_OF)
402 static const struct of_device_id at91_wdt_dt_ids[] = {
403 { .compatible = "atmel,at91sam9260-wdt" },
407 MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
410 static struct platform_driver at91wdt_driver = {
411 .remove = __exit_p(at91wdt_remove),
414 .of_match_table = of_match_ptr(at91_wdt_dt_ids),
418 module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
420 MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
421 MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
422 MODULE_LICENSE("GPL");