GNU Linux-libre 4.14.332-gnu1
[releases.git] / drivers / video / fbdev / omap2 / omapfb / dss / hdmi5.c
1 /*
2  * HDMI driver for OMAP5
3  *
4  * Copyright (C) 2014 Texas Instruments Incorporated
5  *
6  * Authors:
7  *      Yong Zhi
8  *      Mythri pk
9  *      Archit Taneja <archit@ti.com>
10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms of the GNU General Public License version 2 as published by
14  * the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but WITHOUT
17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19  * more details.
20  *
21  * You should have received a copy of the GNU General Public License along with
22  * this program.  If not, see <http://www.gnu.org/licenses/>.
23  */
24
25 #define DSS_SUBSYS_NAME "HDMI"
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/err.h>
30 #include <linux/io.h>
31 #include <linux/interrupt.h>
32 #include <linux/mutex.h>
33 #include <linux/delay.h>
34 #include <linux/string.h>
35 #include <linux/platform_device.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/clk.h>
38 #include <linux/gpio.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/component.h>
41 #include <video/omapfb_dss.h>
42 #include <sound/omap-hdmi-audio.h>
43
44 #include "hdmi5_core.h"
45 #include "dss.h"
46 #include "dss_features.h"
47
48 static struct omap_hdmi hdmi;
49
50 static int hdmi_runtime_get(void)
51 {
52         int r;
53
54         DSSDBG("hdmi_runtime_get\n");
55
56         r = pm_runtime_get_sync(&hdmi.pdev->dev);
57         if (WARN_ON(r < 0)) {
58                 pm_runtime_put_sync(&hdmi.pdev->dev);
59                 return r;
60         }
61
62         return 0;
63 }
64
65 static void hdmi_runtime_put(void)
66 {
67         int r;
68
69         DSSDBG("hdmi_runtime_put\n");
70
71         r = pm_runtime_put_sync(&hdmi.pdev->dev);
72         WARN_ON(r < 0 && r != -ENOSYS);
73 }
74
75 static irqreturn_t hdmi_irq_handler(int irq, void *data)
76 {
77         struct hdmi_wp_data *wp = data;
78         u32 irqstatus;
79
80         irqstatus = hdmi_wp_get_irqstatus(wp);
81         hdmi_wp_set_irqstatus(wp, irqstatus);
82
83         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
84                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
85                 u32 v;
86                 /*
87                  * If we get both connect and disconnect interrupts at the same
88                  * time, turn off the PHY, clear interrupts, and restart, which
89                  * raises connect interrupt if a cable is connected, or nothing
90                  * if cable is not connected.
91                  */
92
93                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
94
95                 /*
96                  * We always get bogus CONNECT & DISCONNECT interrupts when
97                  * setting the PHY to LDOON. To ignore those, we force the RXDET
98                  * line to 0 until the PHY power state has been changed.
99                  */
100                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
101                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
102                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
103                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
104
105                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
106                                 HDMI_IRQ_LINK_DISCONNECT);
107
108                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
109
110                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
111
112         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
114         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
115                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
116         }
117
118         return IRQ_HANDLED;
119 }
120
121 static int hdmi_init_regulator(void)
122 {
123         struct regulator *reg;
124
125         if (hdmi.vdda_reg != NULL)
126                 return 0;
127
128         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
129         if (IS_ERR(reg)) {
130                 DSSERR("can't get VDDA regulator\n");
131                 return PTR_ERR(reg);
132         }
133
134         hdmi.vdda_reg = reg;
135
136         return 0;
137 }
138
139 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
140 {
141         int r;
142
143         r = regulator_enable(hdmi.vdda_reg);
144         if (r)
145                 return r;
146
147         r = hdmi_runtime_get();
148         if (r)
149                 goto err_runtime_get;
150
151         /* Make selection of HDMI in DSS */
152         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
153
154         hdmi.core_enabled = true;
155
156         return 0;
157
158 err_runtime_get:
159         regulator_disable(hdmi.vdda_reg);
160
161         return r;
162 }
163
164 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
165 {
166         hdmi.core_enabled = false;
167
168         hdmi_runtime_put();
169         regulator_disable(hdmi.vdda_reg);
170 }
171
172 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
173 {
174         int r;
175         struct omap_video_timings *p;
176         struct omap_overlay_manager *mgr = hdmi.output.manager;
177         struct dss_pll_clock_info hdmi_cinfo = { 0 };
178
179         r = hdmi_power_on_core(dssdev);
180         if (r)
181                 return r;
182
183         p = &hdmi.cfg.timings;
184
185         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
186
187         hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
188
189         /* disable and clear irqs */
190         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
191         hdmi_wp_set_irqstatus(&hdmi.wp,
192                         hdmi_wp_get_irqstatus(&hdmi.wp));
193
194         r = dss_pll_enable(&hdmi.pll.pll);
195         if (r) {
196                 DSSERR("Failed to enable PLL\n");
197                 goto err_pll_enable;
198         }
199
200         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
201         if (r) {
202                 DSSERR("Failed to configure PLL\n");
203                 goto err_pll_cfg;
204         }
205
206         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
207                 hdmi_cinfo.clkout[0]);
208         if (r) {
209                 DSSDBG("Failed to start PHY\n");
210                 goto err_phy_cfg;
211         }
212
213         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
214         if (r)
215                 goto err_phy_pwr;
216
217         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
218
219         /* bypass TV gamma table */
220         dispc_enable_gamma_table(0);
221
222         /* tv size */
223         dss_mgr_set_timings(mgr, p);
224
225         r = hdmi_wp_video_start(&hdmi.wp);
226         if (r)
227                 goto err_vid_enable;
228
229         r = dss_mgr_enable(mgr);
230         if (r)
231                 goto err_mgr_enable;
232
233         hdmi_wp_set_irqenable(&hdmi.wp,
234                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
235
236         return 0;
237
238 err_mgr_enable:
239         hdmi_wp_video_stop(&hdmi.wp);
240 err_vid_enable:
241         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
242 err_phy_pwr:
243 err_phy_cfg:
244 err_pll_cfg:
245         dss_pll_disable(&hdmi.pll.pll);
246 err_pll_enable:
247         hdmi_power_off_core(dssdev);
248         return -EIO;
249 }
250
251 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
252 {
253         struct omap_overlay_manager *mgr = hdmi.output.manager;
254
255         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
256
257         dss_mgr_disable(mgr);
258
259         hdmi_wp_video_stop(&hdmi.wp);
260
261         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
262
263         dss_pll_disable(&hdmi.pll.pll);
264
265         hdmi_power_off_core(dssdev);
266 }
267
268 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
269                                         struct omap_video_timings *timings)
270 {
271         struct omap_dss_device *out = &hdmi.output;
272
273         /* TODO: proper interlace support */
274         if (timings->interlace)
275                 return -EINVAL;
276
277         if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
278                 return -EINVAL;
279
280         return 0;
281 }
282
283 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
284                 struct omap_video_timings *timings)
285 {
286         mutex_lock(&hdmi.lock);
287
288         hdmi.cfg.timings = *timings;
289
290         dispc_set_tv_pclk(timings->pixelclock);
291
292         mutex_unlock(&hdmi.lock);
293 }
294
295 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
296                 struct omap_video_timings *timings)
297 {
298         *timings = hdmi.cfg.timings;
299 }
300
301 static void hdmi_dump_regs(struct seq_file *s)
302 {
303         mutex_lock(&hdmi.lock);
304
305         if (hdmi_runtime_get()) {
306                 mutex_unlock(&hdmi.lock);
307                 return;
308         }
309
310         hdmi_wp_dump(&hdmi.wp, s);
311         hdmi_pll_dump(&hdmi.pll, s);
312         hdmi_phy_dump(&hdmi.phy, s);
313         hdmi5_core_dump(&hdmi.core, s);
314
315         hdmi_runtime_put();
316         mutex_unlock(&hdmi.lock);
317 }
318
319 static int read_edid(u8 *buf, int len)
320 {
321         int r;
322         int idlemode;
323
324         mutex_lock(&hdmi.lock);
325
326         r = hdmi_runtime_get();
327         BUG_ON(r);
328
329         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
330         /* No-idle mode */
331         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
332
333         r = hdmi5_read_edid(&hdmi.core,  buf, len);
334
335         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
336
337         hdmi_runtime_put();
338         mutex_unlock(&hdmi.lock);
339
340         return r;
341 }
342
343 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
344 {
345         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
346         hdmi_wp_audio_enable(&hd->wp, true);
347         hdmi_wp_audio_core_req_enable(&hd->wp, true);
348 }
349
350 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
351 {
352         hdmi_wp_audio_core_req_enable(&hd->wp, false);
353         hdmi_wp_audio_enable(&hd->wp, false);
354         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
355 }
356
357 static int hdmi_display_enable(struct omap_dss_device *dssdev)
358 {
359         struct omap_dss_device *out = &hdmi.output;
360         unsigned long flags;
361         int r = 0;
362
363         DSSDBG("ENTER hdmi_display_enable\n");
364
365         mutex_lock(&hdmi.lock);
366
367         if (out->manager == NULL) {
368                 DSSERR("failed to enable display: no output/manager\n");
369                 r = -ENODEV;
370                 goto err0;
371         }
372
373         r = hdmi_power_on_full(dssdev);
374         if (r) {
375                 DSSERR("failed to power on device\n");
376                 goto err0;
377         }
378
379         if (hdmi.audio_configured) {
380                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
381                                        hdmi.cfg.timings.pixelclock);
382                 if (r) {
383                         DSSERR("Error restoring audio configuration: %d", r);
384                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
385                         hdmi.audio_configured = false;
386                 }
387         }
388
389         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
390         if (hdmi.audio_configured && hdmi.audio_playing)
391                 hdmi_start_audio_stream(&hdmi);
392         hdmi.display_enabled = true;
393         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
394
395         mutex_unlock(&hdmi.lock);
396         return 0;
397
398 err0:
399         mutex_unlock(&hdmi.lock);
400         return r;
401 }
402
403 static void hdmi_display_disable(struct omap_dss_device *dssdev)
404 {
405         unsigned long flags;
406
407         DSSDBG("Enter hdmi_display_disable\n");
408
409         mutex_lock(&hdmi.lock);
410
411         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
412         hdmi_stop_audio_stream(&hdmi);
413         hdmi.display_enabled = false;
414         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
415
416         hdmi_power_off_full(dssdev);
417
418         mutex_unlock(&hdmi.lock);
419 }
420
421 static int hdmi_core_enable(struct omap_dss_device *dssdev)
422 {
423         int r = 0;
424
425         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
426
427         mutex_lock(&hdmi.lock);
428
429         r = hdmi_power_on_core(dssdev);
430         if (r) {
431                 DSSERR("failed to power on device\n");
432                 goto err0;
433         }
434
435         mutex_unlock(&hdmi.lock);
436         return 0;
437
438 err0:
439         mutex_unlock(&hdmi.lock);
440         return r;
441 }
442
443 static void hdmi_core_disable(struct omap_dss_device *dssdev)
444 {
445         DSSDBG("Enter omapdss_hdmi_core_disable\n");
446
447         mutex_lock(&hdmi.lock);
448
449         hdmi_power_off_core(dssdev);
450
451         mutex_unlock(&hdmi.lock);
452 }
453
454 static int hdmi_connect(struct omap_dss_device *dssdev,
455                 struct omap_dss_device *dst)
456 {
457         struct omap_overlay_manager *mgr;
458         int r;
459
460         r = hdmi_init_regulator();
461         if (r)
462                 return r;
463
464         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
465         if (!mgr)
466                 return -ENODEV;
467
468         r = dss_mgr_connect(mgr, dssdev);
469         if (r)
470                 return r;
471
472         r = omapdss_output_set_device(dssdev, dst);
473         if (r) {
474                 DSSERR("failed to connect output to new device: %s\n",
475                                 dst->name);
476                 dss_mgr_disconnect(mgr, dssdev);
477                 return r;
478         }
479
480         return 0;
481 }
482
483 static void hdmi_disconnect(struct omap_dss_device *dssdev,
484                 struct omap_dss_device *dst)
485 {
486         WARN_ON(dst != dssdev->dst);
487
488         if (dst != dssdev->dst)
489                 return;
490
491         omapdss_output_unset_device(dssdev);
492
493         if (dssdev->manager)
494                 dss_mgr_disconnect(dssdev->manager, dssdev);
495 }
496
497 static int hdmi_read_edid(struct omap_dss_device *dssdev,
498                 u8 *edid, int len)
499 {
500         bool need_enable;
501         int r;
502
503         need_enable = hdmi.core_enabled == false;
504
505         if (need_enable) {
506                 r = hdmi_core_enable(dssdev);
507                 if (r)
508                         return r;
509         }
510
511         r = read_edid(edid, len);
512
513         if (need_enable)
514                 hdmi_core_disable(dssdev);
515
516         return r;
517 }
518
519 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
520                 const struct hdmi_avi_infoframe *avi)
521 {
522         hdmi.cfg.infoframe = *avi;
523         return 0;
524 }
525
526 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
527                 bool hdmi_mode)
528 {
529         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
530         return 0;
531 }
532
533 static const struct omapdss_hdmi_ops hdmi_ops = {
534         .connect                = hdmi_connect,
535         .disconnect             = hdmi_disconnect,
536
537         .enable                 = hdmi_display_enable,
538         .disable                = hdmi_display_disable,
539
540         .check_timings          = hdmi_display_check_timing,
541         .set_timings            = hdmi_display_set_timing,
542         .get_timings            = hdmi_display_get_timings,
543
544         .read_edid              = hdmi_read_edid,
545         .set_infoframe          = hdmi_set_infoframe,
546         .set_hdmi_mode          = hdmi_set_hdmi_mode,
547 };
548
549 static void hdmi_init_output(struct platform_device *pdev)
550 {
551         struct omap_dss_device *out = &hdmi.output;
552
553         out->dev = &pdev->dev;
554         out->id = OMAP_DSS_OUTPUT_HDMI;
555         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
556         out->name = "hdmi.0";
557         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
558         out->ops.hdmi = &hdmi_ops;
559         out->owner = THIS_MODULE;
560
561         omapdss_register_output(out);
562 }
563
564 static void hdmi_uninit_output(struct platform_device *pdev)
565 {
566         struct omap_dss_device *out = &hdmi.output;
567
568         omapdss_unregister_output(out);
569 }
570
571 static int hdmi_probe_of(struct platform_device *pdev)
572 {
573         struct device_node *node = pdev->dev.of_node;
574         struct device_node *ep;
575         int r;
576
577         ep = omapdss_of_get_first_endpoint(node);
578         if (!ep)
579                 return 0;
580
581         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
582         if (r)
583                 goto err;
584
585         of_node_put(ep);
586         return 0;
587
588 err:
589         of_node_put(ep);
590         return r;
591 }
592
593 /* Audio callbacks */
594 static int hdmi_audio_startup(struct device *dev,
595                               void (*abort_cb)(struct device *dev))
596 {
597         struct omap_hdmi *hd = dev_get_drvdata(dev);
598         int ret = 0;
599
600         mutex_lock(&hd->lock);
601
602         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
603                 ret = -EPERM;
604                 goto out;
605         }
606
607         hd->audio_abort_cb = abort_cb;
608
609 out:
610         mutex_unlock(&hd->lock);
611
612         return ret;
613 }
614
615 static int hdmi_audio_shutdown(struct device *dev)
616 {
617         struct omap_hdmi *hd = dev_get_drvdata(dev);
618
619         mutex_lock(&hd->lock);
620         hd->audio_abort_cb = NULL;
621         hd->audio_configured = false;
622         hd->audio_playing = false;
623         mutex_unlock(&hd->lock);
624
625         return 0;
626 }
627
628 static int hdmi_audio_start(struct device *dev)
629 {
630         struct omap_hdmi *hd = dev_get_drvdata(dev);
631         unsigned long flags;
632
633         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
634
635         spin_lock_irqsave(&hd->audio_playing_lock, flags);
636
637         if (hd->display_enabled)
638                 hdmi_start_audio_stream(hd);
639         hd->audio_playing = true;
640
641         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
642         return 0;
643 }
644
645 static void hdmi_audio_stop(struct device *dev)
646 {
647         struct omap_hdmi *hd = dev_get_drvdata(dev);
648         unsigned long flags;
649
650         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
651
652         spin_lock_irqsave(&hd->audio_playing_lock, flags);
653
654         if (hd->display_enabled)
655                 hdmi_stop_audio_stream(hd);
656         hd->audio_playing = false;
657
658         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
659 }
660
661 static int hdmi_audio_config(struct device *dev,
662                              struct omap_dss_audio *dss_audio)
663 {
664         struct omap_hdmi *hd = dev_get_drvdata(dev);
665         int ret;
666
667         mutex_lock(&hd->lock);
668
669         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
670                 ret = -EPERM;
671                 goto out;
672         }
673
674         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
675                                  hd->cfg.timings.pixelclock);
676
677         if (!ret) {
678                 hd->audio_configured = true;
679                 hd->audio_config = *dss_audio;
680         }
681 out:
682         mutex_unlock(&hd->lock);
683
684         return ret;
685 }
686
687 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
688         .audio_startup = hdmi_audio_startup,
689         .audio_shutdown = hdmi_audio_shutdown,
690         .audio_start = hdmi_audio_start,
691         .audio_stop = hdmi_audio_stop,
692         .audio_config = hdmi_audio_config,
693 };
694
695 static int hdmi_audio_register(struct device *dev)
696 {
697         struct omap_hdmi_audio_pdata pdata = {
698                 .dev = dev,
699                 .version = 5,
700                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
701                 .ops = &hdmi_audio_ops,
702         };
703
704         hdmi.audio_pdev = platform_device_register_data(
705                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
706                 &pdata, sizeof(pdata));
707
708         if (IS_ERR(hdmi.audio_pdev))
709                 return PTR_ERR(hdmi.audio_pdev);
710
711         hdmi_runtime_get();
712         hdmi.wp_idlemode =
713                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
714         hdmi_runtime_put();
715
716         return 0;
717 }
718
719 /* HDMI HW IP initialisation */
720 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
721 {
722         struct platform_device *pdev = to_platform_device(dev);
723         int r;
724         int irq;
725
726         hdmi.pdev = pdev;
727         dev_set_drvdata(&pdev->dev, &hdmi);
728
729         mutex_init(&hdmi.lock);
730         spin_lock_init(&hdmi.audio_playing_lock);
731
732         if (pdev->dev.of_node) {
733                 r = hdmi_probe_of(pdev);
734                 if (r)
735                         return r;
736         }
737
738         r = hdmi_wp_init(pdev, &hdmi.wp);
739         if (r)
740                 return r;
741
742         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
743         if (r)
744                 return r;
745
746         r = hdmi_phy_init(pdev, &hdmi.phy);
747         if (r)
748                 goto err;
749
750         r = hdmi5_core_init(pdev, &hdmi.core);
751         if (r)
752                 goto err;
753
754         irq = platform_get_irq(pdev, 0);
755         if (irq < 0) {
756                 DSSERR("platform_get_irq failed\n");
757                 r = -ENODEV;
758                 goto err;
759         }
760
761         r = devm_request_threaded_irq(&pdev->dev, irq,
762                         NULL, hdmi_irq_handler,
763                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
764         if (r) {
765                 DSSERR("HDMI IRQ request failed\n");
766                 goto err;
767         }
768
769         pm_runtime_enable(&pdev->dev);
770
771         hdmi_init_output(pdev);
772
773         r = hdmi_audio_register(&pdev->dev);
774         if (r) {
775                 DSSERR("Registering HDMI audio failed %d\n", r);
776                 hdmi_uninit_output(pdev);
777                 pm_runtime_disable(&pdev->dev);
778                 return r;
779         }
780
781         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
782
783         return 0;
784 err:
785         hdmi_pll_uninit(&hdmi.pll);
786         return r;
787 }
788
789 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
790 {
791         struct platform_device *pdev = to_platform_device(dev);
792
793         if (hdmi.audio_pdev)
794                 platform_device_unregister(hdmi.audio_pdev);
795
796         hdmi_uninit_output(pdev);
797
798         hdmi_pll_uninit(&hdmi.pll);
799
800         pm_runtime_disable(&pdev->dev);
801 }
802
803 static const struct component_ops hdmi5_component_ops = {
804         .bind   = hdmi5_bind,
805         .unbind = hdmi5_unbind,
806 };
807
808 static int hdmi5_probe(struct platform_device *pdev)
809 {
810         return component_add(&pdev->dev, &hdmi5_component_ops);
811 }
812
813 static int hdmi5_remove(struct platform_device *pdev)
814 {
815         component_del(&pdev->dev, &hdmi5_component_ops);
816         return 0;
817 }
818
819 static int hdmi_runtime_suspend(struct device *dev)
820 {
821         dispc_runtime_put();
822
823         return 0;
824 }
825
826 static int hdmi_runtime_resume(struct device *dev)
827 {
828         int r;
829
830         r = dispc_runtime_get();
831         if (r < 0)
832                 return r;
833
834         return 0;
835 }
836
837 static const struct dev_pm_ops hdmi_pm_ops = {
838         .runtime_suspend = hdmi_runtime_suspend,
839         .runtime_resume = hdmi_runtime_resume,
840 };
841
842 static const struct of_device_id hdmi_of_match[] = {
843         { .compatible = "ti,omap5-hdmi", },
844         { .compatible = "ti,dra7-hdmi", },
845         {},
846 };
847
848 static struct platform_driver omapdss_hdmihw_driver = {
849         .probe          = hdmi5_probe,
850         .remove         = hdmi5_remove,
851         .driver         = {
852                 .name   = "omapdss_hdmi5",
853                 .pm     = &hdmi_pm_ops,
854                 .of_match_table = hdmi_of_match,
855                 .suppress_bind_attrs = true,
856         },
857 };
858
859 int __init hdmi5_init_platform_driver(void)
860 {
861         return platform_driver_register(&omapdss_hdmihw_driver);
862 }
863
864 void hdmi5_uninit_platform_driver(void)
865 {
866         platform_driver_unregister(&omapdss_hdmihw_driver);
867 }