2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
4 * Copyright (C) 1997 Geert Uytterhoeven
6 * This driver is partly based on the PowerMac console driver:
8 * Copyright (C) 1996 Paul Mackerras
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
20 #include <linux/vmalloc.h>
21 #include <linux/delay.h>
23 #include <linux/of_address.h>
24 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/pci.h>
32 #include <asm/bootx.h>
37 /* Supported palette hacks */
40 cmap_simple, /* ATI Mach64 */
41 cmap_r128, /* ATI Rage128 */
42 cmap_M3A, /* ATI Rage Mobility M3 Head A */
43 cmap_M3B, /* ATI Rage Mobility M3 Head B */
44 cmap_radeon, /* ATI Radeon */
45 cmap_gxt2000, /* IBM GXT2000 */
46 cmap_avivo, /* ATI R5xx */
47 cmap_qemu, /* qemu vga */
51 volatile void __iomem *cmap_adr;
52 volatile void __iomem *cmap_data;
57 struct offb_par default_par;
60 extern boot_infos_t *boot_infos;
63 /* Definitions used by the Avivo palette hack */
64 #define AVIVO_DC_LUT_RW_SELECT 0x6480
65 #define AVIVO_DC_LUT_RW_MODE 0x6484
66 #define AVIVO_DC_LUT_RW_INDEX 0x6488
67 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
68 #define AVIVO_DC_LUT_PWL_DATA 0x6490
69 #define AVIVO_DC_LUT_30_COLOR 0x6494
70 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
71 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
72 #define AVIVO_DC_LUT_AUTOFILL 0x64a0
74 #define AVIVO_DC_LUTA_CONTROL 0x64c0
75 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
76 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
77 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
78 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
79 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
80 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
82 #define AVIVO_DC_LUTB_CONTROL 0x6cc0
83 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
84 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
85 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
86 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
87 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
88 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
91 * Set a single color register. The values supplied are already
92 * rounded down to the hardware's capabilities (according to the
93 * entries in the var structure). Return != 0 for invalid regno.
96 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
97 u_int transp, struct fb_info *info)
99 struct offb_par *par = (struct offb_par *) info->par;
101 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
102 u32 *pal = info->pseudo_palette;
103 u32 cr = red >> (16 - info->var.red.length);
104 u32 cg = green >> (16 - info->var.green.length);
105 u32 cb = blue >> (16 - info->var.blue.length);
111 value = (cr << info->var.red.offset) |
112 (cg << info->var.green.offset) |
113 (cb << info->var.blue.offset);
114 if (info->var.transp.length > 0) {
115 u32 mask = (1 << info->var.transp.length) - 1;
116 mask <<= info->var.transp.offset;
133 switch (par->cmap_type) {
135 writeb(regno, par->cmap_adr);
136 writeb(red, par->cmap_data);
137 writeb(green, par->cmap_data);
138 writeb(blue, par->cmap_data);
141 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
142 out_le32(par->cmap_adr + 0x58,
143 in_le32(par->cmap_adr + 0x58) & ~0x20);
146 /* Set palette index & data */
147 out_8(par->cmap_adr + 0xb0, regno);
148 out_le32(par->cmap_adr + 0xb4,
149 (red << 16 | green << 8 | blue));
152 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
153 out_le32(par->cmap_adr + 0x58,
154 in_le32(par->cmap_adr + 0x58) | 0x20);
155 /* Set palette index & data */
156 out_8(par->cmap_adr + 0xb0, regno);
157 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
160 /* Set palette index & data (could be smarter) */
161 out_8(par->cmap_adr + 0xb0, regno);
162 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
165 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
166 (red << 16 | green << 8 | blue));
169 /* Write to both LUTs for now */
170 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
171 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
172 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
173 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
174 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
175 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
176 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
177 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
188 static int offb_blank(int blank, struct fb_info *info)
190 struct offb_par *par = (struct offb_par *) info->par;
200 par->blanked = blank;
203 for (i = 0; i < 256; i++) {
204 switch (par->cmap_type) {
206 writeb(i, par->cmap_adr);
207 for (j = 0; j < 3; j++)
208 writeb(0, par->cmap_data);
211 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
212 out_le32(par->cmap_adr + 0x58,
213 in_le32(par->cmap_adr + 0x58) & ~0x20);
216 /* Set palette index & data */
217 out_8(par->cmap_adr + 0xb0, i);
218 out_le32(par->cmap_adr + 0xb4, 0);
221 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
222 out_le32(par->cmap_adr + 0x58,
223 in_le32(par->cmap_adr + 0x58) | 0x20);
224 /* Set palette index & data */
225 out_8(par->cmap_adr + 0xb0, i);
226 out_le32(par->cmap_adr + 0xb4, 0);
229 out_8(par->cmap_adr + 0xb0, i);
230 out_le32(par->cmap_adr + 0xb4, 0);
233 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
237 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
238 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
239 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
240 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
241 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
242 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
246 fb_set_cmap(&info->cmap, info);
250 static int offb_set_par(struct fb_info *info)
252 struct offb_par *par = (struct offb_par *) info->par;
254 /* On avivo, initialize palette control */
255 if (par->cmap_type == cmap_avivo) {
256 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
257 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
258 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
260 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
261 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
262 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
263 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
265 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
267 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
268 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
269 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
270 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
271 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
272 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
273 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
274 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
275 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
280 static void offb_destroy(struct fb_info *info)
282 if (info->screen_base)
283 iounmap(info->screen_base);
284 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
285 fb_dealloc_cmap(&info->cmap);
286 framebuffer_release(info);
289 static const struct fb_ops offb_ops = {
290 .owner = THIS_MODULE,
291 .fb_destroy = offb_destroy,
292 .fb_setcolreg = offb_setcolreg,
293 .fb_set_par = offb_set_par,
294 .fb_blank = offb_blank,
295 .fb_fillrect = cfb_fillrect,
296 .fb_copyarea = cfb_copyarea,
297 .fb_imageblit = cfb_imageblit,
300 static void __iomem *offb_map_reg(struct device_node *np, int index,
301 unsigned long offset, unsigned long size)
307 addrp = of_get_pci_address(np, index, &asize, &flags);
309 addrp = of_get_address(np, index, &asize, &flags);
312 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
314 if ((offset + size) > asize)
316 taddr = of_translate_address(np, addrp);
317 if (taddr == OF_BAD_ADDR)
319 return ioremap(taddr + offset, size);
322 static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
323 unsigned long address)
325 struct offb_par *par = (struct offb_par *) info->par;
327 if (of_node_name_prefix(dp, "ATY,Rage128")) {
328 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
330 par->cmap_type = cmap_r128;
331 } else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
332 of_node_name_prefix(dp, "ATY,RageM3p12A")) {
333 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
335 par->cmap_type = cmap_M3A;
336 } else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
337 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
339 par->cmap_type = cmap_M3B;
340 } else if (of_node_name_prefix(dp, "ATY,Rage6")) {
341 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
343 par->cmap_type = cmap_radeon;
344 } else if (of_node_name_prefix(dp, "ATY,")) {
345 unsigned long base = address & 0xff000000UL;
347 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
348 par->cmap_data = par->cmap_adr + 1;
349 par->cmap_type = cmap_simple;
350 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
351 of_device_is_compatible(dp, "pci1014,21c"))) {
352 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
354 par->cmap_type = cmap_gxt2000;
355 } else if (of_node_name_prefix(dp, "vga,Display-")) {
356 /* Look for AVIVO initialized by SLOF */
357 struct device_node *pciparent = of_get_parent(dp);
358 const u32 *vid, *did;
359 vid = of_get_property(pciparent, "vendor-id", NULL);
360 did = of_get_property(pciparent, "device-id", NULL);
361 /* This will match most R5xx */
362 if (vid && did && *vid == 0x1002 &&
363 ((*did >= 0x7100 && *did < 0x7800) ||
365 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
367 par->cmap_type = cmap_avivo;
369 of_node_put(pciparent);
370 } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
372 const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
374 const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
376 u64 io_addr = of_translate_address(dp, io_of_addr);
377 if (io_addr != OF_BAD_ADDR) {
378 par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
380 par->cmap_type = cmap_simple;
381 par->cmap_data = par->cmap_adr + 1;
385 info->fix.visual = (par->cmap_type != cmap_unknown) ?
386 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
389 static void offb_init_fb(struct platform_device *parent, const char *name,
390 int width, int height, int depth,
391 int pitch, unsigned long address,
392 int foreign_endian, struct device_node *dp)
394 unsigned long res_size = pitch * height;
395 struct offb_par *par = &default_par;
396 unsigned long res_start = address;
397 struct fb_fix_screeninfo *fix;
398 struct fb_var_screeninfo *var;
399 struct fb_info *info;
401 if (!request_mem_region(res_start, res_size, "offb"))
405 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
406 width, height, name, address, depth, pitch);
407 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
408 printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
409 release_mem_region(res_start, res_size);
413 info = framebuffer_alloc(sizeof(u32) * 16, &parent->dev);
416 release_mem_region(res_start, res_size);
419 platform_set_drvdata(parent, info);
426 strcpy(fix->id, "OFfb ");
427 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
428 fix->id[sizeof(fix->id) - 1] = '\0';
430 snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
433 var->xres = var->xres_virtual = width;
434 var->yres = var->yres_virtual = height;
435 fix->line_length = pitch;
437 fix->smem_start = address;
438 fix->smem_len = pitch * height;
439 fix->type = FB_TYPE_PACKED_PIXELS;
442 par->cmap_type = cmap_unknown;
444 offb_init_palette_hacks(info, dp, address);
446 fix->visual = FB_VISUAL_TRUECOLOR;
448 var->xoffset = var->yoffset = 0;
451 var->bits_per_pixel = 8;
454 var->green.offset = 0;
455 var->green.length = 8;
456 var->blue.offset = 0;
457 var->blue.length = 8;
458 var->transp.offset = 0;
459 var->transp.length = 0;
461 case 15: /* RGB 555 */
462 var->bits_per_pixel = 16;
463 var->red.offset = 10;
465 var->green.offset = 5;
466 var->green.length = 5;
467 var->blue.offset = 0;
468 var->blue.length = 5;
469 var->transp.offset = 0;
470 var->transp.length = 0;
472 case 16: /* RGB 565 */
473 var->bits_per_pixel = 16;
474 var->red.offset = 11;
476 var->green.offset = 5;
477 var->green.length = 6;
478 var->blue.offset = 0;
479 var->blue.length = 5;
480 var->transp.offset = 0;
481 var->transp.length = 0;
483 case 32: /* RGB 888 */
484 var->bits_per_pixel = 32;
485 var->red.offset = 16;
487 var->green.offset = 8;
488 var->green.length = 8;
489 var->blue.offset = 0;
490 var->blue.length = 8;
491 var->transp.offset = 24;
492 var->transp.length = 8;
495 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
496 var->transp.msb_right = 0;
500 var->height = var->width = -1;
501 var->pixclock = 10000;
502 var->left_margin = var->right_margin = 16;
503 var->upper_margin = var->lower_margin = 16;
504 var->hsync_len = var->vsync_len = 8;
506 var->vmode = FB_VMODE_NONINTERLACED;
508 /* set offb aperture size for generic probing */
509 info->apertures = alloc_apertures(1);
510 if (!info->apertures)
512 info->apertures->ranges[0].base = address;
513 info->apertures->ranges[0].size = fix->smem_len;
515 info->fbops = &offb_ops;
516 info->screen_base = ioremap(address, fix->smem_len);
517 info->pseudo_palette = (void *) (info + 1);
518 info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
520 fb_alloc_cmap(&info->cmap, 256, 0);
522 if (register_framebuffer(info) < 0)
525 fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
529 fb_dealloc_cmap(&info->cmap);
530 iounmap(info->screen_base);
532 iounmap(par->cmap_adr);
533 par->cmap_adr = NULL;
534 framebuffer_release(info);
535 release_mem_region(res_start, res_size);
539 static void offb_init_nodriver(struct platform_device *parent, struct device_node *dp,
543 int i, width = 640, height = 480, depth = 8, pitch = 640;
544 unsigned int flags, rsize, addr_prop = 0;
545 unsigned long max_size = 0;
546 u64 rstart, address = OF_BAD_ADDR;
547 const __be32 *pp, *addrp, *up;
549 int foreign_endian = 0;
552 if (of_get_property(dp, "little-endian", NULL))
553 foreign_endian = FBINFO_FOREIGN_ENDIAN;
555 if (of_get_property(dp, "big-endian", NULL))
556 foreign_endian = FBINFO_FOREIGN_ENDIAN;
559 pp = of_get_property(dp, "linux,bootx-depth", &len);
561 pp = of_get_property(dp, "depth", &len);
562 if (pp && len == sizeof(u32))
563 depth = be32_to_cpup(pp);
565 pp = of_get_property(dp, "linux,bootx-width", &len);
567 pp = of_get_property(dp, "width", &len);
568 if (pp && len == sizeof(u32))
569 width = be32_to_cpup(pp);
571 pp = of_get_property(dp, "linux,bootx-height", &len);
573 pp = of_get_property(dp, "height", &len);
574 if (pp && len == sizeof(u32))
575 height = be32_to_cpup(pp);
577 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
579 pp = of_get_property(dp, "linebytes", &len);
580 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
581 pitch = be32_to_cpup(pp);
583 pitch = width * ((depth + 7) / 8);
585 rsize = (unsigned long)pitch * (unsigned long)height;
587 /* Ok, now we try to figure out the address of the framebuffer.
589 * Unfortunately, Open Firmware doesn't provide a standard way to do
590 * so. All we can do is a dodgy heuristic that happens to work in
591 * practice. On most machines, the "address" property contains what
592 * we need, though not on Matrox cards found in IBM machines. What I've
593 * found that appears to give good results is to go through the PCI
594 * ranges and pick one that is both big enough and if possible encloses
595 * the "address" property. If none match, we pick the biggest
597 up = of_get_property(dp, "linux,bootx-addr", &len);
599 up = of_get_property(dp, "address", &len);
600 if (up && len == sizeof(u32))
603 /* Hack for when BootX is passing us */
607 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
611 if (!(flags & IORESOURCE_MEM))
615 rstart = of_translate_address(dp, addrp);
616 if (rstart == OF_BAD_ADDR)
618 if (addr_prop && (rstart <= addr_prop) &&
619 ((rstart + asize) >= (addr_prop + rsize)))
625 if (rsize > max_size) {
627 address = OF_BAD_ADDR;
630 if (address == OF_BAD_ADDR)
634 if (address == OF_BAD_ADDR && addr_prop)
635 address = (u64)addr_prop;
636 if (address != OF_BAD_ADDR) {
638 const __be32 *vidp, *didp;
640 struct pci_dev *pdev;
642 vidp = of_get_property(dp, "vendor-id", NULL);
643 didp = of_get_property(dp, "device-id", NULL);
645 vid = be32_to_cpup(vidp);
646 did = be32_to_cpup(didp);
647 pdev = pci_get_device(vid, did, NULL);
648 if (!pdev || pci_enable_device(pdev))
652 /* kludge for valkyrie */
653 if (of_node_name_eq(dp, "valkyrie"))
655 offb_init_fb(parent, no_real_node ? "bootx" : NULL,
656 width, height, depth, pitch, address,
657 foreign_endian, no_real_node ? NULL : dp);
661 static int offb_remove(struct platform_device *pdev)
663 struct fb_info *info = platform_get_drvdata(pdev);
666 unregister_framebuffer(info);
671 static int offb_probe_bootx_noscreen(struct platform_device *pdev)
673 offb_init_nodriver(pdev, of_chosen, 1);
678 static struct platform_driver offb_driver_bootx_noscreen = {
680 .name = "bootx-noscreen",
682 .probe = offb_probe_bootx_noscreen,
683 .remove = offb_remove,
686 static int offb_probe_display(struct platform_device *pdev)
688 offb_init_nodriver(pdev, pdev->dev.of_node, 0);
693 static const struct of_device_id offb_of_match_display[] = {
694 { .compatible = "display", },
697 MODULE_DEVICE_TABLE(of, offb_of_match_display);
699 static struct platform_driver offb_driver_display = {
701 .name = "of-display",
702 .of_match_table = offb_of_match_display,
704 .probe = offb_probe_display,
705 .remove = offb_remove,
708 static int __init offb_init(void)
710 if (fb_get_options("offb", NULL))
713 platform_driver_register(&offb_driver_bootx_noscreen);
714 platform_driver_register(&offb_driver_display);
718 module_init(offb_init);
720 static void __exit offb_exit(void)
722 platform_driver_unregister(&offb_driver_display);
723 platform_driver_unregister(&offb_driver_bootx_noscreen);
725 module_exit(offb_exit);
727 MODULE_LICENSE("GPL");