2 * SGI GBE frame buffer driver
4 * Copyright (C) 1999 Silicon Graphics, Inc. - Jeffrey Newquist
5 * Copyright (C) 2002 Vivien Chappelier <vivien.chappelier@linux-mips.org>
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
12 #include <linux/delay.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/errno.h>
16 #include <linux/gfp.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
22 #include <linux/module.h>
26 #include <asm/addrspace.h>
28 #include <asm/byteorder.h>
29 #include <asm/tlbflush.h>
31 #include <video/gbe.h>
33 static struct sgi_gbe *gbe;
36 struct fb_var_screeninfo var;
37 struct gbe_timing_info timing;
42 #define GBE_BASE 0x16000000 /* SGI O2 */
44 /* macro for fastest write-though access to the framebuffer */
46 #ifdef CONFIG_CPU_R10000
47 #define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_UNCACHED_ACCELERATED)
49 #define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_CACHABLE_NO_WA)
54 * RAM we reserve for the frame buffer. This defines the maximum screen
57 #if CONFIG_FB_GBE_MEM > 8
58 #error GBE Framebuffer cannot use more than 8MB of memory
62 #define TILE_SIZE (1 << TILE_SHIFT)
63 #define TILE_MASK (TILE_SIZE - 1)
65 static unsigned int gbe_mem_size = CONFIG_FB_GBE_MEM * 1024*1024;
67 static dma_addr_t gbe_dma_addr;
68 static unsigned long gbe_mem_phys;
75 static int gbe_revision;
77 static int ypan, ywrap;
79 static uint32_t pseudo_palette[16];
80 static uint32_t gbe_cmap[256];
81 static int gbe_turned_on; /* 0 turned off, 1 turned on */
83 static char *mode_option = NULL;
85 /* default CRT mode */
86 static struct fb_var_screeninfo default_var_CRT = {
87 /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
99 .transp = { 0, 0, 0 },
105 .pixclock = 39722, /* picoseconds */
113 .vmode = FB_VMODE_NONINTERLACED,
116 /* default LCD mode */
117 static struct fb_var_screeninfo default_var_LCD = {
118 /* 1600x1024, 8 bpp */
121 .xres_virtual = 1600,
122 .yres_virtual = 1024,
128 .green = { 0, 8, 0 },
130 .transp = { 0, 0, 0 },
144 .vmode = FB_VMODE_NONINTERLACED
147 /* default modedb mode */
148 /* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
149 static struct fb_videomode default_mode_CRT = {
161 .vmode = FB_VMODE_NONINTERLACED,
163 /* 1600x1024 SGI flatpanel 1600sw */
164 static struct fb_videomode default_mode_LCD = {
165 /* 1600x1024, 8 bpp */
175 .vmode = FB_VMODE_NONINTERLACED,
178 static struct fb_videomode *default_mode = &default_mode_CRT;
179 static struct fb_var_screeninfo *default_var = &default_var_CRT;
181 static int flat_panel_enabled = 0;
183 static void gbe_reset(void)
185 /* Turn on dotclock PLL */
186 gbe->ctrlstat = 0x300aa000;
191 * Function: gbe_turn_off
193 * Description: This should turn off the monitor and gbe. This is used
194 * when switching between the serial console and the graphics
198 static void gbe_turn_off(void)
201 unsigned int val, y, vpixen_off;
205 /* check if pixel counter is on */
207 if (GET_GBE_FIELD(VT_XY, FREEZE, val) == 1)
211 val = gbe->ovr_control;
212 SET_GBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, val, 0);
213 gbe->ovr_control = val;
215 val = gbe->frm_control;
216 SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 0);
217 gbe->frm_control = val;
219 val = gbe->did_control;
220 SET_GBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, val, 0);
221 gbe->did_control = val;
224 /* We have to wait through two vertical retrace periods before
225 * the pixel DMA is turned off for sure. */
226 for (i = 0; i < 10000; i++) {
227 val = gbe->frm_inhwctrl;
228 if (GET_GBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, val)) {
231 val = gbe->ovr_inhwctrl;
232 if (GET_GBE_FIELD(OVR_INHWCTRL, OVR_DMA_ENABLE, val)) {
235 val = gbe->did_inhwctrl;
236 if (GET_GBE_FIELD(DID_INHWCTRL, DID_DMA_ENABLE, val)) {
244 printk(KERN_ERR "gbefb: turn off DMA timed out\n");
246 /* wait for vpixen_off */
247 val = gbe->vt_vpixen;
248 vpixen_off = GET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val);
250 for (i = 0; i < 100000; i++) {
252 y = GET_GBE_FIELD(VT_XY, Y, val);
259 "gbefb: wait for vpixen_off timed out\n");
260 for (i = 0; i < 10000; i++) {
262 y = GET_GBE_FIELD(VT_XY, Y, val);
268 printk(KERN_ERR "gbefb: wait for vpixen_off timed out\n");
270 /* turn off pixel counter */
272 SET_GBE_FIELD(VT_XY, FREEZE, val, 1);
275 for (i = 0; i < 10000; i++) {
277 if (GET_GBE_FIELD(VT_XY, FREEZE, val) != 1)
283 printk(KERN_ERR "gbefb: turn off pixel clock timed out\n");
285 /* turn off dot clock */
287 SET_GBE_FIELD(DOTCLK, RUN, val, 0);
290 for (i = 0; i < 10000; i++) {
292 if (GET_GBE_FIELD(DOTCLK, RUN, val))
298 printk(KERN_ERR "gbefb: turn off dotclock timed out\n");
300 /* reset the frame DMA FIFO */
301 val = gbe->frm_size_tile;
302 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, val, 1);
303 gbe->frm_size_tile = val;
304 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, val, 0);
305 gbe->frm_size_tile = val;
308 static void gbe_turn_on(void)
313 * Check if pixel counter is off, for unknown reason this
314 * code hangs Visual Workstations
316 if (gbe_revision < 2) {
318 if (GET_GBE_FIELD(VT_XY, FREEZE, val) == 0)
322 /* turn on dot clock */
324 SET_GBE_FIELD(DOTCLK, RUN, val, 1);
327 for (i = 0; i < 10000; i++) {
329 if (GET_GBE_FIELD(DOTCLK, RUN, val) != 1)
335 printk(KERN_ERR "gbefb: turn on dotclock timed out\n");
337 /* turn on pixel counter */
339 SET_GBE_FIELD(VT_XY, FREEZE, val, 0);
342 for (i = 0; i < 10000; i++) {
344 if (GET_GBE_FIELD(VT_XY, FREEZE, val))
350 printk(KERN_ERR "gbefb: turn on pixel clock timed out\n");
353 val = gbe->frm_control;
354 SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 1);
355 gbe->frm_control = val;
357 for (i = 0; i < 10000; i++) {
358 val = gbe->frm_inhwctrl;
359 if (GET_GBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, val) != 1)
365 printk(KERN_ERR "gbefb: turn on DMA timed out\n");
370 static void gbe_loadcmap(void)
374 for (i = 0; i < 256; i++) {
375 for (j = 0; j < 1000 && gbe->cm_fifo >= 63; j++)
378 printk(KERN_ERR "gbefb: cmap FIFO timeout\n");
380 gbe->cmap[i] = gbe_cmap[i];
387 static int gbefb_blank(int blank, struct fb_info *info)
389 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
391 case FB_BLANK_UNBLANK: /* unblank */
396 case FB_BLANK_NORMAL: /* blank */
408 * Setup flatpanel related registers.
410 static void gbefb_setup_flatpanel(struct gbe_timing_info *timing)
412 int fp_wid, fp_hgt, fp_vbs, fp_vbe;
415 SET_GBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal,
416 (timing->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
417 SET_GBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal,
418 (timing->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
419 gbe->vt_flags = outputVal;
421 /* Turn on the flat panel */
431 SET_GBE_FIELD(FP_DE, ON, outputVal, fp_vbs);
432 SET_GBE_FIELD(FP_DE, OFF, outputVal, fp_vbe);
433 gbe->fp_de = outputVal;
435 SET_GBE_FIELD(FP_HDRV, OFF, outputVal, fp_wid);
436 gbe->fp_hdrv = outputVal;
438 SET_GBE_FIELD(FP_VDRV, ON, outputVal, 1);
439 SET_GBE_FIELD(FP_VDRV, OFF, outputVal, fp_hgt + 1);
440 gbe->fp_vdrv = outputVal;
443 struct gbe_pll_info {
449 static struct gbe_pll_info gbe_pll_table[2] = {
454 static int compute_gbe_timing(struct fb_var_screeninfo *var,
455 struct gbe_timing_info *timing)
457 int pll_m, pll_n, pll_p, error, best_m, best_n, best_p, best_error;
459 struct gbe_pll_info *gbe_pll;
461 if (gbe_revision < 2)
462 gbe_pll = &gbe_pll_table[0];
464 gbe_pll = &gbe_pll_table[1];
466 /* Determine valid resolution and timing
467 * GBE crystal runs at 20Mhz or 27Mhz
468 * pll_m, pll_n, pll_p define the following frequencies
469 * fvco = pll_m * 20Mhz / pll_n
470 * fout = fvco / (2**pll_p) */
471 best_error = 1000000000;
472 best_n = best_m = best_p = 0;
473 for (pll_p = 0; pll_p < 4; pll_p++)
474 for (pll_m = 1; pll_m < 256; pll_m++)
475 for (pll_n = 1; pll_n < 64; pll_n++) {
476 pixclock = (1000000 / gbe_pll->clock_rate) *
477 (pll_n << pll_p) / pll_m;
479 error = var->pixclock - pixclock;
484 if (error < best_error &&
486 gbe_pll->fvco_min / gbe_pll->clock_rate &&
488 gbe_pll->fvco_max / gbe_pll->clock_rate) {
496 if (!best_n || !best_m)
497 return -EINVAL; /* Resolution to high */
499 pixclock = (1000000 / gbe_pll->clock_rate) *
500 (best_n << best_p) / best_m;
502 /* set video timing information */
504 timing->width = var->xres;
505 timing->height = var->yres;
506 timing->pll_m = best_m;
507 timing->pll_n = best_n;
508 timing->pll_p = best_p;
509 timing->cfreq = gbe_pll->clock_rate * 1000 * timing->pll_m /
510 (timing->pll_n << timing->pll_p);
511 timing->htotal = var->left_margin + var->xres +
512 var->right_margin + var->hsync_len;
513 timing->vtotal = var->upper_margin + var->yres +
514 var->lower_margin + var->vsync_len;
515 timing->fields_sec = 1000 * timing->cfreq / timing->htotal *
516 1000 / timing->vtotal;
517 timing->hblank_start = var->xres;
518 timing->vblank_start = var->yres;
519 timing->hblank_end = timing->htotal;
520 timing->hsync_start = var->xres + var->right_margin + 1;
521 timing->hsync_end = timing->hsync_start + var->hsync_len;
522 timing->vblank_end = timing->vtotal;
523 timing->vsync_start = var->yres + var->lower_margin + 1;
524 timing->vsync_end = timing->vsync_start + var->vsync_len;
530 static void gbe_set_timing_info(struct gbe_timing_info *timing)
535 /* setup dot clock PLL */
537 SET_GBE_FIELD(DOTCLK, M, val, timing->pll_m - 1);
538 SET_GBE_FIELD(DOTCLK, N, val, timing->pll_n - 1);
539 SET_GBE_FIELD(DOTCLK, P, val, timing->pll_p);
540 SET_GBE_FIELD(DOTCLK, RUN, val, 0); /* do not start yet */
544 /* setup pixel counter */
546 SET_GBE_FIELD(VT_XYMAX, MAXX, val, timing->htotal);
547 SET_GBE_FIELD(VT_XYMAX, MAXY, val, timing->vtotal);
550 /* setup video timing signals */
552 SET_GBE_FIELD(VT_VSYNC, VSYNC_ON, val, timing->vsync_start);
553 SET_GBE_FIELD(VT_VSYNC, VSYNC_OFF, val, timing->vsync_end);
556 SET_GBE_FIELD(VT_HSYNC, HSYNC_ON, val, timing->hsync_start);
557 SET_GBE_FIELD(VT_HSYNC, HSYNC_OFF, val, timing->hsync_end);
560 SET_GBE_FIELD(VT_VBLANK, VBLANK_ON, val, timing->vblank_start);
561 SET_GBE_FIELD(VT_VBLANK, VBLANK_OFF, val, timing->vblank_end);
562 gbe->vt_vblank = val;
564 SET_GBE_FIELD(VT_HBLANK, HBLANK_ON, val,
565 timing->hblank_start - 5);
566 SET_GBE_FIELD(VT_HBLANK, HBLANK_OFF, val,
567 timing->hblank_end - 3);
568 gbe->vt_hblank = val;
570 /* setup internal timing signals */
572 SET_GBE_FIELD(VT_VCMAP, VCMAP_ON, val, timing->vblank_start);
573 SET_GBE_FIELD(VT_VCMAP, VCMAP_OFF, val, timing->vblank_end);
576 SET_GBE_FIELD(VT_HCMAP, HCMAP_ON, val, timing->hblank_start);
577 SET_GBE_FIELD(VT_HCMAP, HCMAP_OFF, val, timing->hblank_end);
581 temp = timing->vblank_start - timing->vblank_end - 1;
585 if (flat_panel_enabled)
586 gbefb_setup_flatpanel(timing);
588 SET_GBE_FIELD(DID_START_XY, DID_STARTY, val, (u32) temp);
589 if (timing->hblank_end >= 20)
590 SET_GBE_FIELD(DID_START_XY, DID_STARTX, val,
591 timing->hblank_end - 20);
593 SET_GBE_FIELD(DID_START_XY, DID_STARTX, val,
594 timing->htotal - (20 - timing->hblank_end));
595 gbe->did_start_xy = val;
598 SET_GBE_FIELD(CRS_START_XY, CRS_STARTY, val, (u32) (temp + 1));
599 if (timing->hblank_end >= GBE_CRS_MAGIC)
600 SET_GBE_FIELD(CRS_START_XY, CRS_STARTX, val,
601 timing->hblank_end - GBE_CRS_MAGIC);
603 SET_GBE_FIELD(CRS_START_XY, CRS_STARTX, val,
604 timing->htotal - (GBE_CRS_MAGIC -
605 timing->hblank_end));
606 gbe->crs_start_xy = val;
609 SET_GBE_FIELD(VC_START_XY, VC_STARTY, val, (u32) temp);
610 SET_GBE_FIELD(VC_START_XY, VC_STARTX, val, timing->hblank_end - 4);
611 gbe->vc_start_xy = val;
614 temp = timing->hblank_end - GBE_PIXEN_MAGIC_ON;
616 temp += timing->htotal; /* allow blank to wrap around */
618 SET_GBE_FIELD(VT_HPIXEN, HPIXEN_ON, val, temp);
619 SET_GBE_FIELD(VT_HPIXEN, HPIXEN_OFF, val,
620 ((temp + timing->width -
621 GBE_PIXEN_MAGIC_OFF) % timing->htotal));
622 gbe->vt_hpixen = val;
625 SET_GBE_FIELD(VT_VPIXEN, VPIXEN_ON, val, timing->vblank_end);
626 SET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val, timing->vblank_start);
627 gbe->vt_vpixen = val;
629 /* turn off sync on green */
631 SET_GBE_FIELD(VT_FLAGS, SYNC_LOW, val, 1);
636 * Set the hardware according to 'par'.
639 static int gbefb_set_par(struct fb_info *info)
643 int wholeTilesX, partTilesX, maxPixelsPerTileX;
645 int xpmax, ypmax; /* Monitor resolution */
646 int bytesPerPixel; /* Bytes per pixel */
647 struct gbefb_par *par = (struct gbefb_par *) info->par;
649 compute_gbe_timing(&info->var, &par->timing);
651 bytesPerPixel = info->var.bits_per_pixel / 8;
652 info->fix.line_length = info->var.xres_virtual * bytesPerPixel;
653 xpmax = par->timing.width;
654 ypmax = par->timing.height;
659 /* set timing info */
660 gbe_set_timing_info(&par->timing);
662 /* initialize DIDs */
664 switch (bytesPerPixel) {
666 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_I8);
667 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
670 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_ARGB5);
671 info->fix.visual = FB_VISUAL_TRUECOLOR;
674 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_RGB8);
675 info->fix.visual = FB_VISUAL_TRUECOLOR;
678 SET_GBE_FIELD(WID, BUF, val, GBE_BMODE_BOTH);
680 for (i = 0; i < 32; i++)
681 gbe->mode_regs[i] = val;
683 /* Initialize interrupts */
684 gbe->vt_intr01 = 0xffffffff;
685 gbe->vt_intr23 = 0xffffffff;
688 The GBE hardware uses a tiled memory to screen mapping. Tiles are
689 blocks of 512x128, 256x128 or 128x128 pixels, respectively for 8bit,
690 16bit and 32 bit modes (64 kB). They cover the screen with partial
691 tiles on the right and/or bottom of the screen if needed.
692 For example in 640x480 8 bit mode the mapping is:
695 <---- 512 ----><128|384 offscreen>
697 | 128 [tile 0] [tile 1]
700 4 128 [tile 2] [tile 3]
703 128 [tile 4] [tile 5]
706 v 96 [tile 6] [tile 7]
709 Tiles have the advantage that they can be allocated individually in
710 memory. However, this mapping is not linear at all, which is not
711 really convenient. In order to support linear addressing, the GBE
712 DMA hardware is fooled into thinking the screen is only one tile
713 large and but has a greater height, so that the DMA transfer covers
715 Tiles are still allocated as independent chunks of 64KB of
716 continuous physical memory and remapped so that the kernel sees the
717 framebuffer as a continuous virtual memory. The GBE tile table is
718 set up so that each tile references one of these 64k blocks:
720 GBE -> tile list framebuffer TLB <------------ CPU
721 [ tile 0 ] -> [ 64KB ] <- [ 16x 4KB page entries ] ^
722 ... ... ... linear virtual FB
723 [ tile n ] -> [ 64KB ] <- [ 16x 4KB page entries ] v
726 The GBE hardware is then told that the buffer is 512*tweaked_height,
727 with tweaked_height = real_width*real_height/pixels_per_tile.
728 Thus the GBE hardware will scan the first tile, filing the first 64k
729 covered region of the screen, and then will proceed to the next
730 tile, until the whole screen is covered.
732 Here is what would happen at 640x480 8bit:
735 ^ 11111111111111112222 11111111111111111111 ^
736 128 11111111111111112222 11111111111111111111 102 lines
737 11111111111111112222 11111111111111111111 v
738 V 11111111111111112222 11111111222222222222
739 33333333333333334444 22222222222222222222
740 33333333333333334444 22222222222222222222
741 < 512 > < 256 > 102*640+256 = 64k
743 NOTE: The only mode for which this is not working is 800x600 8bit,
744 as 800*600/512 = 937.5 which is not integer and thus causes
746 I guess this is not so important as one can use 640x480 8bit or
747 800x600 16bit anyway.
750 /* Tell gbe about the tiles table location */
751 /* tile_ptr -> [ tile 1 ] -> FB mem */
752 /* [ tile 2 ] -> FB mem */
755 SET_GBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, val, gbe_tiles.dma >> 9);
756 SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 0); /* do not start */
757 SET_GBE_FIELD(FRM_CONTROL, FRM_LINEAR, val, 0);
758 gbe->frm_control = val;
760 maxPixelsPerTileX = 512 / bytesPerPixel;
764 /* Initialize the framebuffer */
766 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, val, wholeTilesX);
767 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_RHS, val, partTilesX);
769 switch (bytesPerPixel) {
771 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
775 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
779 SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
783 gbe->frm_size_tile = val;
785 /* compute tweaked height */
786 height_pix = xpmax * ypmax / maxPixelsPerTileX;
789 SET_GBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, val, height_pix);
790 gbe->frm_size_pixel = val;
792 /* turn off DID and overlay DMA */
793 gbe->did_control = 0;
794 gbe->ovr_width_tile = 0;
796 /* Turn off mouse cursor */
802 /* Initialize the gamma map */
804 for (i = 0; i < 256; i++)
805 gbe->gmap[i] = (i << 24) | (i << 16) | (i << 8);
807 /* Initialize the color map */
808 for (i = 0; i < 256; i++)
809 gbe_cmap[i] = (i << 8) | (i << 16) | (i << 24);
816 static void gbefb_encode_fix(struct fb_fix_screeninfo *fix,
817 struct fb_var_screeninfo *var)
819 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
820 strcpy(fix->id, "SGI GBE");
821 fix->smem_start = (unsigned long) gbe_mem;
822 fix->smem_len = gbe_mem_size;
823 fix->type = FB_TYPE_PACKED_PIXELS;
825 fix->accel = FB_ACCEL_NONE;
826 switch (var->bits_per_pixel) {
828 fix->visual = FB_VISUAL_PSEUDOCOLOR;
831 fix->visual = FB_VISUAL_TRUECOLOR;
837 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
838 fix->mmio_start = GBE_BASE;
839 fix->mmio_len = sizeof(struct sgi_gbe);
843 * Set a single color register. The values supplied are already
844 * rounded down to the hardware's capabilities (according to the
845 * entries in the var structure). Return != 0 for invalid regno.
848 static int gbefb_setcolreg(unsigned regno, unsigned red, unsigned green,
849 unsigned blue, unsigned transp,
850 struct fb_info *info)
860 if (info->var.bits_per_pixel <= 8) {
861 gbe_cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
863 /* wait for the color map FIFO to have a free entry */
864 for (i = 0; i < 1000 && gbe->cm_fifo >= 63; i++)
867 printk(KERN_ERR "gbefb: cmap FIFO timeout\n");
870 gbe->cmap[regno] = gbe_cmap[regno];
872 } else if (regno < 16) {
873 switch (info->var.bits_per_pixel) {
879 pseudo_palette[regno] =
880 (red << info->var.red.offset) |
881 (green << info->var.green.offset) |
882 (blue << info->var.blue.offset);
885 pseudo_palette[regno] =
886 (red << info->var.red.offset) |
887 (green << info->var.green.offset) |
888 (blue << info->var.blue.offset);
897 * Check video mode validity, eventually modify var to best match.
899 static int gbefb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
901 unsigned int line_length;
902 struct gbe_timing_info timing;
905 /* Limit bpp to 8, 16, and 32 */
906 if (var->bits_per_pixel <= 8)
907 var->bits_per_pixel = 8;
908 else if (var->bits_per_pixel <= 16)
909 var->bits_per_pixel = 16;
910 else if (var->bits_per_pixel <= 32)
911 var->bits_per_pixel = 32;
915 /* Check the mode can be mapped linearly with the tile table trick. */
916 /* This requires width x height x bytes/pixel be a multiple of 512 */
917 if ((var->xres * var->yres * var->bits_per_pixel) & 4095)
920 var->grayscale = 0; /* No grayscale for now */
922 ret = compute_gbe_timing(var, &timing);
927 /* Adjust virtual resolution, if necessary */
928 if (var->xres > var->xres_virtual || (!ywrap && !ypan))
929 var->xres_virtual = var->xres;
930 if (var->yres > var->yres_virtual || (!ywrap && !ypan))
931 var->yres_virtual = var->yres;
933 if (var->vmode & FB_VMODE_CONUPDATE) {
934 var->vmode |= FB_VMODE_YWRAP;
935 var->xoffset = info->var.xoffset;
936 var->yoffset = info->var.yoffset;
939 /* No grayscale for now */
943 line_length = var->xres_virtual * var->bits_per_pixel / 8;
944 if (line_length * var->yres_virtual > gbe_mem_size)
945 return -ENOMEM; /* Virtual resolution too high */
947 switch (var->bits_per_pixel) {
951 var->green.offset = 0;
952 var->green.length = 8;
953 var->blue.offset = 0;
954 var->blue.length = 8;
955 var->transp.offset = 0;
956 var->transp.length = 0;
958 case 16: /* RGB 1555 */
959 var->red.offset = 10;
961 var->green.offset = 5;
962 var->green.length = 5;
963 var->blue.offset = 0;
964 var->blue.length = 5;
965 var->transp.offset = 0;
966 var->transp.length = 0;
968 case 32: /* RGB 8888 */
969 var->red.offset = 24;
971 var->green.offset = 16;
972 var->green.length = 8;
973 var->blue.offset = 8;
974 var->blue.length = 8;
975 var->transp.offset = 0;
976 var->transp.length = 8;
979 var->red.msb_right = 0;
980 var->green.msb_right = 0;
981 var->blue.msb_right = 0;
982 var->transp.msb_right = 0;
984 var->left_margin = timing.htotal - timing.hsync_end;
985 var->right_margin = timing.hsync_start - timing.width;
986 var->upper_margin = timing.vtotal - timing.vsync_end;
987 var->lower_margin = timing.vsync_start - timing.height;
988 var->hsync_len = timing.hsync_end - timing.hsync_start;
989 var->vsync_len = timing.vsync_end - timing.vsync_start;
994 static int gbefb_mmap(struct fb_info *info,
995 struct vm_area_struct *vma)
997 unsigned long size = vma->vm_end - vma->vm_start;
998 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1000 unsigned long phys_addr, phys_size;
1004 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
1006 if (size > gbe_mem_size)
1008 if (offset > gbe_mem_size - size)
1011 /* remap using the fastest write-through mode on architecture */
1012 /* try not polluting the cache when possible */
1014 pgprot_val(vma->vm_page_prot) =
1015 pgprot_fb(pgprot_val(vma->vm_page_prot));
1017 /* VM_IO | VM_DONTEXPAND | VM_DONTDUMP are set by remap_pfn_range() */
1019 /* look for the starting tile */
1020 tile = &gbe_tiles.cpu[offset >> TILE_SHIFT];
1021 addr = vma->vm_start;
1022 offset &= TILE_MASK;
1024 /* remap each tile separately */
1026 phys_addr = (((unsigned long) (*tile)) << TILE_SHIFT) + offset;
1027 if ((offset + size) < TILE_SIZE)
1030 phys_size = TILE_SIZE - offset;
1032 if (remap_pfn_range(vma, addr, phys_addr >> PAGE_SHIFT,
1033 phys_size, vma->vm_page_prot))
1045 static const struct fb_ops gbefb_ops = {
1046 .owner = THIS_MODULE,
1047 .fb_check_var = gbefb_check_var,
1048 .fb_set_par = gbefb_set_par,
1049 .fb_setcolreg = gbefb_setcolreg,
1050 .fb_mmap = gbefb_mmap,
1051 .fb_blank = gbefb_blank,
1052 .fb_fillrect = cfb_fillrect,
1053 .fb_copyarea = cfb_copyarea,
1054 .fb_imageblit = cfb_imageblit,
1061 static ssize_t gbefb_show_memsize(struct device *dev, struct device_attribute *attr, char *buf)
1063 return snprintf(buf, PAGE_SIZE, "%u\n", gbe_mem_size);
1066 static DEVICE_ATTR(size, S_IRUGO, gbefb_show_memsize, NULL);
1068 static ssize_t gbefb_show_rev(struct device *device, struct device_attribute *attr, char *buf)
1070 return snprintf(buf, PAGE_SIZE, "%d\n", gbe_revision);
1073 static DEVICE_ATTR(revision, S_IRUGO, gbefb_show_rev, NULL);
1075 static void gbefb_remove_sysfs(struct device *dev)
1077 device_remove_file(dev, &dev_attr_size);
1078 device_remove_file(dev, &dev_attr_revision);
1081 static void gbefb_create_sysfs(struct device *dev)
1083 device_create_file(dev, &dev_attr_size);
1084 device_create_file(dev, &dev_attr_revision);
1091 static int gbefb_setup(char *options)
1095 if (!options || !*options)
1098 while ((this_opt = strsep(&options, ",")) != NULL) {
1099 if (!strncmp(this_opt, "monitor:", 8)) {
1100 if (!strncmp(this_opt + 8, "crt", 3)) {
1101 flat_panel_enabled = 0;
1102 default_var = &default_var_CRT;
1103 default_mode = &default_mode_CRT;
1104 } else if (!strncmp(this_opt + 8, "1600sw", 6) ||
1105 !strncmp(this_opt + 8, "lcd", 3)) {
1106 flat_panel_enabled = 1;
1107 default_var = &default_var_LCD;
1108 default_mode = &default_mode_LCD;
1110 } else if (!strncmp(this_opt, "mem:", 4)) {
1111 gbe_mem_size = memparse(this_opt + 4, &this_opt);
1112 if (gbe_mem_size > CONFIG_FB_GBE_MEM * 1024 * 1024)
1113 gbe_mem_size = CONFIG_FB_GBE_MEM * 1024 * 1024;
1114 if (gbe_mem_size < TILE_SIZE)
1115 gbe_mem_size = TILE_SIZE;
1117 mode_option = this_opt;
1122 static int gbefb_probe(struct platform_device *p_dev)
1125 struct fb_info *info;
1126 struct gbefb_par *par;
1128 char *options = NULL;
1131 info = framebuffer_alloc(sizeof(struct gbefb_par), &p_dev->dev);
1136 if (fb_get_options("gbefb", &options)) {
1138 goto out_release_framebuffer;
1140 gbefb_setup(options);
1143 if (!request_mem_region(GBE_BASE, sizeof(struct sgi_gbe), "GBE")) {
1144 printk(KERN_ERR "gbefb: couldn't reserve mmio region\n");
1146 goto out_release_framebuffer;
1149 gbe = (struct sgi_gbe *) devm_ioremap(&p_dev->dev, GBE_BASE,
1150 sizeof(struct sgi_gbe));
1152 printk(KERN_ERR "gbefb: couldn't map mmio region\n");
1154 goto out_release_mem_region;
1156 gbe_revision = gbe->ctrlstat & 15;
1158 gbe_tiles.cpu = dmam_alloc_coherent(&p_dev->dev,
1159 GBE_TLB_SIZE * sizeof(uint16_t),
1160 &gbe_tiles.dma, GFP_KERNEL);
1161 if (!gbe_tiles.cpu) {
1162 printk(KERN_ERR "gbefb: couldn't allocate tiles table\n");
1164 goto out_release_mem_region;
1168 /* memory was allocated at boot time */
1169 gbe_mem = devm_ioremap_wc(&p_dev->dev, gbe_mem_phys,
1172 printk(KERN_ERR "gbefb: couldn't map framebuffer\n");
1174 goto out_release_mem_region;
1179 /* try to allocate memory with the classical allocator
1180 * this has high chance to fail on low memory machines */
1181 gbe_mem = dmam_alloc_attrs(&p_dev->dev, gbe_mem_size,
1182 &gbe_dma_addr, GFP_KERNEL,
1183 DMA_ATTR_WRITE_COMBINE);
1185 printk(KERN_ERR "gbefb: couldn't allocate framebuffer memory\n");
1187 goto out_release_mem_region;
1190 gbe_mem_phys = (unsigned long) gbe_dma_addr;
1194 par->wc_cookie = arch_phys_wc_add(gbe_mem_phys, gbe_mem_size);
1196 /* map framebuffer memory into tiles table */
1197 for (i = 0; i < (gbe_mem_size >> TILE_SHIFT); i++)
1198 gbe_tiles.cpu[i] = (gbe_mem_phys >> TILE_SHIFT) + i;
1200 info->fbops = &gbefb_ops;
1201 info->pseudo_palette = pseudo_palette;
1202 info->flags = FBINFO_DEFAULT;
1203 info->screen_base = gbe_mem;
1204 fb_alloc_cmap(&info->cmap, 256, 0);
1209 /* turn on default video mode */
1210 if (fb_find_mode(&par->var, info, mode_option, NULL, 0,
1211 default_mode, 8) == 0)
1212 par->var = *default_var;
1213 info->var = par->var;
1214 gbefb_check_var(&par->var, info);
1215 gbefb_encode_fix(&info->fix, &info->var);
1217 if (register_framebuffer(info) < 0) {
1218 printk(KERN_ERR "gbefb: couldn't register framebuffer\n");
1223 platform_set_drvdata(p_dev, info);
1224 gbefb_create_sysfs(&p_dev->dev);
1226 fb_info(info, "%s rev %d @ 0x%08x using %dkB memory\n",
1227 info->fix.id, gbe_revision, (unsigned)GBE_BASE,
1228 gbe_mem_size >> 10);
1233 arch_phys_wc_del(par->wc_cookie);
1234 out_release_mem_region:
1235 release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
1236 out_release_framebuffer:
1237 framebuffer_release(info);
1242 static int gbefb_remove(struct platform_device* p_dev)
1244 struct fb_info *info = platform_get_drvdata(p_dev);
1245 struct gbefb_par *par = info->par;
1247 unregister_framebuffer(info);
1249 arch_phys_wc_del(par->wc_cookie);
1250 release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
1251 gbefb_remove_sysfs(&p_dev->dev);
1252 framebuffer_release(info);
1257 static struct platform_driver gbefb_driver = {
1258 .probe = gbefb_probe,
1259 .remove = gbefb_remove,
1265 static struct platform_device *gbefb_device;
1267 static int __init gbefb_init(void)
1269 int ret = platform_driver_register(&gbefb_driver);
1271 gbefb_device = platform_device_alloc("gbefb", 0);
1273 ret = platform_device_add(gbefb_device);
1278 platform_device_put(gbefb_device);
1279 platform_driver_unregister(&gbefb_driver);
1285 static void __exit gbefb_exit(void)
1287 platform_device_unregister(gbefb_device);
1288 platform_driver_unregister(&gbefb_driver);
1291 module_init(gbefb_init);
1292 module_exit(gbefb_exit);
1294 MODULE_LICENSE("GPL");