1 // SPDX-License-Identifier: GPL-2.0-only
3 * VFIO PCI I/O Port & MMIO access
5 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
6 * Author: Alex Williamson <alex.williamson@redhat.com>
8 * Derived from original vfio:
9 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
10 * Author: Tom Lyon, pugs@cisco.com
14 #include <linux/pci.h>
15 #include <linux/uaccess.h>
17 #include <linux/vfio.h>
18 #include <linux/vgaarb.h>
20 #include "vfio_pci_priv.h"
22 #ifdef __LITTLE_ENDIAN
23 #define vfio_ioread64 ioread64
24 #define vfio_iowrite64 iowrite64
25 #define vfio_ioread32 ioread32
26 #define vfio_iowrite32 iowrite32
27 #define vfio_ioread16 ioread16
28 #define vfio_iowrite16 iowrite16
30 #define vfio_ioread64 ioread64be
31 #define vfio_iowrite64 iowrite64be
32 #define vfio_ioread32 ioread32be
33 #define vfio_iowrite32 iowrite32be
34 #define vfio_ioread16 ioread16be
35 #define vfio_iowrite16 iowrite16be
37 #define vfio_ioread8 ioread8
38 #define vfio_iowrite8 iowrite8
40 #define VFIO_IOWRITE(size) \
41 int vfio_pci_core_iowrite##size(struct vfio_pci_core_device *vdev, \
42 bool test_mem, u##size val, void __iomem *io) \
45 down_read(&vdev->memory_lock); \
46 if (!__vfio_pci_memory_enabled(vdev)) { \
47 up_read(&vdev->memory_lock); \
52 vfio_iowrite##size(val, io); \
55 up_read(&vdev->memory_lock); \
59 EXPORT_SYMBOL_GPL(vfio_pci_core_iowrite##size);
68 #define VFIO_IOREAD(size) \
69 int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev, \
70 bool test_mem, u##size *val, void __iomem *io) \
73 down_read(&vdev->memory_lock); \
74 if (!__vfio_pci_memory_enabled(vdev)) { \
75 up_read(&vdev->memory_lock); \
80 *val = vfio_ioread##size(io); \
83 up_read(&vdev->memory_lock); \
87 EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size);
94 * Read or write from an __iomem region (MMIO or I/O port) with an excluded
95 * range which is inaccessible. The excluded range drops writes and fills
96 * reads with -1. This is intended for handling MSI-X vector tables and
97 * leftover space for ROM BARs.
99 ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
100 void __iomem *io, char __user *buf,
101 loff_t off, size_t count, size_t x_start,
102 size_t x_end, bool iswrite)
108 size_t fillable, filled;
111 fillable = min(count, (size_t)(x_start - off));
112 else if (off >= x_end)
117 if (fillable >= 4 && !(off % 4)) {
121 if (copy_from_user(&val, buf, 4))
124 ret = vfio_pci_core_iowrite32(vdev, test_mem,
129 ret = vfio_pci_core_ioread32(vdev, test_mem,
134 if (copy_to_user(buf, &val, 4))
139 } else if (fillable >= 2 && !(off % 2)) {
143 if (copy_from_user(&val, buf, 2))
146 ret = vfio_pci_core_iowrite16(vdev, test_mem,
151 ret = vfio_pci_core_ioread16(vdev, test_mem,
156 if (copy_to_user(buf, &val, 2))
161 } else if (fillable) {
165 if (copy_from_user(&val, buf, 1))
168 ret = vfio_pci_core_iowrite8(vdev, test_mem,
173 ret = vfio_pci_core_ioread8(vdev, test_mem,
178 if (copy_to_user(buf, &val, 1))
184 /* Fill reads with -1, drop writes */
185 filled = min(count, (size_t)(x_end - off));
190 for (i = 0; i < filled; i++)
191 if (copy_to_user(buf + i, &val, 1))
204 EXPORT_SYMBOL_GPL(vfio_pci_core_do_io_rw);
206 int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar)
208 struct pci_dev *pdev = vdev->pdev;
212 if (vdev->barmap[bar])
215 ret = pci_request_selected_regions(pdev, 1 << bar, "vfio");
219 io = pci_iomap(pdev, bar, 0);
221 pci_release_selected_regions(pdev, 1 << bar);
225 vdev->barmap[bar] = io;
229 EXPORT_SYMBOL_GPL(vfio_pci_core_setup_barmap);
231 ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf,
232 size_t count, loff_t *ppos, bool iswrite)
234 struct pci_dev *pdev = vdev->pdev;
235 loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
236 int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
237 size_t x_start = 0, x_end = 0;
240 struct resource *res = &vdev->pdev->resource[bar];
243 if (pci_resource_start(pdev, bar))
244 end = pci_resource_len(pdev, bar);
245 else if (bar == PCI_ROM_RESOURCE &&
246 pdev->resource[bar].flags & IORESOURCE_ROM_SHADOW)
254 count = min(count, (size_t)(end - pos));
256 if (bar == PCI_ROM_RESOURCE) {
258 * The ROM can fill less space than the BAR, so we start the
259 * excluded range at the end of the actual ROM. This makes
260 * filling large ROM BARs much faster.
262 io = pci_map_rom(pdev, &x_start);
269 int ret = vfio_pci_core_setup_barmap(vdev, bar);
275 io = vdev->barmap[bar];
278 if (bar == vdev->msix_bar) {
279 x_start = vdev->msix_offset;
280 x_end = vdev->msix_offset + vdev->msix_size;
283 done = vfio_pci_core_do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos,
284 count, x_start, x_end, iswrite);
289 if (bar == PCI_ROM_RESOURCE)
290 pci_unmap_rom(pdev, io);
295 #ifdef CONFIG_VFIO_PCI_VGA
296 ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf,
297 size_t count, loff_t *ppos, bool iswrite)
300 loff_t off, pos = *ppos & VFIO_PCI_OFFSET_MASK;
301 void __iomem *iomem = NULL;
313 case 0xa0000 ... 0xbffff:
314 count = min(count, (size_t)(0xc0000 - pos));
315 iomem = ioremap(0xa0000, 0xbffff - 0xa0000 + 1);
317 rsrc = VGA_RSRC_LEGACY_MEM;
320 case 0x3b0 ... 0x3bb:
321 count = min(count, (size_t)(0x3bc - pos));
322 iomem = ioport_map(0x3b0, 0x3bb - 0x3b0 + 1);
324 rsrc = VGA_RSRC_LEGACY_IO;
327 case 0x3c0 ... 0x3df:
328 count = min(count, (size_t)(0x3e0 - pos));
329 iomem = ioport_map(0x3c0, 0x3df - 0x3c0 + 1);
331 rsrc = VGA_RSRC_LEGACY_IO;
341 ret = vga_get_interruptible(vdev->pdev, rsrc);
343 is_ioport ? ioport_unmap(iomem) : iounmap(iomem);
348 * VGA MMIO is a legacy, non-BAR resource that hopefully allows
349 * probing, so we don't currently worry about access in relation
350 * to the memory enable bit in the command register.
352 done = vfio_pci_core_do_io_rw(vdev, false, iomem, buf, off, count,
355 vga_put(vdev->pdev, rsrc);
357 is_ioport ? ioport_unmap(iomem) : iounmap(iomem);
366 static void vfio_pci_ioeventfd_do_write(struct vfio_pci_ioeventfd *ioeventfd,
369 switch (ioeventfd->count) {
371 vfio_pci_core_iowrite8(ioeventfd->vdev, test_mem,
372 ioeventfd->data, ioeventfd->addr);
375 vfio_pci_core_iowrite16(ioeventfd->vdev, test_mem,
376 ioeventfd->data, ioeventfd->addr);
379 vfio_pci_core_iowrite32(ioeventfd->vdev, test_mem,
380 ioeventfd->data, ioeventfd->addr);
384 vfio_pci_core_iowrite64(ioeventfd->vdev, test_mem,
385 ioeventfd->data, ioeventfd->addr);
391 static int vfio_pci_ioeventfd_handler(void *opaque, void *unused)
393 struct vfio_pci_ioeventfd *ioeventfd = opaque;
394 struct vfio_pci_core_device *vdev = ioeventfd->vdev;
396 if (ioeventfd->test_mem) {
397 if (!down_read_trylock(&vdev->memory_lock))
398 return 1; /* Lock contended, use thread */
399 if (!__vfio_pci_memory_enabled(vdev)) {
400 up_read(&vdev->memory_lock);
405 vfio_pci_ioeventfd_do_write(ioeventfd, false);
407 if (ioeventfd->test_mem)
408 up_read(&vdev->memory_lock);
413 static void vfio_pci_ioeventfd_thread(void *opaque, void *unused)
415 struct vfio_pci_ioeventfd *ioeventfd = opaque;
417 vfio_pci_ioeventfd_do_write(ioeventfd, ioeventfd->test_mem);
420 int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset,
421 uint64_t data, int count, int fd)
423 struct pci_dev *pdev = vdev->pdev;
424 loff_t pos = offset & VFIO_PCI_OFFSET_MASK;
425 int ret, bar = VFIO_PCI_OFFSET_TO_INDEX(offset);
426 struct vfio_pci_ioeventfd *ioeventfd;
428 /* Only support ioeventfds into BARs */
429 if (bar > VFIO_PCI_BAR5_REGION_INDEX)
432 if (pos + count > pci_resource_len(pdev, bar))
435 /* Disallow ioeventfds working around MSI-X table writes */
436 if (bar == vdev->msix_bar &&
437 !(pos + count <= vdev->msix_offset ||
438 pos >= vdev->msix_offset + vdev->msix_size))
446 ret = vfio_pci_core_setup_barmap(vdev, bar);
450 mutex_lock(&vdev->ioeventfds_lock);
452 list_for_each_entry(ioeventfd, &vdev->ioeventfds_list, next) {
453 if (ioeventfd->pos == pos && ioeventfd->bar == bar &&
454 ioeventfd->data == data && ioeventfd->count == count) {
456 vfio_virqfd_disable(&ioeventfd->virqfd);
457 list_del(&ioeventfd->next);
458 vdev->ioeventfds_nr--;
473 if (vdev->ioeventfds_nr >= VFIO_PCI_IOEVENTFD_MAX) {
478 ioeventfd = kzalloc(sizeof(*ioeventfd), GFP_KERNEL_ACCOUNT);
484 ioeventfd->vdev = vdev;
485 ioeventfd->addr = vdev->barmap[bar] + pos;
486 ioeventfd->data = data;
487 ioeventfd->pos = pos;
488 ioeventfd->bar = bar;
489 ioeventfd->count = count;
490 ioeventfd->test_mem = vdev->pdev->resource[bar].flags & IORESOURCE_MEM;
492 ret = vfio_virqfd_enable(ioeventfd, vfio_pci_ioeventfd_handler,
493 vfio_pci_ioeventfd_thread, NULL,
494 &ioeventfd->virqfd, fd);
500 list_add(&ioeventfd->next, &vdev->ioeventfds_list);
501 vdev->ioeventfds_nr++;
504 mutex_unlock(&vdev->ioeventfds_lock);