1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2021 HiSilicon Ltd. */
4 #ifndef HISI_ACC_VFIO_PCI_H
5 #define HISI_ACC_VFIO_PCI_H
7 #include <linux/hisi_acc_qm.h>
9 #define MB_POLL_PERIOD_US 10
10 #define MB_POLL_TIMEOUT_US 1000
11 #define QM_CACHE_WB_START 0x204
12 #define QM_CACHE_WB_DONE 0x208
13 #define QM_MB_CMD_PAUSE_QM 0xe
14 #define QM_ABNORMAL_INT_STATUS 0x100008
15 #define QM_IFC_INT_STATUS 0x0028
16 #define SEC_CORE_INT_STATUS 0x301008
17 #define HPRE_HAC_INT_STATUS 0x301800
18 #define HZIP_CORE_INT_STATUS 0x3010AC
19 #define QM_QUE_ISO_CFG 0x301154
21 #define QM_VFT_CFG_RDY 0x10006c
22 #define QM_VFT_CFG_OP_WR 0x100058
23 #define QM_VFT_CFG_TYPE 0x10005c
24 #define QM_VFT_CFG 0x100060
25 #define QM_VFT_CFG_OP_ENABLE 0x100054
26 #define QM_VFT_CFG_DATA_L 0x100064
27 #define QM_VFT_CFG_DATA_H 0x100068
29 #define ERROR_CHECK_TIMEOUT 100
30 #define CHECK_DELAY_TIME 100
32 #define QM_SQC_VFT_BASE_SHIFT_V2 28
33 #define QM_SQC_VFT_BASE_MASK_V2 GENMASK(15, 0)
34 #define QM_SQC_VFT_NUM_SHIFT_V2 45
35 #define QM_SQC_VFT_NUM_MASK_V2 GENMASK(9, 0)
38 #define QM_REGS_MAX_LEN 7
39 #define QM_REG_ADDR_OFFSET 0x0004
41 #define QM_XQC_ADDR_OFFSET 32U
42 #define QM_VF_AEQ_INT_MASK 0x0004
43 #define QM_VF_EQ_INT_MASK 0x000c
44 #define QM_IFC_INT_SOURCE_V 0x0020
45 #define QM_IFC_INT_MASK 0x0024
46 #define QM_IFC_INT_SET_V 0x002c
47 #define QM_QUE_ISO_CFG_V 0x0030
48 #define QM_PAGE_SIZE 0x0034
50 #define QM_EQC_DW0 0X8000
51 #define QM_AEQC_DW0 0X8020
54 #define QM_MATCH_SIZE offsetofend(struct acc_vf_data, qm_rsv_state)
55 /* QM match information */
56 #define ACC_DEV_MAGIC 0XCDCDCDCDFEEDAACC
63 /* QM reserved match information */
74 /* QM_EQC_DW has 7 regs */
77 /* QM_AEQC_DW has 7 regs */
80 /* QM reserved 5 regs */
83 /* qm memory init information */
90 struct hisi_acc_vf_migration_file {
95 struct acc_vf_data vf_data;
99 struct hisi_acc_vf_core_device {
100 struct vfio_pci_core_device core_device;
102 /* for migration state */
103 struct mutex state_mutex;
104 enum vfio_device_mig_state mig_state;
105 struct pci_dev *pf_dev;
106 struct pci_dev *vf_dev;
107 struct hisi_qm *pf_qm;
108 struct hisi_qm vf_qm;
111 /* for reset handler */
112 spinlock_t reset_lock;
113 struct hisi_acc_vf_migration_file *resuming_migf;
114 struct hisi_acc_vf_migration_file *saving_migf;
116 #endif /* HISI_ACC_VFIO_PCI_H */