1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2017 Google, Inc
5 * USB Type-C Port Controller Interface.
8 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/property.h>
14 #include <linux/regmap.h>
15 #include <linux/usb/pd.h>
16 #include <linux/usb/tcpci.h>
17 #include <linux/usb/tcpm.h>
18 #include <linux/usb/typec.h>
20 #define PD_RETRY_COUNT_DEFAULT 3
21 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2
22 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500
23 #define VSINKPD_MIN_IR_DROP_MV 750
24 #define VSRC_NEW_MIN_PERCENT 95
25 #define VSRC_VALID_MIN_MV 500
26 #define VPPS_NEW_MIN_PERCENT 95
27 #define VPPS_VALID_MIN_MV 100
28 #define VSINKDISCONNECT_PD_MIN_PERCENT 90
33 struct tcpm_port *port;
35 struct regmap *regmap;
36 unsigned int alert_mask;
41 struct tcpci_data *data;
46 struct tcpci_data data;
49 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci)
53 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port);
55 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
57 return container_of(tcpc, struct tcpci, tcpc);
60 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
62 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
65 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
67 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
70 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
72 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
74 enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1;
78 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
82 vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES);
84 ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, ®);
88 if (reg & TCPC_TCPC_CTRL_ORIENTATION)
89 polarity = TYPEC_POLARITY_CC2;
94 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
95 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
98 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
99 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
101 case TYPEC_CC_RP_DEF:
102 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
103 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
104 (TCPC_ROLE_CTRL_RP_VAL_DEF <<
105 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
107 case TYPEC_CC_RP_1_5:
108 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
109 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
110 (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
111 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
113 case TYPEC_CC_RP_3_0:
114 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
115 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
116 (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
117 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
121 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
122 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
127 if (polarity == TYPEC_POLARITY_CC2) {
128 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
129 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT);
131 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
132 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
136 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
143 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc,
144 enum typec_cc_polarity polarity)
146 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
150 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
155 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on
156 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2.
158 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >>
159 TCPC_ROLE_CTRL_CC2_SHIFT) !=
160 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >>
161 TCPC_ROLE_CTRL_CC1_SHIFT))
164 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ?
165 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT :
166 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT,
167 TCPC_ROLE_CTRL_CC_OPEN);
170 static int tcpci_start_toggling(struct tcpc_dev *tcpc,
171 enum typec_port_type port_type,
172 enum typec_cc_status cc)
175 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
176 unsigned int reg = TCPC_ROLE_CTRL_DRP;
178 if (port_type != TYPEC_PORT_DRP)
181 /* Handle vendor drp toggling */
182 if (tcpci->data->start_drp_toggling) {
183 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
190 case TYPEC_CC_RP_DEF:
191 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
192 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
194 case TYPEC_CC_RP_1_5:
195 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
196 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
198 case TYPEC_CC_RP_3_0:
199 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
200 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
204 if (cc == TYPEC_CC_RD)
205 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
206 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
208 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
209 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
210 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
213 return regmap_write(tcpci->regmap, TCPC_COMMAND,
214 TCPC_CMD_LOOK4CONNECTION);
217 static int tcpci_get_cc(struct tcpc_dev *tcpc,
218 enum typec_cc_status *cc1, enum typec_cc_status *cc2)
220 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
221 unsigned int reg, role_control;
224 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control);
228 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®);
232 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
233 TCPC_CC_STATUS_CC1_MASK,
234 reg & TCPC_CC_STATUS_TERM ||
235 tcpc_presenting_rd(role_control, CC1));
236 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
237 TCPC_CC_STATUS_CC2_MASK,
238 reg & TCPC_CC_STATUS_TERM ||
239 tcpc_presenting_rd(role_control, CC2));
244 static int tcpci_set_polarity(struct tcpc_dev *tcpc,
245 enum typec_cc_polarity polarity)
247 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
250 enum typec_cc_status cc1, cc2;
252 /* Obtain Rp setting from role control */
253 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
257 ret = tcpci_get_cc(tcpc, &cc1, &cc2);
262 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial
263 * terminations for the toggling and does not indicate the final cc
264 * terminations when ConnectionResult is 0 i.e. drp toggling stops and
265 * the connection is resolved. Infer port role from TCPC_CC_STATUS based on the
266 * terminations seen. The port role is then used to set the cc terminations.
268 if (reg & TCPC_ROLE_CTRL_DRP) {
269 /* Disable DRP for the OPEN setting to take effect */
270 reg = reg & ~TCPC_ROLE_CTRL_DRP;
272 if (polarity == TYPEC_POLARITY_CC2) {
273 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
274 /* Local port is source */
275 if (cc2 == TYPEC_CC_RD)
276 /* Role control would have the Rp setting when DRP was enabled */
277 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
279 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
281 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
282 /* Local port is source */
283 if (cc1 == TYPEC_CC_RD)
284 /* Role control would have the Rp setting when DRP was enabled */
285 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
287 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
291 if (polarity == TYPEC_POLARITY_CC2)
292 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
294 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
295 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
299 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
300 (polarity == TYPEC_POLARITY_CC2) ?
301 TCPC_TCPC_CTRL_ORIENTATION : 0);
304 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable)
306 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
308 if (tcpci->data->set_partner_usb_comm_capable)
309 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable);
312 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
314 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
317 /* Handle vendor set vconn */
318 if (tcpci->data->set_vconn) {
319 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
324 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL,
325 TCPC_POWER_CTRL_VCONN_ENABLE,
326 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
329 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable)
331 struct tcpci *tcpci = tcpc_to_tcpci(dev);
334 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE,
335 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0);
339 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
340 bool pps_active, u32 requested_vbus_voltage_mv)
342 struct tcpci *tcpci = tcpc_to_tcpci(dev);
343 unsigned int pwr_ctrl, threshold = 0;
347 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc.
348 * Do not discharge vbus here.
350 if (requested_vbus_voltage_mv == 0)
353 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl);
357 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) {
358 /* To prevent disconnect when the source is fast role swap is capable. */
359 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
360 } else if (mode == TYPEC_PWR_MODE_PD) {
362 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
363 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) *
364 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
366 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
367 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) *
368 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
370 /* 3.5V for non-pd sink */
371 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
374 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV;
376 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX)
380 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold);
383 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable)
385 struct tcpci *tcpci = tcpc_to_tcpci(dev);
388 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */
389 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c);
393 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ?
394 TCPC_FAST_ROLE_SWAP_EN : 0);
399 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev)
401 struct tcpci *tcpci = tcpc_to_tcpci(dev);
403 if (tcpci->data->frs_sourcing_vbus)
404 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data);
407 static void tcpci_check_contaminant(struct tcpc_dev *dev)
409 struct tcpci *tcpci = tcpc_to_tcpci(dev);
411 if (tcpci->data->check_contaminant)
412 tcpci->data->check_contaminant(tcpci, tcpci->data);
415 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable)
417 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
419 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM,
420 enable ? TCPC_TCPC_CTRL_BIST_TM : 0);
423 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
424 enum typec_role role, enum typec_data_role data)
426 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
430 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
431 if (role == TYPEC_SOURCE)
432 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
433 if (data == TYPEC_HOST)
434 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
435 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
442 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
444 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
445 unsigned int reg = 0;
449 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
450 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
457 static int tcpci_get_vbus(struct tcpc_dev *tcpc)
459 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
463 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
467 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
470 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc)
472 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
476 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®);
480 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V);
483 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
485 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
488 if (tcpci->data->set_vbus) {
489 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink);
490 /* Bypass when ret > 0 */
492 return ret < 0 ? ret : 0;
495 /* Disable both source and sink first before enabling anything */
498 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
499 TCPC_CMD_DISABLE_SRC_VBUS);
505 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
506 TCPC_CMD_DISABLE_SINK_VBUS);
512 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
513 TCPC_CMD_SRC_VBUS_DEFAULT);
519 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
528 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type,
529 const struct pd_message *msg, unsigned int negotiated_rev)
531 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
532 u16 header = msg ? le16_to_cpu(msg->header) : 0;
533 unsigned int reg, cnt;
536 cnt = msg ? pd_header_cnt(header) * 4 : 0;
538 * TCPCI spec forbids direct access of TCPC_TX_DATA.
539 * But, since some of the chipsets offer this capability,
540 * it's fair to support both.
542 if (tcpci->data->TX_BUF_BYTE_x_hidden) {
543 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,};
546 /* Payload + header + TCPC_TX_BYTE_CNT */
547 buf[pos++] = cnt + 2;
550 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
552 pos += sizeof(header);
555 memcpy(&buf[pos], msg->payload, cnt);
558 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos);
562 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
566 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
571 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt);
577 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */
578 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT)
579 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT);
580 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
587 static int tcpci_init(struct tcpc_dev *tcpc)
589 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
590 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
594 while (time_before_eq(jiffies, timeout)) {
595 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
598 if (!(reg & TCPC_POWER_STATUS_UNINIT))
600 usleep_range(10000, 20000);
602 if (time_after(jiffies, timeout))
605 ret = tcpci_write16(tcpci, TCPC_FAULT_STATUS, TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT);
609 /* Handle vendor init */
610 if (tcpci->data->init) {
611 ret = tcpci->data->init(tcpci, tcpci->data);
616 /* Clear all events */
617 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
621 if (tcpci->controls_vbus)
622 reg = TCPC_POWER_STATUS_VBUS_PRES;
625 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
629 /* Enable Vbus detection */
630 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
631 TCPC_CMD_ENABLE_VBUS_DETECT);
635 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
636 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
637 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
638 if (tcpci->controls_vbus)
639 reg |= TCPC_ALERT_POWER_STATUS;
640 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */
641 if (tcpci->data->vbus_vsafe0v) {
642 reg |= TCPC_ALERT_EXTENDED_STATUS;
643 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK,
644 TCPC_EXTENDED_STATUS_VSAFE0V);
649 tcpci->alert_mask = reg;
651 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
654 irqreturn_t tcpci_irq(struct tcpci *tcpci)
660 tcpci_read16(tcpci, TCPC_ALERT, &status);
663 * Clear alert status for everything except RX_STATUS, which shouldn't
664 * be cleared until we have successfully retrieved message.
666 if (status & ~TCPC_ALERT_RX_STATUS)
667 tcpci_write16(tcpci, TCPC_ALERT,
668 status & ~TCPC_ALERT_RX_STATUS);
670 if (status & TCPC_ALERT_CC_STATUS)
671 tcpm_cc_change(tcpci->port);
673 if (status & TCPC_ALERT_POWER_STATUS) {
674 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw);
676 * If power status mask has been reset, then the TCPC
680 tcpm_tcpc_reset(tcpci->port);
682 tcpm_vbus_change(tcpci->port);
685 if (status & TCPC_ALERT_RX_STATUS) {
686 struct pd_message msg;
687 unsigned int cnt, payload_cnt;
690 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
692 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
693 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
694 * defined in table 4-36 as one greater than the number of
695 * bytes received. And that number includes the header. So:
698 payload_cnt = cnt - (1 + sizeof(msg.header));
702 tcpci_read16(tcpci, TCPC_RX_HDR, &header);
703 msg.header = cpu_to_le16(header);
705 if (WARN_ON(payload_cnt > sizeof(msg.payload)))
706 payload_cnt = sizeof(msg.payload);
709 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
710 &msg.payload, payload_cnt);
712 /* Read complete, clear RX status alert bit */
713 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
715 tcpm_pd_receive(tcpci->port, &msg);
718 if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) {
719 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw);
720 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V))
721 tcpm_vbus_change(tcpci->port);
724 if (status & TCPC_ALERT_RX_HARD_RST)
725 tcpm_pd_hard_reset(tcpci->port);
727 if (status & TCPC_ALERT_TX_SUCCESS)
728 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
729 else if (status & TCPC_ALERT_TX_DISCARDED)
730 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
731 else if (status & TCPC_ALERT_TX_FAILED)
732 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
734 return IRQ_RETVAL(status & tcpci->alert_mask);
736 EXPORT_SYMBOL_GPL(tcpci_irq);
738 static irqreturn_t _tcpci_irq(int irq, void *dev_id)
740 struct tcpci_chip *chip = dev_id;
742 return tcpci_irq(chip->tcpci);
745 static const struct regmap_config tcpci_regmap_config = {
749 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
752 static int tcpci_parse_config(struct tcpci *tcpci)
754 tcpci->controls_vbus = true; /* XXX */
756 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev,
758 if (!tcpci->tcpc.fwnode) {
759 dev_err(tcpci->dev, "Can't find connector node.\n");
766 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data)
771 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
773 return ERR_PTR(-ENOMEM);
777 tcpci->regmap = data->regmap;
779 tcpci->tcpc.init = tcpci_init;
780 tcpci->tcpc.get_vbus = tcpci_get_vbus;
781 tcpci->tcpc.set_vbus = tcpci_set_vbus;
782 tcpci->tcpc.set_cc = tcpci_set_cc;
783 tcpci->tcpc.apply_rc = tcpci_apply_rc;
784 tcpci->tcpc.get_cc = tcpci_get_cc;
785 tcpci->tcpc.set_polarity = tcpci_set_polarity;
786 tcpci->tcpc.set_vconn = tcpci_set_vconn;
787 tcpci->tcpc.start_toggling = tcpci_start_toggling;
789 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
790 tcpci->tcpc.set_roles = tcpci_set_roles;
791 tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
792 tcpci->tcpc.set_bist_data = tcpci_set_bist_data;
793 tcpci->tcpc.enable_frs = tcpci_enable_frs;
794 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus;
795 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable;
797 if (tcpci->data->check_contaminant)
798 tcpci->tcpc.check_contaminant = tcpci_check_contaminant;
800 if (tcpci->data->auto_discharge_disconnect) {
801 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge;
802 tcpci->tcpc.set_auto_vbus_discharge_threshold =
803 tcpci_set_auto_vbus_discharge_threshold;
804 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE,
805 TCPC_POWER_CTRL_BLEED_DISCHARGE);
808 if (tcpci->data->vbus_vsafe0v)
809 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v;
811 err = tcpci_parse_config(tcpci);
815 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
816 if (IS_ERR(tcpci->port)) {
817 fwnode_handle_put(tcpci->tcpc.fwnode);
818 return ERR_CAST(tcpci->port);
823 EXPORT_SYMBOL_GPL(tcpci_register_port);
825 void tcpci_unregister_port(struct tcpci *tcpci)
827 tcpm_unregister_port(tcpci->port);
828 fwnode_handle_put(tcpci->tcpc.fwnode);
830 EXPORT_SYMBOL_GPL(tcpci_unregister_port);
832 static int tcpci_probe(struct i2c_client *client)
834 struct tcpci_chip *chip;
838 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
842 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
843 if (IS_ERR(chip->data.regmap))
844 return PTR_ERR(chip->data.regmap);
846 i2c_set_clientdata(client, chip);
848 /* Disable chip interrupts before requesting irq */
849 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val,
854 chip->tcpci = tcpci_register_port(&client->dev, &chip->data);
855 if (IS_ERR(chip->tcpci))
856 return PTR_ERR(chip->tcpci);
858 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
860 IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
861 dev_name(&client->dev), chip);
863 tcpci_unregister_port(chip->tcpci);
870 static void tcpci_remove(struct i2c_client *client)
872 struct tcpci_chip *chip = i2c_get_clientdata(client);
875 /* Disable chip interrupts before unregistering port */
876 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
878 dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err));
880 tcpci_unregister_port(chip->tcpci);
883 static const struct i2c_device_id tcpci_id[] = {
887 MODULE_DEVICE_TABLE(i2c, tcpci_id);
890 static const struct of_device_id tcpci_of_match[] = {
891 { .compatible = "nxp,ptn5110", },
892 { .compatible = "tcpci", },
895 MODULE_DEVICE_TABLE(of, tcpci_of_match);
898 static struct i2c_driver tcpci_i2c_driver = {
901 .of_match_table = of_match_ptr(tcpci_of_match),
903 .probe = tcpci_probe,
904 .remove = tcpci_remove,
905 .id_table = tcpci_id,
907 module_i2c_driver(tcpci_i2c_driver);
909 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
910 MODULE_LICENSE("GPL");