1 // SPDX-License-Identifier: GPL-2.0+
3 * F81532/F81534 USB to Serial Ports Bridge
5 * F81532 => 2 Serial Ports
6 * F81534 => 4 Serial Ports
8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14 * (Read Data/MSR/LSR).
16 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17 * It can be described by f81534_prepare_write_buffer()
19 * Read URB is 512Bytes max, per serial port used 128Bytes.
20 * It can be described by f81534_process_read_urb() and maybe received with
24 #include <linux/slab.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
27 #include <linux/usb.h>
28 #include <linux/usb/serial.h>
29 #include <linux/serial_reg.h>
30 #include <linux/module.h>
31 #include <linux/uaccess.h>
33 /* Serial Port register Address */
34 #define F81534_UART_BASE_ADDRESS 0x1200
35 #define F81534_UART_OFFSET 0x10
36 #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
37 #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
38 #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
39 #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
40 #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
41 #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
42 #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
43 #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
44 #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
45 #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
47 #define F81534_DEF_CONF_ADDRESS_START 0x3000
48 #define F81534_DEF_CONF_SIZE 12
50 #define F81534_CUSTOM_ADDRESS_START 0x2f00
51 #define F81534_CUSTOM_DATA_SIZE 0x10
52 #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
53 #define F81534_CUSTOM_VALID_TOKEN 0xf0
54 #define F81534_CONF_OFFSET 1
55 #define F81534_CONF_INIT_GPIO_OFFSET 4
56 #define F81534_CONF_WORK_GPIO_OFFSET 8
57 #define F81534_CONF_GPIO_SHUTDOWN 7
58 #define F81534_CONF_GPIO_RS232 1
60 #define F81534_MAX_DATA_BLOCK 64
61 #define F81534_MAX_BUS_RETRY 20
63 /* Default URB timeout for USB operations */
64 #define F81534_USB_MAX_RETRY 10
65 #define F81534_USB_TIMEOUT 2000
66 #define F81534_SET_GET_REGISTER 0xA0
68 #define F81534_NUM_PORT 4
69 #define F81534_UNUSED_PORT 0xff
70 #define F81534_WRITE_BUFFER_SIZE 512
72 #define DRIVER_DESC "Fintek F81532/F81534"
73 #define FINTEK_VENDOR_ID_1 0x1934
74 #define FINTEK_VENDOR_ID_2 0x2C42
75 #define FINTEK_DEVICE_ID 0x1202
76 #define F81534_MAX_TX_SIZE 124
77 #define F81534_MAX_RX_SIZE 124
78 #define F81534_RECEIVE_BLOCK_SIZE 128
79 #define F81534_MAX_RECEIVE_BLOCK_SIZE 512
81 #define F81534_TOKEN_RECEIVE 0x01
82 #define F81534_TOKEN_WRITE 0x02
83 #define F81534_TOKEN_TX_EMPTY 0x03
84 #define F81534_TOKEN_MSR_CHANGE 0x04
87 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
88 * idle if we performed any command.
90 * SPI Bus status register: F81534_BUS_REG_STATUS
94 #define F81534_BUS_BUSY (BIT(0) | BIT(1))
95 #define F81534_BUS_IDLE BIT(2)
96 #define F81534_BUS_READ_DATA 0x1004
97 #define F81534_BUS_REG_STATUS 0x1003
98 #define F81534_BUS_REG_START 0x1002
99 #define F81534_BUS_REG_END 0x1001
101 #define F81534_CMD_READ 0x03
103 #define F81534_DEFAULT_BAUD_RATE 9600
105 #define F81534_PORT_CONF_RS232 0
106 #define F81534_PORT_CONF_RS485 BIT(0)
107 #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
108 #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
109 #define F81534_PORT_CONF_DISABLE_PORT BIT(3)
110 #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
111 #define F81534_PORT_UNAVAILABLE \
112 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
115 #define F81534_1X_RXTRIGGER 0xc3
116 #define F81534_8X_RXTRIGGER 0xcf
119 * F81532/534 Clock registers (offset +08h)
121 * Bit0: UART Enable (always on)
122 * Bit2-1: Clock source selector
127 * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
128 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
131 #define F81534_UART_EN BIT(0)
132 #define F81534_CLK_1_846_MHZ 0
133 #define F81534_CLK_18_46_MHZ BIT(1)
134 #define F81534_CLK_24_MHZ BIT(2)
135 #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
136 #define F81534_CLK_MASK GENMASK(2, 1)
137 #define F81534_CLK_TX_DELAY_1BIT BIT(3)
138 #define F81534_CLK_RS485_MODE BIT(4)
139 #define F81534_CLK_RS485_INVERT BIT(5)
141 static const struct usb_device_id f81534_id_table[] = {
142 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
143 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
144 {} /* Terminating entry */
147 #define F81534_TX_EMPTY_BIT 0
149 struct f81534_serial_private {
150 u8 conf_data[F81534_DEF_CONF_SIZE];
151 int tty_idx[F81534_NUM_PORT];
154 struct mutex urb_mutex;
157 struct f81534_port_private {
158 struct mutex mcr_mutex;
159 struct mutex lcr_mutex;
160 struct work_struct lsr_work;
161 struct usb_serial_port *port;
162 unsigned long tx_empty;
172 struct f81534_pin_data {
177 struct f81534_port_out_pin {
178 struct f81534_pin_data pin[3];
181 /* Pin output value for M2/M1/M0(SD) */
182 static const struct f81534_port_out_pin f81534_port_out_pins[] = {
183 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
184 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
185 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
186 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
189 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
191 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
193 static int f81534_logic_to_phy_port(struct usb_serial *serial,
194 struct usb_serial_port *port)
196 struct f81534_serial_private *serial_priv =
197 usb_get_serial_data(port->serial);
201 for (i = 0; i < F81534_NUM_PORT; ++i) {
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
205 if (port->port_number == count)
214 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
216 struct usb_interface *interface = serial->interface;
217 struct usb_device *dev = serial->dev;
218 size_t count = F81534_USB_MAX_RETRY;
222 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
229 * Our device maybe not reply when heavily loading, We'll retry for
230 * F81534_USB_MAX_RETRY times.
233 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
234 F81534_SET_GET_REGISTER,
235 USB_TYPE_VENDOR | USB_DIR_OUT,
236 reg, 0, tmp, sizeof(u8),
241 } else if (status == 0) {
247 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
248 __func__, reg, data, status);
255 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
257 struct usb_interface *interface = serial->interface;
258 struct usb_device *dev = serial->dev;
259 size_t count = F81534_USB_MAX_RETRY;
263 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
268 * Our device maybe not reply when heavily loading, We'll retry for
269 * F81534_USB_MAX_RETRY times.
272 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
273 F81534_SET_GET_REGISTER,
274 USB_TYPE_VENDOR | USB_DIR_IN,
275 reg, 0, tmp, sizeof(u8),
280 } else if (status == 0) {
286 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
298 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
304 status = f81534_get_register(serial, reg, &tmp);
309 tmp |= (mask & data);
311 return f81534_set_register(serial, reg, tmp);
314 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
317 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
321 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
324 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
328 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
331 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
333 return f81534_set_register(port->serial,
334 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
337 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
340 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
342 return f81534_get_register(port->serial,
343 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
347 * If we try to access the internal flash via SPI bus, we should check the bus
348 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
350 static int f81534_wait_for_spi_idle(struct usb_serial *serial)
352 size_t count = F81534_MAX_BUS_RETRY;
357 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
362 if (tmp & F81534_BUS_BUSY)
365 if (tmp & F81534_BUS_IDLE)
371 dev_err(&serial->interface->dev,
372 "%s: timed out waiting for idle SPI bus\n",
377 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
378 tmp & ~F81534_BUS_IDLE);
381 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
386 status = f81534_get_register(serial, reg, data);
390 return f81534_wait_for_spi_idle(serial);
393 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
397 status = f81534_set_register(serial, reg, data);
401 return f81534_wait_for_spi_idle(serial);
404 static int f81534_read_flash(struct usb_serial *serial, u32 address,
405 size_t size, u8 *buf)
407 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
415 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
420 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
421 (address >> 16) & 0xff);
425 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
426 (address >> 8) & 0xff);
430 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
431 (address >> 0) & 0xff);
435 /* Continuous read mode */
437 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
439 for (count = 0; count < read_size; ++count) {
440 /* To write F81534_BUS_REG_END when final byte */
441 if (size <= F81534_MAX_DATA_BLOCK &&
442 read_size == count + 1)
443 reg_tmp = F81534_BUS_REG_END;
445 reg_tmp = F81534_BUS_REG_START;
448 * Dummy code, force IC to generate a read pulse, the
449 * set of value 0xf1 is dont care (any value is ok)
451 status = f81534_set_spi_register(serial, reg_tmp,
456 status = f81534_get_spi_register(serial,
457 F81534_BUS_READ_DATA,
462 offset = count + block * F81534_MAX_DATA_BLOCK;
463 buf[offset] = tmp_buf[count];
473 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
475 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
476 int phy_num = port_priv->phy_num;
481 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
482 * index 0: port phy idx (e.g., 0,1,2,3)
483 * index 1: only F81534_TOKEN_WRITE
484 * index 2: serial TX out length
486 * index 4~127: serial out data block
488 for (i = 0; i < F81534_NUM_PORT; ++i) {
489 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
490 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
491 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
492 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
495 tx_len = kfifo_out_locked(&port->write_fifo,
496 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
497 F81534_MAX_TX_SIZE, &port->lock);
499 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
502 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
504 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
509 /* Check is any data in write_fifo */
510 spin_lock_irqsave(&port->lock, flags);
512 if (kfifo_is_empty(&port->write_fifo)) {
513 spin_unlock_irqrestore(&port->lock, flags);
517 spin_unlock_irqrestore(&port->lock, flags);
519 /* Check H/W is TXEMPTY */
520 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
523 urb = port->write_urbs[0];
524 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
525 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
527 result = usb_submit_urb(urb, mem_flags);
529 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
530 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
535 usb_serial_port_softint(port);
539 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
541 /* Round to nearest divisor */
542 return DIV_ROUND_CLOSEST(clockrate, baudrate);
545 static int f81534_find_clk(u32 baudrate)
549 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
550 if (baudrate <= baudrate_table[idx] &&
551 baudrate_table[idx] % baudrate == 0)
558 static int f81534_set_port_config(struct usb_serial_port *port,
559 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
561 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
567 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
569 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
570 baudrate = baud_list[i];
572 tty_encode_baud_rate(tty, 0, 0);
576 idx = f81534_find_clk(baudrate);
578 tty_encode_baud_rate(tty, baudrate, baudrate);
586 port_priv->baud_base = baudrate_table[idx];
587 port_priv->shadow_clk &= ~F81534_CLK_MASK;
588 port_priv->shadow_clk |= clock_table[idx];
590 status = f81534_set_port_register(port, F81534_CLOCK_REG,
591 port_priv->shadow_clk);
593 dev_err(&port->dev, "CLOCK_REG setting failed\n");
597 if (baudrate <= 1200)
598 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
600 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
602 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
604 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
608 if (baudrate <= 1200)
609 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
611 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
613 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
616 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
620 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
622 mutex_lock(&port_priv->lcr_mutex);
624 value = UART_LCR_DLAB;
625 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
628 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
632 value = divisor & 0xff;
633 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
635 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
639 value = (divisor >> 8) & 0xff;
640 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
642 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
646 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
647 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
650 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
654 port_priv->shadow_lcr = value;
656 mutex_unlock(&port_priv->lcr_mutex);
661 static void f81534_break_ctl(struct tty_struct *tty, int break_state)
663 struct usb_serial_port *port = tty->driver_data;
664 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
667 mutex_lock(&port_priv->lcr_mutex);
670 port_priv->shadow_lcr |= UART_LCR_SBC;
672 port_priv->shadow_lcr &= ~UART_LCR_SBC;
674 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
675 port_priv->shadow_lcr);
677 dev_err(&port->dev, "set break failed: %d\n", status);
679 mutex_unlock(&port_priv->lcr_mutex);
682 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
685 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
689 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
690 return 0; /* no change */
692 mutex_lock(&port_priv->mcr_mutex);
694 /* 'Set' takes precedence over 'Clear' */
697 /* Always enable UART_MCR_OUT2 */
698 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
700 if (clear & TIOCM_DTR)
701 tmp &= ~UART_MCR_DTR;
703 if (clear & TIOCM_RTS)
704 tmp &= ~UART_MCR_RTS;
712 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
714 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
715 mutex_unlock(&port_priv->mcr_mutex);
719 port_priv->shadow_mcr = tmp;
720 mutex_unlock(&port_priv->mcr_mutex);
725 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
726 * for latest configuration index. If nothing found
727 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
728 * F81534_DEF_CONF_ADDRESS_START section.
730 * Due to we only use block0 to save data, so *index should be 0 or
731 * F81534_CUSTOM_NO_CUSTOM_DATA.
733 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
738 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
741 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
746 /* We'll use the custom data when the data is valid. */
747 if (tmp == F81534_CUSTOM_VALID_TOKEN)
750 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
756 * The F81532/534 will not report serial port to USB serial subsystem when
757 * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
759 * To detect RX pin status, we'll enable MCR interal loopback, disable it and
760 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
762 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
770 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
772 status = f81534_get_phy_port_register(serial, phy,
773 F81534_MODEM_STATUS_REG, &msr);
777 if ((msr & msr_mask) != msr_mask)
780 status = f81534_set_phy_port_register(serial, phy,
781 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
782 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
786 status = f81534_get_phy_port_register(serial, phy,
787 F81534_MODEM_CONTROL_REG, &old_mcr);
791 status = f81534_set_phy_port_register(serial, phy,
792 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
796 status = f81534_set_phy_port_register(serial, phy,
797 F81534_MODEM_CONTROL_REG, 0x0);
803 status = f81534_get_phy_port_register(serial, phy,
804 F81534_LINE_STATUS_REG, &lsr);
808 status = f81534_set_phy_port_register(serial, phy,
809 F81534_MODEM_CONTROL_REG, old_mcr);
813 if ((lsr & UART_LSR_BI) == UART_LSR_BI)
820 * We had 2 generation of F81532/534 IC. All has an internal storage.
822 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
823 * internal data will used. All mode and gpio control should manually set
824 * by AP or Driver and all storage space value are 0xff. The
825 * f81534_calc_num_ports() will run to final we marked as "oldest version"
828 * 2rd is designed to more generic to use any transceiver and this is our
829 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
830 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
831 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
832 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
833 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
834 * The f81534_calc_num_ports() will run to "new style" with checking
835 * F81534_PORT_UNAVAILABLE section.
837 static int f81534_calc_num_ports(struct usb_serial *serial,
838 struct usb_serial_endpoints *epds)
840 struct f81534_serial_private *serial_priv;
841 struct device *dev = &serial->interface->dev;
842 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
843 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
849 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
850 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
851 dev_err(dev, "unsupported endpoint max packet size\n");
855 serial_priv = devm_kzalloc(&serial->interface->dev,
856 sizeof(*serial_priv), GFP_KERNEL);
860 usb_set_serial_data(serial, serial_priv);
861 mutex_init(&serial_priv->urb_mutex);
863 /* Check had custom setting */
864 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
866 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
872 * We'll read custom data only when data available, otherwise we'll
873 * read default value instead.
875 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
876 status = f81534_read_flash(serial,
877 F81534_CUSTOM_ADDRESS_START +
879 sizeof(serial_priv->conf_data),
880 serial_priv->conf_data);
882 dev_err(&serial->interface->dev,
883 "%s: get custom data failed: %d\n",
888 dev_dbg(&serial->interface->dev,
889 "%s: read config from block: %d\n", __func__,
890 serial_priv->setting_idx);
892 /* Read default board setting */
893 status = f81534_read_flash(serial,
894 F81534_DEF_CONF_ADDRESS_START,
895 sizeof(serial_priv->conf_data),
896 serial_priv->conf_data);
898 dev_err(&serial->interface->dev,
899 "%s: read failed: %d\n", __func__,
904 dev_dbg(&serial->interface->dev, "%s: read default config\n",
908 /* New style, find all possible ports */
909 for (i = 0; i < F81534_NUM_PORT; ++i) {
910 if (f81534_check_port_hw_disabled(serial, i))
911 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
913 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
920 dev_warn(&serial->interface->dev,
921 "no config found, assuming 4 ports\n");
922 num_port = 4; /* Nothing found, oldest version IC */
925 /* Assign phy-to-logic mapping */
926 for (i = 0; i < F81534_NUM_PORT; ++i) {
927 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
930 serial_priv->tty_idx[i] = index++;
931 dev_dbg(&serial->interface->dev,
932 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
933 serial_priv->tty_idx[i]);
937 * Setup bulk-out endpoint multiplexing. All ports share the same
940 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
942 for (i = 1; i < num_port; ++i)
943 epds->bulk_out[i] = epds->bulk_out[0];
945 epds->num_bulk_out = num_port;
950 static void f81534_set_termios(struct tty_struct *tty,
951 struct usb_serial_port *port,
952 struct ktermios *old_termios)
959 if (C_BAUD(tty) == B0)
960 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
961 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
962 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
965 new_lcr |= UART_LCR_PARITY;
968 new_lcr |= UART_LCR_EPAR;
971 new_lcr |= UART_LCR_SPAR;
975 new_lcr |= UART_LCR_STOP;
977 switch (C_CSIZE(tty)) {
979 new_lcr |= UART_LCR_WLEN5;
982 new_lcr |= UART_LCR_WLEN6;
985 new_lcr |= UART_LCR_WLEN7;
989 new_lcr |= UART_LCR_WLEN8;
993 baud = tty_get_baud_rate(tty);
998 old_baud = tty_termios_baud_rate(old_termios);
1000 old_baud = F81534_DEFAULT_BAUD_RATE;
1002 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
1004 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
1006 dev_err(&port->dev, "%s: set port config failed: %d\n",
1011 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
1013 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1016 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1018 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1019 struct tty_struct *tty;
1020 unsigned long flags;
1023 if (!(msr & UART_MSR_ANY_DELTA))
1026 spin_lock_irqsave(&port_priv->msr_lock, flags);
1027 old_msr = port_priv->shadow_msr;
1028 port_priv->shadow_msr = msr;
1029 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1031 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1034 /* Update input line counters */
1035 if (msr & UART_MSR_DCTS)
1037 if (msr & UART_MSR_DDSR)
1039 if (msr & UART_MSR_DDCD)
1041 if (msr & UART_MSR_TERI)
1044 wake_up_interruptible(&port->port.delta_msr_wait);
1046 if (!(msr & UART_MSR_DDCD))
1049 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1050 __func__, port_priv->phy_num, old_msr, msr);
1052 tty = tty_port_tty_get(&port->port);
1056 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1060 static int f81534_read_msr(struct usb_serial_port *port)
1062 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1063 unsigned long flags;
1067 /* Get MSR initial value */
1068 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1072 /* Force update current state */
1073 spin_lock_irqsave(&port_priv->msr_lock, flags);
1074 port_priv->shadow_msr = msr;
1075 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1080 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1082 struct f81534_serial_private *serial_priv =
1083 usb_get_serial_data(port->serial);
1084 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1087 status = f81534_set_port_register(port,
1088 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1089 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1091 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1097 f81534_set_termios(tty, port, NULL);
1099 status = f81534_read_msr(port);
1103 mutex_lock(&serial_priv->urb_mutex);
1105 /* Submit Read URBs for first port opened */
1106 if (!serial_priv->opened_port) {
1107 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1112 serial_priv->opened_port++;
1115 mutex_unlock(&serial_priv->urb_mutex);
1117 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1121 static void f81534_close(struct usb_serial_port *port)
1123 struct f81534_serial_private *serial_priv =
1124 usb_get_serial_data(port->serial);
1125 struct usb_serial_port *port0 = port->serial->port[0];
1126 unsigned long flags;
1129 usb_kill_urb(port->write_urbs[0]);
1131 spin_lock_irqsave(&port->lock, flags);
1132 kfifo_reset_out(&port->write_fifo);
1133 spin_unlock_irqrestore(&port->lock, flags);
1135 /* Kill Read URBs when final port closed */
1136 mutex_lock(&serial_priv->urb_mutex);
1137 serial_priv->opened_port--;
1139 if (!serial_priv->opened_port) {
1140 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1141 usb_kill_urb(port0->read_urbs[i]);
1144 mutex_unlock(&serial_priv->urb_mutex);
1147 static int f81534_get_serial_info(struct tty_struct *tty,
1148 struct serial_struct *ss)
1150 struct usb_serial_port *port = tty->driver_data;
1151 struct f81534_port_private *port_priv;
1153 port_priv = usb_get_serial_port_data(port);
1155 ss->type = PORT_16550A;
1156 ss->port = port->port_number;
1157 ss->line = port->minor;
1158 ss->baud_base = port_priv->baud_base;
1162 static void f81534_process_per_serial_block(struct usb_serial_port *port,
1165 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1166 int phy_num = data[0];
1167 size_t read_size = 0;
1174 * The block layout is 128 Bytes
1175 * index 0: port phy idx (e.g., 0,1,2,3),
1176 * index 1: It's could be
1177 * F81534_TOKEN_RECEIVE
1178 * F81534_TOKEN_TX_EMPTY
1179 * F81534_TOKEN_MSR_CHANGE
1180 * index 2: serial in size (data+lsr, must be even)
1181 * meaningful for F81534_TOKEN_RECEIVE only
1182 * index 3: current MSR with this device
1183 * index 4~127: serial in data block (data+lsr, must be even)
1186 case F81534_TOKEN_TX_EMPTY:
1187 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1189 /* Try to submit writer */
1190 status = f81534_submit_writer(port, GFP_ATOMIC);
1192 dev_err(&port->dev, "%s: submit failed\n", __func__);
1195 case F81534_TOKEN_MSR_CHANGE:
1196 f81534_msr_changed(port, data[3]);
1199 case F81534_TOKEN_RECEIVE:
1200 read_size = data[2];
1201 if (read_size > F81534_MAX_RX_SIZE) {
1203 "%s: phy: %d read_size: %zu larger than: %d\n",
1204 __func__, phy_num, read_size,
1205 F81534_MAX_RX_SIZE);
1212 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1217 for (i = 4; i < 4 + read_size; i += 2) {
1218 tty_flag = TTY_NORMAL;
1221 if (lsr & UART_LSR_BRK_ERROR_BITS) {
1222 if (lsr & UART_LSR_BI) {
1223 tty_flag = TTY_BREAK;
1225 usb_serial_handle_break(port);
1226 } else if (lsr & UART_LSR_PE) {
1227 tty_flag = TTY_PARITY;
1228 port->icount.parity++;
1229 } else if (lsr & UART_LSR_FE) {
1230 tty_flag = TTY_FRAME;
1231 port->icount.frame++;
1234 if (lsr & UART_LSR_OE) {
1235 port->icount.overrun++;
1236 tty_insert_flip_char(&port->port, 0,
1240 schedule_work(&port_priv->lsr_work);
1244 if (usb_serial_handle_sysrq_char(port, data[i]))
1248 tty_insert_flip_char(&port->port, data[i], tty_flag);
1251 tty_flip_buffer_push(&port->port);
1254 static void f81534_process_read_urb(struct urb *urb)
1256 struct f81534_serial_private *serial_priv;
1257 struct usb_serial_port *port;
1258 struct usb_serial *serial;
1264 if (!urb->actual_length ||
1265 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1269 port = urb->context;
1270 serial = port->serial;
1271 buf = urb->transfer_buffer;
1272 serial_priv = usb_get_serial_data(serial);
1274 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1275 phy_port_num = buf[i];
1276 if (phy_port_num >= F81534_NUM_PORT) {
1278 "%s: phy_port_num: %d larger than: %d\n",
1279 __func__, phy_port_num, F81534_NUM_PORT);
1283 tty_port_num = serial_priv->tty_idx[phy_port_num];
1284 port = serial->port[tty_port_num];
1286 if (tty_port_initialized(&port->port))
1287 f81534_process_per_serial_block(port, &buf[i]);
1291 static void f81534_write_usb_callback(struct urb *urb)
1293 struct usb_serial_port *port = urb->context;
1295 switch (urb->status) {
1301 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1302 __func__, urb->status);
1305 dev_err(&port->dev, "%s - urb stopped: %d\n",
1306 __func__, urb->status);
1309 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1310 __func__, urb->status);
1315 static void f81534_lsr_worker(struct work_struct *work)
1317 struct f81534_port_private *port_priv;
1318 struct usb_serial_port *port;
1322 port_priv = container_of(work, struct f81534_port_private, lsr_work);
1323 port = port_priv->port;
1325 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1327 dev_warn(&port->dev, "read LSR failed: %d\n", status);
1330 static int f81534_set_port_output_pin(struct usb_serial_port *port)
1332 struct f81534_serial_private *serial_priv;
1333 struct f81534_port_private *port_priv;
1334 struct usb_serial *serial;
1335 const struct f81534_port_out_pin *pins;
1341 serial = port->serial;
1342 serial_priv = usb_get_serial_data(serial);
1343 port_priv = usb_get_serial_port_data(port);
1345 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
1346 value = serial_priv->conf_data[idx];
1347 if (value >= F81534_CONF_GPIO_SHUTDOWN) {
1349 * Newer IC configure will make transceiver in shutdown mode on
1350 * initial power on. We need enable it before using UARTs.
1352 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
1353 value = serial_priv->conf_data[idx];
1354 if (value >= F81534_CONF_GPIO_SHUTDOWN)
1355 value = F81534_CONF_GPIO_RS232;
1358 pins = &f81534_port_out_pins[port_priv->phy_num];
1360 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1361 status = f81534_set_mask_register(serial,
1362 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1363 value & BIT(i) ? pins->pin[i].reg_mask : 0);
1368 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1372 static int f81534_port_probe(struct usb_serial_port *port)
1374 struct f81534_serial_private *serial_priv;
1375 struct f81534_port_private *port_priv;
1379 serial_priv = usb_get_serial_data(port->serial);
1380 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1385 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1386 * delay all tx data frame with 1bit.
1388 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1389 spin_lock_init(&port_priv->msr_lock);
1390 mutex_init(&port_priv->mcr_mutex);
1391 mutex_init(&port_priv->lcr_mutex);
1392 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1394 /* Assign logic-to-phy mapping */
1395 ret = f81534_logic_to_phy_port(port->serial, port);
1399 port_priv->phy_num = ret;
1400 port_priv->port = port;
1401 usb_set_serial_port_data(port, port_priv);
1402 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1403 port->port_number, port_priv->phy_num);
1406 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1407 * occur data overrun. So we'll disable the LSR interrupt in probe()
1408 * and submit the LSR worker to clear LSR state when reported LSR error
1409 * bit with bulk-in data in f81534_process_per_serial_block().
1411 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1412 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1416 value = serial_priv->conf_data[port_priv->phy_num];
1417 switch (value & F81534_PORT_CONF_MODE_MASK) {
1418 case F81534_PORT_CONF_RS485_INVERT:
1419 port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1420 F81534_CLK_RS485_INVERT;
1421 dev_dbg(&port->dev, "RS485 invert mode\n");
1423 case F81534_PORT_CONF_RS485:
1424 port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1425 dev_dbg(&port->dev, "RS485 mode\n");
1429 case F81534_PORT_CONF_RS232:
1430 dev_dbg(&port->dev, "RS232 mode\n");
1434 return f81534_set_port_output_pin(port);
1437 static int f81534_port_remove(struct usb_serial_port *port)
1439 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1441 flush_work(&port_priv->lsr_work);
1445 static int f81534_tiocmget(struct tty_struct *tty)
1447 struct usb_serial_port *port = tty->driver_data;
1448 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1454 /* Read current MSR from device */
1455 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1459 mutex_lock(&port_priv->mcr_mutex);
1460 mcr = port_priv->shadow_mcr;
1461 mutex_unlock(&port_priv->mcr_mutex);
1463 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1464 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1465 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1466 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1467 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1468 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1473 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1476 struct usb_serial_port *port = tty->driver_data;
1478 return f81534_update_mctrl(port, set, clear);
1481 static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1484 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1486 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1489 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1490 const u8 *buf, int count)
1492 int bytes_out, status;
1497 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1500 status = f81534_submit_writer(port, GFP_ATOMIC);
1502 dev_err(&port->dev, "%s: submit failed\n", __func__);
1509 static bool f81534_tx_empty(struct usb_serial_port *port)
1511 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1513 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1516 static int f81534_resume(struct usb_serial *serial)
1518 struct f81534_serial_private *serial_priv =
1519 usb_get_serial_data(serial);
1520 struct usb_serial_port *port;
1526 * We'll register port 0 bulkin when port had opened, It'll take all
1527 * port received data, MSR register change and TX_EMPTY information.
1529 mutex_lock(&serial_priv->urb_mutex);
1531 if (serial_priv->opened_port) {
1532 status = f81534_submit_read_urb(serial, GFP_NOIO);
1534 mutex_unlock(&serial_priv->urb_mutex);
1539 mutex_unlock(&serial_priv->urb_mutex);
1541 for (i = 0; i < serial->num_ports; i++) {
1542 port = serial->port[i];
1543 if (!tty_port_initialized(&port->port))
1546 status = f81534_submit_writer(port, GFP_NOIO);
1548 dev_err(&port->dev, "%s: submit failed\n", __func__);
1559 static struct usb_serial_driver f81534_device = {
1561 .owner = THIS_MODULE,
1564 .description = DRIVER_DESC,
1565 .id_table = f81534_id_table,
1568 .open = f81534_open,
1569 .close = f81534_close,
1570 .write = f81534_write,
1571 .tx_empty = f81534_tx_empty,
1572 .calc_num_ports = f81534_calc_num_ports,
1573 .port_probe = f81534_port_probe,
1574 .port_remove = f81534_port_remove,
1575 .break_ctl = f81534_break_ctl,
1576 .dtr_rts = f81534_dtr_rts,
1577 .process_read_urb = f81534_process_read_urb,
1578 .get_serial = f81534_get_serial_info,
1579 .tiocmget = f81534_tiocmget,
1580 .tiocmset = f81534_tiocmset,
1581 .write_bulk_callback = f81534_write_usb_callback,
1582 .set_termios = f81534_set_termios,
1583 .resume = f81534_resume,
1586 static struct usb_serial_driver *const serial_drivers[] = {
1587 &f81534_device, NULL
1590 module_usb_serial_driver(serial_drivers, f81534_id_table);
1592 MODULE_DEVICE_TABLE(usb, f81534_id_table);
1593 MODULE_DESCRIPTION(DRIVER_DESC);
1594 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1595 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1596 MODULE_LICENSE("GPL");