1 // SPDX-License-Identifier: GPL-2.0
3 * TUSB6010 USB 2.0 OTG Dual Role controller
5 * Copyright (C) 2006 Nokia Corporation
6 * Tony Lindgren <tony@atomide.com>
9 * - Driver assumes that interface to external host (main CPU) is
10 * configured for NOR FLASH interface instead of VLYNQ serial
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/err.h>
18 #include <linux/prefetch.h>
19 #include <linux/usb.h>
20 #include <linux/irq.h>
22 #include <linux/device.h>
23 #include <linux/platform_device.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/usb/usb_phy_generic.h>
27 #include "musb_core.h"
29 struct tusb6010_glue {
31 struct platform_device *musb;
32 struct platform_device *phy;
35 static void tusb_musb_set_vbus(struct musb *musb, int is_on);
37 #define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
38 #define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
41 * Checks the revision. We need to use the DMA register as 3.0 does not
42 * have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
44 static u8 tusb_get_revision(struct musb *musb)
46 void __iomem *tbase = musb->ctrl_base;
50 rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff;
51 if (TUSB_REV_MAJOR(rev) == 3) {
52 die_id = TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase,
54 if (die_id >= TUSB_DIDR1_HI_REV_31)
61 static void tusb_print_revision(struct musb *musb)
63 void __iomem *tbase = musb->ctrl_base;
66 rev = musb->tusb_revision;
68 pr_info("tusb: %s%i.%i %s%i.%i %s%i.%i %s%i.%i %s%i %s%i.%i\n",
70 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_PRCM_REV)),
71 TUSB_REV_MINOR(musb_readl(tbase, TUSB_PRCM_REV)),
73 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
74 TUSB_REV_MINOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
76 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_GPIO_REV)),
77 TUSB_REV_MINOR(musb_readl(tbase, TUSB_GPIO_REV)),
79 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
80 TUSB_REV_MINOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
82 TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, TUSB_DIDR1_HI)),
84 TUSB_REV_MAJOR(rev), TUSB_REV_MINOR(rev));
87 #define WBUS_QUIRK_MASK (TUSB_PHY_OTG_CTRL_TESTM2 | TUSB_PHY_OTG_CTRL_TESTM1 \
88 | TUSB_PHY_OTG_CTRL_TESTM0)
91 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
92 * Disables power detection in PHY for the duration of idle.
94 static void tusb_wbus_quirk(struct musb *musb, int enabled)
96 void __iomem *tbase = musb->ctrl_base;
97 static u32 phy_otg_ctrl, phy_otg_ena;
101 phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
102 phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
103 tmp = TUSB_PHY_OTG_CTRL_WRPROTECT
104 | phy_otg_ena | WBUS_QUIRK_MASK;
105 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
106 tmp = phy_otg_ena & ~WBUS_QUIRK_MASK;
107 tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2;
108 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
109 dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
110 musb_readl(tbase, TUSB_PHY_OTG_CTRL),
111 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
112 } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)
113 & TUSB_PHY_OTG_CTRL_TESTM2) {
114 tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ctrl;
115 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
116 tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena;
117 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
118 dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n",
119 musb_readl(tbase, TUSB_PHY_OTG_CTRL),
120 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
126 static u32 tusb_fifo_offset(u8 epnum)
128 return 0x200 + (epnum * 0x20);
131 static u32 tusb_ep_offset(u8 epnum, u16 offset)
133 return 0x10 + offset;
136 /* TUSB mapping: "flat" plus ep0 special cases */
137 static void tusb_ep_select(void __iomem *mbase, u8 epnum)
139 musb_writeb(mbase, MUSB_INDEX, epnum);
143 * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum.
145 static u8 tusb_readb(void __iomem *addr, u32 offset)
150 tmp = __raw_readw(addr + (offset & ~1));
159 static void tusb_writeb(void __iomem *addr, u32 offset, u8 data)
163 tmp = __raw_readw(addr + (offset & ~1));
165 tmp = (data << 8) | (tmp & 0xff);
167 tmp = (tmp & 0xff00) | data;
169 __raw_writew(tmp, addr + (offset & ~1));
173 * TUSB 6010 may use a parallel bus that doesn't support byte ops;
174 * so both loading and unloading FIFOs need explicit byte counts.
178 tusb_fifo_write_unaligned(void __iomem *fifo, const u8 *buf, u16 len)
184 for (i = 0; i < (len >> 2); i++) {
185 memcpy(&val, buf, 4);
186 musb_writel(fifo, 0, val);
192 /* Write the rest 1 - 3 bytes to FIFO */
194 memcpy(&val, buf, len);
195 musb_writel(fifo, 0, val);
199 static inline void tusb_fifo_read_unaligned(void __iomem *fifo,
206 for (i = 0; i < (len >> 2); i++) {
207 val = musb_readl(fifo, 0);
208 memcpy(buf, &val, 4);
214 /* Read the rest 1 - 3 bytes from FIFO */
215 val = musb_readl(fifo, 0);
216 memcpy(buf, &val, len);
220 static void tusb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
222 struct musb *musb = hw_ep->musb;
223 void __iomem *ep_conf = hw_ep->conf;
224 void __iomem *fifo = hw_ep->fifo;
225 u8 epnum = hw_ep->epnum;
229 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
230 'T', epnum, fifo, len, buf);
233 musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
234 TUSB_EP_CONFIG_XFR_SIZE(len));
236 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_DIR_TX |
237 TUSB_EP0_CONFIG_XFR_SIZE(len));
239 if (likely((0x01 & (unsigned long) buf) == 0)) {
241 /* Best case is 32bit-aligned destination address */
242 if ((0x02 & (unsigned long) buf) == 0) {
244 iowrite32_rep(fifo, buf, len >> 2);
245 buf += (len & ~0x03);
253 /* Cannot use writesw, fifo is 32-bit */
254 for (i = 0; i < (len >> 2); i++) {
255 val = (u32)(*(u16 *)buf);
257 val |= (*(u16 *)buf) << 16;
259 musb_writel(fifo, 0, val);
267 tusb_fifo_write_unaligned(fifo, buf, len);
270 static void tusb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
272 struct musb *musb = hw_ep->musb;
273 void __iomem *ep_conf = hw_ep->conf;
274 void __iomem *fifo = hw_ep->fifo;
275 u8 epnum = hw_ep->epnum;
277 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
278 'R', epnum, fifo, len, buf);
281 musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
282 TUSB_EP_CONFIG_XFR_SIZE(len));
284 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_XFR_SIZE(len));
286 if (likely((0x01 & (unsigned long) buf) == 0)) {
288 /* Best case is 32bit-aligned destination address */
289 if ((0x02 & (unsigned long) buf) == 0) {
291 ioread32_rep(fifo, buf, len >> 2);
292 buf += (len & ~0x03);
300 /* Cannot use readsw, fifo is 32-bit */
301 for (i = 0; i < (len >> 2); i++) {
302 val = musb_readl(fifo, 0);
303 *(u16 *)buf = (u16)(val & 0xffff);
305 *(u16 *)buf = (u16)(val >> 16);
314 tusb_fifo_read_unaligned(fifo, buf, len);
317 static struct musb *the_musb;
319 /* This is used by gadget drivers, and OTG transceiver logic, allowing
320 * at most mA current to be drawn from VBUS during a Default-B session
321 * (that is, while VBUS exceeds 4.4V). In Default-A (including pure host
322 * mode), or low power Default-B sessions, something else supplies power.
323 * Caller must take care of locking.
325 static int tusb_draw_power(struct usb_phy *x, unsigned mA)
327 struct musb *musb = the_musb;
328 void __iomem *tbase = musb->ctrl_base;
331 /* tps65030 seems to consume max 100mA, with maybe 60mA available
332 * (measured on one board) for things other than tps and tusb.
334 * Boards sharing the CPU clock with CLKIN will need to prevent
335 * certain idle sleep states while the USB link is active.
337 * REVISIT we could use VBUS to supply only _one_ of { 1.5V, 3.3V }.
338 * The actual current usage would be very board-specific. For now,
339 * it's simpler to just use an aggregate (also board-specific).
341 if (x->otg->default_a || mA < (musb->min_power << 1))
344 reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
346 musb->is_bus_powered = 1;
347 reg |= TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN;
349 musb->is_bus_powered = 0;
350 reg &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN);
352 musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
354 dev_dbg(musb->controller, "draw max %d mA VBUS\n", mA);
358 /* workaround for issue 13: change clock during chip idle
359 * (to be fixed in rev3 silicon) ... symptoms include disconnect
360 * or looping suspend/resume cycles
362 static void tusb_set_clock_source(struct musb *musb, unsigned mode)
364 void __iomem *tbase = musb->ctrl_base;
367 reg = musb_readl(tbase, TUSB_PRCM_CONF);
368 reg &= ~TUSB_PRCM_CONF_SYS_CLKSEL(0x3);
370 /* 0 = refclk (clkin, XI)
371 * 1 = PHY 60 MHz (internal PLL)
376 reg |= TUSB_PRCM_CONF_SYS_CLKSEL(mode & 0x3);
378 musb_writel(tbase, TUSB_PRCM_CONF, reg);
380 /* FIXME tusb6010_platform_retime(mode == 0); */
384 * Idle TUSB6010 until next wake-up event; NOR access always wakes.
385 * Other code ensures that we idle unless we're connected _and_ the
386 * USB link is not suspended ... and tells us the relevant wakeup
387 * events. SW_EN for voltage is handled separately.
389 static void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
391 void __iomem *tbase = musb->ctrl_base;
394 if ((wakeup_enables & TUSB_PRCM_WBUS)
395 && (musb->tusb_revision == TUSB_REV_30))
396 tusb_wbus_quirk(musb, 1);
398 tusb_set_clock_source(musb, 0);
400 wakeup_enables |= TUSB_PRCM_WNORCS;
401 musb_writel(tbase, TUSB_PRCM_WAKEUP_MASK, ~wakeup_enables);
403 /* REVISIT writeup of WID implies that if WID set and ID is grounded,
404 * TUSB_PHY_OTG_CTRL.TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP must be cleared.
405 * Presumably that's mostly to save power, hence WID is immaterial ...
408 reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
409 /* issue 4: when driving vbus, use hipower (vbus_det) comparator */
410 if (is_host_active(musb)) {
411 reg |= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
412 reg &= ~TUSB_PRCM_MNGMT_OTG_SESS_END_EN;
414 reg |= TUSB_PRCM_MNGMT_OTG_SESS_END_EN;
415 reg &= ~TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
417 reg |= TUSB_PRCM_MNGMT_PM_IDLE | TUSB_PRCM_MNGMT_DEV_IDLE;
418 musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
420 dev_dbg(musb->controller, "idle, wake on %02x\n", wakeup_enables);
424 * Updates cable VBUS status. Caller must take care of locking.
426 static int tusb_musb_vbus_status(struct musb *musb)
428 void __iomem *tbase = musb->ctrl_base;
429 u32 otg_stat, prcm_mngmt;
432 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
433 prcm_mngmt = musb_readl(tbase, TUSB_PRCM_MNGMT);
435 /* Temporarily enable VBUS detection if it was disabled for
436 * suspend mode. Unless it's enabled otg_stat and devctl will
437 * not show correct VBUS state.
439 if (!(prcm_mngmt & TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN)) {
440 u32 tmp = prcm_mngmt;
441 tmp |= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
442 musb_writel(tbase, TUSB_PRCM_MNGMT, tmp);
443 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
444 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm_mngmt);
447 if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID)
453 static void musb_do_idle(struct timer_list *t)
455 struct musb *musb = from_timer(musb, t, dev_timer);
458 spin_lock_irqsave(&musb->lock, flags);
460 switch (musb->xceiv->otg->state) {
461 case OTG_STATE_A_WAIT_BCON:
462 if ((musb->a_wait_bcon != 0)
463 && (musb->idle_timeout == 0
464 || time_after(jiffies, musb->idle_timeout))) {
465 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n",
466 usb_otg_state_string(musb->xceiv->otg->state));
469 case OTG_STATE_A_IDLE:
470 tusb_musb_set_vbus(musb, 0);
475 if (!musb->is_active) {
478 /* wait until hub_wq handles port change status */
479 if (is_host_active(musb) && (musb->port1_status >> 16))
482 if (!musb->gadget_driver) {
485 wakeups = TUSB_PRCM_WHOSTDISCON
488 wakeups |= TUSB_PRCM_WID;
490 tusb_allow_idle(musb, wakeups);
493 spin_unlock_irqrestore(&musb->lock, flags);
497 * Maybe put TUSB6010 into idle mode mode depending on USB link status,
498 * like "disconnected" or "suspended". We'll be woken out of it by
499 * connect, resume, or disconnect.
501 * Needs to be called as the last function everywhere where there is
502 * register access to TUSB6010 because of NOR flash wake-up.
503 * Caller should own controller spinlock.
505 * Delay because peripheral enables D+ pullup 3msec after SE0, and
506 * we don't want to treat that full speed J as a wakeup event.
507 * ... peripherals must draw only suspend current after 10 msec.
509 static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
511 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
512 static unsigned long last_timer;
515 timeout = default_timeout;
517 /* Never idle if active, or when VBUS timeout is not set as host */
518 if (musb->is_active || ((musb->a_wait_bcon == 0)
519 && (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON))) {
520 dev_dbg(musb->controller, "%s active, deleting timer\n",
521 usb_otg_state_string(musb->xceiv->otg->state));
522 del_timer(&musb->dev_timer);
523 last_timer = jiffies;
527 if (time_after(last_timer, timeout)) {
528 if (!timer_pending(&musb->dev_timer))
529 last_timer = timeout;
531 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
535 last_timer = timeout;
537 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
538 usb_otg_state_string(musb->xceiv->otg->state),
539 (unsigned long)jiffies_to_msecs(timeout - jiffies));
540 mod_timer(&musb->dev_timer, timeout);
543 /* ticks of 60 MHz clock */
544 #define DEVCLOCK 60000000
545 #define OTG_TIMER_MS(msecs) ((msecs) \
546 ? (TUSB_DEV_OTG_TIMER_VAL((DEVCLOCK/1000)*(msecs)) \
547 | TUSB_DEV_OTG_TIMER_ENABLE) \
550 static void tusb_musb_set_vbus(struct musb *musb, int is_on)
552 void __iomem *tbase = musb->ctrl_base;
553 u32 conf, prcm, timer;
555 struct usb_otg *otg = musb->xceiv->otg;
557 /* HDRC controls CPEN, but beware current surges during device
558 * connect. They can trigger transient overcurrent conditions
559 * that must be ignored.
562 prcm = musb_readl(tbase, TUSB_PRCM_MNGMT);
563 conf = musb_readl(tbase, TUSB_DEV_CONF);
564 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
567 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
569 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
570 devctl |= MUSB_DEVCTL_SESSION;
572 conf |= TUSB_DEV_CONF_USB_HOST_MODE;
579 /* If ID pin is grounded, we want to be a_idle */
580 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
581 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
582 switch (musb->xceiv->otg->state) {
583 case OTG_STATE_A_WAIT_VRISE:
584 case OTG_STATE_A_WAIT_BCON:
585 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
587 case OTG_STATE_A_WAIT_VFALL:
588 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
591 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
599 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
603 devctl &= ~MUSB_DEVCTL_SESSION;
604 conf &= ~TUSB_DEV_CONF_USB_HOST_MODE;
606 prcm &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN);
608 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm);
609 musb_writel(tbase, TUSB_DEV_OTG_TIMER, timer);
610 musb_writel(tbase, TUSB_DEV_CONF, conf);
611 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
613 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
614 usb_otg_state_string(musb->xceiv->otg->state),
615 musb_readb(musb->mregs, MUSB_DEVCTL),
616 musb_readl(tbase, TUSB_DEV_OTG_STAT),
621 * Sets the mode to OTG, peripheral or host by changing the ID detection.
622 * Caller must take care of locking.
624 * Note that if a mini-A cable is plugged in the ID line will stay down as
625 * the weak ID pull-up is not able to pull the ID up.
627 static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode)
629 void __iomem *tbase = musb->ctrl_base;
630 u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
632 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
633 phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
634 phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
635 dev_conf = musb_readl(tbase, TUSB_DEV_CONF);
639 case MUSB_HOST: /* Disable PHY ID detect, ground ID */
640 phy_otg_ctrl &= ~TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
641 phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
642 dev_conf |= TUSB_DEV_CONF_ID_SEL;
643 dev_conf &= ~TUSB_DEV_CONF_SOFT_ID;
645 case MUSB_PERIPHERAL: /* Disable PHY ID detect, keep ID pull-up on */
646 phy_otg_ctrl |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
647 phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
648 dev_conf |= (TUSB_DEV_CONF_ID_SEL | TUSB_DEV_CONF_SOFT_ID);
650 case MUSB_OTG: /* Use PHY ID detection */
651 phy_otg_ctrl |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
652 phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
653 dev_conf &= ~(TUSB_DEV_CONF_ID_SEL | TUSB_DEV_CONF_SOFT_ID);
657 dev_dbg(musb->controller, "Trying to set mode %i\n", musb_mode);
661 musb_writel(tbase, TUSB_PHY_OTG_CTRL,
662 TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ctrl);
663 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE,
664 TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena);
665 musb_writel(tbase, TUSB_DEV_CONF, dev_conf);
667 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
668 if ((musb_mode == MUSB_PERIPHERAL) &&
669 !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS))
670 INFO("Cannot be peripheral with mini-A cable "
671 "otg_stat: %08x\n", otg_stat);
676 static inline unsigned long
677 tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
679 u32 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
680 unsigned long idle_timeout = 0;
681 struct usb_otg *otg = musb->xceiv->otg;
684 if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) {
687 default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS);
688 dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B');
689 otg->default_a = default_a;
690 tusb_musb_set_vbus(musb, default_a);
692 /* Don't allow idling immediately */
694 idle_timeout = jiffies + (HZ * 3);
697 /* VBUS state change */
698 if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
700 /* B-dev state machine: no vbus ~= disconnect */
701 if (!otg->default_a) {
702 /* ? musb_root_disconnect(musb); */
703 musb->port1_status &=
704 ~(USB_PORT_STAT_CONNECTION
705 | USB_PORT_STAT_ENABLE
706 | USB_PORT_STAT_LOW_SPEED
707 | USB_PORT_STAT_HIGH_SPEED
711 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
712 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n");
713 if (musb->xceiv->otg->state != OTG_STATE_B_IDLE) {
714 /* INTR_DISCONNECT can hide... */
715 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
716 musb->int_usb |= MUSB_INTR_DISCONNECT;
720 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
721 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
722 idle_timeout = jiffies + (1 * HZ);
723 schedule_delayed_work(&musb->irq_work, 0);
725 } else /* A-dev state machine */ {
726 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
727 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
729 switch (musb->xceiv->otg->state) {
730 case OTG_STATE_A_IDLE:
731 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n");
732 musb_platform_set_vbus(musb, 1);
734 /* CONNECT can wake if a_wait_bcon is set */
735 if (musb->a_wait_bcon != 0)
741 * OPT FS A TD.4.6 needs few seconds for
744 idle_timeout = jiffies + (2 * HZ);
747 case OTG_STATE_A_WAIT_VRISE:
748 /* ignore; A-session-valid < VBUS_VALID/2,
749 * we monitor this with the timer
752 case OTG_STATE_A_WAIT_VFALL:
753 /* REVISIT this irq triggers during short
754 * spikes caused by enumeration ...
756 if (musb->vbuserr_retry) {
757 musb->vbuserr_retry--;
758 tusb_musb_set_vbus(musb, 1);
761 = VBUSERR_RETRY_COUNT;
762 tusb_musb_set_vbus(musb, 0);
771 /* OTG timer expiration */
772 if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) {
775 dev_dbg(musb->controller, "%s timer, %03x\n",
776 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
778 switch (musb->xceiv->otg->state) {
779 case OTG_STATE_A_WAIT_VRISE:
780 /* VBUS has probably been valid for a while now,
781 * but may well have bounced out of range a bit
783 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
784 if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID) {
785 if ((devctl & MUSB_DEVCTL_VBUS)
786 != MUSB_DEVCTL_VBUS) {
787 dev_dbg(musb->controller, "devctl %02x\n", devctl);
790 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
792 idle_timeout = jiffies
793 + msecs_to_jiffies(musb->a_wait_bcon);
795 /* REVISIT report overcurrent to hub? */
796 ERR("vbus too slow, devctl %02x\n", devctl);
797 tusb_musb_set_vbus(musb, 0);
800 case OTG_STATE_A_WAIT_BCON:
801 if (musb->a_wait_bcon != 0)
802 idle_timeout = jiffies
803 + msecs_to_jiffies(musb->a_wait_bcon);
805 case OTG_STATE_A_SUSPEND:
807 case OTG_STATE_B_WAIT_ACON:
813 schedule_delayed_work(&musb->irq_work, 0);
818 static irqreturn_t tusb_musb_interrupt(int irq, void *__hci)
820 struct musb *musb = __hci;
821 void __iomem *tbase = musb->ctrl_base;
822 unsigned long flags, idle_timeout = 0;
823 u32 int_mask, int_src;
825 spin_lock_irqsave(&musb->lock, flags);
827 /* Mask all interrupts to allow using both edge and level GPIO irq */
828 int_mask = musb_readl(tbase, TUSB_INT_MASK);
829 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS);
831 int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS;
832 dev_dbg(musb->controller, "TUSB IRQ %08x\n", int_src);
834 musb->int_usb = (u8) int_src;
836 /* Acknowledge wake-up source interrupts */
837 if (int_src & TUSB_INT_SRC_DEV_WAKEUP) {
841 if (musb->tusb_revision == TUSB_REV_30)
842 tusb_wbus_quirk(musb, 0);
844 /* there are issues re-locking the PLL on wakeup ... */
846 /* work around issue 8 */
847 for (i = 0xf7f7f7; i > 0xf7f7f7 - 1000; i--) {
848 musb_writel(tbase, TUSB_SCRATCH_PAD, 0);
849 musb_writel(tbase, TUSB_SCRATCH_PAD, i);
850 reg = musb_readl(tbase, TUSB_SCRATCH_PAD);
853 dev_dbg(musb->controller, "TUSB NOR not ready\n");
856 /* work around issue 13 (2nd half) */
857 tusb_set_clock_source(musb, 1);
859 reg = musb_readl(tbase, TUSB_PRCM_WAKEUP_SOURCE);
860 musb_writel(tbase, TUSB_PRCM_WAKEUP_CLEAR, reg);
861 if (reg & ~TUSB_PRCM_WNORCS) {
863 schedule_delayed_work(&musb->irq_work, 0);
865 dev_dbg(musb->controller, "wake %sactive %02x\n",
866 musb->is_active ? "" : "in", reg);
868 /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
871 if (int_src & TUSB_INT_SRC_USB_IP_CONN)
872 del_timer(&musb->dev_timer);
874 /* OTG state change reports (annoyingly) not issued by Mentor core */
875 if (int_src & (TUSB_INT_SRC_VBUS_SENSE_CHNG
876 | TUSB_INT_SRC_OTG_TIMEOUT
877 | TUSB_INT_SRC_ID_STATUS_CHNG))
878 idle_timeout = tusb_otg_ints(musb, int_src, tbase);
881 * Just clear the DMA interrupt if it comes as the completion for both
882 * TX and RX is handled by the DMA callback in tusb6010_omap
884 if ((int_src & TUSB_INT_SRC_TXRX_DMA_DONE)) {
885 u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC);
887 dev_dbg(musb->controller, "DMA IRQ %08x\n", dma_src);
888 musb_writel(tbase, TUSB_DMA_INT_CLEAR, dma_src);
891 /* EP interrupts. In OCP mode tusb6010 mirrors the MUSB interrupts */
892 if (int_src & (TUSB_INT_SRC_USB_IP_TX | TUSB_INT_SRC_USB_IP_RX)) {
893 u32 musb_src = musb_readl(tbase, TUSB_USBIP_INT_SRC);
895 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, musb_src);
896 musb->int_rx = (((musb_src >> 16) & 0xffff) << 1);
897 musb->int_tx = (musb_src & 0xffff);
903 if (int_src & (TUSB_INT_SRC_USB_IP_TX | TUSB_INT_SRC_USB_IP_RX | 0xff))
904 musb_interrupt(musb);
906 /* Acknowledge TUSB interrupts. Clear only non-reserved bits */
907 musb_writel(tbase, TUSB_INT_SRC_CLEAR,
908 int_src & ~TUSB_INT_MASK_RESERVED_BITS);
910 tusb_musb_try_idle(musb, idle_timeout);
912 musb_writel(tbase, TUSB_INT_MASK, int_mask);
913 spin_unlock_irqrestore(&musb->lock, flags);
921 * Enables TUSB6010. Caller must take care of locking.
923 * - Check what is unnecessary in MGC_HdrcStart()
925 static void tusb_musb_enable(struct musb *musb)
927 void __iomem *tbase = musb->ctrl_base;
929 /* Setup TUSB6010 main interrupt mask. Enable all interrupts except SOF.
930 * REVISIT: Enable and deal with TUSB_INT_SRC_USB_IP_SOF */
931 musb_writel(tbase, TUSB_INT_MASK, TUSB_INT_SRC_USB_IP_SOF);
933 /* Setup TUSB interrupt, disable DMA and GPIO interrupts */
934 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0);
935 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff);
936 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff);
938 /* Clear all subsystem interrups */
939 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, 0x7fffffff);
940 musb_writel(tbase, TUSB_DMA_INT_CLEAR, 0x7fffffff);
941 musb_writel(tbase, TUSB_GPIO_INT_CLEAR, 0x1ff);
943 /* Acknowledge pending interrupt(s) */
944 musb_writel(tbase, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS);
946 /* Only 0 clock cycles for minimum interrupt de-assertion time and
947 * interrupt polarity active low seems to work reliably here */
948 musb_writel(tbase, TUSB_INT_CTRL_CONF,
949 TUSB_INT_CTRL_CONF_INT_RELCYC(0));
951 irq_set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW);
953 /* maybe force into the Default-A OTG state machine */
954 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
955 & TUSB_DEV_OTG_STAT_ID_STATUS))
956 musb_writel(tbase, TUSB_INT_SRC_SET,
957 TUSB_INT_SRC_ID_STATUS_CHNG);
959 if (is_dma_capable() && dma_off)
960 printk(KERN_WARNING "%s %s: dma not reactivated\n",
967 * Disables TUSB6010. Caller must take care of locking.
969 static void tusb_musb_disable(struct musb *musb)
971 void __iomem *tbase = musb->ctrl_base;
973 /* FIXME stop DMA, IRQs, timers, ... */
975 /* disable all IRQs */
976 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS);
977 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0x7fffffff);
978 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff);
979 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff);
981 del_timer(&musb->dev_timer);
983 if (is_dma_capable() && !dma_off) {
984 printk(KERN_WARNING "%s %s: dma still active\n",
991 * Sets up TUSB6010 CPU interface specific signals and registers
992 * Note: Settings optimized for OMAP24xx
994 static void tusb_setup_cpu_interface(struct musb *musb)
996 void __iomem *tbase = musb->ctrl_base;
999 * Disable GPIO[5:0] pullups (used as output DMA requests)
1000 * Don't disable GPIO[7:6] as they are needed for wake-up.
1002 musb_writel(tbase, TUSB_PULLUP_1_CTRL, 0x0000003F);
1004 /* Disable all pullups on NOR IF, DMAREQ0 and DMAREQ1 */
1005 musb_writel(tbase, TUSB_PULLUP_2_CTRL, 0x01FFFFFF);
1007 /* Turn GPIO[5:0] to DMAREQ[5:0] signals */
1008 musb_writel(tbase, TUSB_GPIO_CONF, TUSB_GPIO_CONF_DMAREQ(0x3f));
1010 /* Burst size 16x16 bits, all six DMA requests enabled, DMA request
1011 * de-assertion time 2 system clocks p 62 */
1012 musb_writel(tbase, TUSB_DMA_REQ_CONF,
1013 TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
1014 TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
1015 TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
1017 /* Set 0 wait count for synchronous burst access */
1018 musb_writel(tbase, TUSB_WAIT_COUNT, 1);
1021 static int tusb_musb_start(struct musb *musb)
1023 void __iomem *tbase = musb->ctrl_base;
1025 unsigned long flags;
1028 if (musb->board_set_power)
1029 ret = musb->board_set_power(1);
1031 printk(KERN_ERR "tusb: Cannot enable TUSB6010\n");
1035 spin_lock_irqsave(&musb->lock, flags);
1037 if (musb_readl(tbase, TUSB_PROD_TEST_RESET) !=
1038 TUSB_PROD_TEST_RESET_VAL) {
1039 printk(KERN_ERR "tusb: Unable to detect TUSB6010\n");
1043 musb->tusb_revision = tusb_get_revision(musb);
1044 tusb_print_revision(musb);
1045 if (musb->tusb_revision < 2) {
1046 printk(KERN_ERR "tusb: Unsupported TUSB6010 revision %i\n",
1047 musb->tusb_revision);
1051 /* The uint bit for "USB non-PDR interrupt enable" has to be 1 when
1052 * NOR FLASH interface is used */
1053 musb_writel(tbase, TUSB_VLYNQ_CTRL, 8);
1055 /* Select PHY free running 60MHz as a system clock */
1056 tusb_set_clock_source(musb, 1);
1058 /* VBus valid timer 1us, disable DFT/Debug and VLYNQ clocks for
1059 * power saving, enable VBus detect and session end comparators,
1060 * enable IDpullup, enable VBus charging */
1061 musb_writel(tbase, TUSB_PRCM_MNGMT,
1062 TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(0xa) |
1063 TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN |
1064 TUSB_PRCM_MNGMT_OTG_SESS_END_EN |
1065 TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN |
1066 TUSB_PRCM_MNGMT_OTG_ID_PULLUP);
1067 tusb_setup_cpu_interface(musb);
1069 /* simplify: always sense/pullup ID pins, as if in OTG mode */
1070 reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
1071 reg |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
1072 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, reg);
1074 reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
1075 reg |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
1076 musb_writel(tbase, TUSB_PHY_OTG_CTRL, reg);
1078 spin_unlock_irqrestore(&musb->lock, flags);
1083 spin_unlock_irqrestore(&musb->lock, flags);
1085 if (musb->board_set_power)
1086 musb->board_set_power(0);
1091 static int tusb_musb_init(struct musb *musb)
1093 struct platform_device *pdev;
1094 struct resource *mem;
1095 void __iomem *sync = NULL;
1098 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
1099 if (IS_ERR_OR_NULL(musb->xceiv))
1100 return -EPROBE_DEFER;
1102 pdev = to_platform_device(musb->controller);
1104 /* dma address for async dma */
1105 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1107 pr_debug("no async dma resource?\n");
1111 musb->async = mem->start;
1113 /* dma address for sync dma */
1114 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1116 pr_debug("no sync dma resource?\n");
1120 musb->sync = mem->start;
1122 sync = ioremap(mem->start, resource_size(mem));
1124 pr_debug("ioremap for sync failed\n");
1128 musb->sync_va = sync;
1130 /* Offsets from base: VLYNQ at 0x000, MUSB regs at 0x400,
1131 * FIFOs at 0x600, TUSB at 0x800
1133 musb->mregs += TUSB_BASE_OFFSET;
1135 ret = tusb_musb_start(musb);
1137 printk(KERN_ERR "Could not start tusb6010 (%d)\n",
1141 musb->isr = tusb_musb_interrupt;
1143 musb->xceiv->set_power = tusb_draw_power;
1146 timer_setup(&musb->dev_timer, musb_do_idle, 0);
1153 usb_put_phy(musb->xceiv);
1158 static int tusb_musb_exit(struct musb *musb)
1160 del_timer_sync(&musb->dev_timer);
1163 if (musb->board_set_power)
1164 musb->board_set_power(0);
1166 iounmap(musb->sync_va);
1168 usb_put_phy(musb->xceiv);
1172 static const struct musb_platform_ops tusb_ops = {
1173 .quirks = MUSB_DMA_TUSB_OMAP | MUSB_IN_TUSB |
1174 MUSB_G_NO_SKB_RESERVE,
1175 .init = tusb_musb_init,
1176 .exit = tusb_musb_exit,
1178 .ep_offset = tusb_ep_offset,
1179 .ep_select = tusb_ep_select,
1180 .fifo_offset = tusb_fifo_offset,
1181 .readb = tusb_readb,
1182 .writeb = tusb_writeb,
1183 .read_fifo = tusb_read_fifo,
1184 .write_fifo = tusb_write_fifo,
1185 #ifdef CONFIG_USB_TUSB_OMAP_DMA
1186 .dma_init = tusb_dma_controller_create,
1187 .dma_exit = tusb_dma_controller_destroy,
1189 .enable = tusb_musb_enable,
1190 .disable = tusb_musb_disable,
1192 .set_mode = tusb_musb_set_mode,
1193 .try_idle = tusb_musb_try_idle,
1195 .vbus_status = tusb_musb_vbus_status,
1196 .set_vbus = tusb_musb_set_vbus,
1199 static const struct platform_device_info tusb_dev_info = {
1200 .name = "musb-hdrc",
1201 .id = PLATFORM_DEVID_AUTO,
1202 .dma_mask = DMA_BIT_MASK(32),
1205 static int tusb_probe(struct platform_device *pdev)
1207 struct resource musb_resources[3];
1208 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
1209 struct platform_device *musb;
1210 struct tusb6010_glue *glue;
1211 struct platform_device_info pinfo;
1214 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
1218 glue->dev = &pdev->dev;
1220 pdata->platform_ops = &tusb_ops;
1222 usb_phy_generic_register();
1223 platform_set_drvdata(pdev, glue);
1225 memset(musb_resources, 0x00, sizeof(*musb_resources) *
1226 ARRAY_SIZE(musb_resources));
1228 musb_resources[0].name = pdev->resource[0].name;
1229 musb_resources[0].start = pdev->resource[0].start;
1230 musb_resources[0].end = pdev->resource[0].end;
1231 musb_resources[0].flags = pdev->resource[0].flags;
1233 musb_resources[1].name = pdev->resource[1].name;
1234 musb_resources[1].start = pdev->resource[1].start;
1235 musb_resources[1].end = pdev->resource[1].end;
1236 musb_resources[1].flags = pdev->resource[1].flags;
1238 musb_resources[2].name = pdev->resource[2].name;
1239 musb_resources[2].start = pdev->resource[2].start;
1240 musb_resources[2].end = pdev->resource[2].end;
1241 musb_resources[2].flags = pdev->resource[2].flags;
1243 pinfo = tusb_dev_info;
1244 pinfo.parent = &pdev->dev;
1245 pinfo.res = musb_resources;
1246 pinfo.num_res = ARRAY_SIZE(musb_resources);
1248 pinfo.size_data = sizeof(*pdata);
1250 glue->musb = musb = platform_device_register_full(&pinfo);
1252 ret = PTR_ERR(musb);
1253 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
1260 static int tusb_remove(struct platform_device *pdev)
1262 struct tusb6010_glue *glue = platform_get_drvdata(pdev);
1264 platform_device_unregister(glue->musb);
1265 usb_phy_generic_unregister(glue->phy);
1270 static struct platform_driver tusb_driver = {
1271 .probe = tusb_probe,
1272 .remove = tusb_remove,
1274 .name = "musb-tusb",
1278 MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
1279 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1280 MODULE_LICENSE("GPL v2");
1281 module_platform_driver(tusb_driver);