2 * Copyright (C) 2005-2006 by Texas Instruments
4 * This file is part of the Inventra Controller Driver for Linux.
6 * The Inventra Controller Driver for Linux is free software; you
7 * can redistribute it and/or modify it under the terms of the GNU
8 * General Public License version 2 as published by the Free Software
11 * The Inventra Controller Driver for Linux is distributed in
12 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
13 * without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 * License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with The Inventra Controller Driver for Linux ; if not,
19 * write to the Free Software Foundation, Inc., 59 Temple Place,
20 * Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/list.h>
28 #include <linux/delay.h>
29 #include <linux/clk.h>
30 #include <linux/err.h>
32 #include <linux/gpio.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/usb/usb_phy_generic.h>
37 #include <mach/cputype.h>
38 #include <mach/hardware.h>
40 #include <asm/mach-types.h>
42 #include "musb_core.h"
44 #ifdef CONFIG_MACH_DAVINCI_EVM
45 #define GPIO_nVBUS_DRV 160
52 #define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
53 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
57 struct platform_device *musb;
61 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
62 * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
63 * and, when in host mode, autosuspending idle root ports... PHYPLLON
64 * (overriding SUSPENDM?) then likely needs to stay off.
67 static inline void phy_on(void)
69 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
71 /* power everything up; start the on-chip PHY and its PLL */
72 phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
73 phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
74 __raw_writel(phy_ctrl, USB_PHY_CTRL);
76 /* wait for PLL to lock before proceeding */
77 while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
81 static inline void phy_off(void)
83 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
85 /* powerdown the on-chip PHY, its PLL, and the OTG block */
86 phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
87 phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
88 __raw_writel(phy_ctrl, USB_PHY_CTRL);
91 static int dma_off = 1;
93 static void davinci_musb_enable(struct musb *musb)
97 /* workaround: setup irqs through both register sets */
98 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
99 << DAVINCI_USB_TXINT_SHIFT;
100 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
102 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
103 << DAVINCI_USB_RXINT_SHIFT;
104 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
107 val = ~MUSB_INTR_SOF;
108 tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
109 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
111 if (is_dma_capable() && !dma_off)
112 printk(KERN_WARNING "%s %s: dma not reactivated\n",
117 /* force a DRVVBUS irq so we can start polling for ID change */
118 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
119 DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
123 * Disable the HDRC and flush interrupts
125 static void davinci_musb_disable(struct musb *musb)
127 /* because we don't set CTRLR.UINT, "important" to:
128 * - not read/write INTRUSB/INTRUSBE
129 * - (except during initial setup, as workaround)
130 * - use INTSETR/INTCLRR instead
132 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
133 DAVINCI_USB_USBINT_MASK
134 | DAVINCI_USB_TXINT_MASK
135 | DAVINCI_USB_RXINT_MASK);
136 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
138 if (is_dma_capable() && !dma_off)
139 WARNING("dma still active\n");
143 #define portstate(stmt) stmt
146 * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
147 * which doesn't wire DRVVBUS to the FET that switches it. Unclear
148 * if that's a problem with the DM6446 chip or just with that board.
150 * In either case, the DM355 EVM automates DRVVBUS the normal way,
151 * when J10 is out, and TI documents it as handling OTG.
154 #ifdef CONFIG_MACH_DAVINCI_EVM
156 static int vbus_state = -1;
158 /* I2C operations are always synchronous, and require a task context.
159 * With unloaded systems, using the shared workqueue seems to suffice
160 * to satisfy the 100msec A_WAIT_VRISE timeout...
162 static void evm_deferred_drvvbus(struct work_struct *ignored)
164 gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
165 vbus_state = !vbus_state;
170 static void davinci_musb_source_power(struct musb *musb, int is_on, int immediate)
172 #ifdef CONFIG_MACH_DAVINCI_EVM
176 if (vbus_state == is_on)
178 vbus_state = !is_on; /* 0/1 vs "-1 == unknown/init" */
180 if (machine_is_davinci_evm()) {
181 static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus);
184 gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
186 schedule_work(&evm_vbus_work);
193 static void davinci_musb_set_vbus(struct musb *musb, int is_on)
195 WARN_ON(is_on && is_peripheral_active(musb));
196 davinci_musb_source_power(musb, is_on, 0);
200 #define POLL_SECONDS 2
202 static struct timer_list otg_workaround;
204 static void otg_timer(unsigned long _musb)
206 struct musb *musb = (void *)_musb;
207 void __iomem *mregs = musb->mregs;
211 /* We poll because DaVinci's won't expose several OTG-critical
212 * status change events (from the transceiver) otherwise.
214 devctl = musb_readb(mregs, MUSB_DEVCTL);
215 dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
216 usb_otg_state_string(musb->xceiv->otg->state));
218 spin_lock_irqsave(&musb->lock, flags);
219 switch (musb->xceiv->otg->state) {
220 case OTG_STATE_A_WAIT_VFALL:
221 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
222 * seems to mis-handle session "start" otherwise (or in our
223 * case "recover"), in routine "VBUS was valid by the time
224 * VBUSERR got reported during enumeration" cases.
226 if (devctl & MUSB_DEVCTL_VBUS) {
227 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
230 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
231 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
232 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
234 case OTG_STATE_B_IDLE:
236 * There's no ID-changed IRQ, so we have no good way to tell
237 * when to switch to the A-Default state machine (by setting
238 * the DEVCTL.SESSION flag).
240 * Workaround: whenever we're in B_IDLE, try setting the
241 * session flag every few seconds. If it works, ID was
242 * grounded and we're now in the A-Default state machine.
244 * NOTE setting the session flag is _supposed_ to trigger
245 * SRP, but clearly it doesn't.
247 musb_writeb(mregs, MUSB_DEVCTL,
248 devctl | MUSB_DEVCTL_SESSION);
249 devctl = musb_readb(mregs, MUSB_DEVCTL);
250 if (devctl & MUSB_DEVCTL_BDEVICE)
251 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
253 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
258 spin_unlock_irqrestore(&musb->lock, flags);
261 static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
264 irqreturn_t retval = IRQ_NONE;
265 struct musb *musb = __hci;
266 struct usb_otg *otg = musb->xceiv->otg;
267 void __iomem *tibase = musb->ctrl_base;
271 spin_lock_irqsave(&musb->lock, flags);
273 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
274 * the Mentor registers (except for setup), use the TI ones and EOI.
276 * Docs describe irq "vector" registers associated with the CPPI and
277 * USB EOI registers. These hold a bitmask corresponding to the
278 * current IRQ, not an irq handler address. Would using those bits
279 * resolve some of the races observed in this dispatch code??
282 /* CPPI interrupts share the same IRQ line, but have their own
283 * mask, state, "vector", and EOI registers.
285 cppi = container_of(musb->dma_controller, struct cppi, controller);
286 if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
287 retval = cppi_interrupt(irq, __hci);
289 /* ack and handle non-CPPI interrupts */
290 tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
291 musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
292 dev_dbg(musb->controller, "IRQ %08x\n", tmp);
294 musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
295 >> DAVINCI_USB_RXINT_SHIFT;
296 musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
297 >> DAVINCI_USB_TXINT_SHIFT;
298 musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
299 >> DAVINCI_USB_USBINT_SHIFT;
301 /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
302 * DaVinci's missing ID change IRQ. We need an ID change IRQ to
303 * switch appropriately between halves of the OTG state machine.
304 * Managing DEVCTL.SESSION per Mentor docs requires we know its
305 * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
306 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
308 if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
309 int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
310 void __iomem *mregs = musb->mregs;
311 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
312 int err = musb->int_usb & MUSB_INTR_VBUSERROR;
314 err = musb->int_usb & MUSB_INTR_VBUSERROR;
316 /* The Mentor core doesn't debounce VBUS as needed
317 * to cope with device connect current spikes. This
318 * means it's not uncommon for bus-powered devices
319 * to get VBUS errors during enumeration.
321 * This is a workaround, but newer RTL from Mentor
322 * seems to allow a better one: "re"starting sessions
323 * without waiting (on EVM, a **long** time) for VBUS
324 * to stop registering in devctl.
326 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
327 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
328 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
329 WARNING("VBUS error workaround (delay coming)\n");
330 } else if (drvvbus) {
333 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
334 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
335 del_timer(&otg_workaround);
340 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
341 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
344 /* NOTE: this must complete poweron within 100 msec
345 * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
347 davinci_musb_source_power(musb, drvvbus, 0);
348 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
349 drvvbus ? "on" : "off",
350 usb_otg_state_string(musb->xceiv->otg->state),
353 retval = IRQ_HANDLED;
356 if (musb->int_tx || musb->int_rx || musb->int_usb)
357 retval |= musb_interrupt(musb);
359 /* irq stays asserted until EOI is written */
360 musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
362 /* poll for ID change */
363 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
364 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
366 spin_unlock_irqrestore(&musb->lock, flags);
371 static int davinci_musb_set_mode(struct musb *musb, u8 mode)
373 /* EVM can't do this (right?) */
377 static int davinci_musb_init(struct musb *musb)
379 void __iomem *tibase = musb->ctrl_base;
383 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
384 if (IS_ERR_OR_NULL(musb->xceiv)) {
389 musb->mregs += DAVINCI_BASE_OFFSET;
391 /* returns zero if e.g. not clocked */
392 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
396 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
398 davinci_musb_source_power(musb, 0, 1);
400 /* dm355 EVM swaps D+/D- for signal integrity, and
401 * is clocked from the main 24 MHz crystal.
403 if (machine_is_davinci_dm355_evm()) {
404 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
406 phy_ctrl &= ~(3 << 9);
407 phy_ctrl |= USBPHY_DATAPOL;
408 __raw_writel(phy_ctrl, USB_PHY_CTRL);
411 /* On dm355, the default-A state machine needs DRVVBUS control.
412 * If we won't be a host, there's no need to turn it on.
414 if (cpu_is_davinci_dm355()) {
415 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
417 deepsleep &= ~DRVVBUS_FORCE;
418 __raw_writel(deepsleep, DM355_DEEPSLEEP);
421 /* reset the controller */
422 musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
424 /* start the on-chip PHY and its PLL */
429 /* NOTE: irqs are in mixed mode, not bypass to pure-musb */
430 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
431 revision, __raw_readl(USB_PHY_CTRL),
432 musb_readb(tibase, DAVINCI_USB_CTRL_REG));
434 musb->isr = davinci_musb_interrupt;
438 usb_put_phy(musb->xceiv);
440 usb_phy_generic_unregister();
444 static int davinci_musb_exit(struct musb *musb)
446 del_timer_sync(&otg_workaround);
449 if (cpu_is_davinci_dm355()) {
450 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
452 deepsleep &= ~DRVVBUS_FORCE;
453 deepsleep |= DRVVBUS_OVERRIDE;
454 __raw_writel(deepsleep, DM355_DEEPSLEEP);
457 davinci_musb_source_power(musb, 0 /*off*/, 1);
459 /* delay, to avoid problems with module reload */
460 if (musb->xceiv->otg->default_a) {
464 /* if there's no peripheral connected, this can take a
465 * long time to fall, especially on EVM with huge C133.
468 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
469 if (!(devctl & MUSB_DEVCTL_VBUS))
471 if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
472 warn = devctl & MUSB_DEVCTL_VBUS;
473 dev_dbg(musb->controller, "VBUS %d\n",
474 warn >> MUSB_DEVCTL_VBUS_SHIFT);
478 } while (maxdelay > 0);
480 /* in OTG mode, another host might be connected */
481 if (devctl & MUSB_DEVCTL_VBUS)
482 dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
487 usb_put_phy(musb->xceiv);
492 static const struct musb_platform_ops davinci_ops = {
493 .quirks = MUSB_DMA_CPPI,
494 .init = davinci_musb_init,
495 .exit = davinci_musb_exit,
497 #ifdef CONFIG_USB_TI_CPPI_DMA
498 .dma_init = cppi_dma_controller_create,
499 .dma_exit = cppi_dma_controller_destroy,
501 .enable = davinci_musb_enable,
502 .disable = davinci_musb_disable,
504 .set_mode = davinci_musb_set_mode,
506 .set_vbus = davinci_musb_set_vbus,
509 static const struct platform_device_info davinci_dev_info = {
511 .id = PLATFORM_DEVID_AUTO,
512 .dma_mask = DMA_BIT_MASK(32),
515 static int davinci_probe(struct platform_device *pdev)
517 struct resource musb_resources[3];
518 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
519 struct platform_device *musb;
520 struct davinci_glue *glue;
521 struct platform_device_info pinfo;
526 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
530 clk = devm_clk_get(&pdev->dev, "usb");
532 dev_err(&pdev->dev, "failed to get clock\n");
537 ret = clk_enable(clk);
539 dev_err(&pdev->dev, "failed to enable clock\n");
543 glue->dev = &pdev->dev;
546 pdata->platform_ops = &davinci_ops;
548 usb_phy_generic_register();
549 platform_set_drvdata(pdev, glue);
551 memset(musb_resources, 0x00, sizeof(*musb_resources) *
552 ARRAY_SIZE(musb_resources));
554 musb_resources[0].name = pdev->resource[0].name;
555 musb_resources[0].start = pdev->resource[0].start;
556 musb_resources[0].end = pdev->resource[0].end;
557 musb_resources[0].flags = pdev->resource[0].flags;
559 musb_resources[1].name = pdev->resource[1].name;
560 musb_resources[1].start = pdev->resource[1].start;
561 musb_resources[1].end = pdev->resource[1].end;
562 musb_resources[1].flags = pdev->resource[1].flags;
565 * For DM6467 3 resources are passed. A placeholder for the 3rd
566 * resource is always there, so it's safe to always copy it...
568 musb_resources[2].name = pdev->resource[2].name;
569 musb_resources[2].start = pdev->resource[2].start;
570 musb_resources[2].end = pdev->resource[2].end;
571 musb_resources[2].flags = pdev->resource[2].flags;
573 pinfo = davinci_dev_info;
574 pinfo.parent = &pdev->dev;
575 pinfo.res = musb_resources;
576 pinfo.num_res = ARRAY_SIZE(musb_resources);
578 pinfo.size_data = sizeof(*pdata);
580 glue->musb = musb = platform_device_register_full(&pinfo);
583 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
596 static int davinci_remove(struct platform_device *pdev)
598 struct davinci_glue *glue = platform_get_drvdata(pdev);
600 platform_device_unregister(glue->musb);
601 usb_phy_generic_unregister();
602 clk_disable(glue->clk);
607 static struct platform_driver davinci_driver = {
608 .probe = davinci_probe,
609 .remove = davinci_remove,
611 .name = "musb-davinci",
615 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
616 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
617 MODULE_LICENSE("GPL v2");
618 module_platform_driver(davinci_driver);