2 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
4 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
6 * Based on the DaVinci "glue layer" code.
7 * Copyright (C) 2005-2006 by Texas Instruments
10 * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
12 * This file is part of the Inventra Controller Driver for Linux.
14 * The Inventra Controller Driver for Linux is free software; you
15 * can redistribute it and/or modify it under the terms of the GNU
16 * General Public License version 2 as published by the Free Software
19 * The Inventra Controller Driver for Linux is distributed in
20 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
21 * without even the implied warranty of MERCHANTABILITY or
22 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
23 * License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with The Inventra Controller Driver for Linux ; if not,
27 * write to the Free Software Foundation, Inc., 59 Temple Place,
28 * Suite 330, Boston, MA 02111-1307 USA
32 #include <linux/module.h>
33 #include <linux/clk.h>
34 #include <linux/err.h>
36 #include <linux/of_platform.h>
37 #include <linux/phy/phy.h>
38 #include <linux/platform_device.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb/usb_phy_generic.h>
42 #include "musb_core.h"
45 * DA8XX specific definitions
48 /* USB 2.0 OTG module registers */
49 #define DA8XX_USB_REVISION_REG 0x00
50 #define DA8XX_USB_CTRL_REG 0x04
51 #define DA8XX_USB_STAT_REG 0x08
52 #define DA8XX_USB_EMULATION_REG 0x0c
53 #define DA8XX_USB_MODE_REG 0x10 /* Transparent, CDC, [Generic] RNDIS */
54 #define DA8XX_USB_AUTOREQ_REG 0x14
55 #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
56 #define DA8XX_USB_TEARDOWN_REG 0x1c
57 #define DA8XX_USB_INTR_SRC_REG 0x20
58 #define DA8XX_USB_INTR_SRC_SET_REG 0x24
59 #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
60 #define DA8XX_USB_INTR_MASK_REG 0x2c
61 #define DA8XX_USB_INTR_MASK_SET_REG 0x30
62 #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
63 #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
64 #define DA8XX_USB_END_OF_INTR_REG 0x3c
65 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
67 /* Control register bits */
68 #define DA8XX_SOFT_RESET_MASK 1
70 #define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */
71 #define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */
73 /* USB interrupt register bits */
74 #define DA8XX_INTR_USB_SHIFT 16
75 #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
76 /* interrupts and DRVVBUS interrupt */
77 #define DA8XX_INTR_DRVVBUS 0x100
78 #define DA8XX_INTR_RX_SHIFT 8
79 #define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
80 #define DA8XX_INTR_TX_SHIFT 0
81 #define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
83 #define DA8XX_MENTOR_CORE_OFFSET 0x400
87 struct platform_device *musb;
88 struct platform_device *usb_phy;
94 * Because we don't set CTRL.UINT, it's "important" to:
95 * - not read/write INTRUSB/INTRUSBE (except during
96 * initial setup, as a workaround);
97 * - use INTSET/INTCLR instead.
101 * da8xx_musb_enable - enable interrupts
103 static void da8xx_musb_enable(struct musb *musb)
105 void __iomem *reg_base = musb->ctrl_base;
108 /* Workaround: setup IRQs through both register sets. */
109 mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
110 ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
112 musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
114 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
115 musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
116 DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
120 * da8xx_musb_disable - disable HDRC and flush interrupts
122 static void da8xx_musb_disable(struct musb *musb)
124 void __iomem *reg_base = musb->ctrl_base;
126 musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
127 DA8XX_INTR_USB_MASK |
128 DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
129 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
132 #define portstate(stmt) stmt
134 static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
136 WARN_ON(is_on && is_peripheral_active(musb));
139 #define POLL_SECONDS 2
141 static struct timer_list otg_workaround;
143 static void otg_timer(unsigned long _musb)
145 struct musb *musb = (void *)_musb;
146 void __iomem *mregs = musb->mregs;
151 * We poll because DaVinci's won't expose several OTG-critical
152 * status change events (from the transceiver) otherwise.
154 devctl = musb_readb(mregs, MUSB_DEVCTL);
155 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
156 usb_otg_state_string(musb->xceiv->otg->state));
158 spin_lock_irqsave(&musb->lock, flags);
159 switch (musb->xceiv->otg->state) {
160 case OTG_STATE_A_WAIT_BCON:
161 devctl &= ~MUSB_DEVCTL_SESSION;
162 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
164 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
165 if (devctl & MUSB_DEVCTL_BDEVICE) {
166 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
169 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
173 case OTG_STATE_A_WAIT_VFALL:
175 * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
176 * RTL seems to mis-handle session "start" otherwise (or in
177 * our case "recover"), in routine "VBUS was valid by the time
178 * VBUSERR got reported during enumeration" cases.
180 if (devctl & MUSB_DEVCTL_VBUS) {
181 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
184 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
185 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
186 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
188 case OTG_STATE_B_IDLE:
190 * There's no ID-changed IRQ, so we have no good way to tell
191 * when to switch to the A-Default state machine (by setting
192 * the DEVCTL.Session bit).
194 * Workaround: whenever we're in B_IDLE, try setting the
195 * session flag every few seconds. If it works, ID was
196 * grounded and we're now in the A-Default state machine.
198 * NOTE: setting the session flag is _supposed_ to trigger
199 * SRP but clearly it doesn't.
201 musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
202 devctl = musb_readb(mregs, MUSB_DEVCTL);
203 if (devctl & MUSB_DEVCTL_BDEVICE)
204 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
206 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
211 spin_unlock_irqrestore(&musb->lock, flags);
214 static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
216 static unsigned long last_timer;
219 timeout = jiffies + msecs_to_jiffies(3);
221 /* Never idle if active, or when VBUS timeout is not set as host */
222 if (musb->is_active || (musb->a_wait_bcon == 0 &&
223 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
224 dev_dbg(musb->controller, "%s active, deleting timer\n",
225 usb_otg_state_string(musb->xceiv->otg->state));
226 del_timer(&otg_workaround);
227 last_timer = jiffies;
231 if (time_after(last_timer, timeout) && timer_pending(&otg_workaround)) {
232 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
235 last_timer = timeout;
237 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
238 usb_otg_state_string(musb->xceiv->otg->state),
239 jiffies_to_msecs(timeout - jiffies));
240 mod_timer(&otg_workaround, timeout);
243 static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
245 struct musb *musb = hci;
246 void __iomem *reg_base = musb->ctrl_base;
247 struct usb_otg *otg = musb->xceiv->otg;
249 irqreturn_t ret = IRQ_NONE;
252 spin_lock_irqsave(&musb->lock, flags);
255 * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through
256 * the Mentor registers (except for setup), use the TI ones and EOI.
259 /* Acknowledge and handle non-CPPI interrupts */
260 status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
264 musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
265 dev_dbg(musb->controller, "USB IRQ %08x\n", status);
267 musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
268 musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
269 musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
272 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
273 * DA8xx's missing ID change IRQ. We need an ID change IRQ to
274 * switch appropriately between halves of the OTG state machine.
275 * Managing DEVCTL.Session per Mentor docs requires that we know its
276 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
277 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
279 if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
280 int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
281 void __iomem *mregs = musb->mregs;
282 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
285 err = musb->int_usb & MUSB_INTR_VBUSERROR;
288 * The Mentor core doesn't debounce VBUS as needed
289 * to cope with device connect current spikes. This
290 * means it's not uncommon for bus-powered devices
291 * to get VBUS errors during enumeration.
293 * This is a workaround, but newer RTL from Mentor
294 * seems to allow a better one: "re"-starting sessions
295 * without waiting for VBUS to stop registering in
298 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
299 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
300 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
301 WARNING("VBUS error workaround (delay coming)\n");
302 } else if (drvvbus) {
305 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
306 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
307 del_timer(&otg_workaround);
308 } else if (!(musb->int_usb & MUSB_INTR_BABBLE)){
310 * When babble condition happens, drvvbus interrupt
311 * is also generated. Ignore this drvvbus interrupt
312 * and let babble interrupt handler recovers the
313 * controller; otherwise, the host-mode flag is lost
314 * due to the MUSB_DEV_MODE() call below and babble
315 * recovery logic will not called.
320 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
321 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
324 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
325 drvvbus ? "on" : "off",
326 usb_otg_state_string(musb->xceiv->otg->state),
332 if (musb->int_tx || musb->int_rx || musb->int_usb)
333 ret |= musb_interrupt(musb);
336 /* EOI needs to be written for the IRQ to be re-asserted. */
337 if (ret == IRQ_HANDLED || status)
338 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
340 /* Poll for ID change */
341 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
342 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
344 spin_unlock_irqrestore(&musb->lock, flags);
349 static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
351 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
352 enum phy_mode phy_mode;
355 * The PHY has some issues when it is forced in device or host mode.
356 * Unless the user request another mode, configure the PHY in OTG mode.
358 if (!musb->is_initialized)
359 return phy_set_mode(glue->phy, PHY_MODE_USB_OTG);
362 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
363 phy_mode = PHY_MODE_USB_HOST;
365 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
366 phy_mode = PHY_MODE_USB_DEVICE;
368 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
369 phy_mode = PHY_MODE_USB_OTG;
375 return phy_set_mode(glue->phy, phy_mode);
378 static int da8xx_musb_init(struct musb *musb)
380 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
381 void __iomem *reg_base = musb->ctrl_base;
385 musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
387 ret = clk_prepare_enable(glue->clk);
389 dev_err(glue->dev, "failed to enable clock\n");
393 /* Returns zero if e.g. not clocked */
394 rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
398 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
399 if (IS_ERR_OR_NULL(musb->xceiv)) {
404 setup_timer(&otg_workaround, otg_timer, (unsigned long)musb);
406 /* Reset the controller */
407 musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
409 /* Start the on-chip PHY and its PLL. */
410 ret = phy_init(glue->phy);
412 dev_err(glue->dev, "Failed to init phy.\n");
416 ret = phy_power_on(glue->phy);
418 dev_err(glue->dev, "Failed to power on phy.\n");
419 goto err_phy_power_on;
424 /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
425 pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
426 musb_readb(reg_base, DA8XX_USB_CTRL_REG));
428 musb->isr = da8xx_musb_interrupt;
434 clk_disable_unprepare(glue->clk);
438 static int da8xx_musb_exit(struct musb *musb)
440 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
442 del_timer_sync(&otg_workaround);
444 phy_power_off(glue->phy);
446 clk_disable_unprepare(glue->clk);
448 usb_put_phy(musb->xceiv);
453 static inline u8 get_vbus_power(struct device *dev)
455 struct regulator *vbus_supply;
458 vbus_supply = regulator_get_optional(dev, "vbus");
459 if (IS_ERR(vbus_supply))
461 current_uA = regulator_get_current_limit(vbus_supply);
462 regulator_put(vbus_supply);
463 if (current_uA <= 0 || current_uA > 510000)
465 return current_uA / 1000 / 2;
468 #ifdef CONFIG_USB_TI_CPPI41_DMA
469 static void da8xx_dma_controller_callback(struct dma_controller *c)
471 struct musb *musb = c->musb;
472 void __iomem *reg_base = musb->ctrl_base;
474 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
477 static struct dma_controller *
478 da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
480 struct dma_controller *controller;
482 controller = cppi41_dma_controller_create(musb, base);
483 if (IS_ERR_OR_NULL(controller))
486 controller->dma_callback = da8xx_dma_controller_callback;
492 static const struct musb_platform_ops da8xx_ops = {
493 .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
494 MUSB_DMA_CPPI41 | MUSB_DA8XX,
495 .init = da8xx_musb_init,
496 .exit = da8xx_musb_exit,
499 #ifdef CONFIG_USB_TI_CPPI41_DMA
500 .dma_init = da8xx_dma_controller_create,
501 .dma_exit = cppi41_dma_controller_destroy,
503 .enable = da8xx_musb_enable,
504 .disable = da8xx_musb_disable,
506 .set_mode = da8xx_musb_set_mode,
507 .try_idle = da8xx_musb_try_idle,
509 .set_vbus = da8xx_musb_set_vbus,
512 static const struct platform_device_info da8xx_dev_info = {
514 .id = PLATFORM_DEVID_AUTO,
515 .dma_mask = DMA_BIT_MASK(32),
518 static const struct musb_hdrc_config da8xx_config = {
524 static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
525 OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
530 static int da8xx_probe(struct platform_device *pdev)
532 struct resource musb_resources[2];
533 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
534 struct da8xx_glue *glue;
535 struct platform_device_info pinfo;
537 struct device_node *np = pdev->dev.of_node;
540 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
544 clk = devm_clk_get(&pdev->dev, "usb20");
546 dev_err(&pdev->dev, "failed to get clock\n");
550 glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
551 if (IS_ERR(glue->phy)) {
552 if (PTR_ERR(glue->phy) != -EPROBE_DEFER)
553 dev_err(&pdev->dev, "failed to get phy\n");
554 return PTR_ERR(glue->phy);
557 glue->dev = &pdev->dev;
560 if (IS_ENABLED(CONFIG_OF) && np) {
561 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
565 pdata->config = &da8xx_config;
566 pdata->mode = musb_get_mode(&pdev->dev);
567 pdata->power = get_vbus_power(&pdev->dev);
570 pdata->platform_ops = &da8xx_ops;
572 glue->usb_phy = usb_phy_generic_register();
573 ret = PTR_ERR_OR_ZERO(glue->usb_phy);
575 dev_err(&pdev->dev, "failed to register usb_phy\n");
578 platform_set_drvdata(pdev, glue);
580 ret = of_platform_populate(pdev->dev.of_node, NULL,
581 da8xx_auxdata_lookup, &pdev->dev);
585 memset(musb_resources, 0x00, sizeof(*musb_resources) *
586 ARRAY_SIZE(musb_resources));
588 musb_resources[0].name = pdev->resource[0].name;
589 musb_resources[0].start = pdev->resource[0].start;
590 musb_resources[0].end = pdev->resource[0].end;
591 musb_resources[0].flags = pdev->resource[0].flags;
593 musb_resources[1].name = pdev->resource[1].name;
594 musb_resources[1].start = pdev->resource[1].start;
595 musb_resources[1].end = pdev->resource[1].end;
596 musb_resources[1].flags = pdev->resource[1].flags;
598 pinfo = da8xx_dev_info;
599 pinfo.parent = &pdev->dev;
600 pinfo.res = musb_resources;
601 pinfo.num_res = ARRAY_SIZE(musb_resources);
603 pinfo.size_data = sizeof(*pdata);
605 glue->musb = platform_device_register_full(&pinfo);
606 ret = PTR_ERR_OR_ZERO(glue->musb);
608 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
609 usb_phy_generic_unregister(glue->usb_phy);
615 static int da8xx_remove(struct platform_device *pdev)
617 struct da8xx_glue *glue = platform_get_drvdata(pdev);
619 platform_device_unregister(glue->musb);
620 usb_phy_generic_unregister(glue->usb_phy);
625 #ifdef CONFIG_PM_SLEEP
626 static int da8xx_suspend(struct device *dev)
629 struct da8xx_glue *glue = dev_get_drvdata(dev);
631 ret = phy_power_off(glue->phy);
634 clk_disable_unprepare(glue->clk);
639 static int da8xx_resume(struct device *dev)
642 struct da8xx_glue *glue = dev_get_drvdata(dev);
644 ret = clk_prepare_enable(glue->clk);
647 return phy_power_on(glue->phy);
651 static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
654 static const struct of_device_id da8xx_id_table[] = {
656 .compatible = "ti,da830-musb",
660 MODULE_DEVICE_TABLE(of, da8xx_id_table);
663 static struct platform_driver da8xx_driver = {
664 .probe = da8xx_probe,
665 .remove = da8xx_remove,
667 .name = "musb-da8xx",
669 .of_match_table = of_match_ptr(da8xx_id_table),
673 MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
674 MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
675 MODULE_LICENSE("GPL v2");
676 module_platform_driver(da8xx_driver);