1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
5 * Copyright (C) 2008 Intel Corp.
8 * Some code borrowed from the Linux EHCI driver.
12 * Ring initialization rules:
13 * 1. Each segment is initialized to zero, except for link TRBs.
14 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
15 * Consumer Cycle State (CCS), depending on ring function.
16 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
18 * Ring behavior rules:
19 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
20 * least one free TRB in the ring. This is useful if you want to turn that
21 * into a link TRB and expand the ring.
22 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
23 * link TRB, then load the pointer with the address in the link TRB. If the
24 * link TRB had its toggle bit set, you may need to update the ring cycle
25 * state (see cycle bit rules). You may have to do this multiple times
26 * until you reach a non-link TRB.
27 * 3. A ring is full if enqueue++ (for the definition of increment above)
28 * equals the dequeue pointer.
31 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
32 * in a link TRB, it must toggle the ring cycle state.
33 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
34 * in a link TRB, it must toggle the ring cycle state.
37 * 1. Check if ring is full before you enqueue.
38 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
39 * Update enqueue pointer between each write (which may update the ring
41 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
42 * and endpoint rings. If HC is the producer for the event ring,
43 * and it generates an interrupt according to interrupt modulation rules.
46 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
47 * the TRB is owned by the consumer.
48 * 2. Update dequeue pointer (which may update the ring cycle state) and
49 * continue processing TRBs until you reach a TRB which is not owned by you.
50 * 3. Notify the producer. SW is the consumer for the event ring, and it
51 * updates event ring dequeue pointer. HC is the consumer for the command and
52 * endpoint rings; it generates events on the event ring for these.
55 #include <linux/scatterlist.h>
56 #include <linux/slab.h>
57 #include <linux/dma-mapping.h>
59 #include "xhci-trace.h"
63 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
66 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
69 unsigned long segment_offset;
71 if (!seg || !trb || trb < seg->trbs)
74 segment_offset = trb - seg->trbs;
75 if (segment_offset >= TRBS_PER_SEGMENT)
77 return seg->dma + (segment_offset * sizeof(*trb));
80 static bool trb_is_noop(union xhci_trb *trb)
82 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
85 static bool trb_is_link(union xhci_trb *trb)
87 return TRB_TYPE_LINK_LE32(trb->link.control);
90 static bool last_trb_on_seg(struct xhci_segment *seg, union xhci_trb *trb)
92 return trb == &seg->trbs[TRBS_PER_SEGMENT - 1];
95 static bool last_trb_on_ring(struct xhci_ring *ring,
96 struct xhci_segment *seg, union xhci_trb *trb)
98 return last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg);
101 static bool link_trb_toggles_cycle(union xhci_trb *trb)
103 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
106 static bool last_td_in_urb(struct xhci_td *td)
108 struct urb_priv *urb_priv = td->urb->hcpriv;
110 return urb_priv->num_tds_done == urb_priv->num_tds;
113 static void inc_td_cnt(struct urb *urb)
115 struct urb_priv *urb_priv = urb->hcpriv;
117 urb_priv->num_tds_done++;
120 static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
122 if (trb_is_link(trb)) {
123 /* unchain chained link TRBs */
124 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
126 trb->generic.field[0] = 0;
127 trb->generic.field[1] = 0;
128 trb->generic.field[2] = 0;
129 /* Preserve only the cycle bit of this TRB */
130 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
131 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
135 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
136 * TRB is in a new segment. This does not skip over link TRBs, and it does not
137 * effect the ring dequeue or enqueue pointers.
139 static void next_trb(struct xhci_hcd *xhci,
140 struct xhci_ring *ring,
141 struct xhci_segment **seg,
142 union xhci_trb **trb)
144 if (trb_is_link(*trb)) {
146 *trb = ((*seg)->trbs);
153 * See Cycle bit rules. SW is the consumer for the event ring only.
154 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
156 void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
158 /* event ring doesn't have link trbs, check for last trb */
159 if (ring->type == TYPE_EVENT) {
160 if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
164 if (last_trb_on_ring(ring, ring->deq_seg, ring->dequeue))
165 ring->cycle_state ^= 1;
166 ring->deq_seg = ring->deq_seg->next;
167 ring->dequeue = ring->deq_seg->trbs;
171 /* All other rings have link trbs */
172 if (!trb_is_link(ring->dequeue)) {
174 ring->num_trbs_free++;
176 while (trb_is_link(ring->dequeue)) {
177 ring->deq_seg = ring->deq_seg->next;
178 ring->dequeue = ring->deq_seg->trbs;
182 trace_xhci_inc_deq(ring);
188 * See Cycle bit rules. SW is the consumer for the event ring only.
189 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
191 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
192 * chain bit is set), then set the chain bit in all the following link TRBs.
193 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
194 * have their chain bit cleared (so that each Link TRB is a separate TD).
196 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
197 * set, but other sections talk about dealing with the chain bit set. This was
198 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
199 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
201 * @more_trbs_coming: Will you enqueue more TRBs before calling
202 * prepare_transfer()?
204 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
205 bool more_trbs_coming)
208 union xhci_trb *next;
210 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
211 /* If this is not event ring, there is one less usable TRB */
212 if (!trb_is_link(ring->enqueue))
213 ring->num_trbs_free--;
214 next = ++(ring->enqueue);
216 /* Update the dequeue pointer further if that was a link TRB */
217 while (trb_is_link(next)) {
220 * If the caller doesn't plan on enqueueing more TDs before
221 * ringing the doorbell, then we don't want to give the link TRB
222 * to the hardware just yet. We'll give the link TRB back in
223 * prepare_ring() just before we enqueue the TD at the top of
226 if (!chain && !more_trbs_coming)
229 /* If we're not dealing with 0.95 hardware or isoc rings on
230 * AMD 0.96 host, carry over the chain bit of the previous TRB
231 * (which may mean the chain bit is cleared).
233 if (!(ring->type == TYPE_ISOC &&
234 (xhci->quirks & XHCI_AMD_0x96_HOST)) &&
235 !xhci_link_trb_quirk(xhci)) {
236 next->link.control &= cpu_to_le32(~TRB_CHAIN);
237 next->link.control |= cpu_to_le32(chain);
239 /* Give this link TRB to the hardware */
241 next->link.control ^= cpu_to_le32(TRB_CYCLE);
243 /* Toggle the cycle bit after the last ring segment. */
244 if (link_trb_toggles_cycle(next))
245 ring->cycle_state ^= 1;
247 ring->enq_seg = ring->enq_seg->next;
248 ring->enqueue = ring->enq_seg->trbs;
249 next = ring->enqueue;
252 trace_xhci_inc_enq(ring);
256 * Check to see if there's room to enqueue num_trbs on the ring and make sure
257 * enqueue pointer will not advance into dequeue segment. See rules above.
259 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
260 unsigned int num_trbs)
262 int num_trbs_in_deq_seg;
264 if (ring->num_trbs_free < num_trbs)
267 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
268 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
269 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
276 /* Ring the host controller doorbell after placing a command on the ring */
277 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
279 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
282 xhci_dbg(xhci, "// Ding dong!\n");
284 trace_xhci_ring_host_doorbell(0, DB_VALUE_HOST);
286 writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
287 /* Flush PCI posted writes */
288 readl(&xhci->dba->doorbell[0]);
291 static bool xhci_mod_cmd_timer(struct xhci_hcd *xhci, unsigned long delay)
293 return mod_delayed_work(system_wq, &xhci->cmd_timer, delay);
296 static struct xhci_command *xhci_next_queued_cmd(struct xhci_hcd *xhci)
298 return list_first_entry_or_null(&xhci->cmd_list, struct xhci_command,
303 * Turn all commands on command ring with status set to "aborted" to no-op trbs.
304 * If there are other commands waiting then restart the ring and kick the timer.
305 * This must be called with command ring stopped and xhci->lock held.
307 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
308 struct xhci_command *cur_cmd)
310 struct xhci_command *i_cmd;
312 /* Turn all aborted commands in list to no-ops, then restart */
313 list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
315 if (i_cmd->status != COMP_COMMAND_ABORTED)
318 i_cmd->status = COMP_COMMAND_RING_STOPPED;
320 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
323 trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
326 * caller waiting for completion is called when command
327 * completion event is received for these no-op commands
331 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
333 /* ring command ring doorbell to restart the command ring */
334 if ((xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue) &&
335 !(xhci->xhc_state & XHCI_STATE_DYING)) {
336 xhci->current_cmd = cur_cmd;
337 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
338 xhci_ring_cmd_db(xhci);
342 /* Must be called with xhci->lock held, releases and aquires lock back */
343 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
345 struct xhci_segment *new_seg = xhci->cmd_ring->deq_seg;
346 union xhci_trb *new_deq = xhci->cmd_ring->dequeue;
350 xhci_dbg(xhci, "Abort command ring\n");
352 reinit_completion(&xhci->cmd_ring_stop_completion);
355 * The control bits like command stop, abort are located in lower
356 * dword of the command ring control register.
357 * Some controllers require all 64 bits to be written to abort the ring.
358 * Make sure the upper dword is valid, pointing to the next command,
359 * avoiding corrupting the command ring pointer in case the command ring
360 * is stopped by the time the upper dword is written.
362 next_trb(xhci, NULL, &new_seg, &new_deq);
363 if (trb_is_link(new_deq))
364 next_trb(xhci, NULL, &new_seg, &new_deq);
366 crcr = xhci_trb_virt_to_dma(new_seg, new_deq);
367 xhci_write_64(xhci, crcr | CMD_RING_ABORT, &xhci->op_regs->cmd_ring);
369 /* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the
370 * completion of the Command Abort operation. If CRR is not negated in 5
371 * seconds then driver handles it as if host died (-ENODEV).
372 * In the future we should distinguish between -ENODEV and -ETIMEDOUT
373 * and try to recover a -ETIMEDOUT with a host controller reset.
375 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
376 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
378 xhci_err(xhci, "Abort failed to stop command ring: %d\n", ret);
384 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
385 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
386 * but the completion event in never sent. Wait 2 secs (arbitrary
387 * number) to handle those cases after negation of CMD_RING_RUNNING.
389 spin_unlock_irqrestore(&xhci->lock, flags);
390 ret = wait_for_completion_timeout(&xhci->cmd_ring_stop_completion,
391 msecs_to_jiffies(2000));
392 spin_lock_irqsave(&xhci->lock, flags);
394 xhci_dbg(xhci, "No stop event for abort, ring start fail?\n");
395 xhci_cleanup_command_queue(xhci);
397 xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
402 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
403 unsigned int slot_id,
404 unsigned int ep_index,
405 unsigned int stream_id)
407 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
408 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
409 unsigned int ep_state = ep->ep_state;
411 /* Don't ring the doorbell for this endpoint if there are pending
412 * cancellations because we don't want to interrupt processing.
413 * We don't want to restart any stream rings if there's a set dequeue
414 * pointer command pending because the device can choose to start any
415 * stream once the endpoint is on the HW schedule.
417 if ((ep_state & EP_STOP_CMD_PENDING) || (ep_state & SET_DEQ_PENDING) ||
418 (ep_state & EP_HALTED) || (ep_state & EP_CLEARING_TT))
421 trace_xhci_ring_ep_doorbell(slot_id, DB_VALUE(ep_index, stream_id));
423 writel(DB_VALUE(ep_index, stream_id), db_addr);
424 /* The CPU has better things to do at this point than wait for a
425 * write-posting flush. It'll get there soon enough.
429 /* Ring the doorbell for any rings with pending URBs */
430 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
431 unsigned int slot_id,
432 unsigned int ep_index)
434 unsigned int stream_id;
435 struct xhci_virt_ep *ep;
437 ep = &xhci->devs[slot_id]->eps[ep_index];
439 /* A ring has pending URBs if its TD list is not empty */
440 if (!(ep->ep_state & EP_HAS_STREAMS)) {
441 if (ep->ring && !(list_empty(&ep->ring->td_list)))
442 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
446 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
448 struct xhci_stream_info *stream_info = ep->stream_info;
449 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
450 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
455 void xhci_ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
456 unsigned int slot_id,
457 unsigned int ep_index)
459 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
462 static struct xhci_virt_ep *xhci_get_virt_ep(struct xhci_hcd *xhci,
463 unsigned int slot_id,
464 unsigned int ep_index)
466 if (slot_id == 0 || slot_id >= MAX_HC_SLOTS) {
467 xhci_warn(xhci, "Invalid slot_id %u\n", slot_id);
470 if (ep_index >= EP_CTX_PER_DEV) {
471 xhci_warn(xhci, "Invalid endpoint index %u\n", ep_index);
474 if (!xhci->devs[slot_id]) {
475 xhci_warn(xhci, "No xhci virt device for slot_id %u\n", slot_id);
479 return &xhci->devs[slot_id]->eps[ep_index];
482 /* Get the right ring for the given slot_id, ep_index and stream_id.
483 * If the endpoint supports streams, boundary check the URB's stream ID.
484 * If the endpoint doesn't support streams, return the singular endpoint ring.
486 struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
487 unsigned int slot_id, unsigned int ep_index,
488 unsigned int stream_id)
490 struct xhci_virt_ep *ep;
492 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
496 /* Common case: no streams */
497 if (!(ep->ep_state & EP_HAS_STREAMS))
500 if (stream_id == 0) {
502 "WARN: Slot ID %u, ep index %u has streams, "
503 "but URB has no stream ID.\n",
508 if (stream_id < ep->stream_info->num_streams)
509 return ep->stream_info->stream_rings[stream_id];
512 "WARN: Slot ID %u, ep index %u has "
513 "stream IDs 1 to %u allocated, "
514 "but stream ID %u is requested.\n",
516 ep->stream_info->num_streams - 1,
523 * Get the hw dequeue pointer xHC stopped on, either directly from the
524 * endpoint context, or if streams are in use from the stream context.
525 * The returned hw_dequeue contains the lowest four bits with cycle state
526 * and possbile stream context type.
528 static u64 xhci_get_hw_deq(struct xhci_hcd *xhci, struct xhci_virt_device *vdev,
529 unsigned int ep_index, unsigned int stream_id)
531 struct xhci_ep_ctx *ep_ctx;
532 struct xhci_stream_ctx *st_ctx;
533 struct xhci_virt_ep *ep;
535 ep = &vdev->eps[ep_index];
537 if (ep->ep_state & EP_HAS_STREAMS) {
538 st_ctx = &ep->stream_info->stream_ctx_array[stream_id];
539 return le64_to_cpu(st_ctx->stream_ring);
541 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
542 return le64_to_cpu(ep_ctx->deq);
546 * Move the xHC's endpoint ring dequeue pointer past cur_td.
547 * Record the new state of the xHC's endpoint ring dequeue segment,
548 * dequeue pointer, stream id, and new consumer cycle state in state.
549 * Update our internal representation of the ring's dequeue pointer.
551 * We do this in three jumps:
552 * - First we update our new ring state to be the same as when the xHC stopped.
553 * - Then we traverse the ring to find the segment that contains
554 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
555 * any link TRBs with the toggle cycle bit set.
556 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
557 * if we've moved it past a link TRB with the toggle cycle bit set.
559 * Some of the uses of xhci_generic_trb are grotty, but if they're done
560 * with correct __le32 accesses they should work fine. Only users of this are
563 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
564 unsigned int slot_id, unsigned int ep_index,
565 unsigned int stream_id, struct xhci_td *cur_td,
566 struct xhci_dequeue_state *state)
568 struct xhci_virt_device *dev = xhci->devs[slot_id];
569 struct xhci_virt_ep *ep = &dev->eps[ep_index];
570 struct xhci_ring *ep_ring;
571 struct xhci_segment *new_seg;
572 struct xhci_segment *halted_seg = NULL;
573 union xhci_trb *new_deq;
574 union xhci_trb *halted_trb;
578 bool cycle_found = false;
579 bool td_last_trb_found = false;
581 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
582 ep_index, stream_id);
584 xhci_warn(xhci, "WARN can't find new dequeue state "
585 "for invalid stream ID %u.\n",
590 * A cancelled TD can complete with a stall if HW cached the trb.
591 * In this case driver can't find cur_td, but if the ring is empty we
592 * can move the dequeue pointer to the current enqueue position.
595 if (list_empty(&ep_ring->td_list)) {
596 state->new_deq_seg = ep_ring->enq_seg;
597 state->new_deq_ptr = ep_ring->enqueue;
598 state->new_cycle_state = ep_ring->cycle_state;
601 xhci_warn(xhci, "Can't find new dequeue state, missing cur_td\n");
606 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
607 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
608 "Finding endpoint context");
610 hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
611 new_seg = ep_ring->deq_seg;
612 new_deq = ep_ring->dequeue;
615 * Quirk: xHC write-back of the DCS field in the hardware dequeue
616 * pointer is wrong - use the cycle state of the TRB pointed to by
617 * the dequeue pointer.
619 if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS &&
620 !(ep->ep_state & EP_HAS_STREAMS))
621 halted_seg = trb_in_td(xhci, cur_td->start_seg,
622 cur_td->first_trb, cur_td->last_trb,
623 hw_dequeue & ~0xf, false);
625 index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) /
627 halted_trb = &halted_seg->trbs[index];
628 state->new_cycle_state = halted_trb->generic.field[3] & 0x1;
629 xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n",
630 (u8)(hw_dequeue & 0x1), index,
631 state->new_cycle_state);
633 state->new_cycle_state = hw_dequeue & 0x1;
635 state->stream_id = stream_id;
638 * We want to find the pointer, segment and cycle state of the new trb
639 * (the one after current TD's last_trb). We know the cycle state at
640 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
644 if (!cycle_found && xhci_trb_virt_to_dma(new_seg, new_deq)
645 == (dma_addr_t)(hw_dequeue & ~0xf)) {
647 if (td_last_trb_found)
650 if (new_deq == cur_td->last_trb)
651 td_last_trb_found = true;
653 if (cycle_found && trb_is_link(new_deq) &&
654 link_trb_toggles_cycle(new_deq))
655 state->new_cycle_state ^= 0x1;
657 next_trb(xhci, ep_ring, &new_seg, &new_deq);
659 /* Search wrapped around, bail out */
660 if (new_deq == ep->ring->dequeue) {
661 xhci_err(xhci, "Error: Failed finding new dequeue state\n");
662 state->new_deq_seg = NULL;
663 state->new_deq_ptr = NULL;
667 } while (!cycle_found || !td_last_trb_found);
669 state->new_deq_seg = new_seg;
670 state->new_deq_ptr = new_deq;
673 /* Don't update the ring cycle state for the producer (us). */
674 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
675 "Cycle state = 0x%x", state->new_cycle_state);
677 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
678 "New dequeue segment = %p (virtual)",
680 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
681 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
682 "New dequeue pointer = 0x%llx (DMA)",
683 (unsigned long long) addr);
686 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
687 * (The last TRB actually points to the ring enqueue pointer, which is not part
688 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
690 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
691 struct xhci_td *td, bool flip_cycle)
693 struct xhci_segment *seg = td->start_seg;
694 union xhci_trb *trb = td->first_trb;
697 trb_to_noop(trb, TRB_TR_NOOP);
699 /* flip cycle if asked to */
700 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
701 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
703 if (trb == td->last_trb)
706 next_trb(xhci, ep_ring, &seg, &trb);
710 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
711 struct xhci_virt_ep *ep)
713 ep->ep_state &= ~EP_STOP_CMD_PENDING;
714 /* Can't del_timer_sync in interrupt */
715 del_timer(&ep->stop_cmd_timer);
719 * Must be called with xhci->lock held in interrupt context,
720 * releases and re-acquires xhci->lock
722 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
723 struct xhci_td *cur_td, int status)
725 struct urb *urb = cur_td->urb;
726 struct urb_priv *urb_priv = urb->hcpriv;
727 struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus);
729 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
730 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
731 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
732 if (xhci->quirks & XHCI_AMD_PLL_FIX)
733 usb_amd_quirk_pll_enable();
736 xhci_urb_free_priv(urb_priv);
737 usb_hcd_unlink_urb_from_ep(hcd, urb);
738 trace_xhci_urb_giveback(urb);
739 usb_hcd_giveback_urb(hcd, urb, status);
742 static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
743 struct xhci_ring *ring, struct xhci_td *td)
745 struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
746 struct xhci_segment *seg = td->bounce_seg;
747 struct urb *urb = td->urb;
750 if (!ring || !seg || !urb)
753 if (usb_urb_dir_out(urb)) {
754 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
759 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
761 /* for in tranfers we need to copy the data from bounce to sg */
763 len = sg_pcopy_from_buffer(urb->sg, urb->num_sgs, seg->bounce_buf,
764 seg->bounce_len, seg->bounce_offs);
765 if (len != seg->bounce_len)
766 xhci_warn(xhci, "WARN Wrong bounce buffer read length: %zu != %d\n",
767 len, seg->bounce_len);
769 memcpy(urb->transfer_buffer + seg->bounce_offs, seg->bounce_buf,
773 seg->bounce_offs = 0;
776 static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
777 struct xhci_ring *ep_ring, int status)
779 struct urb *urb = NULL;
781 /* Clean up the endpoint's TD list */
784 /* if a bounce buffer was used to align this td then unmap it */
785 xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
787 /* Do one last check of the actual transfer length.
788 * If the host controller said we transferred more data than the buffer
789 * length, urb->actual_length will be a very big number (since it's
790 * unsigned). Play it safe and say we didn't transfer anything.
792 if (urb->actual_length > urb->transfer_buffer_length) {
793 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
794 urb->transfer_buffer_length, urb->actual_length);
795 urb->actual_length = 0;
798 list_del_init(&td->td_list);
799 /* Was this TD slated to be cancelled but completed anyway? */
800 if (!list_empty(&td->cancelled_td_list))
801 list_del_init(&td->cancelled_td_list);
804 /* Giveback the urb when all the tds are completed */
805 if (last_td_in_urb(td)) {
806 if ((urb->actual_length != urb->transfer_buffer_length &&
807 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
808 (status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
809 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
810 urb, urb->actual_length,
811 urb->transfer_buffer_length, status);
813 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
814 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
816 xhci_giveback_urb_in_irq(xhci, td, status);
822 static int xhci_reset_halted_ep(struct xhci_hcd *xhci, unsigned int slot_id,
823 unsigned int ep_index, enum xhci_ep_reset_type reset_type)
825 struct xhci_command *command;
828 command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
834 ret = xhci_queue_reset_ep(xhci, command, slot_id, ep_index, reset_type);
837 xhci_err(xhci, "ERROR queuing reset endpoint for slot %d ep_index %d, %d\n",
838 slot_id, ep_index, ret);
842 static void xhci_handle_halted_endpoint(struct xhci_hcd *xhci,
843 struct xhci_virt_ep *ep, unsigned int stream_id,
845 enum xhci_ep_reset_type reset_type)
847 unsigned int slot_id = ep->vdev->slot_id;
851 * Avoid resetting endpoint if link is inactive. Can cause host hang.
852 * Device will be reset soon to recover the link so don't do anything
854 if (ep->vdev->flags & VDEV_PORT_ERROR)
857 ep->ep_state |= EP_HALTED;
859 err = xhci_reset_halted_ep(xhci, slot_id, ep->ep_index, reset_type);
863 if (reset_type == EP_HARD_RESET) {
864 ep->ep_state |= EP_HARD_CLEAR_TOGGLE;
865 xhci_cleanup_stalled_ring(xhci, slot_id, ep->ep_index, stream_id,
868 xhci_ring_cmd_db(xhci);
872 * Fix up the ep ring first, so HW stops executing cancelled TDs.
873 * We have the xHCI lock, so nothing can modify this list until we drop it.
874 * We're also in the event handler, so we can't get re-interrupted if another
875 * Stop Endpoint command completes.
878 static int xhci_invalidate_cancelled_tds(struct xhci_virt_ep *ep,
879 struct xhci_dequeue_state *deq_state)
881 struct xhci_hcd *xhci;
882 struct xhci_td *td = NULL;
883 struct xhci_td *tmp_td = NULL;
884 struct xhci_ring *ring;
889 list_for_each_entry_safe(td, tmp_td, &ep->cancelled_td_list, cancelled_td_list) {
890 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
891 "Removing canceled TD starting at 0x%llx (dma).",
892 (unsigned long long)xhci_trb_virt_to_dma(
893 td->start_seg, td->first_trb));
894 list_del_init(&td->td_list);
895 ring = xhci_urb_to_transfer_ring(xhci, td->urb);
897 xhci_warn(xhci, "WARN Cancelled URB %p has invalid stream ID %u.\n",
898 td->urb, td->urb->stream_id);
902 * If ring stopped on the TD we need to cancel, then we have to
903 * move the xHC endpoint ring dequeue pointer past this TD.
905 hw_deq = xhci_get_hw_deq(xhci, ep->vdev, ep->ep_index,
909 if (trb_in_td(xhci, td->start_seg, td->first_trb,
910 td->last_trb, hw_deq, false)) {
911 xhci_find_new_dequeue_state(xhci, ep->vdev->slot_id,
916 td_to_noop(xhci, ring, td, false);
924 * When we get a command completion for a Stop Endpoint Command, we need to
925 * unlink any cancelled TDs from the ring. There are two ways to do that:
927 * 1. If the HW was in the middle of processing the TD that needs to be
928 * cancelled, then we must move the ring's dequeue pointer past the last TRB
929 * in the TD with a Set Dequeue Pointer Command.
930 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
931 * bit cleared) so that the HW will skip over them.
933 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
934 union xhci_trb *trb, struct xhci_event_cmd *event)
936 unsigned int ep_index;
937 struct xhci_ring *ep_ring;
938 struct xhci_virt_ep *ep;
939 struct xhci_td *cur_td = NULL;
940 struct xhci_td *last_unlinked_td;
941 struct xhci_ep_ctx *ep_ctx;
942 struct xhci_virt_device *vdev;
943 struct xhci_dequeue_state deq_state;
945 if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb->generic.field[3])))) {
946 if (!xhci->devs[slot_id])
947 xhci_warn(xhci, "Stop endpoint command "
948 "completion for disabled slot %u\n",
953 memset(&deq_state, 0, sizeof(deq_state));
954 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
956 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
960 vdev = xhci->devs[slot_id];
961 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
962 trace_xhci_handle_cmd_stop_ep(ep_ctx);
964 last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
965 struct xhci_td, cancelled_td_list);
967 if (list_empty(&ep->cancelled_td_list)) {
968 xhci_stop_watchdog_timer_in_irq(xhci, ep);
969 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
973 xhci_invalidate_cancelled_tds(ep, &deq_state);
975 xhci_stop_watchdog_timer_in_irq(xhci, ep);
977 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
978 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
979 xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
981 xhci_ring_cmd_db(xhci);
983 /* Otherwise ring the doorbell(s) to restart queued transfers */
984 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
988 * Drop the lock and complete the URBs in the cancelled TD list.
989 * New TDs to be cancelled might be added to the end of the list before
990 * we can complete all the URBs for the TDs we already unlinked.
991 * So stop when we've completed the URB for the last TD we unlinked.
994 cur_td = list_first_entry(&ep->cancelled_td_list,
995 struct xhci_td, cancelled_td_list);
996 list_del_init(&cur_td->cancelled_td_list);
998 /* Clean up the cancelled URB */
999 /* Doesn't matter what we pass for status, since the core will
1000 * just overwrite it (because the URB has been unlinked).
1002 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
1003 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
1004 inc_td_cnt(cur_td->urb);
1005 if (last_td_in_urb(cur_td))
1006 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
1008 /* Stop processing the cancelled list if the watchdog timer is
1011 if (xhci->xhc_state & XHCI_STATE_DYING)
1013 } while (cur_td != last_unlinked_td);
1015 /* Return to the event handler with xhci->lock re-acquired */
1018 static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
1020 struct xhci_td *cur_td;
1021 struct xhci_td *tmp;
1023 list_for_each_entry_safe(cur_td, tmp, &ring->td_list, td_list) {
1024 list_del_init(&cur_td->td_list);
1026 if (!list_empty(&cur_td->cancelled_td_list))
1027 list_del_init(&cur_td->cancelled_td_list);
1029 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
1031 inc_td_cnt(cur_td->urb);
1032 if (last_td_in_urb(cur_td))
1033 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
1037 static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
1038 int slot_id, int ep_index)
1040 struct xhci_td *cur_td;
1041 struct xhci_td *tmp;
1042 struct xhci_virt_ep *ep;
1043 struct xhci_ring *ring;
1045 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
1049 if ((ep->ep_state & EP_HAS_STREAMS) ||
1050 (ep->ep_state & EP_GETTING_NO_STREAMS)) {
1053 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
1055 ring = ep->stream_info->stream_rings[stream_id];
1059 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1060 "Killing URBs for slot ID %u, ep index %u, stream %u",
1061 slot_id, ep_index, stream_id);
1062 xhci_kill_ring_urbs(xhci, ring);
1068 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1069 "Killing URBs for slot ID %u, ep index %u",
1071 xhci_kill_ring_urbs(xhci, ring);
1074 list_for_each_entry_safe(cur_td, tmp, &ep->cancelled_td_list,
1075 cancelled_td_list) {
1076 list_del_init(&cur_td->cancelled_td_list);
1077 inc_td_cnt(cur_td->urb);
1079 if (last_td_in_urb(cur_td))
1080 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
1085 * host controller died, register read returns 0xffffffff
1086 * Complete pending commands, mark them ABORTED.
1087 * URBs need to be given back as usb core might be waiting with device locks
1088 * held for the URBs to finish during device disconnect, blocking host remove.
1090 * Call with xhci->lock held.
1091 * lock is relased and re-acquired while giving back urb.
1093 void xhci_hc_died(struct xhci_hcd *xhci)
1097 if (xhci->xhc_state & XHCI_STATE_DYING)
1100 xhci_err(xhci, "xHCI host controller not responding, assume dead\n");
1101 xhci->xhc_state |= XHCI_STATE_DYING;
1103 xhci_cleanup_command_queue(xhci);
1105 /* return any pending urbs, remove may be waiting for them */
1106 for (i = 0; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
1109 for (j = 0; j < 31; j++)
1110 xhci_kill_endpoint_urbs(xhci, i, j);
1113 /* inform usb core hc died if PCI remove isn't already handling it */
1114 if (!(xhci->xhc_state & XHCI_STATE_REMOVING))
1115 usb_hc_died(xhci_to_hcd(xhci));
1118 /* Watchdog timer function for when a stop endpoint command fails to complete.
1119 * In this case, we assume the host controller is broken or dying or dead. The
1120 * host may still be completing some other events, so we have to be careful to
1121 * let the event ring handler and the URB dequeueing/enqueueing functions know
1122 * through xhci->state.
1124 * The timer may also fire if the host takes a very long time to respond to the
1125 * command, and the stop endpoint command completion handler cannot delete the
1126 * timer before the timer function is called. Another endpoint cancellation may
1127 * sneak in before the timer function can grab the lock, and that may queue
1128 * another stop endpoint command and add the timer back. So we cannot use a
1129 * simple flag to say whether there is a pending stop endpoint command for a
1130 * particular endpoint.
1132 * Instead we use a combination of that flag and checking if a new timer is
1135 void xhci_stop_endpoint_command_watchdog(struct timer_list *t)
1137 struct xhci_virt_ep *ep = from_timer(ep, t, stop_cmd_timer);
1138 struct xhci_hcd *xhci = ep->xhci;
1139 unsigned long flags;
1141 char str[XHCI_MSG_MAX];
1143 spin_lock_irqsave(&xhci->lock, flags);
1145 /* bail out if cmd completed but raced with stop ep watchdog timer.*/
1146 if (!(ep->ep_state & EP_STOP_CMD_PENDING) ||
1147 timer_pending(&ep->stop_cmd_timer)) {
1148 spin_unlock_irqrestore(&xhci->lock, flags);
1149 xhci_dbg(xhci, "Stop EP timer raced with cmd completion, exit");
1152 usbsts = readl(&xhci->op_regs->status);
1154 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
1155 xhci_warn(xhci, "USBSTS:%s\n", xhci_decode_usbsts(str, usbsts));
1157 ep->ep_state &= ~EP_STOP_CMD_PENDING;
1162 * handle a stop endpoint cmd timeout as if host died (-ENODEV).
1163 * In the future we could distinguish between -ENODEV and -ETIMEDOUT
1164 * and try to recover a -ETIMEDOUT with a host controller reset
1168 spin_unlock_irqrestore(&xhci->lock, flags);
1169 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1170 "xHCI host controller is dead.");
1173 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
1174 struct xhci_virt_device *dev,
1175 struct xhci_ring *ep_ring,
1176 unsigned int ep_index)
1178 union xhci_trb *dequeue_temp;
1179 int num_trbs_free_temp;
1180 bool revert = false;
1182 num_trbs_free_temp = ep_ring->num_trbs_free;
1183 dequeue_temp = ep_ring->dequeue;
1185 /* If we get two back-to-back stalls, and the first stalled transfer
1186 * ends just before a link TRB, the dequeue pointer will be left on
1187 * the link TRB by the code in the while loop. So we have to update
1188 * the dequeue pointer one segment further, or we'll jump off
1189 * the segment into la-la-land.
1191 if (trb_is_link(ep_ring->dequeue)) {
1192 ep_ring->deq_seg = ep_ring->deq_seg->next;
1193 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1196 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
1197 /* We have more usable TRBs */
1198 ep_ring->num_trbs_free++;
1200 if (trb_is_link(ep_ring->dequeue)) {
1201 if (ep_ring->dequeue ==
1202 dev->eps[ep_index].queued_deq_ptr)
1204 ep_ring->deq_seg = ep_ring->deq_seg->next;
1205 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1207 if (ep_ring->dequeue == dequeue_temp) {
1214 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
1215 ep_ring->num_trbs_free = num_trbs_free_temp;
1220 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1221 * we need to clear the set deq pending flag in the endpoint ring state, so that
1222 * the TD queueing code can ring the doorbell again. We also need to ring the
1223 * endpoint doorbell to restart the ring, but only if there aren't more
1224 * cancellations pending.
1226 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1227 union xhci_trb *trb, u32 cmd_comp_code)
1229 unsigned int ep_index;
1230 unsigned int stream_id;
1231 struct xhci_ring *ep_ring;
1232 struct xhci_virt_device *dev;
1233 struct xhci_virt_ep *ep;
1234 struct xhci_ep_ctx *ep_ctx;
1235 struct xhci_slot_ctx *slot_ctx;
1237 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1238 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1239 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
1243 dev = xhci->devs[slot_id];
1244 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1246 xhci_warn(xhci, "WARN Set TR deq ptr command for freed stream ID %u\n",
1248 /* XXX: Harmless??? */
1252 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1253 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1254 trace_xhci_handle_cmd_set_deq(slot_ctx);
1255 trace_xhci_handle_cmd_set_deq_ep(ep_ctx);
1257 if (cmd_comp_code != COMP_SUCCESS) {
1258 unsigned int ep_state;
1259 unsigned int slot_state;
1261 switch (cmd_comp_code) {
1262 case COMP_TRB_ERROR:
1263 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1265 case COMP_CONTEXT_STATE_ERROR:
1266 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1267 ep_state = GET_EP_CTX_STATE(ep_ctx);
1268 slot_state = le32_to_cpu(slot_ctx->dev_state);
1269 slot_state = GET_SLOT_STATE(slot_state);
1270 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1271 "Slot state = %u, EP state = %u",
1272 slot_state, ep_state);
1274 case COMP_SLOT_NOT_ENABLED_ERROR:
1275 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1279 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1283 /* OK what do we do now? The endpoint state is hosed, and we
1284 * should never get to this point if the synchronization between
1285 * queueing, and endpoint state are correct. This might happen
1286 * if the device gets disconnected after we've finished
1287 * cancelling URBs, which might not be an error...
1291 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1292 if (ep->ep_state & EP_HAS_STREAMS) {
1293 struct xhci_stream_ctx *ctx =
1294 &ep->stream_info->stream_ctx_array[stream_id];
1295 deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
1297 deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
1299 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1300 "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq);
1301 if (xhci_trb_virt_to_dma(ep->queued_deq_seg,
1302 ep->queued_deq_ptr) == deq) {
1303 /* Update the ring's dequeue segment and dequeue pointer
1304 * to reflect the new position.
1306 update_ring_for_set_deq_completion(xhci, dev,
1309 xhci_warn(xhci, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1310 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1311 ep->queued_deq_seg, ep->queued_deq_ptr);
1316 ep->ep_state &= ~SET_DEQ_PENDING;
1317 ep->queued_deq_seg = NULL;
1318 ep->queued_deq_ptr = NULL;
1319 /* Restart any rings with pending URBs */
1320 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1323 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1324 union xhci_trb *trb, u32 cmd_comp_code)
1326 struct xhci_virt_device *vdev;
1327 struct xhci_virt_ep *ep;
1328 struct xhci_ep_ctx *ep_ctx;
1329 unsigned int ep_index;
1331 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1332 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
1336 vdev = xhci->devs[slot_id];
1337 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
1338 trace_xhci_handle_cmd_reset_ep(ep_ctx);
1340 /* This command will only fail if the endpoint wasn't halted,
1341 * but we don't care.
1343 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1344 "Ignoring reset ep completion code of %u", cmd_comp_code);
1346 /* HW with the reset endpoint quirk needs to have a configure endpoint
1347 * command complete before the endpoint can be used. Queue that here
1348 * because the HW can't handle two commands being queued in a row.
1350 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1351 struct xhci_command *command;
1353 command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
1357 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1358 "Queueing configure endpoint command");
1359 xhci_queue_configure_endpoint(xhci, command,
1360 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1362 xhci_ring_cmd_db(xhci);
1364 /* Clear our internal halted state */
1365 ep->ep_state &= ~EP_HALTED;
1368 /* if this was a soft reset, then restart */
1369 if ((le32_to_cpu(trb->generic.field[3])) & TRB_TSP)
1370 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1373 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1374 struct xhci_command *command, u32 cmd_comp_code)
1376 if (cmd_comp_code == COMP_SUCCESS)
1377 command->slot_id = slot_id;
1379 command->slot_id = 0;
1382 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1384 struct xhci_virt_device *virt_dev;
1385 struct xhci_slot_ctx *slot_ctx;
1387 virt_dev = xhci->devs[slot_id];
1391 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
1392 trace_xhci_handle_cmd_disable_slot(slot_ctx);
1394 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1395 /* Delete default control endpoint resources */
1396 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1399 static void xhci_handle_cmd_config_ep(struct xhci_hcd *xhci, int slot_id,
1400 struct xhci_event_cmd *event, u32 cmd_comp_code)
1402 struct xhci_virt_device *virt_dev;
1403 struct xhci_input_control_ctx *ctrl_ctx;
1404 struct xhci_ep_ctx *ep_ctx;
1405 unsigned int ep_index;
1406 unsigned int ep_state;
1407 u32 add_flags, drop_flags;
1410 * Configure endpoint commands can come from the USB core
1411 * configuration or alt setting changes, or because the HW
1412 * needed an extra configure endpoint command after a reset
1413 * endpoint command or streams were being configured.
1414 * If the command was for a halted endpoint, the xHCI driver
1415 * is not waiting on the configure endpoint command.
1417 virt_dev = xhci->devs[slot_id];
1418 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1420 xhci_warn(xhci, "Could not get input context, bad type.\n");
1424 add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1425 drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1426 /* Input ctx add_flags are the endpoint index plus one */
1427 ep_index = xhci_last_valid_endpoint(add_flags) - 1;
1429 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, ep_index);
1430 trace_xhci_handle_cmd_config_ep(ep_ctx);
1432 /* A usb_set_interface() call directly after clearing a halted
1433 * condition may race on this quirky hardware. Not worth
1434 * worrying about, since this is prototype hardware. Not sure
1435 * if this will work for streams, but streams support was
1436 * untested on this prototype.
1438 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1439 ep_index != (unsigned int) -1 &&
1440 add_flags - SLOT_FLAG == drop_flags) {
1441 ep_state = virt_dev->eps[ep_index].ep_state;
1442 if (!(ep_state & EP_HALTED))
1444 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1445 "Completed config ep cmd - "
1446 "last ep index = %d, state = %d",
1447 ep_index, ep_state);
1448 /* Clear internal halted state and restart ring(s) */
1449 virt_dev->eps[ep_index].ep_state &= ~EP_HALTED;
1450 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1456 static void xhci_handle_cmd_addr_dev(struct xhci_hcd *xhci, int slot_id)
1458 struct xhci_virt_device *vdev;
1459 struct xhci_slot_ctx *slot_ctx;
1461 vdev = xhci->devs[slot_id];
1462 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
1463 trace_xhci_handle_cmd_addr_dev(slot_ctx);
1466 static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
1467 struct xhci_event_cmd *event)
1469 struct xhci_virt_device *vdev;
1470 struct xhci_slot_ctx *slot_ctx;
1472 vdev = xhci->devs[slot_id];
1473 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
1474 trace_xhci_handle_cmd_reset_dev(slot_ctx);
1476 xhci_dbg(xhci, "Completed reset device command.\n");
1477 if (!xhci->devs[slot_id])
1478 xhci_warn(xhci, "Reset device command completion "
1479 "for disabled slot %u\n", slot_id);
1482 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1483 struct xhci_event_cmd *event)
1485 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1486 xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
1489 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1490 "NEC firmware version %2x.%02x",
1491 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1492 NEC_FW_MINOR(le32_to_cpu(event->status)));
1495 static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
1497 list_del(&cmd->cmd_list);
1499 if (cmd->completion) {
1500 cmd->status = status;
1501 complete(cmd->completion);
1507 void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1509 struct xhci_command *cur_cmd, *tmp_cmd;
1510 xhci->current_cmd = NULL;
1511 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1512 xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
1515 void xhci_handle_command_timeout(struct work_struct *work)
1517 struct xhci_hcd *xhci;
1518 unsigned long flags;
1521 xhci = container_of(to_delayed_work(work), struct xhci_hcd, cmd_timer);
1523 spin_lock_irqsave(&xhci->lock, flags);
1526 * If timeout work is pending, or current_cmd is NULL, it means we
1527 * raced with command completion. Command is handled so just return.
1529 if (!xhci->current_cmd || delayed_work_pending(&xhci->cmd_timer)) {
1530 spin_unlock_irqrestore(&xhci->lock, flags);
1533 /* mark this command to be cancelled */
1534 xhci->current_cmd->status = COMP_COMMAND_ABORTED;
1536 /* Make sure command ring is running before aborting it */
1537 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1538 if (hw_ring_state == ~(u64)0) {
1540 goto time_out_completed;
1543 if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
1544 (hw_ring_state & CMD_RING_RUNNING)) {
1545 /* Prevent new doorbell, and start command abort */
1546 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
1547 xhci_dbg(xhci, "Command timeout\n");
1548 xhci_abort_cmd_ring(xhci, flags);
1549 goto time_out_completed;
1552 /* host removed. Bail out */
1553 if (xhci->xhc_state & XHCI_STATE_REMOVING) {
1554 xhci_dbg(xhci, "host removed, ring start fail?\n");
1555 xhci_cleanup_command_queue(xhci);
1557 goto time_out_completed;
1560 /* command timeout on stopped ring, ring can't be aborted */
1561 xhci_dbg(xhci, "Command timeout on stopped ring\n");
1562 xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
1565 spin_unlock_irqrestore(&xhci->lock, flags);
1569 static void handle_cmd_completion(struct xhci_hcd *xhci,
1570 struct xhci_event_cmd *event)
1572 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1574 dma_addr_t cmd_dequeue_dma;
1576 union xhci_trb *cmd_trb;
1577 struct xhci_command *cmd;
1580 cmd_dma = le64_to_cpu(event->cmd_trb);
1581 cmd_trb = xhci->cmd_ring->dequeue;
1583 trace_xhci_handle_command(xhci->cmd_ring, &cmd_trb->generic);
1585 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1588 * Check whether the completion event is for our internal kept
1591 if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
1593 "ERROR mismatched command completion event\n");
1597 cmd = list_first_entry(&xhci->cmd_list, struct xhci_command, cmd_list);
1599 cancel_delayed_work(&xhci->cmd_timer);
1601 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1603 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1604 if (cmd_comp_code == COMP_COMMAND_RING_STOPPED) {
1605 complete_all(&xhci->cmd_ring_stop_completion);
1609 if (cmd->command_trb != xhci->cmd_ring->dequeue) {
1611 "Command completion event does not match command\n");
1616 * Host aborted the command ring, check if the current command was
1617 * supposed to be aborted, otherwise continue normally.
1618 * The command ring is stopped now, but the xHC will issue a Command
1619 * Ring Stopped event which will cause us to restart it.
1621 if (cmd_comp_code == COMP_COMMAND_ABORTED) {
1622 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1623 if (cmd->status == COMP_COMMAND_ABORTED) {
1624 if (xhci->current_cmd == cmd)
1625 xhci->current_cmd = NULL;
1630 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1632 case TRB_ENABLE_SLOT:
1633 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
1635 case TRB_DISABLE_SLOT:
1636 xhci_handle_cmd_disable_slot(xhci, slot_id);
1639 if (!cmd->completion)
1640 xhci_handle_cmd_config_ep(xhci, slot_id, event,
1643 case TRB_EVAL_CONTEXT:
1646 xhci_handle_cmd_addr_dev(xhci, slot_id);
1649 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1650 le32_to_cpu(cmd_trb->generic.field[3])));
1651 if (!cmd->completion)
1652 xhci_handle_cmd_stop_ep(xhci, slot_id, cmd_trb, event);
1655 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1656 le32_to_cpu(cmd_trb->generic.field[3])));
1657 xhci_handle_cmd_set_deq(xhci, slot_id, cmd_trb, cmd_comp_code);
1660 /* Is this an aborted command turned to NO-OP? */
1661 if (cmd->status == COMP_COMMAND_RING_STOPPED)
1662 cmd_comp_code = COMP_COMMAND_RING_STOPPED;
1665 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1666 le32_to_cpu(cmd_trb->generic.field[3])));
1667 xhci_handle_cmd_reset_ep(xhci, slot_id, cmd_trb, cmd_comp_code);
1670 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1671 * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1673 slot_id = TRB_TO_SLOT_ID(
1674 le32_to_cpu(cmd_trb->generic.field[3]));
1675 xhci_handle_cmd_reset_dev(xhci, slot_id, event);
1677 case TRB_NEC_GET_FW:
1678 xhci_handle_cmd_nec_get_fw(xhci, event);
1681 /* Skip over unknown commands on the event ring */
1682 xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
1686 /* restart timer if this wasn't the last command */
1687 if (!list_is_singular(&xhci->cmd_list)) {
1688 xhci->current_cmd = list_first_entry(&cmd->cmd_list,
1689 struct xhci_command, cmd_list);
1690 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
1691 } else if (xhci->current_cmd == cmd) {
1692 xhci->current_cmd = NULL;
1696 xhci_complete_del_and_free_cmd(cmd, cmd_comp_code);
1698 inc_deq(xhci, xhci->cmd_ring);
1701 static void handle_vendor_event(struct xhci_hcd *xhci,
1702 union xhci_trb *event)
1706 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1707 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1708 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1709 handle_cmd_completion(xhci, &event->event_cmd);
1712 static void handle_device_notification(struct xhci_hcd *xhci,
1713 union xhci_trb *event)
1716 struct usb_device *udev;
1718 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->generic.field[3]));
1719 if (!xhci->devs[slot_id]) {
1720 xhci_warn(xhci, "Device Notification event for "
1721 "unused slot %u\n", slot_id);
1725 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1727 udev = xhci->devs[slot_id]->udev;
1728 if (udev && udev->parent)
1729 usb_wakeup_notification(udev->parent, udev->portnum);
1733 * Quirk hanlder for errata seen on Cavium ThunderX2 processor XHCI
1735 * As per ThunderX2errata-129 USB 2 device may come up as USB 1
1736 * If a connection to a USB 1 device is followed by another connection
1737 * to a USB 2 device.
1739 * Reset the PHY after the USB device is disconnected if device speed
1740 * is less than HCD_USB3.
1741 * Retry the reset sequence max of 4 times checking the PLL lock status.
1744 static void xhci_cavium_reset_phy_quirk(struct xhci_hcd *xhci)
1746 struct usb_hcd *hcd = xhci_to_hcd(xhci);
1748 u32 retry_count = 4;
1751 /* Assert PHY reset */
1752 writel(0x6F, hcd->regs + 0x1048);
1754 /* De-assert the PHY reset */
1755 writel(0x7F, hcd->regs + 0x1048);
1757 pll_lock_check = readl(hcd->regs + 0x1070);
1758 } while (!(pll_lock_check & 0x1) && --retry_count);
1761 static void handle_port_status(struct xhci_hcd *xhci,
1762 union xhci_trb *event)
1764 struct usb_hcd *hcd;
1766 u32 portsc, cmd_reg;
1769 unsigned int hcd_portnum;
1770 struct xhci_bus_state *bus_state;
1771 bool bogus_port_status = false;
1772 struct xhci_port *port;
1774 /* Port status change events always have a successful completion code */
1775 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
1777 "WARN: xHC returned failed port status event\n");
1779 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1780 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1782 if ((port_id <= 0) || (port_id > max_ports)) {
1783 xhci_warn(xhci, "Port change event with invalid port ID %d\n",
1785 inc_deq(xhci, xhci->event_ring);
1789 port = &xhci->hw_ports[port_id - 1];
1790 if (!port || !port->rhub || port->hcd_portnum == DUPLICATE_ENTRY) {
1791 xhci_warn(xhci, "Port change event, no port for port ID %u\n",
1793 bogus_port_status = true;
1797 /* We might get interrupts after shared_hcd is removed */
1798 if (port->rhub == &xhci->usb3_rhub && xhci->shared_hcd == NULL) {
1799 xhci_dbg(xhci, "ignore port event for removed USB3 hcd\n");
1800 bogus_port_status = true;
1804 hcd = port->rhub->hcd;
1805 bus_state = &port->rhub->bus_state;
1806 hcd_portnum = port->hcd_portnum;
1807 portsc = readl(port->addr);
1809 xhci_dbg(xhci, "Port change event, %d-%d, id %d, portsc: 0x%x\n",
1810 hcd->self.busnum, hcd_portnum + 1, port_id, portsc);
1812 trace_xhci_handle_port_status(hcd_portnum, portsc);
1814 if (hcd->state == HC_STATE_SUSPENDED) {
1815 xhci_dbg(xhci, "resume root hub\n");
1816 usb_hcd_resume_root_hub(hcd);
1819 if (hcd->speed >= HCD_USB3 &&
1820 (portsc & PORT_PLS_MASK) == XDEV_INACTIVE) {
1821 slot_id = xhci_find_slot_id_by_port(hcd, xhci, hcd_portnum + 1);
1822 if (slot_id && xhci->devs[slot_id])
1823 xhci->devs[slot_id]->flags |= VDEV_PORT_ERROR;
1826 if ((portsc & PORT_PLC) && (portsc & PORT_PLS_MASK) == XDEV_RESUME) {
1827 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1829 cmd_reg = readl(&xhci->op_regs->command);
1830 if (!(cmd_reg & CMD_RUN)) {
1831 xhci_warn(xhci, "xHC is not running.\n");
1835 if (DEV_SUPERSPEED_ANY(portsc)) {
1836 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1837 /* Set a flag to say the port signaled remote wakeup,
1838 * so we can tell the difference between the end of
1839 * device and host initiated resume.
1841 bus_state->port_remote_wakeup |= 1 << hcd_portnum;
1842 xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1843 usb_hcd_start_port_resume(&hcd->self, hcd_portnum);
1844 xhci_set_link_state(xhci, port, XDEV_U0);
1845 /* Need to wait until the next link state change
1846 * indicates the device is actually in U0.
1848 bogus_port_status = true;
1850 } else if (!test_bit(hcd_portnum, &bus_state->resuming_ports)) {
1851 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1852 port->resume_timestamp = jiffies +
1853 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1854 set_bit(hcd_portnum, &bus_state->resuming_ports);
1855 /* Do the rest in GetPortStatus after resume time delay.
1856 * Avoid polling roothub status before that so that a
1857 * usb device auto-resume latency around ~40ms.
1859 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1860 mod_timer(&hcd->rh_timer,
1861 port->resume_timestamp);
1862 usb_hcd_start_port_resume(&hcd->self, hcd_portnum);
1863 bogus_port_status = true;
1867 if ((portsc & PORT_PLC) &&
1868 DEV_SUPERSPEED_ANY(portsc) &&
1869 ((portsc & PORT_PLS_MASK) == XDEV_U0 ||
1870 (portsc & PORT_PLS_MASK) == XDEV_U1 ||
1871 (portsc & PORT_PLS_MASK) == XDEV_U2)) {
1872 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1873 complete(&port->u3exit_done);
1874 /* We've just brought the device into U0/1/2 through either the
1875 * Resume state after a device remote wakeup, or through the
1876 * U3Exit state after a host-initiated resume. If it's a device
1877 * initiated remote wake, don't pass up the link state change,
1878 * so the roothub behavior is consistent with external
1879 * USB 3.0 hub behavior.
1881 slot_id = xhci_find_slot_id_by_port(hcd, xhci, hcd_portnum + 1);
1882 if (slot_id && xhci->devs[slot_id])
1883 xhci_ring_device(xhci, slot_id);
1884 if (bus_state->port_remote_wakeup & (1 << hcd_portnum)) {
1885 xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1886 usb_wakeup_notification(hcd->self.root_hub,
1888 bogus_port_status = true;
1894 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1895 * RExit to a disconnect state). If so, let the the driver know it's
1896 * out of the RExit state.
1898 if (hcd->speed < HCD_USB3 && port->rexit_active) {
1899 complete(&port->rexit_done);
1900 port->rexit_active = false;
1901 bogus_port_status = true;
1905 if (hcd->speed < HCD_USB3) {
1906 xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1907 if ((xhci->quirks & XHCI_RESET_PLL_ON_DISCONNECT) &&
1908 (portsc & PORT_CSC) && !(portsc & PORT_CONNECT))
1909 xhci_cavium_reset_phy_quirk(xhci);
1913 /* Update event ring dequeue pointer before dropping the lock */
1914 inc_deq(xhci, xhci->event_ring);
1916 /* Don't make the USB core poll the roothub if we got a bad port status
1917 * change event. Besides, at that point we can't tell which roothub
1918 * (USB 2.0 or USB 3.0) to kick.
1920 if (bogus_port_status)
1924 * xHCI port-status-change events occur when the "or" of all the
1925 * status-change bits in the portsc register changes from 0 to 1.
1926 * New status changes won't cause an event if any other change
1927 * bits are still set. When an event occurs, switch over to
1928 * polling to avoid losing status changes.
1930 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1931 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1932 spin_unlock(&xhci->lock);
1933 /* Pass this up to the core */
1934 usb_hcd_poll_rh_status(hcd);
1935 spin_lock(&xhci->lock);
1939 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1940 * at end_trb, which may be in another segment. If the suspect DMA address is a
1941 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1944 struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1945 struct xhci_segment *start_seg,
1946 union xhci_trb *start_trb,
1947 union xhci_trb *end_trb,
1948 dma_addr_t suspect_dma,
1951 dma_addr_t start_dma;
1952 dma_addr_t end_seg_dma;
1953 dma_addr_t end_trb_dma;
1954 struct xhci_segment *cur_seg;
1956 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1957 cur_seg = start_seg;
1962 /* We may get an event for a Link TRB in the middle of a TD */
1963 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1964 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1965 /* If the end TRB isn't in this segment, this is set to 0 */
1966 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1970 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1971 (unsigned long long)suspect_dma,
1972 (unsigned long long)start_dma,
1973 (unsigned long long)end_trb_dma,
1974 (unsigned long long)cur_seg->dma,
1975 (unsigned long long)end_seg_dma);
1977 if (end_trb_dma > 0) {
1978 /* The end TRB is in this segment, so suspect should be here */
1979 if (start_dma <= end_trb_dma) {
1980 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1983 /* Case for one segment with
1984 * a TD wrapped around to the top
1986 if ((suspect_dma >= start_dma &&
1987 suspect_dma <= end_seg_dma) ||
1988 (suspect_dma >= cur_seg->dma &&
1989 suspect_dma <= end_trb_dma))
1994 /* Might still be somewhere in this segment */
1995 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1998 cur_seg = cur_seg->next;
1999 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
2000 } while (cur_seg != start_seg);
2005 static void xhci_clear_hub_tt_buffer(struct xhci_hcd *xhci, struct xhci_td *td,
2006 struct xhci_virt_ep *ep)
2009 * As part of low/full-speed endpoint-halt processing
2010 * we must clear the TT buffer (USB 2.0 specification 11.17.5).
2012 if (td->urb->dev->tt && !usb_pipeint(td->urb->pipe) &&
2013 (td->urb->dev->tt->hub != xhci_to_hcd(xhci)->self.root_hub) &&
2014 !(ep->ep_state & EP_CLEARING_TT)) {
2015 ep->ep_state |= EP_CLEARING_TT;
2016 td->urb->ep->hcpriv = td->urb->dev;
2017 if (usb_hub_clear_tt_buffer(td->urb))
2018 ep->ep_state &= ~EP_CLEARING_TT;
2022 /* Check if an error has halted the endpoint ring. The class driver will
2023 * cleanup the halt for a non-default control endpoint if we indicate a stall.
2024 * However, a babble and other errors also halt the endpoint ring, and the class
2025 * driver won't clear the halt in that case, so we need to issue a Set Transfer
2026 * Ring Dequeue Pointer command manually.
2028 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
2029 struct xhci_ep_ctx *ep_ctx,
2030 unsigned int trb_comp_code)
2032 /* TRB completion codes that may require a manual halt cleanup */
2033 if (trb_comp_code == COMP_USB_TRANSACTION_ERROR ||
2034 trb_comp_code == COMP_BABBLE_DETECTED_ERROR ||
2035 trb_comp_code == COMP_SPLIT_TRANSACTION_ERROR)
2036 /* The 0.95 spec says a babbling control endpoint
2037 * is not halted. The 0.96 spec says it is. Some HW
2038 * claims to be 0.95 compliant, but it halts the control
2039 * endpoint anyway. Check if a babble halted the
2042 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
2048 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
2050 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
2051 /* Vendor defined "informational" completion code,
2052 * treat as not-an-error.
2054 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
2056 xhci_dbg(xhci, "Treating code as success.\n");
2062 static int finish_td(struct xhci_hcd *xhci, struct xhci_virt_ep *ep,
2063 struct xhci_ring *ep_ring, struct xhci_td *td,
2066 struct xhci_ep_ctx *ep_ctx;
2068 ep_ctx = xhci_get_ep_ctx(xhci, ep->vdev->out_ctx, ep->ep_index);
2070 if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
2071 trb_comp_code == COMP_STOPPED ||
2072 trb_comp_code == COMP_STOPPED_SHORT_PACKET) {
2073 /* The Endpoint Stop Command completion will take care of any
2074 * stopped TDs. A stopped TD may be restarted, so don't update
2075 * the ring dequeue pointer or take this TD off any lists yet.
2079 if (trb_comp_code == COMP_STALL_ERROR ||
2080 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
2083 * xhci internal endpoint state will go to a "halt" state for
2084 * any stall, including default control pipe protocol stall.
2085 * To clear the host side halt we need to issue a reset endpoint
2086 * command, followed by a set dequeue command to move past the
2088 * Class drivers clear the device side halt from a functional
2089 * stall later. Hub TT buffer should only be cleared for FS/LS
2090 * devices behind HS hubs for functional stalls.
2092 if ((ep->ep_index != 0) || (trb_comp_code != COMP_STALL_ERROR))
2093 xhci_clear_hub_tt_buffer(xhci, td, ep);
2095 xhci_handle_halted_endpoint(xhci, ep, ep_ring->stream_id, td,
2098 /* Update ring dequeue pointer */
2099 ep_ring->dequeue = td->last_trb;
2100 ep_ring->deq_seg = td->last_trb_seg;
2101 ep_ring->num_trbs_free += td->num_trbs - 1;
2102 inc_deq(xhci, ep_ring);
2105 return xhci_td_cleanup(xhci, td, ep_ring, td->status);
2108 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
2109 static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
2110 union xhci_trb *stop_trb)
2113 union xhci_trb *trb = ring->dequeue;
2114 struct xhci_segment *seg = ring->deq_seg;
2116 for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
2117 if (!trb_is_noop(trb) && !trb_is_link(trb))
2118 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
2124 * Process control tds, update urb status and actual_length.
2126 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_virt_ep *ep,
2127 struct xhci_ring *ep_ring, struct xhci_td *td,
2128 union xhci_trb *ep_trb, struct xhci_transfer_event *event)
2130 struct xhci_ep_ctx *ep_ctx;
2132 u32 remaining, requested;
2135 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
2136 ep_ctx = xhci_get_ep_ctx(xhci, ep->vdev->out_ctx, ep->ep_index);
2137 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2138 requested = td->urb->transfer_buffer_length;
2139 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2141 switch (trb_comp_code) {
2143 if (trb_type != TRB_STATUS) {
2144 xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
2145 (trb_type == TRB_DATA) ? "data" : "setup");
2146 td->status = -ESHUTDOWN;
2151 case COMP_SHORT_PACKET:
2154 case COMP_STOPPED_SHORT_PACKET:
2155 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2156 td->urb->actual_length = remaining;
2158 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
2163 td->urb->actual_length = 0;
2167 td->urb->actual_length = requested - remaining;
2170 td->urb->actual_length = requested;
2173 xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
2177 case COMP_STOPPED_LENGTH_INVALID:
2180 if (!xhci_requires_manual_halt_cleanup(xhci,
2181 ep_ctx, trb_comp_code))
2183 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2184 trb_comp_code, ep->ep_index);
2186 case COMP_STALL_ERROR:
2187 /* Did we transfer part of the data (middle) phase? */
2188 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2189 td->urb->actual_length = requested - remaining;
2190 else if (!td->urb_length_set)
2191 td->urb->actual_length = 0;
2195 /* stopped at setup stage, no data transferred */
2196 if (trb_type == TRB_SETUP)
2200 * if on data stage then update the actual_length of the URB and flag it
2201 * as set, so it won't be overwritten in the event for the last TRB.
2203 if (trb_type == TRB_DATA ||
2204 trb_type == TRB_NORMAL) {
2205 td->urb_length_set = true;
2206 td->urb->actual_length = requested - remaining;
2207 xhci_dbg(xhci, "Waiting for status stage event\n");
2211 /* at status stage */
2212 if (!td->urb_length_set)
2213 td->urb->actual_length = requested;
2216 return finish_td(xhci, ep, ep_ring, td, trb_comp_code);
2220 * Process isochronous tds, update urb packet status and actual_length.
2222 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_virt_ep *ep,
2223 struct xhci_ring *ep_ring, struct xhci_td *td,
2224 union xhci_trb *ep_trb, struct xhci_transfer_event *event)
2226 struct urb_priv *urb_priv;
2228 struct usb_iso_packet_descriptor *frame;
2230 bool sum_trbs_for_length = false;
2231 u32 remaining, requested, ep_trb_len;
2232 int short_framestatus;
2234 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2235 urb_priv = td->urb->hcpriv;
2236 idx = urb_priv->num_tds_done;
2237 frame = &td->urb->iso_frame_desc[idx];
2238 requested = frame->length;
2239 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2240 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2241 short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2244 /* handle completion code */
2245 switch (trb_comp_code) {
2247 /* Don't overwrite status if TD had an error, see xHCI 4.9.1 */
2248 if (td->error_mid_td)
2251 frame->status = short_framestatus;
2252 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2253 sum_trbs_for_length = true;
2258 case COMP_SHORT_PACKET:
2259 frame->status = short_framestatus;
2260 sum_trbs_for_length = true;
2262 case COMP_BANDWIDTH_OVERRUN_ERROR:
2263 frame->status = -ECOMM;
2265 case COMP_BABBLE_DETECTED_ERROR:
2266 sum_trbs_for_length = true;
2268 case COMP_ISOCH_BUFFER_OVERRUN:
2269 frame->status = -EOVERFLOW;
2270 if (ep_trb != td->last_trb)
2271 td->error_mid_td = true;
2273 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2274 case COMP_STALL_ERROR:
2275 frame->status = -EPROTO;
2277 case COMP_USB_TRANSACTION_ERROR:
2278 frame->status = -EPROTO;
2279 sum_trbs_for_length = true;
2280 if (ep_trb != td->last_trb)
2281 td->error_mid_td = true;
2284 sum_trbs_for_length = true;
2286 case COMP_STOPPED_SHORT_PACKET:
2287 /* field normally containing residue now contains tranferred */
2288 frame->status = short_framestatus;
2289 requested = remaining;
2291 case COMP_STOPPED_LENGTH_INVALID:
2296 sum_trbs_for_length = true;
2301 if (td->urb_length_set)
2304 if (sum_trbs_for_length)
2305 frame->actual_length = sum_trb_lengths(xhci, ep->ring, ep_trb) +
2306 ep_trb_len - remaining;
2308 frame->actual_length = requested;
2310 td->urb->actual_length += frame->actual_length;
2313 /* Don't give back TD yet if we encountered an error mid TD */
2314 if (td->error_mid_td && ep_trb != td->last_trb) {
2315 xhci_dbg(xhci, "Error mid isoc TD, wait for final completion event\n");
2316 td->urb_length_set = true;
2320 return finish_td(xhci, ep, ep_ring, td, trb_comp_code);
2323 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2324 struct xhci_virt_ep *ep, int status)
2326 struct urb_priv *urb_priv;
2327 struct usb_iso_packet_descriptor *frame;
2330 urb_priv = td->urb->hcpriv;
2331 idx = urb_priv->num_tds_done;
2332 frame = &td->urb->iso_frame_desc[idx];
2334 /* The transfer is partly done. */
2335 frame->status = -EXDEV;
2337 /* calc actual length */
2338 frame->actual_length = 0;
2340 /* Update ring dequeue pointer */
2341 ep->ring->dequeue = td->last_trb;
2342 ep->ring->deq_seg = td->last_trb_seg;
2343 ep->ring->num_trbs_free += td->num_trbs - 1;
2344 inc_deq(xhci, ep->ring);
2346 return xhci_td_cleanup(xhci, td, ep->ring, status);
2350 * Process bulk and interrupt tds, update urb status and actual_length.
2352 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_virt_ep *ep,
2353 struct xhci_ring *ep_ring, struct xhci_td *td,
2354 union xhci_trb *ep_trb, struct xhci_transfer_event *event)
2356 struct xhci_slot_ctx *slot_ctx;
2358 u32 remaining, requested, ep_trb_len;
2360 slot_ctx = xhci_get_slot_ctx(xhci, ep->vdev->out_ctx);
2361 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2362 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2363 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2364 requested = td->urb->transfer_buffer_length;
2366 switch (trb_comp_code) {
2369 /* handle success with untransferred data as short packet */
2370 if (ep_trb != td->last_trb || remaining) {
2371 xhci_warn(xhci, "WARN Successful completion on short TX\n");
2372 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2373 td->urb->ep->desc.bEndpointAddress,
2374 requested, remaining);
2378 case COMP_SHORT_PACKET:
2379 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2380 td->urb->ep->desc.bEndpointAddress,
2381 requested, remaining);
2384 case COMP_STOPPED_SHORT_PACKET:
2385 td->urb->actual_length = remaining;
2387 case COMP_STOPPED_LENGTH_INVALID:
2388 /* stopped on ep trb with invalid length, exclude it */
2392 case COMP_USB_TRANSACTION_ERROR:
2393 if (xhci->quirks & XHCI_NO_SOFT_RETRY ||
2394 (ep->err_count++ > MAX_SOFT_RETRY) ||
2395 le32_to_cpu(slot_ctx->tt_info) & TT_SLOT)
2400 xhci_handle_halted_endpoint(xhci, ep, ep_ring->stream_id, td,
2408 if (ep_trb == td->last_trb)
2409 td->urb->actual_length = requested - remaining;
2411 td->urb->actual_length =
2412 sum_trb_lengths(xhci, ep_ring, ep_trb) +
2413 ep_trb_len - remaining;
2415 if (remaining > requested) {
2416 xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
2418 td->urb->actual_length = 0;
2421 return finish_td(xhci, ep, ep_ring, td, trb_comp_code);
2425 * If this function returns an error condition, it means it got a Transfer
2426 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2427 * At this point, the host controller is probably hosed and should be reset.
2429 static int handle_tx_event(struct xhci_hcd *xhci,
2430 struct xhci_transfer_event *event)
2432 struct xhci_virt_device *xdev;
2433 struct xhci_virt_ep *ep;
2434 struct xhci_ring *ep_ring;
2435 unsigned int slot_id;
2437 struct xhci_td *td = NULL;
2438 dma_addr_t ep_trb_dma;
2439 struct xhci_segment *ep_seg;
2440 union xhci_trb *ep_trb;
2441 int status = -EINPROGRESS;
2442 struct xhci_ep_ctx *ep_ctx;
2443 struct list_head *tmp;
2446 bool handling_skipped_tds = false;
2448 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2449 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2450 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2451 ep_trb_dma = le64_to_cpu(event->buffer);
2453 ep = xhci_get_virt_ep(xhci, slot_id, ep_index);
2455 xhci_err(xhci, "ERROR Invalid Transfer event\n");
2459 xdev = xhci->devs[slot_id];
2460 ep_ring = xhci_dma_to_transfer_ring(ep, ep_trb_dma);
2461 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2463 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
2465 "ERROR Transfer event for disabled endpoint slot %u ep %u\n",
2470 /* Some transfer events don't always point to a trb, see xhci 4.17.4 */
2472 switch (trb_comp_code) {
2473 case COMP_STALL_ERROR:
2474 case COMP_USB_TRANSACTION_ERROR:
2475 case COMP_INVALID_STREAM_TYPE_ERROR:
2476 case COMP_INVALID_STREAM_ID_ERROR:
2477 xhci_dbg(xhci, "Stream transaction error ep %u no id\n",
2479 if (ep->err_count++ > MAX_SOFT_RETRY)
2480 xhci_handle_halted_endpoint(xhci, ep, 0, NULL,
2483 xhci_handle_halted_endpoint(xhci, ep, 0, NULL,
2486 case COMP_RING_UNDERRUN:
2487 case COMP_RING_OVERRUN:
2488 case COMP_STOPPED_LENGTH_INVALID:
2491 xhci_err(xhci, "ERROR Transfer event for unknown stream ring slot %u ep %u\n",
2497 /* Count current td numbers if ep->skip is set */
2499 list_for_each(tmp, &ep_ring->td_list)
2503 /* Look for common error cases */
2504 switch (trb_comp_code) {
2505 /* Skip codes that require special handling depending on
2509 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2511 if (xhci->quirks & XHCI_TRUST_TX_LENGTH ||
2512 ep_ring->last_td_was_short)
2513 trb_comp_code = COMP_SHORT_PACKET;
2515 xhci_warn_ratelimited(xhci,
2516 "WARN Successful completion on short TX for slot %u ep %u: needs XHCI_TRUST_TX_LENGTH quirk?\n",
2518 case COMP_SHORT_PACKET:
2520 /* Completion codes for endpoint stopped state */
2522 xhci_dbg(xhci, "Stopped on Transfer TRB for slot %u ep %u\n",
2525 case COMP_STOPPED_LENGTH_INVALID:
2527 "Stopped on No-op or Link TRB for slot %u ep %u\n",
2530 case COMP_STOPPED_SHORT_PACKET:
2532 "Stopped with short packet transfer detected for slot %u ep %u\n",
2535 /* Completion codes for endpoint halted state */
2536 case COMP_STALL_ERROR:
2537 xhci_dbg(xhci, "Stalled endpoint for slot %u ep %u\n", slot_id,
2539 ep->ep_state |= EP_HALTED;
2542 case COMP_SPLIT_TRANSACTION_ERROR:
2543 xhci_dbg(xhci, "Split transaction error for slot %u ep %u\n",
2547 case COMP_USB_TRANSACTION_ERROR:
2548 xhci_dbg(xhci, "Transfer error for slot %u ep %u on endpoint\n",
2552 case COMP_BABBLE_DETECTED_ERROR:
2553 xhci_dbg(xhci, "Babble error for slot %u ep %u on endpoint\n",
2555 status = -EOVERFLOW;
2557 /* Completion codes for endpoint error state */
2558 case COMP_TRB_ERROR:
2560 "WARN: TRB error for slot %u ep %u on endpoint\n",
2564 /* completion codes not indicating endpoint state change */
2565 case COMP_DATA_BUFFER_ERROR:
2567 "WARN: HC couldn't access mem fast enough for slot %u ep %u\n",
2571 case COMP_BANDWIDTH_OVERRUN_ERROR:
2573 "WARN: bandwidth overrun event for slot %u ep %u on endpoint\n",
2576 case COMP_ISOCH_BUFFER_OVERRUN:
2578 "WARN: buffer overrun event for slot %u ep %u on endpoint",
2581 case COMP_RING_UNDERRUN:
2583 * When the Isoch ring is empty, the xHC will generate
2584 * a Ring Overrun Event for IN Isoch endpoint or Ring
2585 * Underrun Event for OUT Isoch endpoint.
2587 xhci_dbg(xhci, "underrun event on endpoint\n");
2588 if (!list_empty(&ep_ring->td_list))
2589 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2590 "still with TDs queued?\n",
2591 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2594 case COMP_RING_OVERRUN:
2595 xhci_dbg(xhci, "overrun event on endpoint\n");
2596 if (!list_empty(&ep_ring->td_list))
2597 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2598 "still with TDs queued?\n",
2599 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2602 case COMP_MISSED_SERVICE_ERROR:
2604 * When encounter missed service error, one or more isoc tds
2605 * may be missed by xHC.
2606 * Set skip flag of the ep_ring; Complete the missed tds as
2607 * short transfer when process the ep_ring next time.
2611 "Miss service interval error for slot %u ep %u, set skip flag\n",
2614 case COMP_NO_PING_RESPONSE_ERROR:
2617 "No Ping response error for slot %u ep %u, Skip one Isoc TD\n",
2621 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2622 /* needs disable slot command to recover */
2624 "WARN: detect an incompatible device for slot %u ep %u",
2629 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2634 "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n",
2635 trb_comp_code, slot_id, ep_index);
2640 /* This TRB should be in the TD at the head of this ring's
2643 if (list_empty(&ep_ring->td_list)) {
2645 * Don't print wanings if it's due to a stopped endpoint
2646 * generating an extra completion event if the device
2647 * was suspended. Or, a event for the last TRB of a
2648 * short TD we already got a short event for.
2649 * The short TD is already removed from the TD list.
2652 if (!(trb_comp_code == COMP_STOPPED ||
2653 trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
2654 ep_ring->last_td_was_short)) {
2655 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2656 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2661 xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
2664 if (trb_comp_code == COMP_STALL_ERROR ||
2665 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
2667 xhci_handle_halted_endpoint(xhci, ep,
2675 /* We've skipped all the TDs on the ep ring when ep->skip set */
2676 if (ep->skip && td_num == 0) {
2678 xhci_dbg(xhci, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n",
2683 td = list_first_entry(&ep_ring->td_list, struct xhci_td,
2688 /* Is this a TRB in the currently executing TD? */
2689 ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2690 td->last_trb, ep_trb_dma, false);
2693 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2694 * is not in the current TD pointed by ep_ring->dequeue because
2695 * that the hardware dequeue pointer still at the previous TRB
2696 * of the current TD. The previous TRB maybe a Link TD or the
2697 * last TRB of the previous TD. The command completion handle
2698 * will take care the rest.
2700 if (!ep_seg && (trb_comp_code == COMP_STOPPED ||
2701 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2707 if (ep->skip && usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2708 skip_isoc_td(xhci, td, ep, status);
2713 * Some hosts give a spurious success event after a short
2714 * transfer. Ignore it.
2716 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2717 ep_ring->last_td_was_short) {
2718 ep_ring->last_td_was_short = false;
2723 * xhci 4.10.2 states isoc endpoints should continue
2724 * processing the next TD if there was an error mid TD.
2725 * So host like NEC don't generate an event for the last
2726 * isoc TRB even if the IOC flag is set.
2727 * xhci 4.9.1 states that if there are errors in mult-TRB
2728 * TDs xHC should generate an error for that TRB, and if xHC
2729 * proceeds to the next TD it should genete an event for
2730 * any TRB with IOC flag on the way. Other host follow this.
2731 * So this event might be for the next TD.
2733 if (td->error_mid_td &&
2734 !list_is_last(&td->td_list, &ep_ring->td_list)) {
2735 struct xhci_td *td_next = list_next_entry(td, td_list);
2737 ep_seg = trb_in_td(xhci, td_next->start_seg, td_next->first_trb,
2738 td_next->last_trb, ep_trb_dma, false);
2740 /* give back previous TD, start handling new */
2741 xhci_dbg(xhci, "Missing TD completion event after mid TD error\n");
2742 ep_ring->dequeue = td->last_trb;
2743 ep_ring->deq_seg = td->last_trb_seg;
2744 inc_deq(xhci, ep_ring);
2745 xhci_td_cleanup(xhci, td, ep_ring, td->status);
2751 /* HC is busted, give up! */
2753 "ERROR Transfer event TRB DMA ptr not "
2754 "part of current TD ep_index %d "
2755 "comp_code %u\n", ep_index,
2757 trb_in_td(xhci, ep_ring->deq_seg,
2758 ep_ring->dequeue, td->last_trb,
2763 if (trb_comp_code == COMP_SHORT_PACKET)
2764 ep_ring->last_td_was_short = true;
2766 ep_ring->last_td_was_short = false;
2770 "Found td. Clear skip flag for slot %u ep %u.\n",
2775 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2778 trace_xhci_handle_transfer(ep_ring,
2779 (struct xhci_generic_trb *) ep_trb);
2782 * No-op TRB could trigger interrupts in a case where
2783 * a URB was killed and a STALL_ERROR happens right
2784 * after the endpoint ring stopped. Reset the halted
2785 * endpoint. Otherwise, the endpoint remains stalled
2789 if (trb_is_noop(ep_trb)) {
2790 if (trb_comp_code == COMP_STALL_ERROR ||
2791 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
2793 xhci_handle_halted_endpoint(xhci, ep,
2799 td->status = status;
2801 /* update the urb's actual_length and give back to the core */
2802 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2803 process_ctrl_td(xhci, ep, ep_ring, td, ep_trb, event);
2804 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2805 process_isoc_td(xhci, ep, ep_ring, td, ep_trb, event);
2807 process_bulk_intr_td(xhci, ep, ep_ring, td, ep_trb, event);
2809 handling_skipped_tds = ep->skip &&
2810 trb_comp_code != COMP_MISSED_SERVICE_ERROR &&
2811 trb_comp_code != COMP_NO_PING_RESPONSE_ERROR;
2814 * Do not update event ring dequeue pointer if we're in a loop
2815 * processing missed tds.
2817 if (!handling_skipped_tds)
2818 inc_deq(xhci, xhci->event_ring);
2821 * If ep->skip is set, it means there are missed tds on the
2822 * endpoint ring need to take care of.
2823 * Process them as short transfer until reach the td pointed by
2826 } while (handling_skipped_tds);
2831 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2832 (unsigned long long) xhci_trb_virt_to_dma(
2833 xhci->event_ring->deq_seg,
2834 xhci->event_ring->dequeue),
2835 lower_32_bits(le64_to_cpu(event->buffer)),
2836 upper_32_bits(le64_to_cpu(event->buffer)),
2837 le32_to_cpu(event->transfer_len),
2838 le32_to_cpu(event->flags));
2843 * This function handles all OS-owned events on the event ring. It may drop
2844 * xhci->lock between event processing (e.g. to pass up port status changes).
2845 * Returns >0 for "possibly more events to process" (caller should call again),
2846 * otherwise 0 if done. In future, <0 returns should indicate error code.
2848 static int xhci_handle_event(struct xhci_hcd *xhci)
2850 union xhci_trb *event;
2851 int update_ptrs = 1;
2854 /* Event ring hasn't been allocated yet. */
2855 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2856 xhci_err(xhci, "ERROR event ring not ready\n");
2860 event = xhci->event_ring->dequeue;
2861 /* Does the HC or OS own the TRB? */
2862 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2863 xhci->event_ring->cycle_state)
2866 trace_xhci_handle_event(xhci->event_ring, &event->generic);
2869 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2870 * speculative reads of the event's flags/data below.
2873 /* FIXME: Handle more event types. */
2874 switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
2875 case TRB_TYPE(TRB_COMPLETION):
2876 handle_cmd_completion(xhci, &event->event_cmd);
2878 case TRB_TYPE(TRB_PORT_STATUS):
2879 handle_port_status(xhci, event);
2882 case TRB_TYPE(TRB_TRANSFER):
2883 ret = handle_tx_event(xhci, &event->trans_event);
2887 case TRB_TYPE(TRB_DEV_NOTE):
2888 handle_device_notification(xhci, event);
2891 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2893 handle_vendor_event(xhci, event);
2895 xhci_warn(xhci, "ERROR unknown event type %d\n",
2897 le32_to_cpu(event->event_cmd.flags)));
2899 /* Any of the above functions may drop and re-acquire the lock, so check
2900 * to make sure a watchdog timer didn't mark the host as non-responsive.
2902 if (xhci->xhc_state & XHCI_STATE_DYING) {
2903 xhci_dbg(xhci, "xHCI host dying, returning from "
2904 "event handler.\n");
2909 /* Update SW event ring dequeue pointer */
2910 inc_deq(xhci, xhci->event_ring);
2912 /* Are there more items on the event ring? Caller will call us again to
2919 * Update Event Ring Dequeue Pointer:
2920 * - When all events have finished
2921 * - To avoid "Event Ring Full Error" condition
2923 static void xhci_update_erst_dequeue(struct xhci_hcd *xhci,
2924 union xhci_trb *event_ring_deq)
2929 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2930 /* If necessary, update the HW's version of the event ring deq ptr. */
2931 if (event_ring_deq != xhci->event_ring->dequeue) {
2932 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2933 xhci->event_ring->dequeue);
2935 xhci_warn(xhci, "WARN something wrong with SW event ring dequeue ptr\n");
2937 * Per 4.9.4, Software writes to the ERDP register shall
2938 * always advance the Event Ring Dequeue Pointer value.
2940 if ((temp_64 & (u64) ~ERST_PTR_MASK) ==
2941 ((u64) deq & (u64) ~ERST_PTR_MASK))
2944 /* Update HC event ring dequeue pointer */
2945 temp_64 &= ERST_PTR_MASK;
2946 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2949 /* Clear the event handler busy flag (RW1C) */
2950 temp_64 |= ERST_EHB;
2951 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2955 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2956 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2957 * indicators of an event TRB error, but we check the status *first* to be safe.
2959 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2961 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2962 union xhci_trb *event_ring_deq;
2963 irqreturn_t ret = IRQ_NONE;
2964 unsigned long flags;
2969 spin_lock_irqsave(&xhci->lock, flags);
2970 /* Check if the xHC generated the interrupt, or the irq is shared */
2971 status = readl(&xhci->op_regs->status);
2972 if (status == ~(u32)0) {
2978 if (!(status & STS_EINT))
2981 if (status & STS_FATAL) {
2982 xhci_warn(xhci, "WARNING: Host System Error\n");
2989 * Clear the op reg interrupt status first,
2990 * so we can receive interrupts from other MSI-X interrupters.
2991 * Write 1 to clear the interrupt status.
2994 writel(status, &xhci->op_regs->status);
2996 if (!hcd->msi_enabled) {
2998 irq_pending = readl(&xhci->ir_set->irq_pending);
2999 irq_pending |= IMAN_IP;
3000 writel(irq_pending, &xhci->ir_set->irq_pending);
3003 if (xhci->xhc_state & XHCI_STATE_DYING ||
3004 xhci->xhc_state & XHCI_STATE_HALTED) {
3005 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
3006 "Shouldn't IRQs be disabled?\n");
3007 /* Clear the event handler busy flag (RW1C);
3008 * the event ring should be empty.
3010 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
3011 xhci_write_64(xhci, temp_64 | ERST_EHB,
3012 &xhci->ir_set->erst_dequeue);
3017 event_ring_deq = xhci->event_ring->dequeue;
3018 /* FIXME this should be a delayed service routine
3019 * that clears the EHB.
3021 while (xhci_handle_event(xhci) > 0) {
3022 if (event_loop++ < TRBS_PER_SEGMENT / 2)
3024 xhci_update_erst_dequeue(xhci, event_ring_deq);
3025 event_ring_deq = xhci->event_ring->dequeue;
3030 xhci_update_erst_dequeue(xhci, event_ring_deq);
3034 spin_unlock_irqrestore(&xhci->lock, flags);
3039 irqreturn_t xhci_msi_irq(int irq, void *hcd)
3041 return xhci_irq(hcd);
3044 /**** Endpoint Ring Operations ****/
3047 * Generic function for queueing a TRB on a ring.
3048 * The caller must have checked to make sure there's room on the ring.
3050 * @more_trbs_coming: Will you enqueue more TRBs before calling
3051 * prepare_transfer()?
3053 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
3054 bool more_trbs_coming,
3055 u32 field1, u32 field2, u32 field3, u32 field4)
3057 struct xhci_generic_trb *trb;
3059 trb = &ring->enqueue->generic;
3060 trb->field[0] = cpu_to_le32(field1);
3061 trb->field[1] = cpu_to_le32(field2);
3062 trb->field[2] = cpu_to_le32(field3);
3063 /* make sure TRB is fully written before giving it to the controller */
3065 trb->field[3] = cpu_to_le32(field4);
3067 trace_xhci_queue_trb(ring, trb);
3069 inc_enq(xhci, ring, more_trbs_coming);
3073 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
3074 * FIXME allocate segments if the ring is full.
3076 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
3077 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
3079 unsigned int num_trbs_needed;
3081 /* Make sure the endpoint has been added to xHC schedule */
3083 case EP_STATE_DISABLED:
3085 * USB core changed config/interfaces without notifying us,
3086 * or hardware is reporting the wrong state.
3088 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
3090 case EP_STATE_ERROR:
3091 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
3092 /* FIXME event handling code for error needs to clear it */
3093 /* XXX not sure if this should be -ENOENT or not */
3095 case EP_STATE_HALTED:
3096 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
3097 case EP_STATE_STOPPED:
3098 case EP_STATE_RUNNING:
3101 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
3103 * FIXME issue Configure Endpoint command to try to get the HC
3104 * back into a known state.
3110 if (room_on_ring(xhci, ep_ring, num_trbs))
3113 if (ep_ring == xhci->cmd_ring) {
3114 xhci_err(xhci, "Do not support expand command ring\n");
3118 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
3119 "ERROR no room on ep ring, try ring expansion");
3120 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
3121 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
3123 xhci_err(xhci, "Ring expansion failed\n");
3128 while (trb_is_link(ep_ring->enqueue)) {
3129 /* If we're not dealing with 0.95 hardware or isoc rings
3130 * on AMD 0.96 host, clear the chain bit.
3132 if (!xhci_link_trb_quirk(xhci) &&
3133 !(ep_ring->type == TYPE_ISOC &&
3134 (xhci->quirks & XHCI_AMD_0x96_HOST)))
3135 ep_ring->enqueue->link.control &=
3136 cpu_to_le32(~TRB_CHAIN);
3138 ep_ring->enqueue->link.control |=
3139 cpu_to_le32(TRB_CHAIN);
3142 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE);
3144 /* Toggle the cycle bit after the last ring segment. */
3145 if (link_trb_toggles_cycle(ep_ring->enqueue))
3146 ep_ring->cycle_state ^= 1;
3148 ep_ring->enq_seg = ep_ring->enq_seg->next;
3149 ep_ring->enqueue = ep_ring->enq_seg->trbs;
3154 static int prepare_transfer(struct xhci_hcd *xhci,
3155 struct xhci_virt_device *xdev,
3156 unsigned int ep_index,
3157 unsigned int stream_id,
3158 unsigned int num_trbs,
3160 unsigned int td_index,
3164 struct urb_priv *urb_priv;
3166 struct xhci_ring *ep_ring;
3167 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3169 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
3171 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
3176 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
3177 num_trbs, mem_flags);
3181 urb_priv = urb->hcpriv;
3182 td = &urb_priv->td[td_index];
3184 INIT_LIST_HEAD(&td->td_list);
3185 INIT_LIST_HEAD(&td->cancelled_td_list);
3187 if (td_index == 0) {
3188 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
3194 /* Add this TD to the tail of the endpoint ring's TD list */
3195 list_add_tail(&td->td_list, &ep_ring->td_list);
3196 td->start_seg = ep_ring->enq_seg;
3197 td->first_trb = ep_ring->enqueue;
3202 unsigned int count_trbs(u64 addr, u64 len)
3204 unsigned int num_trbs;
3206 num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
3214 static inline unsigned int count_trbs_needed(struct urb *urb)
3216 return count_trbs(urb->transfer_dma, urb->transfer_buffer_length);
3219 static unsigned int count_sg_trbs_needed(struct urb *urb)
3221 struct scatterlist *sg;
3222 unsigned int i, len, full_len, num_trbs = 0;
3224 full_len = urb->transfer_buffer_length;
3226 for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
3227 len = sg_dma_len(sg);
3228 num_trbs += count_trbs(sg_dma_address(sg), len);
3229 len = min_t(unsigned int, len, full_len);
3238 static unsigned int count_isoc_trbs_needed(struct urb *urb, int i)
3242 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
3243 len = urb->iso_frame_desc[i].length;
3245 return count_trbs(addr, len);
3248 static void check_trb_math(struct urb *urb, int running_total)
3250 if (unlikely(running_total != urb->transfer_buffer_length))
3251 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
3252 "queued %#x (%d), asked for %#x (%d)\n",
3254 urb->ep->desc.bEndpointAddress,
3255 running_total, running_total,
3256 urb->transfer_buffer_length,
3257 urb->transfer_buffer_length);
3260 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
3261 unsigned int ep_index, unsigned int stream_id, int start_cycle,
3262 struct xhci_generic_trb *start_trb)
3265 * Pass all the TRBs to the hardware at once and make sure this write
3270 start_trb->field[3] |= cpu_to_le32(start_cycle);
3272 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
3273 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
3276 static void check_interval(struct xhci_hcd *xhci, struct urb *urb,
3277 struct xhci_ep_ctx *ep_ctx)
3282 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3283 ep_interval = urb->interval;
3285 /* Convert to microframes */
3286 if (urb->dev->speed == USB_SPEED_LOW ||
3287 urb->dev->speed == USB_SPEED_FULL)
3290 /* FIXME change this to a warning and a suggestion to use the new API
3291 * to set the polling interval (once the API is added).
3293 if (xhci_interval != ep_interval) {
3294 dev_dbg_ratelimited(&urb->dev->dev,
3295 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3296 ep_interval, ep_interval == 1 ? "" : "s",
3297 xhci_interval, xhci_interval == 1 ? "" : "s");
3298 urb->interval = xhci_interval;
3299 /* Convert back to frames for LS/FS devices */
3300 if (urb->dev->speed == USB_SPEED_LOW ||
3301 urb->dev->speed == USB_SPEED_FULL)
3307 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3308 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3309 * (comprised of sg list entries) can take several service intervals to
3312 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3313 struct urb *urb, int slot_id, unsigned int ep_index)
3315 struct xhci_ep_ctx *ep_ctx;
3317 ep_ctx = xhci_get_ep_ctx(xhci, xhci->devs[slot_id]->out_ctx, ep_index);
3318 check_interval(xhci, urb, ep_ctx);
3320 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
3324 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3325 * packets remaining in the TD (*not* including this TRB).
3327 * Total TD packet count = total_packet_count =
3328 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3330 * Packets transferred up to and including this TRB = packets_transferred =
3331 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3333 * TD size = total_packet_count - packets_transferred
3335 * For xHCI 0.96 and older, TD size field should be the remaining bytes
3336 * including this TRB, right shifted by 10
3338 * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
3339 * This is taken care of in the TRB_TD_SIZE() macro
3341 * The last TRB in a TD must have the TD size set to zero.
3343 static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3344 int trb_buff_len, unsigned int td_total_len,
3345 struct urb *urb, bool more_trbs_coming)
3347 u32 maxp, total_packet_count;
3349 /* MTK xHCI 0.96 contains some features from 1.0 */
3350 if (xhci->hci_version < 0x100 && !(xhci->quirks & XHCI_MTK_HOST))
3351 return ((td_total_len - transferred) >> 10);
3353 /* One TRB with a zero-length data packet. */
3354 if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) ||
3355 trb_buff_len == td_total_len)
3358 /* for MTK xHCI 0.96, TD size include this TRB, but not in 1.x */
3359 if ((xhci->quirks & XHCI_MTK_HOST) && (xhci->hci_version < 0x100))
3362 maxp = usb_endpoint_maxp(&urb->ep->desc);
3363 total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3365 /* Queueing functions don't count the current TRB into transferred */
3366 return (total_packet_count - ((transferred + trb_buff_len) / maxp));
3370 static int xhci_align_td(struct xhci_hcd *xhci, struct urb *urb, u32 enqd_len,
3371 u32 *trb_buff_len, struct xhci_segment *seg)
3373 struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
3374 unsigned int unalign;
3375 unsigned int max_pkt;
3379 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3380 unalign = (enqd_len + *trb_buff_len) % max_pkt;
3382 /* we got lucky, last normal TRB data on segment is packet aligned */
3386 xhci_dbg(xhci, "Unaligned %d bytes, buff len %d\n",
3387 unalign, *trb_buff_len);
3389 /* is the last nornal TRB alignable by splitting it */
3390 if (*trb_buff_len > unalign) {
3391 *trb_buff_len -= unalign;
3392 xhci_dbg(xhci, "split align, new buff len %d\n", *trb_buff_len);
3397 * We want enqd_len + trb_buff_len to sum up to a number aligned to
3398 * number which is divisible by the endpoint's wMaxPacketSize. IOW:
3399 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0.
3401 new_buff_len = max_pkt - (enqd_len % max_pkt);
3403 if (new_buff_len > (urb->transfer_buffer_length - enqd_len))
3404 new_buff_len = (urb->transfer_buffer_length - enqd_len);
3406 /* create a max max_pkt sized bounce buffer pointed to by last trb */
3407 if (usb_urb_dir_out(urb)) {
3409 len = sg_pcopy_to_buffer(urb->sg, urb->num_sgs,
3410 seg->bounce_buf, new_buff_len, enqd_len);
3411 if (len != new_buff_len)
3412 xhci_warn(xhci, "WARN Wrong bounce buffer write length: %zu != %d\n",
3415 memcpy(seg->bounce_buf, urb->transfer_buffer + enqd_len, new_buff_len);
3418 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3419 max_pkt, DMA_TO_DEVICE);
3421 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3422 max_pkt, DMA_FROM_DEVICE);
3425 if (dma_mapping_error(dev, seg->bounce_dma)) {
3426 /* try without aligning. Some host controllers survive */
3427 xhci_warn(xhci, "Failed mapping bounce buffer, not aligning\n");
3430 *trb_buff_len = new_buff_len;
3431 seg->bounce_len = new_buff_len;
3432 seg->bounce_offs = enqd_len;
3434 xhci_dbg(xhci, "Bounce align, new buff len %d\n", *trb_buff_len);
3439 /* This is very similar to what ehci-q.c qtd_fill() does */
3440 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3441 struct urb *urb, int slot_id, unsigned int ep_index)
3443 struct xhci_ring *ring;
3444 struct urb_priv *urb_priv;
3446 struct xhci_generic_trb *start_trb;
3447 struct scatterlist *sg = NULL;
3448 bool more_trbs_coming = true;
3449 bool need_zero_pkt = false;
3450 bool first_trb = true;
3451 unsigned int num_trbs;
3452 unsigned int start_cycle, num_sgs = 0;
3453 unsigned int enqd_len, block_len, trb_buff_len, full_len;
3455 u32 field, length_field, remainder;
3456 u64 addr, send_addr;
3458 ring = xhci_urb_to_transfer_ring(xhci, urb);
3462 full_len = urb->transfer_buffer_length;
3463 /* If we have scatter/gather list, we use it. */
3465 num_sgs = urb->num_mapped_sgs;
3467 addr = (u64) sg_dma_address(sg);
3468 block_len = sg_dma_len(sg);
3469 num_trbs = count_sg_trbs_needed(urb);
3471 num_trbs = count_trbs_needed(urb);
3472 addr = (u64) urb->transfer_dma;
3473 block_len = full_len;
3475 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3476 ep_index, urb->stream_id,
3477 num_trbs, urb, 0, mem_flags);
3478 if (unlikely(ret < 0))
3481 urb_priv = urb->hcpriv;
3483 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3484 if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
3485 need_zero_pkt = true;
3487 td = &urb_priv->td[0];
3490 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3491 * until we've finished creating all the other TRBs. The ring's cycle
3492 * state may change as we enqueue the other TRBs, so save it too.
3494 start_trb = &ring->enqueue->generic;
3495 start_cycle = ring->cycle_state;
3498 /* Queue the TRBs, even if they are zero-length */
3499 for (enqd_len = 0; first_trb || enqd_len < full_len;
3500 enqd_len += trb_buff_len) {
3501 field = TRB_TYPE(TRB_NORMAL);
3503 /* TRB buffer should not cross 64KB boundaries */
3504 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
3505 trb_buff_len = min_t(unsigned int, trb_buff_len, block_len);
3507 if (enqd_len + trb_buff_len > full_len)
3508 trb_buff_len = full_len - enqd_len;
3510 /* Don't change the cycle bit of the first TRB until later */
3513 if (start_cycle == 0)
3516 field |= ring->cycle_state;
3518 /* Chain all the TRBs together; clear the chain bit in the last
3519 * TRB to indicate it's the last TRB in the chain.
3521 if (enqd_len + trb_buff_len < full_len) {
3523 if (trb_is_link(ring->enqueue + 1)) {
3524 if (xhci_align_td(xhci, urb, enqd_len,
3527 send_addr = ring->enq_seg->bounce_dma;
3528 /* assuming TD won't span 2 segs */
3529 td->bounce_seg = ring->enq_seg;
3533 if (enqd_len + trb_buff_len >= full_len) {
3534 field &= ~TRB_CHAIN;
3536 more_trbs_coming = false;
3537 td->last_trb = ring->enqueue;
3538 td->last_trb_seg = ring->enq_seg;
3539 if (xhci_urb_suitable_for_idt(urb)) {
3540 memcpy(&send_addr, urb->transfer_buffer,
3542 le64_to_cpus(&send_addr);
3547 /* Only set interrupt on short packet for IN endpoints */
3548 if (usb_urb_dir_in(urb))
3551 /* Set the TRB length, TD size, and interrupter fields. */
3552 remainder = xhci_td_remainder(xhci, enqd_len, trb_buff_len,
3553 full_len, urb, more_trbs_coming);
3555 length_field = TRB_LEN(trb_buff_len) |
3556 TRB_TD_SIZE(remainder) |
3559 queue_trb(xhci, ring, more_trbs_coming | need_zero_pkt,
3560 lower_32_bits(send_addr),
3561 upper_32_bits(send_addr),
3565 addr += trb_buff_len;
3566 sent_len = trb_buff_len;
3568 while (sg && sent_len >= block_len) {
3571 sent_len -= block_len;
3573 if (num_sgs != 0 && sg) {
3574 block_len = sg_dma_len(sg);
3575 addr = (u64) sg_dma_address(sg);
3579 block_len -= sent_len;
3583 if (need_zero_pkt) {
3584 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3585 ep_index, urb->stream_id,
3586 1, urb, 1, mem_flags);
3587 urb_priv->td[1].last_trb = ring->enqueue;
3588 urb_priv->td[1].last_trb_seg = ring->enq_seg;
3589 field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC;
3590 queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
3591 urb_priv->td[1].num_trbs++;
3594 check_trb_math(urb, enqd_len);
3595 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3596 start_cycle, start_trb);
3600 /* Caller must have locked xhci->lock */
3601 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3602 struct urb *urb, int slot_id, unsigned int ep_index)
3604 struct xhci_ring *ep_ring;
3607 struct usb_ctrlrequest *setup;
3608 struct xhci_generic_trb *start_trb;
3611 struct urb_priv *urb_priv;
3614 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3619 * Need to copy setup packet into setup TRB, so we can't use the setup
3622 if (!urb->setup_packet)
3625 /* 1 TRB for setup, 1 for status */
3628 * Don't need to check if we need additional event data and normal TRBs,
3629 * since data in control transfers will never get bigger than 16MB
3630 * XXX: can we get a buffer that crosses 64KB boundaries?
3632 if (urb->transfer_buffer_length > 0)
3634 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3635 ep_index, urb->stream_id,
3636 num_trbs, urb, 0, mem_flags);
3640 urb_priv = urb->hcpriv;
3641 td = &urb_priv->td[0];
3642 td->num_trbs = num_trbs;
3645 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3646 * until we've finished creating all the other TRBs. The ring's cycle
3647 * state may change as we enqueue the other TRBs, so save it too.
3649 start_trb = &ep_ring->enqueue->generic;
3650 start_cycle = ep_ring->cycle_state;
3652 /* Queue setup TRB - see section 6.4.1.2.1 */
3653 /* FIXME better way to translate setup_packet into two u32 fields? */
3654 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3656 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3657 if (start_cycle == 0)
3660 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3661 if ((xhci->hci_version >= 0x100) || (xhci->quirks & XHCI_MTK_HOST)) {
3662 if (urb->transfer_buffer_length > 0) {
3663 if (setup->bRequestType & USB_DIR_IN)
3664 field |= TRB_TX_TYPE(TRB_DATA_IN);
3666 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3670 queue_trb(xhci, ep_ring, true,
3671 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3672 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3673 TRB_LEN(8) | TRB_INTR_TARGET(0),
3674 /* Immediate data in pointer */
3677 /* If there's data, queue data TRBs */
3678 /* Only set interrupt on short packet for IN endpoints */
3679 if (usb_urb_dir_in(urb))
3680 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3682 field = TRB_TYPE(TRB_DATA);
3684 if (urb->transfer_buffer_length > 0) {
3685 u32 length_field, remainder;
3688 if (xhci_urb_suitable_for_idt(urb)) {
3689 memcpy(&addr, urb->transfer_buffer,
3690 urb->transfer_buffer_length);
3691 le64_to_cpus(&addr);
3694 addr = (u64) urb->transfer_dma;
3697 remainder = xhci_td_remainder(xhci, 0,
3698 urb->transfer_buffer_length,
3699 urb->transfer_buffer_length,
3701 length_field = TRB_LEN(urb->transfer_buffer_length) |
3702 TRB_TD_SIZE(remainder) |
3704 if (setup->bRequestType & USB_DIR_IN)
3705 field |= TRB_DIR_IN;
3706 queue_trb(xhci, ep_ring, true,
3707 lower_32_bits(addr),
3708 upper_32_bits(addr),
3710 field | ep_ring->cycle_state);
3713 /* Save the DMA address of the last TRB in the TD */
3714 td->last_trb = ep_ring->enqueue;
3715 td->last_trb_seg = ep_ring->enq_seg;
3717 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3718 /* If the device sent data, the status stage is an OUT transfer */
3719 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3723 queue_trb(xhci, ep_ring, false,
3727 /* Event on completion */
3728 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3730 giveback_first_trb(xhci, slot_id, ep_index, 0,
3731 start_cycle, start_trb);
3736 * The transfer burst count field of the isochronous TRB defines the number of
3737 * bursts that are required to move all packets in this TD. Only SuperSpeed
3738 * devices can burst up to bMaxBurst number of packets per service interval.
3739 * This field is zero based, meaning a value of zero in the field means one
3740 * burst. Basically, for everything but SuperSpeed devices, this field will be
3741 * zero. Only xHCI 1.0 host controllers support this field.
3743 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3744 struct urb *urb, unsigned int total_packet_count)
3746 unsigned int max_burst;
3748 if (xhci->hci_version < 0x100 || urb->dev->speed < USB_SPEED_SUPER)
3751 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3752 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1;
3756 * Returns the number of packets in the last "burst" of packets. This field is
3757 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3758 * the last burst packet count is equal to the total number of packets in the
3759 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3760 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3761 * contain 1 to (bMaxBurst + 1) packets.
3763 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3764 struct urb *urb, unsigned int total_packet_count)
3766 unsigned int max_burst;
3767 unsigned int residue;
3769 if (xhci->hci_version < 0x100)
3772 if (urb->dev->speed >= USB_SPEED_SUPER) {
3773 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3774 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3775 residue = total_packet_count % (max_burst + 1);
3776 /* If residue is zero, the last burst contains (max_burst + 1)
3777 * number of packets, but the TLBPC field is zero-based.
3783 if (total_packet_count == 0)
3785 return total_packet_count - 1;
3789 * Calculates Frame ID field of the isochronous TRB identifies the
3790 * target frame that the Interval associated with this Isochronous
3791 * Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
3793 * Returns actual frame id on success, negative value on error.
3795 static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci,
3796 struct urb *urb, int index)
3798 int start_frame, ist, ret = 0;
3799 int start_frame_id, end_frame_id, current_frame_id;
3801 if (urb->dev->speed == USB_SPEED_LOW ||
3802 urb->dev->speed == USB_SPEED_FULL)
3803 start_frame = urb->start_frame + index * urb->interval;
3805 start_frame = (urb->start_frame + index * urb->interval) >> 3;
3807 /* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3809 * If bit [3] of IST is cleared to '0', software can add a TRB no
3810 * later than IST[2:0] Microframes before that TRB is scheduled to
3812 * If bit [3] of IST is set to '1', software can add a TRB no later
3813 * than IST[2:0] Frames before that TRB is scheduled to be executed.
3815 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3816 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3819 /* Software shall not schedule an Isoch TD with a Frame ID value that
3820 * is less than the Start Frame ID or greater than the End Frame ID,
3823 * End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
3824 * Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
3826 * Both the End Frame ID and Start Frame ID values are calculated
3827 * in microframes. When software determines the valid Frame ID value;
3828 * The End Frame ID value should be rounded down to the nearest Frame
3829 * boundary, and the Start Frame ID value should be rounded up to the
3830 * nearest Frame boundary.
3832 current_frame_id = readl(&xhci->run_regs->microframe_index);
3833 start_frame_id = roundup(current_frame_id + ist + 1, 8);
3834 end_frame_id = rounddown(current_frame_id + 895 * 8, 8);
3836 start_frame &= 0x7ff;
3837 start_frame_id = (start_frame_id >> 3) & 0x7ff;
3838 end_frame_id = (end_frame_id >> 3) & 0x7ff;
3840 xhci_dbg(xhci, "%s: index %d, reg 0x%x start_frame_id 0x%x, end_frame_id 0x%x, start_frame 0x%x\n",
3841 __func__, index, readl(&xhci->run_regs->microframe_index),
3842 start_frame_id, end_frame_id, start_frame);
3844 if (start_frame_id < end_frame_id) {
3845 if (start_frame > end_frame_id ||
3846 start_frame < start_frame_id)
3848 } else if (start_frame_id > end_frame_id) {
3849 if ((start_frame > end_frame_id &&
3850 start_frame < start_frame_id))
3857 if (ret == -EINVAL || start_frame == start_frame_id) {
3858 start_frame = start_frame_id + 1;
3859 if (urb->dev->speed == USB_SPEED_LOW ||
3860 urb->dev->speed == USB_SPEED_FULL)
3861 urb->start_frame = start_frame;
3863 urb->start_frame = start_frame << 3;
3869 xhci_warn(xhci, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
3870 start_frame, current_frame_id, index,
3871 start_frame_id, end_frame_id);
3872 xhci_warn(xhci, "Ignore frame ID field, use SIA bit instead\n");
3879 /* Check if we should generate event interrupt for a TD in an isoc URB */
3880 static bool trb_block_event_intr(struct xhci_hcd *xhci, int num_tds, int i)
3882 if (xhci->hci_version < 0x100)
3884 /* always generate an event interrupt for the last TD */
3885 if (i == num_tds - 1)
3888 * If AVOID_BEI is set the host handles full event rings poorly,
3889 * generate an event at least every 8th TD to clear the event ring
3891 if (i && xhci->quirks & XHCI_AVOID_BEI)
3897 /* This is for isoc transfer */
3898 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3899 struct urb *urb, int slot_id, unsigned int ep_index)
3901 struct xhci_ring *ep_ring;
3902 struct urb_priv *urb_priv;
3904 int num_tds, trbs_per_td;
3905 struct xhci_generic_trb *start_trb;
3908 u32 field, length_field;
3909 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3910 u64 start_addr, addr;
3912 bool more_trbs_coming;
3913 struct xhci_virt_ep *xep;
3916 xep = &xhci->devs[slot_id]->eps[ep_index];
3917 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3919 num_tds = urb->number_of_packets;
3921 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3924 start_addr = (u64) urb->transfer_dma;
3925 start_trb = &ep_ring->enqueue->generic;
3926 start_cycle = ep_ring->cycle_state;
3928 urb_priv = urb->hcpriv;
3929 /* Queue the TRBs for each TD, even if they are zero-length */
3930 for (i = 0; i < num_tds; i++) {
3931 unsigned int total_pkt_count, max_pkt;
3932 unsigned int burst_count, last_burst_pkt_count;
3937 addr = start_addr + urb->iso_frame_desc[i].offset;
3938 td_len = urb->iso_frame_desc[i].length;
3939 td_remain_len = td_len;
3940 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3941 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
3943 /* A zero-length transfer still involves at least one packet. */
3944 if (total_pkt_count == 0)
3946 burst_count = xhci_get_burst_count(xhci, urb, total_pkt_count);
3947 last_burst_pkt_count = xhci_get_last_burst_packet_count(xhci,
3948 urb, total_pkt_count);
3950 trbs_per_td = count_isoc_trbs_needed(urb, i);
3952 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3953 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3959 td = &urb_priv->td[i];
3960 td->num_trbs = trbs_per_td;
3961 /* use SIA as default, if frame id is used overwrite it */
3962 sia_frame_id = TRB_SIA;
3963 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3964 HCC_CFC(xhci->hcc_params)) {
3965 frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
3967 sia_frame_id = TRB_FRAME_ID(frame_id);
3970 * Set isoc specific data for the first TRB in a TD.
3971 * Prevent HW from getting the TRBs by keeping the cycle state
3972 * inverted in the first TDs isoc TRB.
3974 field = TRB_TYPE(TRB_ISOC) |
3975 TRB_TLBPC(last_burst_pkt_count) |
3977 (i ? ep_ring->cycle_state : !start_cycle);
3979 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */
3980 if (!xep->use_extended_tbc)
3981 field |= TRB_TBC(burst_count);
3983 /* fill the rest of the TRB fields, and remaining normal TRBs */
3984 for (j = 0; j < trbs_per_td; j++) {
3987 /* only first TRB is isoc, overwrite otherwise */
3989 field = TRB_TYPE(TRB_NORMAL) |
3990 ep_ring->cycle_state;
3992 /* Only set interrupt on short packet for IN EPs */
3993 if (usb_urb_dir_in(urb))
3996 /* Set the chain bit for all except the last TRB */
3997 if (j < trbs_per_td - 1) {
3998 more_trbs_coming = true;
4001 more_trbs_coming = false;
4002 td->last_trb = ep_ring->enqueue;
4003 td->last_trb_seg = ep_ring->enq_seg;
4005 if (trb_block_event_intr(xhci, num_tds, i))
4008 /* Calculate TRB length */
4009 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
4010 if (trb_buff_len > td_remain_len)
4011 trb_buff_len = td_remain_len;
4013 /* Set the TRB length, TD size, & interrupter fields. */
4014 remainder = xhci_td_remainder(xhci, running_total,
4015 trb_buff_len, td_len,
4016 urb, more_trbs_coming);
4018 length_field = TRB_LEN(trb_buff_len) |
4021 /* xhci 1.1 with ETE uses TD Size field for TBC */
4022 if (first_trb && xep->use_extended_tbc)
4023 length_field |= TRB_TD_SIZE_TBC(burst_count);
4025 length_field |= TRB_TD_SIZE(remainder);
4028 queue_trb(xhci, ep_ring, more_trbs_coming,
4029 lower_32_bits(addr),
4030 upper_32_bits(addr),
4033 running_total += trb_buff_len;
4035 addr += trb_buff_len;
4036 td_remain_len -= trb_buff_len;
4039 /* Check TD length */
4040 if (running_total != td_len) {
4041 xhci_err(xhci, "ISOC TD length unmatch\n");
4047 /* store the next frame id */
4048 if (HCC_CFC(xhci->hcc_params))
4049 xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
4051 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
4052 if (xhci->quirks & XHCI_AMD_PLL_FIX)
4053 usb_amd_quirk_pll_disable();
4055 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
4057 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
4058 start_cycle, start_trb);
4061 /* Clean up a partially enqueued isoc transfer. */
4063 for (i--; i >= 0; i--)
4064 list_del_init(&urb_priv->td[i].td_list);
4066 /* Use the first TD as a temporary variable to turn the TDs we've queued
4067 * into No-ops with a software-owned cycle bit. That way the hardware
4068 * won't accidentally start executing bogus TDs when we partially
4069 * overwrite them. td->first_trb and td->start_seg are already set.
4071 urb_priv->td[0].last_trb = ep_ring->enqueue;
4072 /* Every TRB except the first & last will have its cycle bit flipped. */
4073 td_to_noop(xhci, ep_ring, &urb_priv->td[0], true);
4075 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
4076 ep_ring->enqueue = urb_priv->td[0].first_trb;
4077 ep_ring->enq_seg = urb_priv->td[0].start_seg;
4078 ep_ring->cycle_state = start_cycle;
4079 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
4080 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
4085 * Check transfer ring to guarantee there is enough room for the urb.
4086 * Update ISO URB start_frame and interval.
4087 * Update interval as xhci_queue_intr_tx does. Use xhci frame_index to
4088 * update urb->start_frame if URB_ISO_ASAP is set in transfer_flags or
4089 * Contiguous Frame ID is not supported by HC.
4091 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
4092 struct urb *urb, int slot_id, unsigned int ep_index)
4094 struct xhci_virt_device *xdev;
4095 struct xhci_ring *ep_ring;
4096 struct xhci_ep_ctx *ep_ctx;
4098 int num_tds, num_trbs, i;
4100 struct xhci_virt_ep *xep;
4103 xdev = xhci->devs[slot_id];
4104 xep = &xhci->devs[slot_id]->eps[ep_index];
4105 ep_ring = xdev->eps[ep_index].ring;
4106 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
4109 num_tds = urb->number_of_packets;
4110 for (i = 0; i < num_tds; i++)
4111 num_trbs += count_isoc_trbs_needed(urb, i);
4113 /* Check the ring to guarantee there is enough room for the whole urb.
4114 * Do not insert any td of the urb to the ring if the check failed.
4116 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
4117 num_trbs, mem_flags);
4122 * Check interval value. This should be done before we start to
4123 * calculate the start frame value.
4125 check_interval(xhci, urb, ep_ctx);
4127 /* Calculate the start frame and put it in urb->start_frame. */
4128 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
4129 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
4130 urb->start_frame = xep->next_frame_id;
4131 goto skip_start_over;
4135 start_frame = readl(&xhci->run_regs->microframe_index);
4136 start_frame &= 0x3fff;
4138 * Round up to the next frame and consider the time before trb really
4139 * gets scheduled by hardare.
4141 ist = HCS_IST(xhci->hcs_params2) & 0x7;
4142 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
4144 start_frame += ist + XHCI_CFC_DELAY;
4145 start_frame = roundup(start_frame, 8);
4148 * Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
4149 * is greate than 8 microframes.
4151 if (urb->dev->speed == USB_SPEED_LOW ||
4152 urb->dev->speed == USB_SPEED_FULL) {
4153 start_frame = roundup(start_frame, urb->interval << 3);
4154 urb->start_frame = start_frame >> 3;
4156 start_frame = roundup(start_frame, urb->interval);
4157 urb->start_frame = start_frame;
4161 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
4163 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
4166 /**** Command Ring Operations ****/
4168 /* Generic function for queueing a command TRB on the command ring.
4169 * Check to make sure there's room on the command ring for one command TRB.
4170 * Also check that there's room reserved for commands that must not fail.
4171 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
4172 * then only check for the number of reserved spots.
4173 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
4174 * because the command event handler may want to resubmit a failed command.
4176 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
4177 u32 field1, u32 field2,
4178 u32 field3, u32 field4, bool command_must_succeed)
4180 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
4183 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
4184 (xhci->xhc_state & XHCI_STATE_HALTED)) {
4185 xhci_dbg(xhci, "xHCI dying or halted, can't queue_command\n");
4189 if (!command_must_succeed)
4192 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
4193 reserved_trbs, GFP_ATOMIC);
4195 xhci_err(xhci, "ERR: No room for command on command ring\n");
4196 if (command_must_succeed)
4197 xhci_err(xhci, "ERR: Reserved TRB counting for "
4198 "unfailable commands failed.\n");
4202 cmd->command_trb = xhci->cmd_ring->enqueue;
4204 /* if there are no other commands queued we start the timeout timer */
4205 if (list_empty(&xhci->cmd_list)) {
4206 xhci->current_cmd = cmd;
4207 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
4210 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
4212 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
4213 field4 | xhci->cmd_ring->cycle_state);
4217 /* Queue a slot enable or disable request on the command ring */
4218 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd,
4219 u32 trb_type, u32 slot_id)
4221 return queue_command(xhci, cmd, 0, 0, 0,
4222 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
4225 /* Queue an address device command TRB */
4226 int xhci_queue_address_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
4227 dma_addr_t in_ctx_ptr, u32 slot_id, enum xhci_setup_dev setup)
4229 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4230 upper_32_bits(in_ctx_ptr), 0,
4231 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)
4232 | (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0), false);
4235 int xhci_queue_vendor_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
4236 u32 field1, u32 field2, u32 field3, u32 field4)
4238 return queue_command(xhci, cmd, field1, field2, field3, field4, false);
4241 /* Queue a reset device command TRB */
4242 int xhci_queue_reset_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
4245 return queue_command(xhci, cmd, 0, 0, 0,
4246 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
4250 /* Queue a configure endpoint command TRB */
4251 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci,
4252 struct xhci_command *cmd, dma_addr_t in_ctx_ptr,
4253 u32 slot_id, bool command_must_succeed)
4255 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4256 upper_32_bits(in_ctx_ptr), 0,
4257 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
4258 command_must_succeed);
4261 /* Queue an evaluate context command TRB */
4262 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, struct xhci_command *cmd,
4263 dma_addr_t in_ctx_ptr, u32 slot_id, bool command_must_succeed)
4265 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4266 upper_32_bits(in_ctx_ptr), 0,
4267 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
4268 command_must_succeed);
4272 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
4273 * activity on an endpoint that is about to be suspended.
4275 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, struct xhci_command *cmd,
4276 int slot_id, unsigned int ep_index, int suspend)
4278 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4279 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4280 u32 type = TRB_TYPE(TRB_STOP_RING);
4281 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
4283 return queue_command(xhci, cmd, 0, 0, 0,
4284 trb_slot_id | trb_ep_index | type | trb_suspend, false);
4287 /* Set Transfer Ring Dequeue Pointer command */
4288 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
4289 unsigned int slot_id, unsigned int ep_index,
4290 struct xhci_dequeue_state *deq_state)
4293 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4294 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4295 u32 trb_stream_id = STREAM_ID_FOR_TRB(deq_state->stream_id);
4297 u32 type = TRB_TYPE(TRB_SET_DEQ);
4298 struct xhci_virt_ep *ep;
4299 struct xhci_command *cmd;
4302 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
4303 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u",
4304 deq_state->new_deq_seg,
4305 (unsigned long long)deq_state->new_deq_seg->dma,
4306 deq_state->new_deq_ptr,
4307 (unsigned long long)xhci_trb_virt_to_dma(
4308 deq_state->new_deq_seg, deq_state->new_deq_ptr),
4309 deq_state->new_cycle_state);
4311 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
4312 deq_state->new_deq_ptr);
4314 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4315 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
4316 deq_state->new_deq_seg, deq_state->new_deq_ptr);
4319 ep = &xhci->devs[slot_id]->eps[ep_index];
4320 if ((ep->ep_state & SET_DEQ_PENDING)) {
4321 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4322 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
4326 /* This function gets called from contexts where it cannot sleep */
4327 cmd = xhci_alloc_command(xhci, false, GFP_ATOMIC);
4331 ep->queued_deq_seg = deq_state->new_deq_seg;
4332 ep->queued_deq_ptr = deq_state->new_deq_ptr;
4333 if (deq_state->stream_id)
4334 trb_sct = SCT_FOR_TRB(SCT_PRI_TR);
4335 ret = queue_command(xhci, cmd,
4336 lower_32_bits(addr) | trb_sct | deq_state->new_cycle_state,
4337 upper_32_bits(addr), trb_stream_id,
4338 trb_slot_id | trb_ep_index | type, false);
4340 xhci_free_command(xhci, cmd);
4344 /* Stop the TD queueing code from ringing the doorbell until
4345 * this command completes. The HC won't set the dequeue pointer
4346 * if the ring is running, and ringing the doorbell starts the
4349 ep->ep_state |= SET_DEQ_PENDING;
4352 int xhci_queue_reset_ep(struct xhci_hcd *xhci, struct xhci_command *cmd,
4353 int slot_id, unsigned int ep_index,
4354 enum xhci_ep_reset_type reset_type)
4356 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4357 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4358 u32 type = TRB_TYPE(TRB_RESET_EP);
4360 if (reset_type == EP_SOFT_RESET)
4363 return queue_command(xhci, cmd, 0, 0, 0,
4364 trb_slot_id | trb_ep_index | type, false);