2 * xHCI host controller driver for R-Car SoCs
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
11 #include <linux/firmware.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
15 #include <linux/usb/phy.h>
18 #include "xhci-plat.h"
19 #include "xhci-rcar.h"
22 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
23 * performance degradation. So, this driver continues to use the V1 if R-Car
25 * - The V1 firmware is impossible to use on R-Car Gen3.
29 /*** Register Offset ***/
30 #define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
31 #define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */
32 #define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */
34 #define RCAR_USB3_LCLK 0xa44 /* LCLK Select */
35 #define RCAR_USB3_CONF1 0xa48 /* USB3.0 Configuration1 */
36 #define RCAR_USB3_CONF2 0xa5c /* USB3.0 Configuration2 */
37 #define RCAR_USB3_CONF3 0xaa8 /* USB3.0 Configuration3 */
38 #define RCAR_USB3_RX_POL 0xab0 /* USB3.0 RX Polarity */
39 #define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */
41 /*** Register Settings ***/
42 /* Interrupt Enable */
43 #define RCAR_USB3_INT_XHC_ENA 0x00000001
44 #define RCAR_USB3_INT_PME_ENA 0x00000002
45 #define RCAR_USB3_INT_HSE_ENA 0x00000004
46 #define RCAR_USB3_INT_ENA_VAL (RCAR_USB3_INT_XHC_ENA | \
47 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
49 /* FW Download Control & Status */
50 #define RCAR_USB3_DL_CTRL_ENABLE 0x00000001
51 #define RCAR_USB3_DL_CTRL_FW_SUCCESS 0x00000010
52 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0 0x00000100
55 #define RCAR_USB3_LCLK_ENA_VAL 0x01030001
57 /* USB3.0 Configuration */
58 #define RCAR_USB3_CONF1_VAL 0x00030204
59 #define RCAR_USB3_CONF2_VAL 0x00030300
60 #define RCAR_USB3_CONF3_VAL 0x13802007
63 #define RCAR_USB3_RX_POL_VAL BIT(21)
64 #define RCAR_USB3_TX_POL_VAL BIT(4)
66 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
69 writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
70 /* USB3.0 Configuration */
71 writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
72 writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
73 writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
75 writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
76 writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
79 static int xhci_rcar_is_gen2(struct device *dev)
81 struct device_node *node = dev->of_node;
83 return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
84 of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
85 of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
86 of_device_is_compatible(node, "renesas,rcar-gen2-xhci");
89 static int xhci_rcar_is_gen3(struct device *dev)
91 struct device_node *node = dev->of_node;
93 return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
94 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
97 void xhci_rcar_start(struct usb_hcd *hcd)
101 if (hcd->regs != NULL) {
102 /* Interrupt Enable */
103 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
104 temp |= RCAR_USB3_INT_ENA_VAL;
105 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
106 if (xhci_rcar_is_gen2(hcd->self.controller))
107 xhci_rcar_start_gen2(hcd);
111 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
113 struct device *dev = hcd->self.controller;
114 void __iomem *regs = hcd->regs;
115 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
116 const struct firmware *fw;
117 int retval, index, j, time;
121 /* request R-Car USB3.0 firmware */
122 retval = reject_firmware(&fw, priv->firmware_name, dev);
126 /* download R-Car USB3.0 firmware */
127 temp = readl(regs + RCAR_USB3_DL_CTRL);
128 temp |= RCAR_USB3_DL_CTRL_ENABLE;
129 writel(temp, regs + RCAR_USB3_DL_CTRL);
131 for (index = 0; index < fw->size; index += 4) {
132 /* to avoid reading beyond the end of the buffer */
133 for (data = 0, j = 3; j >= 0; j--) {
134 if ((j + index) < fw->size)
135 data |= fw->data[index + j] << (8 * j);
137 writel(data, regs + RCAR_USB3_FW_DATA0);
138 temp = readl(regs + RCAR_USB3_DL_CTRL);
139 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
140 writel(temp, regs + RCAR_USB3_DL_CTRL);
142 for (time = 0; time < timeout; time++) {
143 val = readl(regs + RCAR_USB3_DL_CTRL);
144 if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
148 if (time == timeout) {
154 temp = readl(regs + RCAR_USB3_DL_CTRL);
155 temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
156 writel(temp, regs + RCAR_USB3_DL_CTRL);
158 for (time = 0; time < timeout; time++) {
159 val = readl(regs + RCAR_USB3_DL_CTRL);
160 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
169 release_firmware(fw);
174 /* This function needs to initialize a "phy" of usb before */
175 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
177 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
179 /* If hcd->regs is NULL, we don't just call the following function */
184 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
185 * to 1. However, these SoCs don't support 64-bit address memory
186 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
187 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
190 if (xhci_rcar_is_gen2(hcd->self.controller) ||
191 xhci_rcar_is_gen3(hcd->self.controller))
192 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
194 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
195 return xhci_rcar_download_firmware(hcd);