2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
26 #include <linux/acpi.h>
29 #include "xhci-trace.h"
31 #define SSIC_PORT_NUM 2
32 #define SSIC_PORT_CFG2 0x880c
33 #define SSIC_PORT_CFG2_OFFSET 0x30
34 #define PROG_DONE (1 << 30)
35 #define SSIC_PORT_UNUSED (1 << 31)
37 /* Device for a quirk */
38 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
39 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
40 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009 0x1009
41 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 0x1100
42 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
44 #define PCI_VENDOR_ID_ETRON 0x1b6f
45 #define PCI_DEVICE_ID_EJ168 0x7023
47 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
48 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
49 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI 0x9cb1
50 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
51 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
52 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
53 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8
54 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8
55 #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8
56 #define PCI_DEVICE_ID_INTEL_DNV_XHCI 0x19d0
57 #define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
59 #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
61 static const char hcd_name[] = "xhci_hcd";
63 static struct hc_driver __read_mostly xhci_pci_hc_driver;
65 static int xhci_pci_setup(struct usb_hcd *hcd);
67 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
68 .reset = xhci_pci_setup,
71 /* called after powerup, by probe or system-pm "wakeup" */
72 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
75 * TODO: Implement finding debug ports later.
76 * TODO: see if there are any quirks that need to be added to handle
77 * new extended capabilities.
80 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
81 if (!pci_set_mwi(pdev))
82 xhci_dbg(xhci, "MWI active\n");
84 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
88 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
90 struct pci_dev *pdev = to_pci_dev(dev);
92 /* Look for vendor-specific quirks */
93 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
94 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
95 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
96 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
97 pdev->revision == 0x0) {
98 xhci->quirks |= XHCI_RESET_EP_QUIRK;
99 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
100 "QUIRK: Fresco Logic xHC needs configure"
101 " endpoint cmd after reset endpoint");
103 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
104 pdev->revision == 0x4) {
105 xhci->quirks |= XHCI_SLOW_SUSPEND;
106 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
107 "QUIRK: Fresco Logic xHC revision %u"
108 "must be suspended extra slowly",
111 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
112 xhci->quirks |= XHCI_BROKEN_STREAMS;
113 /* Fresco Logic confirms: all revisions of this chip do not
114 * support MSI, even though some of them claim to in their PCI
117 xhci->quirks |= XHCI_BROKEN_MSI;
118 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
119 "QUIRK: Fresco Logic revision %u "
120 "has broken MSI implementation",
122 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
125 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
126 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
127 xhci->quirks |= XHCI_BROKEN_STREAMS;
129 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
130 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1100)
131 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
133 if (pdev->vendor == PCI_VENDOR_ID_NEC)
134 xhci->quirks |= XHCI_NEC_HOST;
136 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
137 xhci->quirks |= XHCI_AMD_0x96_HOST;
140 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
141 xhci->quirks |= XHCI_AMD_PLL_FIX;
143 if (pdev->vendor == PCI_VENDOR_ID_AMD)
144 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
146 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
147 xhci->quirks |= XHCI_LPM_SUPPORT;
148 xhci->quirks |= XHCI_INTEL_HOST;
149 xhci->quirks |= XHCI_AVOID_BEI;
151 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
152 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
153 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
154 xhci->limit_active_eps = 64;
155 xhci->quirks |= XHCI_SW_BW_CHECKING;
157 * PPT desktop boards DH77EB and DH77DF will power back on after
158 * a few seconds of being shutdown. The fix for this is to
159 * switch the ports from xHCI to EHCI on shutdown. We can't use
160 * DMI information to find those particular boards (since each
161 * vendor will change the board name), so we have to key off all
164 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
166 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
167 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI ||
168 pdev->device == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI)) {
169 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
170 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
172 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
173 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
174 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
175 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
176 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
177 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI ||
178 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
179 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI ||
180 pdev->device == PCI_DEVICE_ID_INTEL_CML_XHCI)) {
181 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
183 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
184 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
185 xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
187 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
188 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
189 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
190 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
191 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
192 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
193 xhci->quirks |= XHCI_MISSING_CAS;
195 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
196 pdev->device == PCI_DEVICE_ID_EJ168) {
197 xhci->quirks |= XHCI_RESET_ON_RESUME;
198 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
199 xhci->quirks |= XHCI_BROKEN_STREAMS;
201 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
202 pdev->device == 0x0014)
203 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
204 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
205 pdev->device == 0x0015)
206 xhci->quirks |= XHCI_RESET_ON_RESUME;
207 if (pdev->vendor == PCI_VENDOR_ID_VIA)
208 xhci->quirks |= XHCI_RESET_ON_RESUME;
210 /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
211 if (pdev->vendor == PCI_VENDOR_ID_VIA &&
212 pdev->device == 0x3432)
213 xhci->quirks |= XHCI_BROKEN_STREAMS;
215 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
216 pdev->device == 0x1042)
217 xhci->quirks |= XHCI_BROKEN_STREAMS;
218 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
219 pdev->device == 0x1142)
220 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
221 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
222 pdev->device == 0x2142)
223 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
225 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
226 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI)
227 xhci->quirks |= XHCI_ASMEDIA_MODIFY_FLOWCONTROL;
229 if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
230 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
232 if (xhci->quirks & XHCI_RESET_ON_RESUME)
233 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
234 "QUIRK: Resetting on resume");
238 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
240 static const u8 intel_dsm_uuid[] = {
241 0xb7, 0x0c, 0x34, 0xac, 0x01, 0xe9, 0xbf, 0x45,
242 0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23,
244 union acpi_object *obj;
246 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), intel_dsm_uuid, 3, 1,
251 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
252 #endif /* CONFIG_ACPI */
254 /* called during probe() after chip reset completes */
255 static int xhci_pci_setup(struct usb_hcd *hcd)
257 struct xhci_hcd *xhci;
258 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
261 xhci = hcd_to_xhci(hcd);
263 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
265 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
269 if (!usb_hcd_is_primary_hcd(hcd))
272 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
274 /* Find any debug ports */
275 retval = xhci_pci_reinit(xhci, pdev);
283 * We need to register our own PCI probe function (instead of the USB core's
284 * function) in order to create a second roothub under xHCI.
286 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
289 struct xhci_hcd *xhci;
290 struct hc_driver *driver;
293 driver = (struct hc_driver *)id->driver_data;
295 /* Prevent runtime suspending between USB-2 and USB-3 initialization */
296 pm_runtime_get_noresume(&dev->dev);
298 /* Register the USB 2.0 roothub.
299 * FIXME: USB core must know to register the USB 2.0 roothub first.
300 * This is sort of silly, because we could just set the HCD driver flags
301 * to say USB 2.0, but I'm not sure what the implications would be in
302 * the other parts of the HCD code.
304 retval = usb_hcd_pci_probe(dev, id);
309 /* USB 2.0 roothub is stored in the PCI device now. */
310 hcd = dev_get_drvdata(&dev->dev);
311 xhci = hcd_to_xhci(hcd);
312 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
314 if (!xhci->shared_hcd) {
316 goto dealloc_usb2_hcd;
319 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
323 /* Roothub already marked as USB 3.0 speed */
325 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
326 HCC_MAX_PSA(xhci->hcc_params) >= 4)
327 xhci->shared_hcd->can_do_streams = 1;
329 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
330 xhci_pme_acpi_rtd3_enable(dev);
332 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
333 pm_runtime_put_noidle(&dev->dev);
338 usb_put_hcd(xhci->shared_hcd);
340 usb_hcd_pci_remove(dev);
342 pm_runtime_put_noidle(&dev->dev);
346 static void xhci_pci_remove(struct pci_dev *dev)
348 struct xhci_hcd *xhci;
350 xhci = hcd_to_xhci(pci_get_drvdata(dev));
351 xhci->xhc_state |= XHCI_STATE_REMOVING;
352 if (xhci->shared_hcd) {
353 usb_remove_hcd(xhci->shared_hcd);
354 usb_put_hcd(xhci->shared_hcd);
357 /* Workaround for spurious wakeups at shutdown with HSW */
358 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
359 pci_set_power_state(dev, PCI_D3hot);
361 usb_hcd_pci_remove(dev);
366 * In some Intel xHCI controllers, in order to get D3 working,
367 * through a vendor specific SSIC CONFIG register at offset 0x883c,
368 * SSIC PORT need to be marked as "unused" before putting xHCI
369 * into D3. After D3 exit, the SSIC port need to be marked as "used".
370 * Without this change, xHCI might not enter D3 state.
372 static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
374 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
379 for (i = 0; i < SSIC_PORT_NUM; i++) {
380 reg = (void __iomem *) xhci->cap_regs +
382 i * SSIC_PORT_CFG2_OFFSET;
384 /* Notify SSIC that SSIC profile programming is not done. */
385 val = readl(reg) & ~PROG_DONE;
388 /* Mark SSIC port as unused(suspend) or used(resume) */
391 val |= SSIC_PORT_UNUSED;
393 val &= ~SSIC_PORT_UNUSED;
396 /* Notify SSIC that SSIC profile programming is done */
397 val = readl(reg) | PROG_DONE;
404 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
405 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
407 static void xhci_pme_quirk(struct usb_hcd *hcd)
409 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
413 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
415 writel(val | BIT(28), reg);
419 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
421 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
422 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
426 * Systems with the TI redriver that loses port status change events
427 * need to have the registers polled during D3, so avoid D3cold.
429 if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
430 pci_d3cold_disable(pdev);
432 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
435 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
436 xhci_ssic_port_unused_quirk(hcd, true);
438 ret = xhci_suspend(xhci, do_wakeup);
439 if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
440 xhci_ssic_port_unused_quirk(hcd, false);
445 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
447 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
448 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
451 /* The BIOS on systems with the Intel Panther Point chipset may or may
452 * not support xHCI natively. That means that during system resume, it
453 * may switch the ports back to EHCI so that users can use their
454 * keyboard to select a kernel from GRUB after resume from hibernate.
456 * The BIOS is supposed to remember whether the OS had xHCI ports
457 * enabled before resume, and switch the ports back to xHCI when the
458 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
461 * Unconditionally switch the ports back to xHCI after a system resume.
462 * It should not matter whether the EHCI or xHCI controller is
463 * resumed first. It's enough to do the switchover in xHCI because
464 * USB core won't notice anything as the hub driver doesn't start
465 * running again until after all the devices (including both EHCI and
466 * xHCI host controllers) have been resumed.
469 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
470 usb_enable_intel_xhci_ports(pdev);
472 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
473 xhci_ssic_port_unused_quirk(hcd, false);
475 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
478 retval = xhci_resume(xhci, hibernated);
482 static void xhci_pci_shutdown(struct usb_hcd *hcd)
484 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
485 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
489 /* Yet another workaround for spurious wakeups at shutdown with HSW */
490 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
491 pci_set_power_state(pdev, PCI_D3hot);
493 #endif /* CONFIG_PM */
495 /*-------------------------------------------------------------------------*/
497 /* PCI driver selection metadata; PCI hotplugging uses this */
498 static const struct pci_device_id pci_ids[] = { {
499 /* handle any USB 3.0 xHCI controller */
500 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
501 .driver_data = (unsigned long) &xhci_pci_hc_driver,
503 { /* end: all zeroes */ }
505 MODULE_DEVICE_TABLE(pci, pci_ids);
507 /* pci driver glue; this is a "new style" PCI driver module */
508 static struct pci_driver xhci_pci_driver = {
509 .name = (char *) hcd_name,
512 .probe = xhci_pci_probe,
513 .remove = xhci_pci_remove,
514 /* suspend and resume implemented later */
516 .shutdown = usb_hcd_pci_shutdown,
519 .pm = &usb_hcd_pci_pm_ops
524 static int __init xhci_pci_init(void)
526 xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
528 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
529 xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
530 xhci_pci_hc_driver.shutdown = xhci_pci_shutdown;
532 return pci_register_driver(&xhci_pci_driver);
534 module_init(xhci_pci_init);
536 static void __exit xhci_pci_exit(void)
538 pci_unregister_driver(&xhci_pci_driver);
540 module_exit(xhci_pci_exit);
542 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
543 MODULE_LICENSE("GPL");