1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
12 * EHCI scheduled transaction support: interrupt, iso, split iso
13 * These are called "periodic" transactions in the EHCI spec.
15 * Note that for interrupt transfers, the QH/QTD manipulation is shared
16 * with the "asynchronous" transaction support (control/bulk transfers).
17 * The only real difference is in how interrupt transfers are scheduled.
19 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
20 * It keeps track of every ITD (or SITD) that's linked, and holds enough
21 * pre-calculated schedule data to make appending to the queue be quick.
24 static int ehci_get_frame(struct usb_hcd *hcd);
27 * periodic_next_shadow - return "next" pointer on shadow list
28 * @periodic: host pointer to qh/itd/sitd
29 * @tag: hardware tag for type of this record
31 static union ehci_shadow *
32 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
35 switch (hc32_to_cpu(ehci, tag)) {
37 return &periodic->qh->qh_next;
39 return &periodic->fstn->fstn_next;
41 return &periodic->itd->itd_next;
42 /* case Q_TYPE_SITD: */
44 return &periodic->sitd->sitd_next;
49 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
52 switch (hc32_to_cpu(ehci, tag)) {
53 /* our ehci_shadow.qh is actually software part */
55 return &periodic->qh->hw->hw_next;
56 /* others are hw parts */
58 return periodic->hw_next;
62 /* caller must hold ehci->lock */
63 static void periodic_unlink(struct ehci_hcd *ehci, unsigned frame, void *ptr)
65 union ehci_shadow *prev_p = &ehci->pshadow[frame];
66 __hc32 *hw_p = &ehci->periodic[frame];
67 union ehci_shadow here = *prev_p;
69 /* find predecessor of "ptr"; hw and shadow lists are in sync */
70 while (here.ptr && here.ptr != ptr) {
71 prev_p = periodic_next_shadow(ehci, prev_p,
72 Q_NEXT_TYPE(ehci, *hw_p));
73 hw_p = shadow_next_periodic(ehci, &here,
74 Q_NEXT_TYPE(ehci, *hw_p));
77 /* an interrupt entry (at list end) could have been shared */
81 /* update shadow and hardware lists ... the old "next" pointers
82 * from ptr may still be in use, the caller updates them.
84 *prev_p = *periodic_next_shadow(ehci, &here,
85 Q_NEXT_TYPE(ehci, *hw_p));
87 if (!ehci->use_dummy_qh ||
88 *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p))
89 != EHCI_LIST_END(ehci))
90 *hw_p = *shadow_next_periodic(ehci, &here,
91 Q_NEXT_TYPE(ehci, *hw_p));
93 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
96 /*-------------------------------------------------------------------------*/
98 /* Bandwidth and TT management */
100 /* Find the TT data structure for this device; create it if necessary */
101 static struct ehci_tt *find_tt(struct usb_device *udev)
103 struct usb_tt *utt = udev->tt;
104 struct ehci_tt *tt, **tt_index, **ptt;
106 bool allocated_index = false;
109 return NULL; /* Not below a TT */
112 * Find/create our data structure.
113 * For hubs with a single TT, we get it directly.
114 * For hubs with multiple TTs, there's an extra level of pointers.
118 tt_index = utt->hcpriv;
119 if (!tt_index) { /* Create the index array */
120 tt_index = kcalloc(utt->hub->maxchild,
124 return ERR_PTR(-ENOMEM);
125 utt->hcpriv = tt_index;
126 allocated_index = true;
128 port = udev->ttport - 1;
129 ptt = &tt_index[port];
132 ptt = (struct ehci_tt **) &utt->hcpriv;
136 if (!tt) { /* Create the ehci_tt */
137 struct ehci_hcd *ehci =
138 hcd_to_ehci(bus_to_hcd(udev->bus));
140 tt = kzalloc(sizeof(*tt), GFP_ATOMIC);
142 if (allocated_index) {
146 return ERR_PTR(-ENOMEM);
148 list_add_tail(&tt->tt_list, &ehci->tt_list);
149 INIT_LIST_HEAD(&tt->ps_list);
158 /* Release the TT above udev, if it's not in use */
159 static void drop_tt(struct usb_device *udev)
161 struct usb_tt *utt = udev->tt;
162 struct ehci_tt *tt, **tt_index, **ptt;
165 if (!utt || !utt->hcpriv)
166 return; /* Not below a TT, or never allocated */
170 tt_index = utt->hcpriv;
171 ptt = &tt_index[udev->ttport - 1];
173 /* How many entries are left in tt_index? */
174 for (i = 0; i < utt->hub->maxchild; ++i)
175 cnt += !!tt_index[i];
178 ptt = (struct ehci_tt **) &utt->hcpriv;
182 if (!tt || !list_empty(&tt->ps_list))
183 return; /* never allocated, or still in use */
185 list_del(&tt->tt_list);
194 static void bandwidth_dbg(struct ehci_hcd *ehci, int sign, char *type,
195 struct ehci_per_sched *ps)
197 dev_dbg(&ps->udev->dev,
198 "ep %02x: %s %s @ %u+%u (%u.%u+%u) [%u/%u us] mask %04x\n",
199 ps->ep->desc.bEndpointAddress,
200 (sign >= 0 ? "reserve" : "release"), type,
201 (ps->bw_phase << 3) + ps->phase_uf, ps->bw_uperiod,
202 ps->phase, ps->phase_uf, ps->period,
203 ps->usecs, ps->c_usecs, ps->cs_mask);
206 static void reserve_release_intr_bandwidth(struct ehci_hcd *ehci,
207 struct ehci_qh *qh, int sign)
211 int usecs = qh->ps.usecs;
212 int c_usecs = qh->ps.c_usecs;
213 int tt_usecs = qh->ps.tt_usecs;
216 if (qh->ps.phase == NO_FRAME) /* Bandwidth wasn't reserved */
218 start_uf = qh->ps.bw_phase << 3;
220 bandwidth_dbg(ehci, sign, "intr", &qh->ps);
222 if (sign < 0) { /* Release bandwidth */
225 tt_usecs = -tt_usecs;
228 /* Entire transaction (high speed) or start-split (full/low speed) */
229 for (i = start_uf + qh->ps.phase_uf; i < EHCI_BANDWIDTH_SIZE;
230 i += qh->ps.bw_uperiod)
231 ehci->bandwidth[i] += usecs;
233 /* Complete-split (full/low speed) */
234 if (qh->ps.c_usecs) {
235 /* NOTE: adjustments needed for FSTN */
236 for (i = start_uf; i < EHCI_BANDWIDTH_SIZE;
237 i += qh->ps.bw_uperiod) {
238 for ((j = 2, m = 1 << (j+8)); j < 8; (++j, m <<= 1)) {
239 if (qh->ps.cs_mask & m)
240 ehci->bandwidth[i+j] += c_usecs;
245 /* FS/LS bus bandwidth */
248 * find_tt() will not return any error here as we have
249 * already called find_tt() before calling this function
250 * and checked for any error return. The previous call
251 * would have created the data structure.
253 tt = find_tt(qh->ps.udev);
255 list_add_tail(&qh->ps.ps_list, &tt->ps_list);
257 list_del(&qh->ps.ps_list);
259 for (i = start_uf >> 3; i < EHCI_BANDWIDTH_FRAMES;
260 i += qh->ps.bw_period)
261 tt->bandwidth[i] += tt_usecs;
265 /*-------------------------------------------------------------------------*/
267 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
270 struct ehci_per_sched *ps;
271 unsigned uframe, uf, x;
276 memset(budget_table, 0, EHCI_BANDWIDTH_SIZE);
278 /* Add up the contributions from all the endpoints using this TT */
279 list_for_each_entry(ps, &tt->ps_list, ps_list) {
280 for (uframe = ps->bw_phase << 3; uframe < EHCI_BANDWIDTH_SIZE;
281 uframe += ps->bw_uperiod) {
282 budget_line = &budget_table[uframe];
285 /* propagate the time forward */
286 for (uf = ps->phase_uf; uf < 8; ++uf) {
287 x += budget_line[uf];
289 /* Each microframe lasts 125 us */
294 budget_line[uf] = 125;
301 static int __maybe_unused same_tt(struct usb_device *dev1,
302 struct usb_device *dev2)
304 if (!dev1->tt || !dev2->tt)
306 if (dev1->tt != dev2->tt)
309 return dev1->ttport == dev2->ttport;
314 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
316 static const unsigned char
317 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
319 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
320 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
324 for (i = 0; i < 7; i++) {
325 if (max_tt_usecs[i] < tt_usecs[i]) {
326 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
327 tt_usecs[i] = max_tt_usecs[i];
333 * Return true if the device's tt's downstream bus is available for a
334 * periodic transfer of the specified length (usecs), starting at the
335 * specified frame/uframe. Note that (as summarized in section 11.19
336 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
339 * The uframe parameter is when the fullspeed/lowspeed transfer
340 * should be executed in "B-frame" terms, which is the same as the
341 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
342 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
343 * See the EHCI spec sec 4.5 and fig 4.7.
345 * This checks if the full/lowspeed bus, at the specified starting uframe,
346 * has the specified bandwidth available, according to rules listed
347 * in USB 2.0 spec section 11.18.1 fig 11-60.
349 * This does not check if the transfer would exceed the max ssplit
350 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
351 * since proper scheduling limits ssplits to less than 16 per uframe.
353 static int tt_available(
354 struct ehci_hcd *ehci,
355 struct ehci_per_sched *ps,
361 unsigned period = ps->bw_period;
362 unsigned usecs = ps->tt_usecs;
364 if ((period == 0) || (uframe >= 7)) /* error */
367 for (frame &= period - 1; frame < EHCI_BANDWIDTH_FRAMES;
370 unsigned short tt_usecs[8];
372 if (tt->bandwidth[frame] + usecs > 900)
376 for (i = 0; i < 8; (++i, ++uf))
377 tt_usecs[i] = ehci->tt_budget[uf];
379 if (max_tt_usecs[uframe] <= tt_usecs[uframe])
382 /* special case for isoc transfers larger than 125us:
383 * the first and each subsequent fully used uframe
384 * must be empty, so as to not illegally delay
385 * already scheduled transactions
388 int ufs = (usecs / 125);
390 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
395 tt_usecs[uframe] += usecs;
397 carryover_tt_bandwidth(tt_usecs);
399 /* fail if the carryover pushed bw past the last uframe's limit */
400 if (max_tt_usecs[7] < tt_usecs[7])
409 /* return true iff the device's transaction translator is available
410 * for a periodic transfer starting at the specified frame, using
411 * all the uframes in the mask.
413 static int tt_no_collision(
414 struct ehci_hcd *ehci,
416 struct usb_device *dev,
421 if (period == 0) /* error */
424 /* note bandwidth wastage: split never follows csplit
425 * (different dev or endpoint) until the next uframe.
426 * calling convention doesn't make that distinction.
428 for (; frame < ehci->periodic_size; frame += period) {
429 union ehci_shadow here;
431 struct ehci_qh_hw *hw;
433 here = ehci->pshadow[frame];
434 type = Q_NEXT_TYPE(ehci, ehci->periodic[frame]);
436 switch (hc32_to_cpu(ehci, type)) {
438 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
439 here = here.itd->itd_next;
443 if (same_tt(dev, here.qh->ps.udev)) {
446 mask = hc32_to_cpu(ehci,
448 /* "knows" no gap is needed */
453 type = Q_NEXT_TYPE(ehci, hw->hw_next);
454 here = here.qh->qh_next;
457 if (same_tt(dev, here.sitd->urb->dev)) {
460 mask = hc32_to_cpu(ehci, here.sitd
462 /* FIXME assumes no gap for IN! */
467 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
468 here = here.sitd->sitd_next;
470 /* case Q_TYPE_FSTN: */
473 "periodic frame %d bogus type %d\n",
477 /* collision or error */
486 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
488 /*-------------------------------------------------------------------------*/
490 static void enable_periodic(struct ehci_hcd *ehci)
492 if (ehci->periodic_count++)
495 /* Stop waiting to turn off the periodic schedule */
496 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_PERIODIC);
498 /* Don't start the schedule until PSS is 0 */
500 turn_on_io_watchdog(ehci);
503 static void disable_periodic(struct ehci_hcd *ehci)
505 if (--ehci->periodic_count)
508 /* Don't turn off the schedule until PSS is 1 */
512 /*-------------------------------------------------------------------------*/
514 /* periodic schedule slots have iso tds (normal or split) first, then a
515 * sparse tree for active interrupt transfers.
517 * this just links in a qh; caller guarantees uframe masks are set right.
518 * no FSTN support (yet; ehci 0.96+)
520 static void qh_link_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
523 unsigned period = qh->ps.period;
525 dev_dbg(&qh->ps.udev->dev,
526 "link qh%d-%04x/%p start %d [%d/%d us]\n",
527 period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
528 & (QH_CMASK | QH_SMASK),
529 qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
531 /* high bandwidth, or otherwise every microframe */
535 for (i = qh->ps.phase; i < ehci->periodic_size; i += period) {
536 union ehci_shadow *prev = &ehci->pshadow[i];
537 __hc32 *hw_p = &ehci->periodic[i];
538 union ehci_shadow here = *prev;
541 /* skip the iso nodes at list head */
543 type = Q_NEXT_TYPE(ehci, *hw_p);
544 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
546 prev = periodic_next_shadow(ehci, prev, type);
547 hw_p = shadow_next_periodic(ehci, &here, type);
551 /* sorting each branch by period (slow-->fast)
552 * enables sharing interior tree nodes
554 while (here.ptr && qh != here.qh) {
555 if (qh->ps.period > here.qh->ps.period)
557 prev = &here.qh->qh_next;
558 hw_p = &here.qh->hw->hw_next;
561 /* link in this qh, unless some earlier pass did that */
565 qh->hw->hw_next = *hw_p;
568 *hw_p = QH_NEXT(ehci, qh->qh_dma);
571 qh->qh_state = QH_STATE_LINKED;
573 qh->unlink_reason = 0;
575 /* update per-qh bandwidth for debugfs */
576 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->ps.bw_period
577 ? ((qh->ps.usecs + qh->ps.c_usecs) / qh->ps.bw_period)
578 : (qh->ps.usecs * 8);
580 list_add(&qh->intr_node, &ehci->intr_qh_list);
582 /* maybe enable periodic schedule processing */
584 enable_periodic(ehci);
587 static void qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
593 * If qh is for a low/full-speed device, simply unlinking it
594 * could interfere with an ongoing split transaction. To unlink
595 * it safely would require setting the QH_INACTIVATE bit and
596 * waiting at least one frame, as described in EHCI 4.12.2.5.
598 * We won't bother with any of this. Instead, we assume that the
599 * only reason for unlinking an interrupt QH while the current URB
600 * is still active is to dequeue all the URBs (flush the whole
603 * If rebalancing the periodic schedule is ever implemented, this
604 * approach will no longer be valid.
607 /* high bandwidth, or otherwise part of every microframe */
608 period = qh->ps.period ? : 1;
610 for (i = qh->ps.phase; i < ehci->periodic_size; i += period)
611 periodic_unlink(ehci, i, qh);
613 /* update per-qh bandwidth for debugfs */
614 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->ps.bw_period
615 ? ((qh->ps.usecs + qh->ps.c_usecs) / qh->ps.bw_period)
616 : (qh->ps.usecs * 8);
618 dev_dbg(&qh->ps.udev->dev,
619 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
621 hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
622 qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
624 /* qh->qh_next still "live" to HC */
625 qh->qh_state = QH_STATE_UNLINK;
626 qh->qh_next.ptr = NULL;
628 if (ehci->qh_scan_next == qh)
629 ehci->qh_scan_next = list_entry(qh->intr_node.next,
630 struct ehci_qh, intr_node);
631 list_del(&qh->intr_node);
634 static void cancel_unlink_wait_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
636 if (qh->qh_state != QH_STATE_LINKED ||
637 list_empty(&qh->unlink_node))
640 list_del_init(&qh->unlink_node);
643 * TODO: disable the event of EHCI_HRTIMER_START_UNLINK_INTR for
644 * avoiding unnecessary CPU wakeup
648 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
650 /* If the QH isn't linked then there's nothing we can do. */
651 if (qh->qh_state != QH_STATE_LINKED)
654 /* if the qh is waiting for unlink, cancel it now */
655 cancel_unlink_wait_intr(ehci, qh);
657 qh_unlink_periodic(ehci, qh);
659 /* Make sure the unlinks are visible before starting the timer */
663 * The EHCI spec doesn't say how long it takes the controller to
664 * stop accessing an unlinked interrupt QH. The timer delay is
665 * 9 uframes; presumably that will be long enough.
667 qh->unlink_cycle = ehci->intr_unlink_cycle;
669 /* New entries go at the end of the intr_unlink list */
670 list_add_tail(&qh->unlink_node, &ehci->intr_unlink);
672 if (ehci->intr_unlinking)
673 ; /* Avoid recursive calls */
674 else if (ehci->rh_state < EHCI_RH_RUNNING)
675 ehci_handle_intr_unlinks(ehci);
676 else if (ehci->intr_unlink.next == &qh->unlink_node) {
677 ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
678 ++ehci->intr_unlink_cycle;
683 * It is common only one intr URB is scheduled on one qh, and
684 * given complete() is run in tasklet context, introduce a bit
685 * delay to avoid unlink qh too early.
687 static void start_unlink_intr_wait(struct ehci_hcd *ehci,
690 qh->unlink_cycle = ehci->intr_unlink_wait_cycle;
692 /* New entries go at the end of the intr_unlink_wait list */
693 list_add_tail(&qh->unlink_node, &ehci->intr_unlink_wait);
695 if (ehci->rh_state < EHCI_RH_RUNNING)
696 ehci_handle_start_intr_unlinks(ehci);
697 else if (ehci->intr_unlink_wait.next == &qh->unlink_node) {
698 ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
699 ++ehci->intr_unlink_wait_cycle;
703 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
705 struct ehci_qh_hw *hw = qh->hw;
708 qh->qh_state = QH_STATE_IDLE;
709 hw->hw_next = EHCI_LIST_END(ehci);
711 if (!list_empty(&qh->qtd_list))
712 qh_completions(ehci, qh);
714 /* reschedule QH iff another request is queued */
715 if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
716 rc = qh_schedule(ehci, qh);
718 qh_refresh(ehci, qh);
719 qh_link_periodic(ehci, qh);
722 /* An error here likely indicates handshake failure
723 * or no space left in the schedule. Neither fault
724 * should happen often ...
726 * FIXME kill the now-dysfunctional queued urbs
729 ehci_err(ehci, "can't reschedule qh %p, err %d\n",
734 /* maybe turn off periodic schedule */
736 disable_periodic(ehci);
739 /*-------------------------------------------------------------------------*/
741 static int check_period(
742 struct ehci_hcd *ehci,
748 /* complete split running into next frame?
749 * given FSTN support, we could sometimes check...
754 /* convert "usecs we need" to "max already claimed" */
755 usecs = ehci->uframe_periodic_max - usecs;
757 for (uframe += frame << 3; uframe < EHCI_BANDWIDTH_SIZE;
759 if (ehci->bandwidth[uframe] > usecs)
767 static int check_intr_schedule(
768 struct ehci_hcd *ehci,
776 int retval = -ENOSPC;
779 if (qh->ps.c_usecs && uframe >= 6) /* FSTN territory? */
782 if (!check_period(ehci, frame, uframe, qh->ps.bw_uperiod, qh->ps.usecs))
784 if (!qh->ps.c_usecs) {
790 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
791 if (tt_available(ehci, &qh->ps, tt, frame, uframe)) {
794 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
795 for (i = uframe+2; i < 8 && i <= uframe+4; i++)
796 if (!check_period(ehci, frame, i,
797 qh->ps.bw_uperiod, qh->ps.c_usecs))
807 /* Make sure this tt's buffer is also available for CSPLITs.
808 * We pessimize a bit; probably the typical full speed case
809 * doesn't need the second CSPLIT.
811 * NOTE: both SPLIT and CSPLIT could be checked in just
814 mask = 0x03 << (uframe + qh->gap_uf);
818 if (tt_no_collision(ehci, qh->ps.bw_period, qh->ps.udev, frame, mask)) {
819 if (!check_period(ehci, frame, uframe + qh->gap_uf + 1,
820 qh->ps.bw_uperiod, qh->ps.c_usecs))
822 if (!check_period(ehci, frame, uframe + qh->gap_uf,
823 qh->ps.bw_uperiod, qh->ps.c_usecs))
832 /* "first fit" scheduling policy used the first time through,
833 * or when the previous schedule slot can't be re-used.
835 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
840 struct ehci_qh_hw *hw = qh->hw;
843 hw->hw_next = EHCI_LIST_END(ehci);
845 /* reuse the previous schedule slots, if we can */
846 if (qh->ps.phase != NO_FRAME) {
847 ehci_dbg(ehci, "reused qh %p schedule\n", qh);
853 tt = find_tt(qh->ps.udev);
855 status = PTR_ERR(tt);
858 compute_tt_budget(ehci->tt_budget, tt);
860 /* else scan the schedule to find a group of slots such that all
861 * uframes have enough periodic bandwidth available.
863 /* "normal" case, uframing flexible except with splits */
864 if (qh->ps.bw_period) {
868 for (i = qh->ps.bw_period; i > 0; --i) {
869 frame = ++ehci->random_frame & (qh->ps.bw_period - 1);
870 for (uframe = 0; uframe < 8; uframe++) {
871 status = check_intr_schedule(ehci,
872 frame, uframe, qh, &c_mask, tt);
878 /* qh->ps.bw_period == 0 means every uframe */
880 status = check_intr_schedule(ehci, 0, 0, qh, &c_mask, tt);
886 qh->ps.phase = (qh->ps.period ? ehci->random_frame &
887 (qh->ps.period - 1) : 0);
888 qh->ps.bw_phase = qh->ps.phase & (qh->ps.bw_period - 1);
889 qh->ps.phase_uf = uframe;
890 qh->ps.cs_mask = qh->ps.period ?
891 (c_mask << 8) | (1 << uframe) :
894 /* reset S-frame and (maybe) C-frame masks */
895 hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
896 hw->hw_info2 |= cpu_to_hc32(ehci, qh->ps.cs_mask);
897 reserve_release_intr_bandwidth(ehci, qh, 1);
903 static int intr_submit(
904 struct ehci_hcd *ehci,
906 struct list_head *qtd_list,
913 struct list_head empty;
915 /* get endpoint and transfer/schedule data */
916 epnum = urb->ep->desc.bEndpointAddress;
918 spin_lock_irqsave(&ehci->lock, flags);
920 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
922 goto done_not_linked;
924 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
925 if (unlikely(status))
926 goto done_not_linked;
928 /* get qh and force any scheduling errors */
929 INIT_LIST_HEAD(&empty);
930 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
935 if (qh->qh_state == QH_STATE_IDLE) {
936 status = qh_schedule(ehci, qh);
941 /* then queue the urb's tds to the qh */
942 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
945 /* stuff into the periodic schedule */
946 if (qh->qh_state == QH_STATE_IDLE) {
947 qh_refresh(ehci, qh);
948 qh_link_periodic(ehci, qh);
950 /* cancel unlink wait for the qh */
951 cancel_unlink_wait_intr(ehci, qh);
954 /* ... update usbfs periodic stats */
955 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
958 if (unlikely(status))
959 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
961 spin_unlock_irqrestore(&ehci->lock, flags);
963 qtd_list_free(ehci, urb, qtd_list);
968 static void scan_intr(struct ehci_hcd *ehci)
972 list_for_each_entry_safe(qh, ehci->qh_scan_next, &ehci->intr_qh_list,
975 /* clean any finished work for this qh */
976 if (!list_empty(&qh->qtd_list)) {
980 * Unlinks could happen here; completion reporting
981 * drops the lock. That's why ehci->qh_scan_next
982 * always holds the next qh to scan; if the next qh
983 * gets unlinked then ehci->qh_scan_next is adjusted
984 * in qh_unlink_periodic().
986 temp = qh_completions(ehci, qh);
988 start_unlink_intr(ehci, qh);
989 else if (unlikely(list_empty(&qh->qtd_list) &&
990 qh->qh_state == QH_STATE_LINKED))
991 start_unlink_intr_wait(ehci, qh);
996 /*-------------------------------------------------------------------------*/
998 /* ehci_iso_stream ops work with both ITD and SITD */
1000 static struct ehci_iso_stream *
1001 iso_stream_alloc(gfp_t mem_flags)
1003 struct ehci_iso_stream *stream;
1005 stream = kzalloc(sizeof(*stream), mem_flags);
1006 if (likely(stream != NULL)) {
1007 INIT_LIST_HEAD(&stream->td_list);
1008 INIT_LIST_HEAD(&stream->free_list);
1009 stream->next_uframe = NO_FRAME;
1010 stream->ps.phase = NO_FRAME;
1017 struct ehci_hcd *ehci,
1018 struct ehci_iso_stream *stream,
1022 static const u8 smask_out[] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
1024 struct usb_device *dev = urb->dev;
1026 unsigned epnum, maxp;
1031 * this might be a "high bandwidth" highspeed endpoint,
1032 * as encoded in the ep descriptor's wMaxPacket field
1034 epnum = usb_pipeendpoint(urb->pipe);
1035 is_input = usb_pipein(urb->pipe) ? USB_DIR_IN : 0;
1036 maxp = usb_endpoint_maxp(&urb->ep->desc);
1037 buf1 = is_input ? 1 << 11 : 0;
1039 /* knows about ITD vs SITD */
1040 if (dev->speed == USB_SPEED_HIGH) {
1041 unsigned multi = usb_endpoint_maxp_mult(&urb->ep->desc);
1043 stream->highspeed = 1;
1048 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
1049 stream->buf1 = cpu_to_hc32(ehci, buf1);
1050 stream->buf2 = cpu_to_hc32(ehci, multi);
1052 /* usbfs wants to report the average usecs per frame tied up
1053 * when transfers on this endpoint are scheduled ...
1055 stream->ps.usecs = HS_USECS_ISO(maxp);
1057 /* period for bandwidth allocation */
1058 tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
1059 1 << (urb->ep->desc.bInterval - 1));
1061 /* Allow urb->interval to override */
1062 stream->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
1064 stream->uperiod = urb->interval;
1065 stream->ps.period = urb->interval >> 3;
1066 stream->bandwidth = stream->ps.usecs * 8 /
1067 stream->ps.bw_uperiod;
1074 addr = dev->ttport << 24;
1075 if (!ehci_is_TDI(ehci)
1077 ehci_to_hcd(ehci)->self.root_hub))
1078 addr |= dev->tt->hub->devnum << 16;
1080 addr |= dev->devnum;
1081 stream->ps.usecs = HS_USECS_ISO(maxp);
1082 think_time = dev->tt->think_time;
1083 stream->ps.tt_usecs = NS_TO_US(think_time + usb_calc_bus_time(
1084 dev->speed, is_input, 1, maxp));
1085 hs_transfers = max(1u, (maxp + 187) / 188);
1090 stream->ps.c_usecs = stream->ps.usecs;
1091 stream->ps.usecs = HS_USECS_ISO(1);
1092 stream->ps.cs_mask = 1;
1094 /* c-mask as specified in USB 2.0 11.18.4 3.c */
1095 tmp = (1 << (hs_transfers + 2)) - 1;
1096 stream->ps.cs_mask |= tmp << (8 + 2);
1098 stream->ps.cs_mask = smask_out[hs_transfers - 1];
1100 /* period for bandwidth allocation */
1101 tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
1102 1 << (urb->ep->desc.bInterval - 1));
1104 /* Allow urb->interval to override */
1105 stream->ps.bw_period = min_t(unsigned, tmp, urb->interval);
1106 stream->ps.bw_uperiod = stream->ps.bw_period << 3;
1108 stream->ps.period = urb->interval;
1109 stream->uperiod = urb->interval << 3;
1110 stream->bandwidth = (stream->ps.usecs + stream->ps.c_usecs) /
1111 stream->ps.bw_period;
1113 /* stream->splits gets created from cs_mask later */
1114 stream->address = cpu_to_hc32(ehci, addr);
1117 stream->ps.udev = dev;
1118 stream->ps.ep = urb->ep;
1120 stream->bEndpointAddress = is_input | epnum;
1121 stream->maxp = maxp;
1124 static struct ehci_iso_stream *
1125 iso_stream_find(struct ehci_hcd *ehci, struct urb *urb)
1128 struct ehci_iso_stream *stream;
1129 struct usb_host_endpoint *ep;
1130 unsigned long flags;
1132 epnum = usb_pipeendpoint (urb->pipe);
1133 if (usb_pipein(urb->pipe))
1134 ep = urb->dev->ep_in[epnum];
1136 ep = urb->dev->ep_out[epnum];
1138 spin_lock_irqsave(&ehci->lock, flags);
1139 stream = ep->hcpriv;
1141 if (unlikely(stream == NULL)) {
1142 stream = iso_stream_alloc(GFP_ATOMIC);
1143 if (likely(stream != NULL)) {
1144 ep->hcpriv = stream;
1145 iso_stream_init(ehci, stream, urb);
1148 /* if dev->ep [epnum] is a QH, hw is set */
1149 } else if (unlikely(stream->hw != NULL)) {
1150 ehci_dbg(ehci, "dev %s ep%d%s, not iso??\n",
1151 urb->dev->devpath, epnum,
1152 usb_pipein(urb->pipe) ? "in" : "out");
1156 spin_unlock_irqrestore(&ehci->lock, flags);
1160 /*-------------------------------------------------------------------------*/
1162 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1164 static struct ehci_iso_sched *
1165 iso_sched_alloc(unsigned packets, gfp_t mem_flags)
1167 struct ehci_iso_sched *iso_sched;
1168 int size = sizeof(*iso_sched);
1170 size += packets * sizeof(struct ehci_iso_packet);
1171 iso_sched = kzalloc(size, mem_flags);
1172 if (likely(iso_sched != NULL))
1173 INIT_LIST_HEAD(&iso_sched->td_list);
1180 struct ehci_hcd *ehci,
1181 struct ehci_iso_sched *iso_sched,
1182 struct ehci_iso_stream *stream,
1187 dma_addr_t dma = urb->transfer_dma;
1189 /* how many uframes are needed for these transfers */
1190 iso_sched->span = urb->number_of_packets * stream->uperiod;
1192 /* figure out per-uframe itd fields that we'll need later
1193 * when we fit new itds into the schedule.
1195 for (i = 0; i < urb->number_of_packets; i++) {
1196 struct ehci_iso_packet *uframe = &iso_sched->packet[i];
1201 length = urb->iso_frame_desc[i].length;
1202 buf = dma + urb->iso_frame_desc[i].offset;
1204 trans = EHCI_ISOC_ACTIVE;
1205 trans |= buf & 0x0fff;
1206 if (unlikely(((i + 1) == urb->number_of_packets))
1207 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1208 trans |= EHCI_ITD_IOC;
1209 trans |= length << 16;
1210 uframe->transaction = cpu_to_hc32(ehci, trans);
1212 /* might need to cross a buffer page within a uframe */
1213 uframe->bufp = (buf & ~(u64)0x0fff);
1215 if (unlikely((uframe->bufp != (buf & ~(u64)0x0fff))))
1222 struct ehci_iso_stream *stream,
1223 struct ehci_iso_sched *iso_sched
1228 /* caller must hold ehci->lock! */
1229 list_splice(&iso_sched->td_list, &stream->free_list);
1234 itd_urb_transaction(
1235 struct ehci_iso_stream *stream,
1236 struct ehci_hcd *ehci,
1241 struct ehci_itd *itd;
1245 struct ehci_iso_sched *sched;
1246 unsigned long flags;
1248 sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
1249 if (unlikely(sched == NULL))
1252 itd_sched_init(ehci, sched, stream, urb);
1254 if (urb->interval < 8)
1255 num_itds = 1 + (sched->span + 7) / 8;
1257 num_itds = urb->number_of_packets;
1259 /* allocate/init ITDs */
1260 spin_lock_irqsave(&ehci->lock, flags);
1261 for (i = 0; i < num_itds; i++) {
1264 * Use iTDs from the free list, but not iTDs that may
1265 * still be in use by the hardware.
1267 if (likely(!list_empty(&stream->free_list))) {
1268 itd = list_first_entry(&stream->free_list,
1269 struct ehci_itd, itd_list);
1270 if (itd->frame == ehci->now_frame)
1272 list_del(&itd->itd_list);
1273 itd_dma = itd->itd_dma;
1276 spin_unlock_irqrestore(&ehci->lock, flags);
1277 itd = dma_pool_alloc(ehci->itd_pool, mem_flags,
1279 spin_lock_irqsave(&ehci->lock, flags);
1281 iso_sched_free(stream, sched);
1282 spin_unlock_irqrestore(&ehci->lock, flags);
1287 memset(itd, 0, sizeof(*itd));
1288 itd->itd_dma = itd_dma;
1289 itd->frame = NO_FRAME;
1290 list_add(&itd->itd_list, &sched->td_list);
1292 spin_unlock_irqrestore(&ehci->lock, flags);
1294 /* temporarily store schedule info in hcpriv */
1295 urb->hcpriv = sched;
1296 urb->error_count = 0;
1300 /*-------------------------------------------------------------------------*/
1302 static void reserve_release_iso_bandwidth(struct ehci_hcd *ehci,
1303 struct ehci_iso_stream *stream, int sign)
1307 unsigned s_mask, c_mask, m;
1308 int usecs = stream->ps.usecs;
1309 int c_usecs = stream->ps.c_usecs;
1310 int tt_usecs = stream->ps.tt_usecs;
1313 if (stream->ps.phase == NO_FRAME) /* Bandwidth wasn't reserved */
1315 uframe = stream->ps.bw_phase << 3;
1317 bandwidth_dbg(ehci, sign, "iso", &stream->ps);
1319 if (sign < 0) { /* Release bandwidth */
1322 tt_usecs = -tt_usecs;
1325 if (!stream->splits) { /* High speed */
1326 for (i = uframe + stream->ps.phase_uf; i < EHCI_BANDWIDTH_SIZE;
1327 i += stream->ps.bw_uperiod)
1328 ehci->bandwidth[i] += usecs;
1330 } else { /* Full speed */
1331 s_mask = stream->ps.cs_mask;
1332 c_mask = s_mask >> 8;
1334 /* NOTE: adjustment needed for frame overflow */
1335 for (i = uframe; i < EHCI_BANDWIDTH_SIZE;
1336 i += stream->ps.bw_uperiod) {
1337 for ((j = stream->ps.phase_uf, m = 1 << j); j < 8;
1340 ehci->bandwidth[i+j] += usecs;
1341 else if (c_mask & m)
1342 ehci->bandwidth[i+j] += c_usecs;
1347 * find_tt() will not return any error here as we have
1348 * already called find_tt() before calling this function
1349 * and checked for any error return. The previous call
1350 * would have created the data structure.
1352 tt = find_tt(stream->ps.udev);
1354 list_add_tail(&stream->ps.ps_list, &tt->ps_list);
1356 list_del(&stream->ps.ps_list);
1358 for (i = uframe >> 3; i < EHCI_BANDWIDTH_FRAMES;
1359 i += stream->ps.bw_period)
1360 tt->bandwidth[i] += tt_usecs;
1366 struct ehci_hcd *ehci,
1367 struct ehci_iso_stream *stream,
1373 /* convert "usecs we need" to "max already claimed" */
1374 usecs = ehci->uframe_periodic_max - stream->ps.usecs;
1376 for (uframe &= stream->ps.bw_uperiod - 1; uframe < EHCI_BANDWIDTH_SIZE;
1377 uframe += stream->ps.bw_uperiod) {
1378 if (ehci->bandwidth[uframe] > usecs)
1386 struct ehci_hcd *ehci,
1387 struct ehci_iso_stream *stream,
1389 struct ehci_iso_sched *sched,
1396 mask = stream->ps.cs_mask << (uframe & 7);
1398 /* for OUT, don't wrap SSPLIT into H-microframe 7 */
1399 if (((stream->ps.cs_mask & 0xff) << (uframe & 7)) >= (1 << 7))
1402 /* for IN, don't wrap CSPLIT into the next frame */
1406 /* check bandwidth */
1407 uframe &= stream->ps.bw_uperiod - 1;
1408 frame = uframe >> 3;
1410 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1411 /* The tt's fullspeed bus bandwidth must be available.
1412 * tt_available scheduling guarantees 10+% for control/bulk.
1415 if (!tt_available(ehci, &stream->ps, tt, frame, uf))
1418 /* tt must be idle for start(s), any gap, and csplit.
1419 * assume scheduling slop leaves 10+% for control/bulk.
1421 if (!tt_no_collision(ehci, stream->ps.bw_period,
1422 stream->ps.udev, frame, mask))
1430 /* check starts (OUT uses more than one) */
1432 max_used = ehci->uframe_periodic_max - stream->ps.usecs;
1433 for (tmp = stream->ps.cs_mask & 0xff; tmp; tmp >>= 1, uf++) {
1434 if (ehci->bandwidth[uf] > max_used)
1438 /* for IN, check CSPLIT */
1439 if (stream->ps.c_usecs) {
1440 max_used = ehci->uframe_periodic_max -
1444 for (i = (uframe & 7) + 2; i < 8; (++i, tmp <<= 1)) {
1445 if ((stream->ps.cs_mask & tmp) == 0)
1447 if (ehci->bandwidth[uf+i] > max_used)
1452 uframe += stream->ps.bw_uperiod;
1453 } while (uframe < EHCI_BANDWIDTH_SIZE);
1455 stream->ps.cs_mask <<= uframe & 7;
1456 stream->splits = cpu_to_hc32(ehci, stream->ps.cs_mask);
1461 * This scheduler plans almost as far into the future as it has actual
1462 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1463 * "as small as possible" to be cache-friendlier.) That limits the size
1464 * transfers you can stream reliably; avoid more than 64 msec per urb.
1465 * Also avoid queue depths of less than ehci's worst irq latency (affected
1466 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1467 * and other factors); or more than about 230 msec total (for portability,
1468 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1472 iso_stream_schedule(
1473 struct ehci_hcd *ehci,
1475 struct ehci_iso_stream *stream
1478 u32 now, base, next, start, period, span, now2;
1479 u32 wrap = 0, skip = 0;
1481 unsigned mod = ehci->periodic_size << 3;
1482 struct ehci_iso_sched *sched = urb->hcpriv;
1483 bool empty = list_empty(&stream->td_list);
1484 bool new_stream = false;
1486 period = stream->uperiod;
1488 if (!stream->highspeed)
1491 /* Start a new isochronous stream? */
1492 if (unlikely(empty && !hcd_periodic_completion_in_progress(
1493 ehci_to_hcd(ehci), urb->ep))) {
1495 /* Schedule the endpoint */
1496 if (stream->ps.phase == NO_FRAME) {
1498 struct ehci_tt *tt = find_tt(stream->ps.udev);
1501 status = PTR_ERR(tt);
1504 compute_tt_budget(ehci->tt_budget, tt);
1506 start = ((-(++ehci->random_frame)) << 3) & (period - 1);
1508 /* find a uframe slot with enough bandwidth.
1509 * Early uframes are more precious because full-speed
1510 * iso IN transfers can't use late uframes,
1511 * and therefore they should be allocated last.
1517 /* check schedule: enough space? */
1518 if (stream->highspeed) {
1519 if (itd_slot_ok(ehci, stream, start))
1522 if ((start % 8) >= 6)
1524 if (sitd_slot_ok(ehci, stream, start,
1528 } while (start > next && !done);
1530 /* no room in the schedule */
1532 ehci_dbg(ehci, "iso sched full %p", urb);
1536 stream->ps.phase = (start >> 3) &
1537 (stream->ps.period - 1);
1538 stream->ps.bw_phase = stream->ps.phase &
1539 (stream->ps.bw_period - 1);
1540 stream->ps.phase_uf = start & 7;
1541 reserve_release_iso_bandwidth(ehci, stream, 1);
1544 /* New stream is already scheduled; use the upcoming slot */
1546 start = (stream->ps.phase << 3) + stream->ps.phase_uf;
1549 stream->next_uframe = start;
1553 now = ehci_read_frame_index(ehci) & (mod - 1);
1555 /* Take the isochronous scheduling threshold into account */
1557 next = now + ehci->i_thresh; /* uframe cache */
1559 next = (now + 2 + 7) & ~0x07; /* full frame cache */
1561 /* If needed, initialize last_iso_frame so that this URB will be seen */
1562 if (ehci->isoc_count == 0)
1563 ehci->last_iso_frame = now >> 3;
1566 * Use ehci->last_iso_frame as the base. There can't be any
1567 * TDs scheduled for earlier than that.
1569 base = ehci->last_iso_frame << 3;
1570 next = (next - base) & (mod - 1);
1571 start = (stream->next_uframe - base) & (mod - 1);
1573 if (unlikely(new_stream))
1577 * Typical case: reuse current schedule, stream may still be active.
1578 * Hopefully there are no gaps from the host falling behind
1579 * (irq delays etc). If there are, the behavior depends on
1580 * whether URB_ISO_ASAP is set.
1582 now2 = (now - base) & (mod - 1);
1584 /* Is the schedule about to wrap around? */
1585 if (unlikely(!empty && start < period)) {
1586 ehci_dbg(ehci, "request %p would overflow (%u-%u < %u mod %u)\n",
1587 urb, stream->next_uframe, base, period, mod);
1592 /* Is the next packet scheduled after the base time? */
1593 if (likely(!empty || start <= now2 + period)) {
1595 /* URB_ISO_ASAP: make sure that start >= next */
1596 if (unlikely(start < next &&
1597 (urb->transfer_flags & URB_ISO_ASAP)))
1600 /* Otherwise use start, if it's not in the past */
1601 if (likely(start >= now2))
1604 /* Otherwise we got an underrun while the queue was empty */
1606 if (urb->transfer_flags & URB_ISO_ASAP)
1612 /* How many uframes and packets do we need to skip? */
1613 skip = (now2 - start + period - 1) & -period;
1614 if (skip >= span) { /* Entirely in the past? */
1615 ehci_dbg(ehci, "iso underrun %p (%u+%u < %u) [%u]\n",
1616 urb, start + base, span - period, now2 + base,
1619 /* Try to keep the last TD intact for scanning later */
1620 skip = span - period;
1622 /* Will it come before the current scan position? */
1624 skip = span; /* Skip the entire URB */
1625 status = 1; /* and give it back immediately */
1626 iso_sched_free(stream, sched);
1630 urb->error_count = skip / period;
1632 sched->first_packet = urb->error_count;
1636 /* Use the first slot after "next" */
1637 start = next + ((start - next) & (period - 1));
1640 /* Tried to schedule too far into the future? */
1641 if (unlikely(start + span - period >= mod + wrap)) {
1642 ehci_dbg(ehci, "request %p would overflow (%u+%u >= %u)\n",
1643 urb, start, span - period, mod + wrap);
1649 stream->next_uframe = (start + skip) & (mod - 1);
1651 /* report high speed start in uframes; full speed, in frames */
1652 urb->start_frame = start & (mod - 1);
1653 if (!stream->highspeed)
1654 urb->start_frame >>= 3;
1658 iso_sched_free(stream, sched);
1663 /*-------------------------------------------------------------------------*/
1666 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1667 struct ehci_itd *itd)
1671 /* it's been recently zeroed */
1672 itd->hw_next = EHCI_LIST_END(ehci);
1673 itd->hw_bufp[0] = stream->buf0;
1674 itd->hw_bufp[1] = stream->buf1;
1675 itd->hw_bufp[2] = stream->buf2;
1677 for (i = 0; i < 8; i++)
1680 /* All other fields are filled when scheduling */
1685 struct ehci_hcd *ehci,
1686 struct ehci_itd *itd,
1687 struct ehci_iso_sched *iso_sched,
1692 struct ehci_iso_packet *uf = &iso_sched->packet[index];
1693 unsigned pg = itd->pg;
1695 /* BUG_ON(pg == 6 && uf->cross); */
1698 itd->index[uframe] = index;
1700 itd->hw_transaction[uframe] = uf->transaction;
1701 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1702 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1703 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1705 /* iso_frame_desc[].offset must be strictly increasing */
1706 if (unlikely(uf->cross)) {
1707 u64 bufp = uf->bufp + 4096;
1710 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1711 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1716 itd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1718 union ehci_shadow *prev = &ehci->pshadow[frame];
1719 __hc32 *hw_p = &ehci->periodic[frame];
1720 union ehci_shadow here = *prev;
1723 /* skip any iso nodes which might belong to previous microframes */
1725 type = Q_NEXT_TYPE(ehci, *hw_p);
1726 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1728 prev = periodic_next_shadow(ehci, prev, type);
1729 hw_p = shadow_next_periodic(ehci, &here, type);
1733 itd->itd_next = here;
1734 itd->hw_next = *hw_p;
1738 *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1741 /* fit urb's itds into the selected schedule slot; activate as needed */
1742 static void itd_link_urb(
1743 struct ehci_hcd *ehci,
1746 struct ehci_iso_stream *stream
1750 unsigned next_uframe, uframe, frame;
1751 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1752 struct ehci_itd *itd;
1754 next_uframe = stream->next_uframe & (mod - 1);
1756 if (unlikely(list_empty(&stream->td_list)))
1757 ehci_to_hcd(ehci)->self.bandwidth_allocated
1758 += stream->bandwidth;
1760 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1761 if (ehci->amd_pll_fix == 1)
1762 usb_amd_quirk_pll_disable();
1765 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1767 /* fill iTDs uframe by uframe */
1768 for (packet = iso_sched->first_packet, itd = NULL;
1769 packet < urb->number_of_packets;) {
1771 /* ASSERT: we have all necessary itds */
1772 /* BUG_ON(list_empty(&iso_sched->td_list)); */
1774 /* ASSERT: no itds for this endpoint in this uframe */
1776 itd = list_entry(iso_sched->td_list.next,
1777 struct ehci_itd, itd_list);
1778 list_move_tail(&itd->itd_list, &stream->td_list);
1779 itd->stream = stream;
1781 itd_init(ehci, stream, itd);
1784 uframe = next_uframe & 0x07;
1785 frame = next_uframe >> 3;
1787 itd_patch(ehci, itd, iso_sched, packet, uframe);
1789 next_uframe += stream->uperiod;
1790 next_uframe &= mod - 1;
1793 /* link completed itds into the schedule */
1794 if (((next_uframe >> 3) != frame)
1795 || packet == urb->number_of_packets) {
1796 itd_link(ehci, frame & (ehci->periodic_size - 1), itd);
1800 stream->next_uframe = next_uframe;
1802 /* don't need that schedule data any more */
1803 iso_sched_free(stream, iso_sched);
1804 urb->hcpriv = stream;
1807 enable_periodic(ehci);
1810 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1812 /* Process and recycle a completed ITD. Return true iff its urb completed,
1813 * and hence its completion callback probably added things to the hardware
1816 * Note that we carefully avoid recycling this descriptor until after any
1817 * completion callback runs, so that it won't be reused quickly. That is,
1818 * assuming (a) no more than two urbs per frame on this endpoint, and also
1819 * (b) only this endpoint's completions submit URBs. It seems some silicon
1820 * corrupts things if you reuse completed descriptors very quickly...
1822 static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1824 struct urb *urb = itd->urb;
1825 struct usb_iso_packet_descriptor *desc;
1829 struct ehci_iso_stream *stream = itd->stream;
1830 bool retval = false;
1832 /* for each uframe with a packet */
1833 for (uframe = 0; uframe < 8; uframe++) {
1834 if (likely(itd->index[uframe] == -1))
1836 urb_index = itd->index[uframe];
1837 desc = &urb->iso_frame_desc[urb_index];
1839 t = hc32_to_cpup(ehci, &itd->hw_transaction[uframe]);
1840 itd->hw_transaction[uframe] = 0;
1842 /* report transfer status */
1843 if (unlikely(t & ISO_ERRS)) {
1845 if (t & EHCI_ISOC_BUF_ERR)
1846 desc->status = usb_pipein(urb->pipe)
1847 ? -ENOSR /* hc couldn't read */
1848 : -ECOMM; /* hc couldn't write */
1849 else if (t & EHCI_ISOC_BABBLE)
1850 desc->status = -EOVERFLOW;
1851 else /* (t & EHCI_ISOC_XACTERR) */
1852 desc->status = -EPROTO;
1854 /* HC need not update length with this error */
1855 if (!(t & EHCI_ISOC_BABBLE)) {
1856 desc->actual_length = EHCI_ITD_LENGTH(t);
1857 urb->actual_length += desc->actual_length;
1859 } else if (likely((t & EHCI_ISOC_ACTIVE) == 0)) {
1861 desc->actual_length = EHCI_ITD_LENGTH(t);
1862 urb->actual_length += desc->actual_length;
1864 /* URB was too late */
1869 /* handle completion now? */
1870 if (likely((urb_index + 1) != urb->number_of_packets))
1874 * ASSERT: it's really the last itd for this urb
1875 * list_for_each_entry (itd, &stream->td_list, itd_list)
1876 * BUG_ON(itd->urb == urb);
1879 /* give urb back to the driver; completion often (re)submits */
1880 ehci_urb_done(ehci, urb, 0);
1885 disable_periodic(ehci);
1887 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1888 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1889 if (ehci->amd_pll_fix == 1)
1890 usb_amd_quirk_pll_enable();
1893 if (unlikely(list_is_singular(&stream->td_list)))
1894 ehci_to_hcd(ehci)->self.bandwidth_allocated
1895 -= stream->bandwidth;
1900 /* Add to the end of the free list for later reuse */
1901 list_move_tail(&itd->itd_list, &stream->free_list);
1903 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
1904 if (list_empty(&stream->td_list)) {
1905 list_splice_tail_init(&stream->free_list,
1906 &ehci->cached_itd_list);
1907 start_free_itds(ehci);
1913 /*-------------------------------------------------------------------------*/
1915 static int itd_submit(struct ehci_hcd *ehci, struct urb *urb,
1918 int status = -EINVAL;
1919 unsigned long flags;
1920 struct ehci_iso_stream *stream;
1922 /* Get iso_stream head */
1923 stream = iso_stream_find(ehci, urb);
1924 if (unlikely(stream == NULL)) {
1925 ehci_dbg(ehci, "can't get iso stream\n");
1928 if (unlikely(urb->interval != stream->uperiod)) {
1929 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
1930 stream->uperiod, urb->interval);
1934 #ifdef EHCI_URB_TRACE
1936 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1937 __func__, urb->dev->devpath, urb,
1938 usb_pipeendpoint(urb->pipe),
1939 usb_pipein(urb->pipe) ? "in" : "out",
1940 urb->transfer_buffer_length,
1941 urb->number_of_packets, urb->interval,
1945 /* allocate ITDs w/o locking anything */
1946 status = itd_urb_transaction(stream, ehci, urb, mem_flags);
1947 if (unlikely(status < 0)) {
1948 ehci_dbg(ehci, "can't init itds\n");
1952 /* schedule ... need to lock */
1953 spin_lock_irqsave(&ehci->lock, flags);
1954 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1955 status = -ESHUTDOWN;
1956 goto done_not_linked;
1958 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1959 if (unlikely(status))
1960 goto done_not_linked;
1961 status = iso_stream_schedule(ehci, urb, stream);
1962 if (likely(status == 0)) {
1963 itd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
1964 } else if (status > 0) {
1966 ehci_urb_done(ehci, urb, 0);
1968 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1971 spin_unlock_irqrestore(&ehci->lock, flags);
1976 /*-------------------------------------------------------------------------*/
1979 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1980 * TTs in USB 2.0 hubs. These need microframe scheduling.
1985 struct ehci_hcd *ehci,
1986 struct ehci_iso_sched *iso_sched,
1987 struct ehci_iso_stream *stream,
1992 dma_addr_t dma = urb->transfer_dma;
1994 /* how many frames are needed for these transfers */
1995 iso_sched->span = urb->number_of_packets * stream->ps.period;
1997 /* figure out per-frame sitd fields that we'll need later
1998 * when we fit new sitds into the schedule.
2000 for (i = 0; i < urb->number_of_packets; i++) {
2001 struct ehci_iso_packet *packet = &iso_sched->packet[i];
2006 length = urb->iso_frame_desc[i].length & 0x03ff;
2007 buf = dma + urb->iso_frame_desc[i].offset;
2009 trans = SITD_STS_ACTIVE;
2010 if (((i + 1) == urb->number_of_packets)
2011 && !(urb->transfer_flags & URB_NO_INTERRUPT))
2013 trans |= length << 16;
2014 packet->transaction = cpu_to_hc32(ehci, trans);
2016 /* might need to cross a buffer page within a td */
2018 packet->buf1 = (buf + length) & ~0x0fff;
2019 if (packet->buf1 != (buf & ~(u64)0x0fff))
2022 /* OUT uses multiple start-splits */
2023 if (stream->bEndpointAddress & USB_DIR_IN)
2025 length = (length + 187) / 188;
2026 if (length > 1) /* BEGIN vs ALL */
2028 packet->buf1 |= length;
2033 sitd_urb_transaction(
2034 struct ehci_iso_stream *stream,
2035 struct ehci_hcd *ehci,
2040 struct ehci_sitd *sitd;
2041 dma_addr_t sitd_dma;
2043 struct ehci_iso_sched *iso_sched;
2044 unsigned long flags;
2046 iso_sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
2047 if (iso_sched == NULL)
2050 sitd_sched_init(ehci, iso_sched, stream, urb);
2052 /* allocate/init sITDs */
2053 spin_lock_irqsave(&ehci->lock, flags);
2054 for (i = 0; i < urb->number_of_packets; i++) {
2056 /* NOTE: for now, we don't try to handle wraparound cases
2057 * for IN (using sitd->hw_backpointer, like a FSTN), which
2058 * means we never need two sitds for full speed packets.
2062 * Use siTDs from the free list, but not siTDs that may
2063 * still be in use by the hardware.
2065 if (likely(!list_empty(&stream->free_list))) {
2066 sitd = list_first_entry(&stream->free_list,
2067 struct ehci_sitd, sitd_list);
2068 if (sitd->frame == ehci->now_frame)
2070 list_del(&sitd->sitd_list);
2071 sitd_dma = sitd->sitd_dma;
2074 spin_unlock_irqrestore(&ehci->lock, flags);
2075 sitd = dma_pool_alloc(ehci->sitd_pool, mem_flags,
2077 spin_lock_irqsave(&ehci->lock, flags);
2079 iso_sched_free(stream, iso_sched);
2080 spin_unlock_irqrestore(&ehci->lock, flags);
2085 memset(sitd, 0, sizeof(*sitd));
2086 sitd->sitd_dma = sitd_dma;
2087 sitd->frame = NO_FRAME;
2088 list_add(&sitd->sitd_list, &iso_sched->td_list);
2091 /* temporarily store schedule info in hcpriv */
2092 urb->hcpriv = iso_sched;
2093 urb->error_count = 0;
2095 spin_unlock_irqrestore(&ehci->lock, flags);
2099 /*-------------------------------------------------------------------------*/
2103 struct ehci_hcd *ehci,
2104 struct ehci_iso_stream *stream,
2105 struct ehci_sitd *sitd,
2106 struct ehci_iso_sched *iso_sched,
2110 struct ehci_iso_packet *uf = &iso_sched->packet[index];
2113 sitd->hw_next = EHCI_LIST_END(ehci);
2114 sitd->hw_fullspeed_ep = stream->address;
2115 sitd->hw_uframe = stream->splits;
2116 sitd->hw_results = uf->transaction;
2117 sitd->hw_backpointer = EHCI_LIST_END(ehci);
2120 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
2121 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
2123 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
2126 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
2127 sitd->index = index;
2131 sitd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
2133 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
2134 sitd->sitd_next = ehci->pshadow[frame];
2135 sitd->hw_next = ehci->periodic[frame];
2136 ehci->pshadow[frame].sitd = sitd;
2137 sitd->frame = frame;
2139 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
2142 /* fit urb's sitds into the selected schedule slot; activate as needed */
2143 static void sitd_link_urb(
2144 struct ehci_hcd *ehci,
2147 struct ehci_iso_stream *stream
2151 unsigned next_uframe;
2152 struct ehci_iso_sched *sched = urb->hcpriv;
2153 struct ehci_sitd *sitd;
2155 next_uframe = stream->next_uframe;
2157 if (list_empty(&stream->td_list))
2158 /* usbfs ignores TT bandwidth */
2159 ehci_to_hcd(ehci)->self.bandwidth_allocated
2160 += stream->bandwidth;
2162 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2163 if (ehci->amd_pll_fix == 1)
2164 usb_amd_quirk_pll_disable();
2167 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
2169 /* fill sITDs frame by frame */
2170 for (packet = sched->first_packet, sitd = NULL;
2171 packet < urb->number_of_packets;
2174 /* ASSERT: we have all necessary sitds */
2175 BUG_ON(list_empty(&sched->td_list));
2177 /* ASSERT: no itds for this endpoint in this frame */
2179 sitd = list_entry(sched->td_list.next,
2180 struct ehci_sitd, sitd_list);
2181 list_move_tail(&sitd->sitd_list, &stream->td_list);
2182 sitd->stream = stream;
2185 sitd_patch(ehci, stream, sitd, sched, packet);
2186 sitd_link(ehci, (next_uframe >> 3) & (ehci->periodic_size - 1),
2189 next_uframe += stream->uperiod;
2191 stream->next_uframe = next_uframe & (mod - 1);
2193 /* don't need that schedule data any more */
2194 iso_sched_free(stream, sched);
2195 urb->hcpriv = stream;
2198 enable_periodic(ehci);
2201 /*-------------------------------------------------------------------------*/
2203 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2204 | SITD_STS_XACT | SITD_STS_MMF)
2206 /* Process and recycle a completed SITD. Return true iff its urb completed,
2207 * and hence its completion callback probably added things to the hardware
2210 * Note that we carefully avoid recycling this descriptor until after any
2211 * completion callback runs, so that it won't be reused quickly. That is,
2212 * assuming (a) no more than two urbs per frame on this endpoint, and also
2213 * (b) only this endpoint's completions submit URBs. It seems some silicon
2214 * corrupts things if you reuse completed descriptors very quickly...
2216 static bool sitd_complete(struct ehci_hcd *ehci, struct ehci_sitd *sitd)
2218 struct urb *urb = sitd->urb;
2219 struct usb_iso_packet_descriptor *desc;
2222 struct ehci_iso_stream *stream = sitd->stream;
2223 bool retval = false;
2225 urb_index = sitd->index;
2226 desc = &urb->iso_frame_desc[urb_index];
2227 t = hc32_to_cpup(ehci, &sitd->hw_results);
2229 /* report transfer status */
2230 if (unlikely(t & SITD_ERRS)) {
2232 if (t & SITD_STS_DBE)
2233 desc->status = usb_pipein(urb->pipe)
2234 ? -ENOSR /* hc couldn't read */
2235 : -ECOMM; /* hc couldn't write */
2236 else if (t & SITD_STS_BABBLE)
2237 desc->status = -EOVERFLOW;
2238 else /* XACT, MMF, etc */
2239 desc->status = -EPROTO;
2240 } else if (unlikely(t & SITD_STS_ACTIVE)) {
2241 /* URB was too late */
2245 desc->actual_length = desc->length - SITD_LENGTH(t);
2246 urb->actual_length += desc->actual_length;
2249 /* handle completion now? */
2250 if ((urb_index + 1) != urb->number_of_packets)
2254 * ASSERT: it's really the last sitd for this urb
2255 * list_for_each_entry (sitd, &stream->td_list, sitd_list)
2256 * BUG_ON(sitd->urb == urb);
2259 /* give urb back to the driver; completion often (re)submits */
2260 ehci_urb_done(ehci, urb, 0);
2265 disable_periodic(ehci);
2267 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2268 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2269 if (ehci->amd_pll_fix == 1)
2270 usb_amd_quirk_pll_enable();
2273 if (list_is_singular(&stream->td_list))
2274 ehci_to_hcd(ehci)->self.bandwidth_allocated
2275 -= stream->bandwidth;
2280 /* Add to the end of the free list for later reuse */
2281 list_move_tail(&sitd->sitd_list, &stream->free_list);
2283 /* Recycle the siTDs when the pipeline is empty (ep no longer in use) */
2284 if (list_empty(&stream->td_list)) {
2285 list_splice_tail_init(&stream->free_list,
2286 &ehci->cached_sitd_list);
2287 start_free_itds(ehci);
2294 static int sitd_submit(struct ehci_hcd *ehci, struct urb *urb,
2297 int status = -EINVAL;
2298 unsigned long flags;
2299 struct ehci_iso_stream *stream;
2301 /* Get iso_stream head */
2302 stream = iso_stream_find(ehci, urb);
2303 if (stream == NULL) {
2304 ehci_dbg(ehci, "can't get iso stream\n");
2307 if (urb->interval != stream->ps.period) {
2308 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
2309 stream->ps.period, urb->interval);
2313 #ifdef EHCI_URB_TRACE
2315 "submit %p dev%s ep%d%s-iso len %d\n",
2316 urb, urb->dev->devpath,
2317 usb_pipeendpoint(urb->pipe),
2318 usb_pipein(urb->pipe) ? "in" : "out",
2319 urb->transfer_buffer_length);
2322 /* allocate SITDs */
2323 status = sitd_urb_transaction(stream, ehci, urb, mem_flags);
2325 ehci_dbg(ehci, "can't init sitds\n");
2329 /* schedule ... need to lock */
2330 spin_lock_irqsave(&ehci->lock, flags);
2331 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
2332 status = -ESHUTDOWN;
2333 goto done_not_linked;
2335 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2336 if (unlikely(status))
2337 goto done_not_linked;
2338 status = iso_stream_schedule(ehci, urb, stream);
2339 if (likely(status == 0)) {
2340 sitd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
2341 } else if (status > 0) {
2343 ehci_urb_done(ehci, urb, 0);
2345 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2348 spin_unlock_irqrestore(&ehci->lock, flags);
2353 /*-------------------------------------------------------------------------*/
2355 static void scan_isoc(struct ehci_hcd *ehci)
2357 unsigned uf, now_frame, frame;
2358 unsigned fmask = ehci->periodic_size - 1;
2359 bool modified, live;
2360 union ehci_shadow q, *q_p;
2364 * When running, scan from last scan point up to "now"
2365 * else clean up by scanning everything that's left.
2366 * Touches as few pages as possible: cache-friendly.
2368 if (ehci->rh_state >= EHCI_RH_RUNNING) {
2369 uf = ehci_read_frame_index(ehci);
2370 now_frame = (uf >> 3) & fmask;
2373 now_frame = (ehci->last_iso_frame - 1) & fmask;
2376 ehci->now_frame = now_frame;
2378 frame = ehci->last_iso_frame;
2381 /* Scan each element in frame's queue for completions */
2382 q_p = &ehci->pshadow[frame];
2383 hw_p = &ehci->periodic[frame];
2385 type = Q_NEXT_TYPE(ehci, *hw_p);
2388 while (q.ptr != NULL) {
2389 switch (hc32_to_cpu(ehci, type)) {
2392 * If this ITD is still active, leave it for
2393 * later processing ... check the next entry.
2394 * No need to check for activity unless the
2397 if (frame == now_frame && live) {
2399 for (uf = 0; uf < 8; uf++) {
2400 if (q.itd->hw_transaction[uf] &
2405 q_p = &q.itd->itd_next;
2406 hw_p = &q.itd->hw_next;
2407 type = Q_NEXT_TYPE(ehci,
2415 * Take finished ITDs out of the schedule
2416 * and process them: recycle, maybe report
2417 * URB completion. HC won't cache the
2418 * pointer for much longer, if at all.
2420 *q_p = q.itd->itd_next;
2421 if (!ehci->use_dummy_qh ||
2422 q.itd->hw_next != EHCI_LIST_END(ehci))
2423 *hw_p = q.itd->hw_next;
2425 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2426 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2428 modified = itd_complete(ehci, q.itd);
2433 * If this SITD is still active, leave it for
2434 * later processing ... check the next entry.
2435 * No need to check for activity unless the
2438 if (((frame == now_frame) ||
2439 (((frame + 1) & fmask) == now_frame))
2441 && (q.sitd->hw_results & SITD_ACTIVE(ehci))) {
2443 q_p = &q.sitd->sitd_next;
2444 hw_p = &q.sitd->hw_next;
2445 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2451 * Take finished SITDs out of the schedule
2452 * and process them: recycle, maybe report
2455 *q_p = q.sitd->sitd_next;
2456 if (!ehci->use_dummy_qh ||
2457 q.sitd->hw_next != EHCI_LIST_END(ehci))
2458 *hw_p = q.sitd->hw_next;
2460 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2461 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2463 modified = sitd_complete(ehci, q.sitd);
2467 ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n",
2468 type, frame, q.ptr);
2473 /* End of the iTDs and siTDs */
2478 /* Assume completion callbacks modify the queue */
2479 if (unlikely(modified && ehci->isoc_count > 0))
2483 /* Stop when we have reached the current frame */
2484 if (frame == now_frame)
2487 /* The last frame may still have active siTDs */
2488 ehci->last_iso_frame = frame;
2489 frame = (frame + 1) & fmask;