drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* PID Codes that are used here, from EHCI specification, Table 3-16. */
  44 #define PID_CODE_IN    1
  45 #define PID_CODE_SETUP 2
  46
  47 /* fill a qtd, returning how much of the buffer we were able to queue up */
  48
  49 static int
  50 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  51                   size_t len, int token, int maxpacket)
  52 {
  53         int     i, count;
  54         u64     addr = buf;
  55
  56         /* one buffer entry per 4K ... first might be short or unaligned */
  57         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  58         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  59         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  60         if (likely (len < count))               /* ... iff needed */
  61                 count = len;
  62         else {
  63                 buf +=  0x1000;
  64                 buf &= ~0x0fff;
  65
  66                 /* per-qtd limit: from 16K to 20K (best alignment) */
  67                 for (i = 1; count < len && i < 5; i++) {
  68                         addr = buf;
  69                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  70                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  71                                         (u32)(addr >> 32));
  72                         buf += 0x1000;
  73                         if ((count + 0x1000) < len)
  74                                 count += 0x1000;
  75                         else
  76                                 count = len;
  77                 }
  78
  79                 /* short packets may only terminate transfers */
  80                 if (count != len)
  81                         count -= (count % maxpacket);
  82         }
  83         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  84         qtd->length = count;
  85
  86         return count;
  87 }
  88
  89 /*-------------------------------------------------------------------------*/
  90
  91 static inline void
  92 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  93 {
  94         struct ehci_qh_hw *hw = qh->hw;
  95
  96         /* writes to an active overlay are unsafe */
  97         WARN_ON(qh->qh_state != QH_STATE_IDLE);
  98
  99         hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
 100         hw->hw_alt_next = EHCI_LIST_END(ehci);
 101
 102         /* Except for control endpoints, we make hardware maintain data
 103          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
 104          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
 105          * ever clear it.
 106          */
 107         if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
 108                 unsigned        is_out, epnum;
 109
 110                 is_out = qh->is_out;
 111                 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
 112                 if (unlikely(!usb_gettoggle(qh->ps.udev, epnum, is_out))) {
 113                         hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 114                         usb_settoggle(qh->ps.udev, epnum, is_out, 1);
 115                 }
 116         }
 117
 118         hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 119 }
 120
 121 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 122  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 123  * recovery (including urb dequeue) would need software changes to a QH...
 124  */
 125 static void
 126 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 127 {
 128         struct ehci_qtd *qtd;
 129
 130         qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
 131
 132         /*
 133          * first qtd may already be partially processed.
 134          * If we come here during unlink, the QH overlay region
 135          * might have reference to the just unlinked qtd. The
 136          * qtd is updated in qh_completions(). Update the QH
 137          * overlay here.
 138          */
 139         if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
 140                 qh->hw->hw_qtd_next = qtd->hw_next;
 141                 if (qh->should_be_inactive)
 142                         ehci_warn(ehci, "qh %p should be inactive!\n", qh);
 143         } else {
 144                 qh_update(ehci, qh, qtd);
 145         }
 146         qh->should_be_inactive = 0;
 147 }
 148
 149 /*-------------------------------------------------------------------------*/
 150
 151 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
 152
 153 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
 154                 struct usb_host_endpoint *ep)
 155 {
 156         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 157         struct ehci_qh          *qh = ep->hcpriv;
 158         unsigned long           flags;
 159
 160         spin_lock_irqsave(&ehci->lock, flags);
 161         qh->clearing_tt = 0;
 162         if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
 163                         && ehci->rh_state == EHCI_RH_RUNNING)
 164                 qh_link_async(ehci, qh);
 165         spin_unlock_irqrestore(&ehci->lock, flags);
 166 }
 167
 168 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
 169                 struct urb *urb, u32 token)
 170 {
 171
 172         /* If an async split transaction gets an error or is unlinked,
 173          * the TT buffer may be left in an indeterminate state.  We
 174          * have to clear the TT buffer.
 175          *
 176          * Note: this routine is never called for Isochronous transfers.
 177          */
 178         if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
 179 #ifdef CONFIG_DYNAMIC_DEBUG
 180                 struct usb_device *tt = urb->dev->tt->hub;
 181                 dev_dbg(&tt->dev,
 182                         "clear tt buffer port %d, a%d ep%d t%08x\n",
 183                         urb->dev->ttport, urb->dev->devnum,
 184                         usb_pipeendpoint(urb->pipe), token);
 185 #endif /* CONFIG_DYNAMIC_DEBUG */
 186                 if (!ehci_is_TDI(ehci)
 187                                 || urb->dev->tt->hub !=
 188                                    ehci_to_hcd(ehci)->self.root_hub) {
 189                         if (usb_hub_clear_tt_buffer(urb) == 0)
 190                                 qh->clearing_tt = 1;
 191                 } else {
 192
 193                         /* REVISIT ARC-derived cores don't clear the root
 194                          * hub TT buffer in this way...
 195                          */
 196                 }
 197         }
 198 }
 199
 200 static int qtd_copy_status (
 201         struct ehci_hcd *ehci,
 202         struct urb *urb,
 203         size_t length,
 204         u32 token
 205 )
 206 {
 207         int     status = -EINPROGRESS;
 208
 209         /* count IN/OUT bytes, not SETUP (even short packets) */
 210         if (likely(QTD_PID(token) != PID_CODE_SETUP))
 211                 urb->actual_length += length - QTD_LENGTH (token);
 212
 213         /* don't modify error codes */
 214         if (unlikely(urb->unlinked))
 215                 return status;
 216
 217         /* force cleanup after short read; not always an error */
 218         if (unlikely (IS_SHORT_READ (token)))
 219                 status = -EREMOTEIO;
 220
 221         /* serious "can't proceed" faults reported by the hardware */
 222         if (token & QTD_STS_HALT) {
 223                 if (token & QTD_STS_BABBLE) {
 224                         /* FIXME "must" disable babbling device's port too */
 225                         status = -EOVERFLOW;
 226                 /*
 227                  * When MMF is active and PID Code is IN, queue is halted.
 228                  * EHCI Specification, Table 4-13.
 229                  */
 230                 } else if ((token & QTD_STS_MMF) &&
 231                                         (QTD_PID(token) == PID_CODE_IN)) {
 232                         status = -EPROTO;
 233                 /* CERR nonzero + halt --> stall */
 234                 } else if (QTD_CERR(token)) {
 235                         status = -EPIPE;
 236
 237                 /* In theory, more than one of the following bits can be set
 238                  * since they are sticky and the transaction is retried.
 239                  * Which to test first is rather arbitrary.
 240                  */
 241                 } else if (token & QTD_STS_MMF) {
 242                         /* fs/ls interrupt xfer missed the complete-split */
 243                         status = -EPROTO;
 244                 } else if (token & QTD_STS_DBE) {
 245                         status = (QTD_PID (token) == 1) /* IN ? */
 246                                 ? -ENOSR  /* hc couldn't read data */
 247                                 : -ECOMM; /* hc couldn't write data */
 248                 } else if (token & QTD_STS_XACT) {
 249                         /* timeout, bad CRC, wrong PID, etc */
 250                         ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
 251                                 urb->dev->devpath,
 252                                 usb_pipeendpoint(urb->pipe),
 253                                 usb_pipein(urb->pipe) ? "in" : "out");
 254                         status = -EPROTO;
 255                 } else {        /* unknown */
 256                         status = -EPROTO;
 257                 }
 258         }
 259
 260         return status;
 261 }
 262
 263 static void
 264 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
 265 {
 266         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
 267                 /* ... update hc-wide periodic stats */
 268                 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 269         }
 270
 271         if (unlikely(urb->unlinked)) {
 272                 COUNT(ehci->stats.unlink);
 273         } else {
 274                 /* report non-error and short read status as zero */
 275                 if (status == -EINPROGRESS || status == -EREMOTEIO)
 276                         status = 0;
 277                 COUNT(ehci->stats.complete);
 278         }
 279
 280 #ifdef EHCI_URB_TRACE
 281         ehci_dbg (ehci,
 282                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 283                 __func__, urb->dev->devpath, urb,
 284                 usb_pipeendpoint (urb->pipe),
 285                 usb_pipein (urb->pipe) ? "in" : "out",
 286                 status,
 287                 urb->actual_length, urb->transfer_buffer_length);
 288 #endif
 289
 290         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 291         usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
 292 }
 293
 294 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 295
 296 /*
 297  * Process and free completed qtds for a qh, returning URBs to drivers.
 298  * Chases up to qh->hw_current.  Returns nonzero if the caller should
 299  * unlink qh.
 300  */
 301 static unsigned
 302 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 303 {
 304         struct ehci_qtd         *last, *end = qh->dummy;
 305         struct list_head        *entry, *tmp;
 306         int                     last_status;
 307         int                     stopped;
 308         u8                      state;
 309         struct ehci_qh_hw       *hw = qh->hw;
 310
 311         /* completions (or tasks on other cpus) must never clobber HALT
 312          * till we've gone through and cleaned everything up, even when
 313          * they add urbs to this qh's queue or mark them for unlinking.
 314          *
 315          * NOTE:  unlinking expects to be done in queue order.
 316          *
 317          * It's a bug for qh->qh_state to be anything other than
 318          * QH_STATE_IDLE, unless our caller is scan_async() or
 319          * scan_intr().
 320          */
 321         state = qh->qh_state;
 322         qh->qh_state = QH_STATE_COMPLETING;
 323         stopped = (state == QH_STATE_IDLE);
 324
 325  rescan:
 326         last = NULL;
 327         last_status = -EINPROGRESS;
 328         qh->dequeue_during_giveback = 0;
 329
 330         /* remove de-activated QTDs from front of queue.
 331          * after faults (including short reads), cleanup this urb
 332          * then let the queue advance.
 333          * if queue is stopped, handles unlinks.
 334          */
 335         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 336                 struct ehci_qtd *qtd;
 337                 struct urb      *urb;
 338                 u32             token = 0;
 339
 340                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 341                 urb = qtd->urb;
 342
 343                 /* clean up any state from previous QTD ...*/
 344                 if (last) {
 345                         if (likely (last->urb != urb)) {
 346                                 ehci_urb_done(ehci, last->urb, last_status);
 347                                 last_status = -EINPROGRESS;
 348                         }
 349                         ehci_qtd_free (ehci, last);
 350                         last = NULL;
 351                 }
 352
 353                 /* ignore urbs submitted during completions we reported */
 354                 if (qtd == end)
 355                         break;
 356
 357                 /* hardware copies qtd out of qh overlay */
 358                 rmb ();
 359                 token = hc32_to_cpu(ehci, qtd->hw_token);
 360
 361                 /* always clean up qtds the hc de-activated */
 362  retry_xacterr:
 363                 if ((token & QTD_STS_ACTIVE) == 0) {
 364
 365                         /* Report Data Buffer Error: non-fatal but useful */
 366                         if (token & QTD_STS_DBE)
 367                                 ehci_dbg(ehci,
 368                                         "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 369                                         urb,
 370                                         usb_endpoint_num(&urb->ep->desc),
 371                                         usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
 372                                         urb->transfer_buffer_length,
 373                                         qtd,
 374                                         qh);
 375
 376                         /* on STALL, error, and short reads this urb must
 377                          * complete and all its qtds must be recycled.
 378                          */
 379                         if ((token & QTD_STS_HALT) != 0) {
 380
 381                                 /* retry transaction errors until we
 382                                  * reach the software xacterr limit
 383                                  */
 384                                 if ((token & QTD_STS_XACT) &&
 385                                                 QTD_CERR(token) == 0 &&
 386                                                 ++qh->xacterrs < QH_XACTERR_MAX &&
 387                                                 !urb->unlinked) {
 388                                         ehci_dbg(ehci,
 389         "detected XactErr len %zu/%zu retry %d\n",
 390         qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
 391
 392                                         /* reset the token in the qtd and the
 393                                          * qh overlay (which still contains
 394                                          * the qtd) so that we pick up from
 395                                          * where we left off
 396                                          */
 397                                         token &= ~QTD_STS_HALT;
 398                                         token |= QTD_STS_ACTIVE |
 399                                                         (EHCI_TUNE_CERR << 10);
 400                                         qtd->hw_token = cpu_to_hc32(ehci,
 401                                                         token);
 402                                         wmb();
 403                                         hw->hw_token = cpu_to_hc32(ehci,
 404                                                         token);
 405                                         goto retry_xacterr;
 406                                 }
 407                                 stopped = 1;
 408                                 qh->unlink_reason |= QH_UNLINK_HALTED;
 409
 410                         /* magic dummy for some short reads; qh won't advance.
 411                          * that silicon quirk can kick in with this dummy too.
 412                          *
 413                          * other short reads won't stop the queue, including
 414                          * control transfers (status stage handles that) or
 415                          * most other single-qtd reads ... the queue stops if
 416                          * URB_SHORT_NOT_OK was set so the driver submitting
 417                          * the urbs could clean it up.
 418                          */
 419                         } else if (IS_SHORT_READ (token)
 420                                         && !(qtd->hw_alt_next
 421                                                 & EHCI_LIST_END(ehci))) {
 422                                 stopped = 1;
 423                                 qh->unlink_reason |= QH_UNLINK_SHORT_READ;
 424                         }
 425
 426                 /* stop scanning when we reach qtds the hc is using */
 427                 } else if (likely (!stopped
 428                                 && ehci->rh_state >= EHCI_RH_RUNNING)) {
 429                         break;
 430
 431                 /* scan the whole queue for unlinks whenever it stops */
 432                 } else {
 433                         stopped = 1;
 434
 435                         /* cancel everything if we halt, suspend, etc */
 436                         if (ehci->rh_state < EHCI_RH_RUNNING) {
 437                                 last_status = -ESHUTDOWN;
 438                                 qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
 439                         }
 440
 441                         /* this qtd is active; skip it unless a previous qtd
 442                          * for its urb faulted, or its urb was canceled.
 443                          */
 444                         else if (last_status == -EINPROGRESS && !urb->unlinked)
 445                                 continue;
 446
 447                         /*
 448                          * If this was the active qtd when the qh was unlinked
 449                          * and the overlay's token is active, then the overlay
 450                          * hasn't been written back to the qtd yet so use its
 451                          * token instead of the qtd's.  After the qtd is
 452                          * processed and removed, the overlay won't be valid
 453                          * any more.
 454                          */
 455                         if (state == QH_STATE_IDLE &&
 456                                         qh->qtd_list.next == &qtd->qtd_list &&
 457                                         (hw->hw_token & ACTIVE_BIT(ehci))) {
 458                                 token = hc32_to_cpu(ehci, hw->hw_token);
 459                                 hw->hw_token &= ~ACTIVE_BIT(ehci);
 460                                 qh->should_be_inactive = 1;
 461
 462                                 /* An unlink may leave an incomplete
 463                                  * async transaction in the TT buffer.
 464                                  * We have to clear it.
 465                                  */
 466                                 ehci_clear_tt_buffer(ehci, qh, urb, token);
 467                         }
 468                 }
 469
 470                 /* unless we already know the urb's status, collect qtd status
 471                  * and update count of bytes transferred.  in common short read
 472                  * cases with only one data qtd (including control transfers),
 473                  * queue processing won't halt.  but with two or more qtds (for
 474                  * example, with a 32 KB transfer), when the first qtd gets a
 475                  * short read the second must be removed by hand.
 476                  */
 477                 if (last_status == -EINPROGRESS) {
 478                         last_status = qtd_copy_status(ehci, urb,
 479                                         qtd->length, token);
 480                         if (last_status == -EREMOTEIO
 481                                         && (qtd->hw_alt_next
 482                                                 & EHCI_LIST_END(ehci)))
 483                                 last_status = -EINPROGRESS;
 484
 485                         /* As part of low/full-speed endpoint-halt processing
 486                          * we must clear the TT buffer (11.17.5).
 487                          */
 488                         if (unlikely(last_status != -EINPROGRESS &&
 489                                         last_status != -EREMOTEIO)) {
 490                                 /* The TT's in some hubs malfunction when they
 491                                  * receive this request following a STALL (they
 492                                  * stop sending isochronous packets).  Since a
 493                                  * STALL can't leave the TT buffer in a busy
 494                                  * state (if you believe Figures 11-48 - 11-51
 495                                  * in the USB 2.0 spec), we won't clear the TT
 496                                  * buffer in this case.  Strictly speaking this
 497                                  * is a violation of the spec.
 498                                  */
 499                                 if (last_status != -EPIPE)
 500                                         ehci_clear_tt_buffer(ehci, qh, urb,
 501                                                         token);
 502                         }
 503                 }
 504
 505                 /* if we're removing something not at the queue head,
 506                  * patch the hardware queue pointer.
 507                  */
 508                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 509                         last = list_entry (qtd->qtd_list.prev,
 510                                         struct ehci_qtd, qtd_list);
 511                         last->hw_next = qtd->hw_next;
 512                 }
 513
 514                 /* remove qtd; it's recycled after possible urb completion */
 515                 list_del (&qtd->qtd_list);
 516                 last = qtd;
 517
 518                 /* reinit the xacterr counter for the next qtd */
 519                 qh->xacterrs = 0;
 520         }
 521
 522         /* last urb's completion might still need calling */
 523         if (likely (last != NULL)) {
 524                 ehci_urb_done(ehci, last->urb, last_status);
 525                 ehci_qtd_free (ehci, last);
 526         }
 527
 528         /* Do we need to rescan for URBs dequeued during a giveback? */
 529         if (unlikely(qh->dequeue_during_giveback)) {
 530                 /* If the QH is already unlinked, do the rescan now. */
 531                 if (state == QH_STATE_IDLE)
 532                         goto rescan;
 533
 534                 /* Otherwise the caller must unlink the QH. */
 535         }
 536
 537         /* restore original state; caller must unlink or relink */
 538         qh->qh_state = state;
 539
 540         /* be sure the hardware's done with the qh before refreshing
 541          * it after fault cleanup, or recovering from silicon wrongly
 542          * overlaying the dummy qtd (which reduces DMA chatter).
 543          *
 544          * We won't refresh a QH that's linked (after the HC
 545          * stopped the queue).  That avoids a race:
 546          *  - HC reads first part of QH;
 547          *  - CPU updates that first part and the token;
 548          *  - HC reads rest of that QH, including token
 549          * Result:  HC gets an inconsistent image, and then
 550          * DMAs to/from the wrong memory (corrupting it).
 551          *
 552          * That should be rare for interrupt transfers,
 553          * except maybe high bandwidth ...
 554          */
 555         if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
 556                 qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
 557
 558         /* Let the caller know if the QH needs to be unlinked. */
 559         return qh->unlink_reason;
 560 }
 561
 562 /*-------------------------------------------------------------------------*/
 563
 564 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 565 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 566 // ... and packet size, for any kind of endpoint descriptor
 567 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 568
 569 /*
 570  * reverse of qh_urb_transaction:  free a list of TDs.
 571  * used for cleanup after errors, before HC sees an URB's TDs.
 572  */
 573 static void qtd_list_free (
 574         struct ehci_hcd         *ehci,
 575         struct urb              *urb,
 576         struct list_head        *qtd_list
 577 ) {
 578         struct list_head        *entry, *temp;
 579
 580         list_for_each_safe (entry, temp, qtd_list) {
 581                 struct ehci_qtd *qtd;
 582
 583                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 584                 list_del (&qtd->qtd_list);
 585                 ehci_qtd_free (ehci, qtd);
 586         }
 587 }
 588
 589 /*
 590  * create a list of filled qtds for this URB; won't link into qh.
 591  */
 592 static struct list_head *
 593 qh_urb_transaction (
 594         struct ehci_hcd         *ehci,
 595         struct urb              *urb,
 596         struct list_head        *head,
 597         gfp_t                   flags
 598 ) {
 599         struct ehci_qtd         *qtd, *qtd_prev;
 600         dma_addr_t              buf;
 601         int                     len, this_sg_len, maxpacket;
 602         int                     is_input;
 603         u32                     token;
 604         int                     i;
 605         struct scatterlist      *sg;
 606
 607         /*
 608          * URBs map to sequences of QTDs:  one logical transaction
 609          */
 610         qtd = ehci_qtd_alloc (ehci, flags);
 611         if (unlikely (!qtd))
 612                 return NULL;
 613         list_add_tail (&qtd->qtd_list, head);
 614         qtd->urb = urb;
 615
 616         token = QTD_STS_ACTIVE;
 617         token |= (EHCI_TUNE_CERR << 10);
 618         /* for split transactions, SplitXState initialized to zero */
 619
 620         len = urb->transfer_buffer_length;
 621         is_input = usb_pipein (urb->pipe);
 622         if (usb_pipecontrol (urb->pipe)) {
 623                 /* SETUP pid */
 624                 qtd_fill(ehci, qtd, urb->setup_dma,
 625                                 sizeof (struct usb_ctrlrequest),
 626                                 token | (2 /* "setup" */ << 8), 8);
 627
 628                 /* ... and always at least one more pid */
 629                 token ^= QTD_TOGGLE;
 630                 qtd_prev = qtd;
 631                 qtd = ehci_qtd_alloc (ehci, flags);
 632                 if (unlikely (!qtd))
 633                         goto cleanup;
 634                 qtd->urb = urb;
 635                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 636                 list_add_tail (&qtd->qtd_list, head);
 637
 638                 /* for zero length DATA stages, STATUS is always IN */
 639                 if (len == 0)
 640                         token |= (1 /* "in" */ << 8);
 641         }
 642
 643         /*
 644          * data transfer stage:  buffer setup
 645          */
 646         i = urb->num_mapped_sgs;
 647         if (len > 0 && i > 0) {
 648                 sg = urb->sg;
 649                 buf = sg_dma_address(sg);
 650
 651                 /* urb->transfer_buffer_length may be smaller than the
 652                  * size of the scatterlist (or vice versa)
 653                  */
 654                 this_sg_len = min_t(int, sg_dma_len(sg), len);
 655         } else {
 656                 sg = NULL;
 657                 buf = urb->transfer_dma;
 658                 this_sg_len = len;
 659         }
 660
 661         if (is_input)
 662                 token |= (1 /* "in" */ << 8);
 663         /* else it's already initted to "out" pid (0 << 8) */
 664
 665         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 666
 667         /*
 668          * buffer gets wrapped in one or more qtds;
 669          * last one may be "short" (including zero len)
 670          * and may serve as a control status ack
 671          */
 672         for (;;) {
 673                 int this_qtd_len;
 674
 675                 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
 676                                 maxpacket);
 677                 this_sg_len -= this_qtd_len;
 678                 len -= this_qtd_len;
 679                 buf += this_qtd_len;
 680
 681                 /*
 682                  * short reads advance to a "magic" dummy instead of the next
 683                  * qtd ... that forces the queue to stop, for manual cleanup.
 684                  * (this will usually be overridden later.)
 685                  */
 686                 if (is_input)
 687                         qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
 688
 689                 /* qh makes control packets use qtd toggle; maybe switch it */
 690                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 691                         token ^= QTD_TOGGLE;
 692
 693                 if (likely(this_sg_len <= 0)) {
 694                         if (--i <= 0 || len <= 0)
 695                                 break;
 696                         sg = sg_next(sg);
 697                         buf = sg_dma_address(sg);
 698                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 699                 }
 700
 701                 qtd_prev = qtd;
 702                 qtd = ehci_qtd_alloc (ehci, flags);
 703                 if (unlikely (!qtd))
 704                         goto cleanup;
 705                 qtd->urb = urb;
 706                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 707                 list_add_tail (&qtd->qtd_list, head);
 708         }
 709
 710         /*
 711          * unless the caller requires manual cleanup after short reads,
 712          * have the alt_next mechanism keep the queue running after the
 713          * last data qtd (the only one, for control and most other cases).
 714          */
 715         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 716                                 || usb_pipecontrol (urb->pipe)))
 717                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 718
 719         /*
 720          * control requests may need a terminating data "status" ack;
 721          * other OUT ones may need a terminating short packet
 722          * (zero length).
 723          */
 724         if (likely (urb->transfer_buffer_length != 0)) {
 725                 int     one_more = 0;
 726
 727                 if (usb_pipecontrol (urb->pipe)) {
 728                         one_more = 1;
 729                         token ^= 0x0100;        /* "in" <--> "out"  */
 730                         token |= QTD_TOGGLE;    /* force DATA1 */
 731                 } else if (usb_pipeout(urb->pipe)
 732                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 733                                 && !(urb->transfer_buffer_length % maxpacket)) {
 734                         one_more = 1;
 735                 }
 736                 if (one_more) {
 737                         qtd_prev = qtd;
 738                         qtd = ehci_qtd_alloc (ehci, flags);
 739                         if (unlikely (!qtd))
 740                                 goto cleanup;
 741                         qtd->urb = urb;
 742                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 743                         list_add_tail (&qtd->qtd_list, head);
 744
 745                         /* never any data in such packets */
 746                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 747                 }
 748         }
 749
 750         /* by default, enable interrupt on urb completion */
 751         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 752                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 753         return head;
 754
 755 cleanup:
 756         qtd_list_free (ehci, urb, head);
 757         return NULL;
 758 }
 759
 760 /*-------------------------------------------------------------------------*/
 761
 762 // Would be best to create all qh's from config descriptors,
 763 // when each interface/altsetting is established.  Unlink
 764 // any previous qh and cancel its urbs first; endpoints are
 765 // implicitly reset then (data toggle too).
 766 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 767
 768
 769 /*
 770  * Each QH holds a qtd list; a QH is used for everything except iso.
 771  *
 772  * For interrupt urbs, the scheduler must set the microframe scheduling
 773  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 774  * just one microframe in the s-mask.  For split interrupt transactions
 775  * there are additional complications: c-mask, maybe FSTNs.
 776  */
 777 static struct ehci_qh *
 778 qh_make (
 779         struct ehci_hcd         *ehci,
 780         struct urb              *urb,
 781         gfp_t                   flags
 782 ) {
 783         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 784         u32                     info1 = 0, info2 = 0;
 785         int                     is_input, type;
 786         int                     maxp = 0;
 787         struct usb_tt           *tt = urb->dev->tt;
 788         struct ehci_qh_hw       *hw;
 789
 790         if (!qh)
 791                 return qh;
 792
 793         /*
 794          * init endpoint/device data for this QH
 795          */
 796         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 797         info1 |= usb_pipedevice (urb->pipe) << 0;
 798
 799         is_input = usb_pipein (urb->pipe);
 800         type = usb_pipetype (urb->pipe);
 801         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 802
 803         /* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
 804          * acts like up to 3KB, but is built from smaller packets.
 805          */
 806         if (max_packet(maxp) > 1024) {
 807                 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
 808                 goto done;
 809         }
 810
 811         /* Compute interrupt scheduling parameters just once, and save.
 812          * - allowing for high bandwidth, how many nsec/uframe are used?
 813          * - split transactions need a second CSPLIT uframe; same question
 814          * - splits also need a schedule gap (for full/low speed I/O)
 815          * - qh has a polling interval
 816          *
 817          * For control/bulk requests, the HC or TT handles these.
 818          */
 819         if (type == PIPE_INTERRUPT) {
 820                 unsigned        tmp;
 821
 822                 qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
 823                                 is_input, 0,
 824                                 hb_mult(maxp) * max_packet(maxp)));
 825                 qh->ps.phase = NO_FRAME;
 826
 827                 if (urb->dev->speed == USB_SPEED_HIGH) {
 828                         qh->ps.c_usecs = 0;
 829                         qh->gap_uf = 0;
 830
 831                         if (urb->interval > 1 && urb->interval < 8) {
 832                                 /* NOTE interval 2 or 4 uframes could work.
 833                                  * But interval 1 scheduling is simpler, and
 834                                  * includes high bandwidth.
 835                                  */
 836                                 urb->interval = 1;
 837                         } else if (urb->interval > ehci->periodic_size << 3) {
 838                                 urb->interval = ehci->periodic_size << 3;
 839                         }
 840                         qh->ps.period = urb->interval >> 3;
 841
 842                         /* period for bandwidth allocation */
 843                         tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
 844                                         1 << (urb->ep->desc.bInterval - 1));
 845
 846                         /* Allow urb->interval to override */
 847                         qh->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
 848                         qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
 849                 } else {
 850                         int             think_time;
 851
 852                         /* gap is f(FS/LS transfer times) */
 853                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 854                                         is_input, 0, maxp) / (125 * 1000);
 855
 856                         /* FIXME this just approximates SPLIT/CSPLIT times */
 857                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 858                                 qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
 859                                 qh->ps.usecs = HS_USECS(1);
 860                         } else {                // SPLIT+DATA, gap, CSPLIT
 861                                 qh->ps.usecs += HS_USECS(1);
 862                                 qh->ps.c_usecs = HS_USECS(0);
 863                         }
 864
 865                         think_time = tt ? tt->think_time : 0;
 866                         qh->ps.tt_usecs = NS_TO_US(think_time +
 867                                         usb_calc_bus_time (urb->dev->speed,
 868                                         is_input, 0, max_packet (maxp)));
 869                         if (urb->interval > ehci->periodic_size)
 870                                 urb->interval = ehci->periodic_size;
 871                         qh->ps.period = urb->interval;
 872
 873                         /* period for bandwidth allocation */
 874                         tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
 875                                         urb->ep->desc.bInterval);
 876                         tmp = rounddown_pow_of_two(tmp);
 877
 878                         /* Allow urb->interval to override */
 879                         qh->ps.bw_period = min_t(unsigned, tmp, urb->interval);
 880                         qh->ps.bw_uperiod = qh->ps.bw_period << 3;
 881                 }
 882         }
 883
 884         /* support for tt scheduling, and access to toggles */
 885         qh->ps.udev = urb->dev;
 886         qh->ps.ep = urb->ep;
 887
 888         /* using TT? */
 889         switch (urb->dev->speed) {
 890         case USB_SPEED_LOW:
 891                 info1 |= QH_LOW_SPEED;
 892                 /* FALL THROUGH */
 893
 894         case USB_SPEED_FULL:
 895                 /* EPS 0 means "full" */
 896                 if (type != PIPE_INTERRUPT)
 897                         info1 |= (EHCI_TUNE_RL_TT << 28);
 898                 if (type == PIPE_CONTROL) {
 899                         info1 |= QH_CONTROL_EP;         /* for TT */
 900                         info1 |= QH_TOGGLE_CTL;         /* toggle from qtd */
 901                 }
 902                 info1 |= maxp << 16;
 903
 904                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 905
 906                 /* Some Freescale processors have an erratum in which the
 907                  * port number in the queue head was 0..N-1 instead of 1..N.
 908                  */
 909                 if (ehci_has_fsl_portno_bug(ehci))
 910                         info2 |= (urb->dev->ttport-1) << 23;
 911                 else
 912                         info2 |= urb->dev->ttport << 23;
 913
 914                 /* set the address of the TT; for TDI's integrated
 915                  * root hub tt, leave it zeroed.
 916                  */
 917                 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
 918                         info2 |= tt->hub->devnum << 16;
 919
 920                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 921
 922                 break;
 923
 924         case USB_SPEED_HIGH:            /* no TT involved */
 925                 info1 |= QH_HIGH_SPEED;
 926                 if (type == PIPE_CONTROL) {
 927                         info1 |= (EHCI_TUNE_RL_HS << 28);
 928                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 929                         info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
 930                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 931                 } else if (type == PIPE_BULK) {
 932                         info1 |= (EHCI_TUNE_RL_HS << 28);
 933                         /* The USB spec says that high speed bulk endpoints
 934                          * always use 512 byte maxpacket.  But some device
 935                          * vendors decided to ignore that, and MSFT is happy
 936                          * to help them do so.  So now people expect to use
 937                          * such nonconformant devices with Linux too; sigh.
 938                          */
 939                         info1 |= max_packet(maxp) << 16;
 940                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 941                 } else {                /* PIPE_INTERRUPT */
 942                         info1 |= max_packet (maxp) << 16;
 943                         info2 |= hb_mult (maxp) << 30;
 944                 }
 945                 break;
 946         default:
 947                 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
 948                         urb->dev->speed);
 949 done:
 950                 qh_destroy(ehci, qh);
 951                 return NULL;
 952         }
 953
 954         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 955
 956         /* init as live, toggle clear */
 957         qh->qh_state = QH_STATE_IDLE;
 958         hw = qh->hw;
 959         hw->hw_info1 = cpu_to_hc32(ehci, info1);
 960         hw->hw_info2 = cpu_to_hc32(ehci, info2);
 961         qh->is_out = !is_input;
 962         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 963         return qh;
 964 }
 965
 966 /*-------------------------------------------------------------------------*/
 967
 968 static void enable_async(struct ehci_hcd *ehci)
 969 {
 970         if (ehci->async_count++)
 971                 return;
 972
 973         /* Stop waiting to turn off the async schedule */
 974         ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
 975
 976         /* Don't start the schedule until ASS is 0 */
 977         ehci_poll_ASS(ehci);
 978         turn_on_io_watchdog(ehci);
 979 }
 980
 981 static void disable_async(struct ehci_hcd *ehci)
 982 {
 983         if (--ehci->async_count)
 984                 return;
 985
 986         /* The async schedule and unlink lists are supposed to be empty */
 987         WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
 988                         !list_empty(&ehci->async_idle));
 989
 990         /* Don't turn off the schedule until ASS is 1 */
 991         ehci_poll_ASS(ehci);
 992 }
 993
 994 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 995
 996 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 997 {
 998         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 999         struct ehci_qh  *head;
1000
1001         /* Don't link a QH if there's a Clear-TT-Buffer pending */
1002         if (unlikely(qh->clearing_tt))
1003                 return;
1004
1005         WARN_ON(qh->qh_state != QH_STATE_IDLE);
1006
1007         /* clear halt and/or toggle; and maybe recover from silicon quirk */
1008         qh_refresh(ehci, qh);
1009
1010         /* splice right after start */
1011         head = ehci->async;
1012         qh->qh_next = head->qh_next;
1013         qh->hw->hw_next = head->hw->hw_next;
1014         wmb ();
1015
1016         head->qh_next.qh = qh;
1017         head->hw->hw_next = dma;
1018
1019         qh->qh_state = QH_STATE_LINKED;
1020         qh->xacterrs = 0;
1021         qh->unlink_reason = 0;
1022         /* qtd completions reported later by interrupt */
1023
1024         enable_async(ehci);
1025 }
1026
1027 /*-------------------------------------------------------------------------*/
1028
1029 /*
1030  * For control/bulk/interrupt, return QH with these TDs appended.
1031  * Allocates and initializes the QH if necessary.
1032  * Returns null if it can't allocate a QH it needs to.
1033  * If the QH has TDs (urbs) already, that's great.
1034  */
1035 static struct ehci_qh *qh_append_tds (
1036         struct ehci_hcd         *ehci,
1037         struct urb              *urb,
1038         struct list_head        *qtd_list,
1039         int                     epnum,
1040         void                    **ptr
1041 )
1042 {
1043         struct ehci_qh          *qh = NULL;
1044         __hc32                  qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1045
1046         qh = (struct ehci_qh *) *ptr;
1047         if (unlikely (qh == NULL)) {
1048                 /* can't sleep here, we have ehci->lock... */
1049                 qh = qh_make (ehci, urb, GFP_ATOMIC);
1050                 *ptr = qh;
1051         }
1052         if (likely (qh != NULL)) {
1053                 struct ehci_qtd *qtd;
1054
1055                 if (unlikely (list_empty (qtd_list)))
1056                         qtd = NULL;
1057                 else
1058                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
1059                                         qtd_list);
1060
1061                 /* control qh may need patching ... */
1062                 if (unlikely (epnum == 0)) {
1063
1064                         /* usb_reset_device() briefly reverts to address 0 */
1065                         if (usb_pipedevice (urb->pipe) == 0)
1066                                 qh->hw->hw_info1 &= ~qh_addr_mask;
1067                 }
1068
1069                 /* just one way to queue requests: swap with the dummy qtd.
1070                  * only hc or qh_refresh() ever modify the overlay.
1071                  */
1072                 if (likely (qtd != NULL)) {
1073                         struct ehci_qtd         *dummy;
1074                         dma_addr_t              dma;
1075                         __hc32                  token;
1076
1077                         /* to avoid racing the HC, use the dummy td instead of
1078                          * the first td of our list (becomes new dummy).  both
1079                          * tds stay deactivated until we're done, when the
1080                          * HC is allowed to fetch the old dummy (4.10.2).
1081                          */
1082                         token = qtd->hw_token;
1083                         qtd->hw_token = HALT_BIT(ehci);
1084
1085                         dummy = qh->dummy;
1086
1087                         dma = dummy->qtd_dma;
1088                         *dummy = *qtd;
1089                         dummy->qtd_dma = dma;
1090
1091                         list_del (&qtd->qtd_list);
1092                         list_add (&dummy->qtd_list, qtd_list);
1093                         list_splice_tail(qtd_list, &qh->qtd_list);
1094
1095                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1096                         qh->dummy = qtd;
1097
1098                         /* hc must see the new dummy at list end */
1099                         dma = qtd->qtd_dma;
1100                         qtd = list_entry (qh->qtd_list.prev,
1101                                         struct ehci_qtd, qtd_list);
1102                         qtd->hw_next = QTD_NEXT(ehci, dma);
1103
1104                         /* let the hc process these next qtds */
1105                         wmb ();
1106                         dummy->hw_token = token;
1107
1108                         urb->hcpriv = qh;
1109                 }
1110         }
1111         return qh;
1112 }
1113
1114 /*-------------------------------------------------------------------------*/
1115
1116 static int
1117 submit_async (
1118         struct ehci_hcd         *ehci,
1119         struct urb              *urb,
1120         struct list_head        *qtd_list,
1121         gfp_t                   mem_flags
1122 ) {
1123         int                     epnum;
1124         unsigned long           flags;
1125         struct ehci_qh          *qh = NULL;
1126         int                     rc;
1127
1128         epnum = urb->ep->desc.bEndpointAddress;
1129
1130 #ifdef EHCI_URB_TRACE
1131         {
1132                 struct ehci_qtd *qtd;
1133                 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1134                 ehci_dbg(ehci,
1135                          "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1136                          __func__, urb->dev->devpath, urb,
1137                          epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1138                          urb->transfer_buffer_length,
1139                          qtd, urb->ep->hcpriv);
1140         }
1141 #endif
1142
1143         spin_lock_irqsave (&ehci->lock, flags);
1144         if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1145                 rc = -ESHUTDOWN;
1146                 goto done;
1147         }
1148         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1149         if (unlikely(rc))
1150                 goto done;
1151
1152         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1153         if (unlikely(qh == NULL)) {
1154                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1155                 rc = -ENOMEM;
1156                 goto done;
1157         }
1158
1159         /* Control/bulk operations through TTs don't need scheduling,
1160          * the HC and TT handle it when the TT has a buffer ready.
1161          */
1162         if (likely (qh->qh_state == QH_STATE_IDLE))
1163                 qh_link_async(ehci, qh);
1164  done:
1165         spin_unlock_irqrestore (&ehci->lock, flags);
1166         if (unlikely (qh == NULL))
1167                 qtd_list_free (ehci, urb, qtd_list);
1168         return rc;
1169 }
1170
1171 /*-------------------------------------------------------------------------*/
1172 #ifdef CONFIG_USB_HCD_TEST_MODE
1173 /*
1174  * This function creates the qtds and submits them for the
1175  * SINGLE_STEP_SET_FEATURE Test.
1176  * This is done in two parts: first SETUP req for GetDesc is sent then
1177  * 15 seconds later, the IN stage for GetDesc starts to req data from dev
1178  *
1179  * is_setup : i/p arguement decides which of the two stage needs to be
1180  * performed; TRUE - SETUP and FALSE - IN+STATUS
1181  * Returns 0 if success
1182  */
1183 static int submit_single_step_set_feature(
1184         struct usb_hcd  *hcd,
1185         struct urb      *urb,
1186         int             is_setup
1187 ) {
1188         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1189         struct list_head        qtd_list;
1190         struct list_head        *head;
1191
1192         struct ehci_qtd         *qtd, *qtd_prev;
1193         dma_addr_t              buf;
1194         int                     len, maxpacket;
1195         u32                     token;
1196
1197         INIT_LIST_HEAD(&qtd_list);
1198         head = &qtd_list;
1199
1200         /* URBs map to sequences of QTDs:  one logical transaction */
1201         qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
1202         if (unlikely(!qtd))
1203                 return -1;
1204         list_add_tail(&qtd->qtd_list, head);
1205         qtd->urb = urb;
1206
1207         token = QTD_STS_ACTIVE;
1208         token |= (EHCI_TUNE_CERR << 10);
1209
1210         len = urb->transfer_buffer_length;
1211         /*
1212          * Check if the request is to perform just the SETUP stage (getDesc)
1213          * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
1214          * 15 secs after the setup
1215          */
1216         if (is_setup) {
1217                 /* SETUP pid */
1218                 qtd_fill(ehci, qtd, urb->setup_dma,
1219                                 sizeof(struct usb_ctrlrequest),
1220                                 token | (2 /* "setup" */ << 8), 8);
1221
1222                 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
1223                 return 0; /*Return now; we shall come back after 15 seconds*/
1224         }
1225
1226         /*
1227          * IN: data transfer stage:  buffer setup : start the IN txn phase for
1228          * the get_Desc SETUP which was sent 15seconds back
1229          */
1230         token ^= QTD_TOGGLE;   /*We need to start IN with DATA-1 Pid-sequence*/
1231         buf = urb->transfer_dma;
1232
1233         token |= (1 /* "in" */ << 8);  /*This is IN stage*/
1234
1235         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, 0));
1236
1237         qtd_fill(ehci, qtd, buf, len, token, maxpacket);
1238
1239         /*
1240          * Our IN phase shall always be a short read; so keep the queue running
1241          * and let it advance to the next qtd which zero length OUT status
1242          */
1243         qtd->hw_alt_next = EHCI_LIST_END(ehci);
1244
1245         /* STATUS stage for GetDesc control request */
1246         token ^= 0x0100;        /* "in" <--> "out"  */
1247         token |= QTD_TOGGLE;    /* force DATA1 */
1248
1249         qtd_prev = qtd;
1250         qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
1251         if (unlikely(!qtd))
1252                 goto cleanup;
1253         qtd->urb = urb;
1254         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1255         list_add_tail(&qtd->qtd_list, head);
1256
1257         /* dont fill any data in such packets */
1258         qtd_fill(ehci, qtd, 0, 0, token, 0);
1259
1260         /* by default, enable interrupt on urb completion */
1261         if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
1262                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
1263
1264         submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
1265
1266         return 0;
1267
1268 cleanup:
1269         qtd_list_free(ehci, urb, head);
1270         return -1;
1271 }
1272 #endif /* CONFIG_USB_HCD_TEST_MODE */
1273
1274 /*-------------------------------------------------------------------------*/
1275
1276 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1277 {
1278         struct ehci_qh          *prev;
1279
1280         /* Add to the end of the list of QHs waiting for the next IAAD */
1281         qh->qh_state = QH_STATE_UNLINK_WAIT;
1282         list_add_tail(&qh->unlink_node, &ehci->async_unlink);
1283
1284         /* Unlink it from the schedule */
1285         prev = ehci->async;
1286         while (prev->qh_next.qh != qh)
1287                 prev = prev->qh_next.qh;
1288
1289         prev->hw->hw_next = qh->hw->hw_next;
1290         prev->qh_next = qh->qh_next;
1291         if (ehci->qh_scan_next == qh)
1292                 ehci->qh_scan_next = qh->qh_next.qh;
1293 }
1294
1295 static void start_iaa_cycle(struct ehci_hcd *ehci)
1296 {
1297         /* If the controller isn't running, we don't have to wait for it */
1298         if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1299                 end_unlink_async(ehci);
1300
1301         /* Otherwise start a new IAA cycle if one isn't already running */
1302         } else if (ehci->rh_state == EHCI_RH_RUNNING &&
1303                         !ehci->iaa_in_progress) {
1304
1305                 /* Make sure the unlinks are all visible to the hardware */
1306                 wmb();
1307
1308                 ehci_writel(ehci, ehci->command | CMD_IAAD,
1309                                 &ehci->regs->command);
1310                 ehci_readl(ehci, &ehci->regs->command);
1311                 ehci->iaa_in_progress = true;
1312                 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1313         }
1314 }
1315
1316 static void end_iaa_cycle(struct ehci_hcd *ehci)
1317 {
1318         if (ehci->has_synopsys_hc_bug)
1319                 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1320                             &ehci->regs->async_next);
1321
1322         /* The current IAA cycle has ended */
1323         ehci->iaa_in_progress = false;
1324
1325         end_unlink_async(ehci);
1326 }
1327
1328 /* See if the async qh for the qtds being unlinked are now gone from the HC */
1329
1330 static void end_unlink_async(struct ehci_hcd *ehci)
1331 {
1332         struct ehci_qh          *qh;
1333         bool                    early_exit;
1334
1335         if (list_empty(&ehci->async_unlink))
1336                 return;
1337         qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
1338                         unlink_node);   /* QH whose IAA cycle just ended */
1339
1340         /*
1341          * If async_unlinking is set then this routine is already running,
1342          * either on the stack or on another CPU.
1343          */
1344         early_exit = ehci->async_unlinking;
1345
1346         /* If the controller isn't running, process all the waiting QHs */
1347         if (ehci->rh_state < EHCI_RH_RUNNING)
1348                 list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
1349
1350         /*
1351          * Intel (?) bug: The HC can write back the overlay region even
1352          * after the IAA interrupt occurs.  In self-defense, always go
1353          * through two IAA cycles for each QH.
1354          */
1355         else if (qh->qh_state == QH_STATE_UNLINK) {
1356                 /*
1357                  * Second IAA cycle has finished.  Process only the first
1358                  * waiting QH (NVIDIA (?) bug).
1359                  */
1360                 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1361         }
1362
1363         /*
1364          * AMD/ATI (?) bug: The HC can continue to use an active QH long
1365          * after the IAA interrupt occurs.  To prevent problems, QHs that
1366          * may still be active will wait until 2 ms have passed with no
1367          * change to the hw_current and hw_token fields (this delay occurs
1368          * between the two IAA cycles).
1369          *
1370          * The EHCI spec (4.8.2) says that active QHs must not be removed
1371          * from the async schedule and recommends waiting until the QH
1372          * goes inactive.  This is ridiculous because the QH will _never_
1373          * become inactive if the endpoint NAKs indefinitely.
1374          */
1375
1376         /* Some reasons for unlinking guarantee the QH can't be active */
1377         else if (qh->unlink_reason & (QH_UNLINK_HALTED |
1378                         QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
1379                 goto DelayDone;
1380
1381         /* The QH can't be active if the queue was and still is empty... */
1382         else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
1383                         list_empty(&qh->qtd_list))
1384                 goto DelayDone;
1385
1386         /* ... or if the QH has halted */
1387         else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
1388                 goto DelayDone;
1389
1390         /* Otherwise we have to wait until the QH stops changing */
1391         else {
1392                 __hc32          qh_current, qh_token;
1393
1394                 qh_current = qh->hw->hw_current;
1395                 qh_token = qh->hw->hw_token;
1396                 if (qh_current != ehci->old_current ||
1397                                 qh_token != ehci->old_token) {
1398                         ehci->old_current = qh_current;
1399                         ehci->old_token = qh_token;
1400                         ehci_enable_event(ehci,
1401                                         EHCI_HRTIMER_ACTIVE_UNLINK, true);
1402                         return;
1403                 }
1404  DelayDone:
1405                 qh->qh_state = QH_STATE_UNLINK;
1406                 early_exit = true;
1407         }
1408         ehci->old_current = ~0;         /* Prepare for next QH */
1409
1410         /* Start a new IAA cycle if any QHs are waiting for it */
1411         if (!list_empty(&ehci->async_unlink))
1412                 start_iaa_cycle(ehci);
1413
1414         /*
1415          * Don't allow nesting or concurrent calls,
1416          * or wait for the second IAA cycle for the next QH.
1417          */
1418         if (early_exit)
1419                 return;
1420
1421         /* Process the idle QHs */
1422         ehci->async_unlinking = true;
1423         while (!list_empty(&ehci->async_idle)) {
1424                 qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
1425                                 unlink_node);
1426                 list_del(&qh->unlink_node);
1427
1428                 qh->qh_state = QH_STATE_IDLE;
1429                 qh->qh_next.qh = NULL;
1430
1431                 if (!list_empty(&qh->qtd_list))
1432                         qh_completions(ehci, qh);
1433                 if (!list_empty(&qh->qtd_list) &&
1434                                 ehci->rh_state == EHCI_RH_RUNNING)
1435                         qh_link_async(ehci, qh);
1436                 disable_async(ehci);
1437         }
1438         ehci->async_unlinking = false;
1439 }
1440
1441 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
1442
1443 static void unlink_empty_async(struct ehci_hcd *ehci)
1444 {
1445         struct ehci_qh          *qh;
1446         struct ehci_qh          *qh_to_unlink = NULL;
1447         int                     count = 0;
1448
1449         /* Find the last async QH which has been empty for a timer cycle */
1450         for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
1451                 if (list_empty(&qh->qtd_list) &&
1452                                 qh->qh_state == QH_STATE_LINKED) {
1453                         ++count;
1454                         if (qh->unlink_cycle != ehci->async_unlink_cycle)
1455                                 qh_to_unlink = qh;
1456                 }
1457         }
1458
1459         /* If nothing else is being unlinked, unlink the last empty QH */
1460         if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
1461                 qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
1462                 start_unlink_async(ehci, qh_to_unlink);
1463                 --count;
1464         }
1465
1466         /* Other QHs will be handled later */
1467         if (count > 0) {
1468                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1469                 ++ehci->async_unlink_cycle;
1470         }
1471 }
1472
1473 #ifdef  CONFIG_PM
1474
1475 /* The root hub is suspended; unlink all the async QHs */
1476 static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
1477 {
1478         struct ehci_qh          *qh;
1479
1480         while (ehci->async->qh_next.qh) {
1481                 qh = ehci->async->qh_next.qh;
1482                 WARN_ON(!list_empty(&qh->qtd_list));
1483                 single_unlink_async(ehci, qh);
1484         }
1485 }
1486
1487 #endif
1488
1489 /* makes sure the async qh will become idle */
1490 /* caller must own ehci->lock */
1491
1492 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1493 {
1494         /* If the QH isn't linked then there's nothing we can do. */
1495         if (qh->qh_state != QH_STATE_LINKED)
1496                 return;
1497
1498         single_unlink_async(ehci, qh);
1499         start_iaa_cycle(ehci);
1500 }
1501
1502 /*-------------------------------------------------------------------------*/
1503
1504 static void scan_async (struct ehci_hcd *ehci)
1505 {
1506         struct ehci_qh          *qh;
1507         bool                    check_unlinks_later = false;
1508
1509         ehci->qh_scan_next = ehci->async->qh_next.qh;
1510         while (ehci->qh_scan_next) {
1511                 qh = ehci->qh_scan_next;
1512                 ehci->qh_scan_next = qh->qh_next.qh;
1513
1514                 /* clean any finished work for this qh */
1515                 if (!list_empty(&qh->qtd_list)) {
1516                         int temp;
1517
1518                         /*
1519                          * Unlinks could happen here; completion reporting
1520                          * drops the lock.  That's why ehci->qh_scan_next
1521                          * always holds the next qh to scan; if the next qh
1522                          * gets unlinked then ehci->qh_scan_next is adjusted
1523                          * in single_unlink_async().
1524                          */
1525                         temp = qh_completions(ehci, qh);
1526                         if (unlikely(temp)) {
1527                                 start_unlink_async(ehci, qh);
1528                         } else if (list_empty(&qh->qtd_list)
1529                                         && qh->qh_state == QH_STATE_LINKED) {
1530                                 qh->unlink_cycle = ehci->async_unlink_cycle;
1531                                 check_unlinks_later = true;
1532                         }
1533                 }
1534         }
1535
1536         /*
1537          * Unlink empty entries, reducing DMA usage as well
1538          * as HCD schedule-scanning costs.  Delay for any qh
1539          * we just scanned, there's a not-unusual case that it
1540          * doesn't stay idle for long.
1541          */
1542         if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1543                         !(ehci->enabled_hrtimer_events &
1544                                 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1545                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1546                 ++ehci->async_unlink_cycle;
1547         }
1548 }