drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* PID Codes that are used here, from EHCI specification, Table 3-16. */
  44 #define PID_CODE_IN    1
  45 #define PID_CODE_SETUP 2
  46
  47 /* fill a qtd, returning how much of the buffer we were able to queue up */
  48
  49 static int
  50 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  51                   size_t len, int token, int maxpacket)
  52 {
  53         int     i, count;
  54         u64     addr = buf;
  55
  56         /* one buffer entry per 4K ... first might be short or unaligned */
  57         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  58         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  59         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  60         if (likely (len < count))               /* ... iff needed */
  61                 count = len;
  62         else {
  63                 buf +=  0x1000;
  64                 buf &= ~0x0fff;
  65
  66                 /* per-qtd limit: from 16K to 20K (best alignment) */
  67                 for (i = 1; count < len && i < 5; i++) {
  68                         addr = buf;
  69                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  70                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  71                                         (u32)(addr >> 32));
  72                         buf += 0x1000;
  73                         if ((count + 0x1000) < len)
  74                                 count += 0x1000;
  75                         else
  76                                 count = len;
  77                 }
  78
  79                 /* short packets may only terminate transfers */
  80                 if (count != len)
  81                         count -= (count % maxpacket);
  82         }
  83         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  84         qtd->length = count;
  85
  86         return count;
  87 }
  88
  89 /*-------------------------------------------------------------------------*/
  90
  91 static inline void
  92 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  93 {
  94         struct ehci_qh_hw *hw = qh->hw;
  95
  96         /* writes to an active overlay are unsafe */
  97         WARN_ON(qh->qh_state != QH_STATE_IDLE);
  98
  99         hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
 100         hw->hw_alt_next = EHCI_LIST_END(ehci);
 101
 102         /* Except for control endpoints, we make hardware maintain data
 103          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
 104          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
 105          * ever clear it.
 106          */
 107         if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
 108                 unsigned        is_out, epnum;
 109
 110                 is_out = qh->is_out;
 111                 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
 112                 if (unlikely(!usb_gettoggle(qh->ps.udev, epnum, is_out))) {
 113                         hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 114                         usb_settoggle(qh->ps.udev, epnum, is_out, 1);
 115                 }
 116         }
 117
 118         hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 119 }
 120
 121 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 122  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 123  * recovery (including urb dequeue) would need software changes to a QH...
 124  */
 125 static void
 126 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 127 {
 128         struct ehci_qtd *qtd;
 129
 130         qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
 131
 132         /*
 133          * first qtd may already be partially processed.
 134          * If we come here during unlink, the QH overlay region
 135          * might have reference to the just unlinked qtd. The
 136          * qtd is updated in qh_completions(). Update the QH
 137          * overlay here.
 138          */
 139         if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
 140                 qh->hw->hw_qtd_next = qtd->hw_next;
 141                 if (qh->should_be_inactive)
 142                         ehci_warn(ehci, "qh %p should be inactive!\n", qh);
 143         } else {
 144                 qh_update(ehci, qh, qtd);
 145         }
 146         qh->should_be_inactive = 0;
 147 }
 148
 149 /*-------------------------------------------------------------------------*/
 150
 151 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
 152
 153 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
 154                 struct usb_host_endpoint *ep)
 155 {
 156         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 157         struct ehci_qh          *qh = ep->hcpriv;
 158         unsigned long           flags;
 159
 160         spin_lock_irqsave(&ehci->lock, flags);
 161         qh->clearing_tt = 0;
 162         if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
 163                         && ehci->rh_state == EHCI_RH_RUNNING)
 164                 qh_link_async(ehci, qh);
 165         spin_unlock_irqrestore(&ehci->lock, flags);
 166 }
 167
 168 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
 169                 struct urb *urb, u32 token)
 170 {
 171
 172         /* If an async split transaction gets an error or is unlinked,
 173          * the TT buffer may be left in an indeterminate state.  We
 174          * have to clear the TT buffer.
 175          *
 176          * Note: this routine is never called for Isochronous transfers.
 177          */
 178         if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
 179 #ifdef CONFIG_DYNAMIC_DEBUG
 180                 struct usb_device *tt = urb->dev->tt->hub;
 181                 dev_dbg(&tt->dev,
 182                         "clear tt buffer port %d, a%d ep%d t%08x\n",
 183                         urb->dev->ttport, urb->dev->devnum,
 184                         usb_pipeendpoint(urb->pipe), token);
 185 #endif /* CONFIG_DYNAMIC_DEBUG */
 186                 if (!ehci_is_TDI(ehci)
 187                                 || urb->dev->tt->hub !=
 188                                    ehci_to_hcd(ehci)->self.root_hub) {
 189                         if (usb_hub_clear_tt_buffer(urb) == 0)
 190                                 qh->clearing_tt = 1;
 191                 } else {
 192
 193                         /* REVISIT ARC-derived cores don't clear the root
 194                          * hub TT buffer in this way...
 195                          */
 196                 }
 197         }
 198 }
 199
 200 static int qtd_copy_status (
 201         struct ehci_hcd *ehci,
 202         struct urb *urb,
 203         size_t length,
 204         u32 token
 205 )
 206 {
 207         int     status = -EINPROGRESS;
 208
 209         /* count IN/OUT bytes, not SETUP (even short packets) */
 210         if (likely(QTD_PID(token) != PID_CODE_SETUP))
 211                 urb->actual_length += length - QTD_LENGTH (token);
 212
 213         /* don't modify error codes */
 214         if (unlikely(urb->unlinked))
 215                 return status;
 216
 217         /* force cleanup after short read; not always an error */
 218         if (unlikely (IS_SHORT_READ (token)))
 219                 status = -EREMOTEIO;
 220
 221         /* serious "can't proceed" faults reported by the hardware */
 222         if (token & QTD_STS_HALT) {
 223                 if (token & QTD_STS_BABBLE) {
 224                         /* FIXME "must" disable babbling device's port too */
 225                         status = -EOVERFLOW;
 226                 /*
 227                  * When MMF is active and PID Code is IN, queue is halted.
 228                  * EHCI Specification, Table 4-13.
 229                  */
 230                 } else if ((token & QTD_STS_MMF) &&
 231                                         (QTD_PID(token) == PID_CODE_IN)) {
 232                         status = -EPROTO;
 233                 /* CERR nonzero + halt --> stall */
 234                 } else if (QTD_CERR(token)) {
 235                         status = -EPIPE;
 236
 237                 /* In theory, more than one of the following bits can be set
 238                  * since they are sticky and the transaction is retried.
 239                  * Which to test first is rather arbitrary.
 240                  */
 241                 } else if (token & QTD_STS_MMF) {
 242                         /* fs/ls interrupt xfer missed the complete-split */
 243                         status = -EPROTO;
 244                 } else if (token & QTD_STS_DBE) {
 245                         status = (QTD_PID (token) == 1) /* IN ? */
 246                                 ? -ENOSR  /* hc couldn't read data */
 247                                 : -ECOMM; /* hc couldn't write data */
 248                 } else if (token & QTD_STS_XACT) {
 249                         /* timeout, bad CRC, wrong PID, etc */
 250                         ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
 251                                 urb->dev->devpath,
 252                                 usb_pipeendpoint(urb->pipe),
 253                                 usb_pipein(urb->pipe) ? "in" : "out");
 254                         status = -EPROTO;
 255                 } else {        /* unknown */
 256                         status = -EPROTO;
 257                 }
 258         }
 259
 260         return status;
 261 }
 262
 263 static void
 264 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
 265 {
 266         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
 267                 /* ... update hc-wide periodic stats */
 268                 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 269         }
 270
 271         if (unlikely(urb->unlinked)) {
 272                 COUNT(ehci->stats.unlink);
 273         } else {
 274                 /* report non-error and short read status as zero */
 275                 if (status == -EINPROGRESS || status == -EREMOTEIO)
 276                         status = 0;
 277                 COUNT(ehci->stats.complete);
 278         }
 279
 280 #ifdef EHCI_URB_TRACE
 281         ehci_dbg (ehci,
 282                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 283                 __func__, urb->dev->devpath, urb,
 284                 usb_pipeendpoint (urb->pipe),
 285                 usb_pipein (urb->pipe) ? "in" : "out",
 286                 status,
 287                 urb->actual_length, urb->transfer_buffer_length);
 288 #endif
 289
 290         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 291         usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
 292 }
 293
 294 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 295
 296 /*
 297  * Process and free completed qtds for a qh, returning URBs to drivers.
 298  * Chases up to qh->hw_current.  Returns nonzero if the caller should
 299  * unlink qh.
 300  */
 301 static unsigned
 302 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 303 {
 304         struct ehci_qtd         *last, *end = qh->dummy;
 305         struct list_head        *entry, *tmp;
 306         int                     last_status;
 307         int                     stopped;
 308         u8                      state;
 309         struct ehci_qh_hw       *hw = qh->hw;
 310
 311         /* completions (or tasks on other cpus) must never clobber HALT
 312          * till we've gone through and cleaned everything up, even when
 313          * they add urbs to this qh's queue or mark them for unlinking.
 314          *
 315          * NOTE:  unlinking expects to be done in queue order.
 316          *
 317          * It's a bug for qh->qh_state to be anything other than
 318          * QH_STATE_IDLE, unless our caller is scan_async() or
 319          * scan_intr().
 320          */
 321         state = qh->qh_state;
 322         qh->qh_state = QH_STATE_COMPLETING;
 323         stopped = (state == QH_STATE_IDLE);
 324
 325  rescan:
 326         last = NULL;
 327         last_status = -EINPROGRESS;
 328         qh->dequeue_during_giveback = 0;
 329
 330         /* remove de-activated QTDs from front of queue.
 331          * after faults (including short reads), cleanup this urb
 332          * then let the queue advance.
 333          * if queue is stopped, handles unlinks.
 334          */
 335         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 336                 struct ehci_qtd *qtd;
 337                 struct urb      *urb;
 338                 u32             token = 0;
 339
 340                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 341                 urb = qtd->urb;
 342
 343                 /* clean up any state from previous QTD ...*/
 344                 if (last) {
 345                         if (likely (last->urb != urb)) {
 346                                 ehci_urb_done(ehci, last->urb, last_status);
 347                                 last_status = -EINPROGRESS;
 348                         }
 349                         ehci_qtd_free (ehci, last);
 350                         last = NULL;
 351                 }
 352
 353                 /* ignore urbs submitted during completions we reported */
 354                 if (qtd == end)
 355                         break;
 356
 357                 /* hardware copies qtd out of qh overlay */
 358                 rmb ();
 359                 token = hc32_to_cpu(ehci, qtd->hw_token);
 360
 361                 /* always clean up qtds the hc de-activated */
 362  retry_xacterr:
 363                 if ((token & QTD_STS_ACTIVE) == 0) {
 364
 365                         /* Report Data Buffer Error: non-fatal but useful */
 366                         if (token & QTD_STS_DBE)
 367                                 ehci_dbg(ehci,
 368                                         "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 369                                         urb,
 370                                         usb_endpoint_num(&urb->ep->desc),
 371                                         usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
 372                                         urb->transfer_buffer_length,
 373                                         qtd,
 374                                         qh);
 375
 376                         /* on STALL, error, and short reads this urb must
 377                          * complete and all its qtds must be recycled.
 378                          */
 379                         if ((token & QTD_STS_HALT) != 0) {
 380
 381                                 /* retry transaction errors until we
 382                                  * reach the software xacterr limit
 383                                  */
 384                                 if ((token & QTD_STS_XACT) &&
 385                                                 QTD_CERR(token) == 0 &&
 386                                                 ++qh->xacterrs < QH_XACTERR_MAX &&
 387                                                 !urb->unlinked) {
 388                                         ehci_dbg(ehci,
 389         "detected XactErr len %zu/%zu retry %d\n",
 390         qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
 391
 392                                         /* reset the token in the qtd and the
 393                                          * qh overlay (which still contains
 394                                          * the qtd) so that we pick up from
 395                                          * where we left off
 396                                          */
 397                                         token &= ~QTD_STS_HALT;
 398                                         token |= QTD_STS_ACTIVE |
 399                                                         (EHCI_TUNE_CERR << 10);
 400                                         qtd->hw_token = cpu_to_hc32(ehci,
 401                                                         token);
 402                                         wmb();
 403                                         hw->hw_token = cpu_to_hc32(ehci,
 404                                                         token);
 405                                         goto retry_xacterr;
 406                                 }
 407                                 stopped = 1;
 408                                 qh->unlink_reason |= QH_UNLINK_HALTED;
 409
 410                         /* magic dummy for some short reads; qh won't advance.
 411                          * that silicon quirk can kick in with this dummy too.
 412                          *
 413                          * other short reads won't stop the queue, including
 414                          * control transfers (status stage handles that) or
 415                          * most other single-qtd reads ... the queue stops if
 416                          * URB_SHORT_NOT_OK was set so the driver submitting
 417                          * the urbs could clean it up.
 418                          */
 419                         } else if (IS_SHORT_READ (token)
 420                                         && !(qtd->hw_alt_next
 421                                                 & EHCI_LIST_END(ehci))) {
 422                                 stopped = 1;
 423                                 qh->unlink_reason |= QH_UNLINK_SHORT_READ;
 424                         }
 425
 426                 /* stop scanning when we reach qtds the hc is using */
 427                 } else if (likely (!stopped
 428                                 && ehci->rh_state >= EHCI_RH_RUNNING)) {
 429                         break;
 430
 431                 /* scan the whole queue for unlinks whenever it stops */
 432                 } else {
 433                         stopped = 1;
 434
 435                         /* cancel everything if we halt, suspend, etc */
 436                         if (ehci->rh_state < EHCI_RH_RUNNING) {
 437                                 last_status = -ESHUTDOWN;
 438                                 qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
 439                         }
 440
 441                         /* this qtd is active; skip it unless a previous qtd
 442                          * for its urb faulted, or its urb was canceled.
 443                          */
 444                         else if (last_status == -EINPROGRESS && !urb->unlinked)
 445                                 continue;
 446
 447                         /*
 448                          * If this was the active qtd when the qh was unlinked
 449                          * and the overlay's token is active, then the overlay
 450                          * hasn't been written back to the qtd yet so use its
 451                          * token instead of the qtd's.  After the qtd is
 452                          * processed and removed, the overlay won't be valid
 453                          * any more.
 454                          */
 455                         if (state == QH_STATE_IDLE &&
 456                                         qh->qtd_list.next == &qtd->qtd_list &&
 457                                         (hw->hw_token & ACTIVE_BIT(ehci))) {
 458                                 token = hc32_to_cpu(ehci, hw->hw_token);
 459                                 hw->hw_token &= ~ACTIVE_BIT(ehci);
 460                                 qh->should_be_inactive = 1;
 461
 462                                 /* An unlink may leave an incomplete
 463                                  * async transaction in the TT buffer.
 464                                  * We have to clear it.
 465                                  */
 466                                 ehci_clear_tt_buffer(ehci, qh, urb, token);
 467                         }
 468                 }
 469
 470                 /* unless we already know the urb's status, collect qtd status
 471                  * and update count of bytes transferred.  in common short read
 472                  * cases with only one data qtd (including control transfers),
 473                  * queue processing won't halt.  but with two or more qtds (for
 474                  * example, with a 32 KB transfer), when the first qtd gets a
 475                  * short read the second must be removed by hand.
 476                  */
 477                 if (last_status == -EINPROGRESS) {
 478                         last_status = qtd_copy_status(ehci, urb,
 479                                         qtd->length, token);
 480                         if (last_status == -EREMOTEIO
 481                                         && (qtd->hw_alt_next
 482                                                 & EHCI_LIST_END(ehci)))
 483                                 last_status = -EINPROGRESS;
 484
 485                         /* As part of low/full-speed endpoint-halt processing
 486                          * we must clear the TT buffer (11.17.5).
 487                          */
 488                         if (unlikely(last_status != -EINPROGRESS &&
 489                                         last_status != -EREMOTEIO)) {
 490                                 /* The TT's in some hubs malfunction when they
 491                                  * receive this request following a STALL (they
 492                                  * stop sending isochronous packets).  Since a
 493                                  * STALL can't leave the TT buffer in a busy
 494                                  * state (if you believe Figures 11-48 - 11-51
 495                                  * in the USB 2.0 spec), we won't clear the TT
 496                                  * buffer in this case.  Strictly speaking this
 497                                  * is a violation of the spec.
 498                                  */
 499                                 if (last_status != -EPIPE)
 500                                         ehci_clear_tt_buffer(ehci, qh, urb,
 501                                                         token);
 502                         }
 503                 }
 504
 505                 /* if we're removing something not at the queue head,
 506                  * patch the hardware queue pointer.
 507                  */
 508                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 509                         last = list_entry (qtd->qtd_list.prev,
 510                                         struct ehci_qtd, qtd_list);
 511                         last->hw_next = qtd->hw_next;
 512                 }
 513
 514                 /* remove qtd; it's recycled after possible urb completion */
 515                 list_del (&qtd->qtd_list);
 516                 last = qtd;
 517
 518                 /* reinit the xacterr counter for the next qtd */
 519                 qh->xacterrs = 0;
 520         }
 521
 522         /* last urb's completion might still need calling */
 523         if (likely (last != NULL)) {
 524                 ehci_urb_done(ehci, last->urb, last_status);
 525                 ehci_qtd_free (ehci, last);
 526         }
 527
 528         /* Do we need to rescan for URBs dequeued during a giveback? */
 529         if (unlikely(qh->dequeue_during_giveback)) {
 530                 /* If the QH is already unlinked, do the rescan now. */
 531                 if (state == QH_STATE_IDLE)
 532                         goto rescan;
 533
 534                 /* Otherwise the caller must unlink the QH. */
 535         }
 536
 537         /* restore original state; caller must unlink or relink */
 538         qh->qh_state = state;
 539
 540         /* be sure the hardware's done with the qh before refreshing
 541          * it after fault cleanup, or recovering from silicon wrongly
 542          * overlaying the dummy qtd (which reduces DMA chatter).
 543          *
 544          * We won't refresh a QH that's linked (after the HC
 545          * stopped the queue).  That avoids a race:
 546          *  - HC reads first part of QH;
 547          *  - CPU updates that first part and the token;
 548          *  - HC reads rest of that QH, including token
 549          * Result:  HC gets an inconsistent image, and then
 550          * DMAs to/from the wrong memory (corrupting it).
 551          *
 552          * That should be rare for interrupt transfers,
 553          * except maybe high bandwidth ...
 554          */
 555         if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
 556                 qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
 557
 558         /* Let the caller know if the QH needs to be unlinked. */
 559         return qh->unlink_reason;
 560 }
 561
 562 /*-------------------------------------------------------------------------*/
 563
 564 /*
 565  * reverse of qh_urb_transaction:  free a list of TDs.
 566  * used for cleanup after errors, before HC sees an URB's TDs.
 567  */
 568 static void qtd_list_free (
 569         struct ehci_hcd         *ehci,
 570         struct urb              *urb,
 571         struct list_head        *qtd_list
 572 ) {
 573         struct list_head        *entry, *temp;
 574
 575         list_for_each_safe (entry, temp, qtd_list) {
 576                 struct ehci_qtd *qtd;
 577
 578                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 579                 list_del (&qtd->qtd_list);
 580                 ehci_qtd_free (ehci, qtd);
 581         }
 582 }
 583
 584 /*
 585  * create a list of filled qtds for this URB; won't link into qh.
 586  */
 587 static struct list_head *
 588 qh_urb_transaction (
 589         struct ehci_hcd         *ehci,
 590         struct urb              *urb,
 591         struct list_head        *head,
 592         gfp_t                   flags
 593 ) {
 594         struct ehci_qtd         *qtd, *qtd_prev;
 595         dma_addr_t              buf;
 596         int                     len, this_sg_len, maxpacket;
 597         int                     is_input;
 598         u32                     token;
 599         int                     i;
 600         struct scatterlist      *sg;
 601
 602         /*
 603          * URBs map to sequences of QTDs:  one logical transaction
 604          */
 605         qtd = ehci_qtd_alloc (ehci, flags);
 606         if (unlikely (!qtd))
 607                 return NULL;
 608         list_add_tail (&qtd->qtd_list, head);
 609         qtd->urb = urb;
 610
 611         token = QTD_STS_ACTIVE;
 612         token |= (EHCI_TUNE_CERR << 10);
 613         /* for split transactions, SplitXState initialized to zero */
 614
 615         len = urb->transfer_buffer_length;
 616         is_input = usb_pipein (urb->pipe);
 617         if (usb_pipecontrol (urb->pipe)) {
 618                 /* SETUP pid */
 619                 qtd_fill(ehci, qtd, urb->setup_dma,
 620                                 sizeof (struct usb_ctrlrequest),
 621                                 token | (2 /* "setup" */ << 8), 8);
 622
 623                 /* ... and always at least one more pid */
 624                 token ^= QTD_TOGGLE;
 625                 qtd_prev = qtd;
 626                 qtd = ehci_qtd_alloc (ehci, flags);
 627                 if (unlikely (!qtd))
 628                         goto cleanup;
 629                 qtd->urb = urb;
 630                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 631                 list_add_tail (&qtd->qtd_list, head);
 632
 633                 /* for zero length DATA stages, STATUS is always IN */
 634                 if (len == 0)
 635                         token |= (1 /* "in" */ << 8);
 636         }
 637
 638         /*
 639          * data transfer stage:  buffer setup
 640          */
 641         i = urb->num_mapped_sgs;
 642         if (len > 0 && i > 0) {
 643                 sg = urb->sg;
 644                 buf = sg_dma_address(sg);
 645
 646                 /* urb->transfer_buffer_length may be smaller than the
 647                  * size of the scatterlist (or vice versa)
 648                  */
 649                 this_sg_len = min_t(int, sg_dma_len(sg), len);
 650         } else {
 651                 sg = NULL;
 652                 buf = urb->transfer_dma;
 653                 this_sg_len = len;
 654         }
 655
 656         if (is_input)
 657                 token |= (1 /* "in" */ << 8);
 658         /* else it's already initted to "out" pid (0 << 8) */
 659
 660         maxpacket = usb_maxpacket(urb->dev, urb->pipe, !is_input);
 661
 662         /*
 663          * buffer gets wrapped in one or more qtds;
 664          * last one may be "short" (including zero len)
 665          * and may serve as a control status ack
 666          */
 667         for (;;) {
 668                 int this_qtd_len;
 669
 670                 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
 671                                 maxpacket);
 672                 this_sg_len -= this_qtd_len;
 673                 len -= this_qtd_len;
 674                 buf += this_qtd_len;
 675
 676                 /*
 677                  * short reads advance to a "magic" dummy instead of the next
 678                  * qtd ... that forces the queue to stop, for manual cleanup.
 679                  * (this will usually be overridden later.)
 680                  */
 681                 if (is_input)
 682                         qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
 683
 684                 /* qh makes control packets use qtd toggle; maybe switch it */
 685                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 686                         token ^= QTD_TOGGLE;
 687
 688                 if (likely(this_sg_len <= 0)) {
 689                         if (--i <= 0 || len <= 0)
 690                                 break;
 691                         sg = sg_next(sg);
 692                         buf = sg_dma_address(sg);
 693                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 694                 }
 695
 696                 qtd_prev = qtd;
 697                 qtd = ehci_qtd_alloc (ehci, flags);
 698                 if (unlikely (!qtd))
 699                         goto cleanup;
 700                 qtd->urb = urb;
 701                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 702                 list_add_tail (&qtd->qtd_list, head);
 703         }
 704
 705         /*
 706          * unless the caller requires manual cleanup after short reads,
 707          * have the alt_next mechanism keep the queue running after the
 708          * last data qtd (the only one, for control and most other cases).
 709          */
 710         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 711                                 || usb_pipecontrol (urb->pipe)))
 712                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 713
 714         /*
 715          * control requests may need a terminating data "status" ack;
 716          * other OUT ones may need a terminating short packet
 717          * (zero length).
 718          */
 719         if (likely (urb->transfer_buffer_length != 0)) {
 720                 int     one_more = 0;
 721
 722                 if (usb_pipecontrol (urb->pipe)) {
 723                         one_more = 1;
 724                         token ^= 0x0100;        /* "in" <--> "out"  */
 725                         token |= QTD_TOGGLE;    /* force DATA1 */
 726                 } else if (usb_pipeout(urb->pipe)
 727                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 728                                 && !(urb->transfer_buffer_length % maxpacket)) {
 729                         one_more = 1;
 730                 }
 731                 if (one_more) {
 732                         qtd_prev = qtd;
 733                         qtd = ehci_qtd_alloc (ehci, flags);
 734                         if (unlikely (!qtd))
 735                                 goto cleanup;
 736                         qtd->urb = urb;
 737                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 738                         list_add_tail (&qtd->qtd_list, head);
 739
 740                         /* never any data in such packets */
 741                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 742                 }
 743         }
 744
 745         /* by default, enable interrupt on urb completion */
 746         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 747                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 748         return head;
 749
 750 cleanup:
 751         qtd_list_free (ehci, urb, head);
 752         return NULL;
 753 }
 754
 755 /*-------------------------------------------------------------------------*/
 756
 757 // Would be best to create all qh's from config descriptors,
 758 // when each interface/altsetting is established.  Unlink
 759 // any previous qh and cancel its urbs first; endpoints are
 760 // implicitly reset then (data toggle too).
 761 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 762
 763
 764 /*
 765  * Each QH holds a qtd list; a QH is used for everything except iso.
 766  *
 767  * For interrupt urbs, the scheduler must set the microframe scheduling
 768  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 769  * just one microframe in the s-mask.  For split interrupt transactions
 770  * there are additional complications: c-mask, maybe FSTNs.
 771  */
 772 static struct ehci_qh *
 773 qh_make (
 774         struct ehci_hcd         *ehci,
 775         struct urb              *urb,
 776         gfp_t                   flags
 777 ) {
 778         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 779         struct usb_host_endpoint *ep;
 780         u32                     info1 = 0, info2 = 0;
 781         int                     is_input, type;
 782         int                     maxp = 0;
 783         int                     mult;
 784         struct usb_tt           *tt = urb->dev->tt;
 785         struct ehci_qh_hw       *hw;
 786
 787         if (!qh)
 788                 return qh;
 789
 790         /*
 791          * init endpoint/device data for this QH
 792          */
 793         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 794         info1 |= usb_pipedevice (urb->pipe) << 0;
 795
 796         is_input = usb_pipein (urb->pipe);
 797         type = usb_pipetype (urb->pipe);
 798         ep = usb_pipe_endpoint (urb->dev, urb->pipe);
 799         maxp = usb_endpoint_maxp (&ep->desc);
 800         mult = usb_endpoint_maxp_mult (&ep->desc);
 801
 802         /* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
 803          * acts like up to 3KB, but is built from smaller packets.
 804          */
 805         if (maxp > 1024) {
 806                 ehci_dbg(ehci, "bogus qh maxpacket %d\n", maxp);
 807                 goto done;
 808         }
 809
 810         /* Compute interrupt scheduling parameters just once, and save.
 811          * - allowing for high bandwidth, how many nsec/uframe are used?
 812          * - split transactions need a second CSPLIT uframe; same question
 813          * - splits also need a schedule gap (for full/low speed I/O)
 814          * - qh has a polling interval
 815          *
 816          * For control/bulk requests, the HC or TT handles these.
 817          */
 818         if (type == PIPE_INTERRUPT) {
 819                 unsigned        tmp;
 820
 821                 qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
 822                                 is_input, 0, mult * maxp));
 823                 qh->ps.phase = NO_FRAME;
 824
 825                 if (urb->dev->speed == USB_SPEED_HIGH) {
 826                         qh->ps.c_usecs = 0;
 827                         qh->gap_uf = 0;
 828
 829                         if (urb->interval > 1 && urb->interval < 8) {
 830                                 /* NOTE interval 2 or 4 uframes could work.
 831                                  * But interval 1 scheduling is simpler, and
 832                                  * includes high bandwidth.
 833                                  */
 834                                 urb->interval = 1;
 835                         } else if (urb->interval > ehci->periodic_size << 3) {
 836                                 urb->interval = ehci->periodic_size << 3;
 837                         }
 838                         qh->ps.period = urb->interval >> 3;
 839
 840                         /* period for bandwidth allocation */
 841                         tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
 842                                         1 << (urb->ep->desc.bInterval - 1));
 843
 844                         /* Allow urb->interval to override */
 845                         qh->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
 846                         qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
 847                 } else {
 848                         int             think_time;
 849
 850                         /* gap is f(FS/LS transfer times) */
 851                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 852                                         is_input, 0, maxp) / (125 * 1000);
 853
 854                         /* FIXME this just approximates SPLIT/CSPLIT times */
 855                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 856                                 qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
 857                                 qh->ps.usecs = HS_USECS(1);
 858                         } else {                // SPLIT+DATA, gap, CSPLIT
 859                                 qh->ps.usecs += HS_USECS(1);
 860                                 qh->ps.c_usecs = HS_USECS(0);
 861                         }
 862
 863                         think_time = tt ? tt->think_time : 0;
 864                         qh->ps.tt_usecs = NS_TO_US(think_time +
 865                                         usb_calc_bus_time (urb->dev->speed,
 866                                         is_input, 0, maxp));
 867                         if (urb->interval > ehci->periodic_size)
 868                                 urb->interval = ehci->periodic_size;
 869                         qh->ps.period = urb->interval;
 870
 871                         /* period for bandwidth allocation */
 872                         tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
 873                                         urb->ep->desc.bInterval);
 874                         tmp = rounddown_pow_of_two(tmp);
 875
 876                         /* Allow urb->interval to override */
 877                         qh->ps.bw_period = min_t(unsigned, tmp, urb->interval);
 878                         qh->ps.bw_uperiod = qh->ps.bw_period << 3;
 879                 }
 880         }
 881
 882         /* support for tt scheduling, and access to toggles */
 883         qh->ps.udev = urb->dev;
 884         qh->ps.ep = urb->ep;
 885
 886         /* using TT? */
 887         switch (urb->dev->speed) {
 888         case USB_SPEED_LOW:
 889                 info1 |= QH_LOW_SPEED;
 890                 /* FALL THROUGH */
 891
 892         case USB_SPEED_FULL:
 893                 /* EPS 0 means "full" */
 894                 if (type != PIPE_INTERRUPT)
 895                         info1 |= (EHCI_TUNE_RL_TT << 28);
 896                 if (type == PIPE_CONTROL) {
 897                         info1 |= QH_CONTROL_EP;         /* for TT */
 898                         info1 |= QH_TOGGLE_CTL;         /* toggle from qtd */
 899                 }
 900                 info1 |= maxp << 16;
 901
 902                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 903
 904                 /* Some Freescale processors have an erratum in which the
 905                  * port number in the queue head was 0..N-1 instead of 1..N.
 906                  */
 907                 if (ehci_has_fsl_portno_bug(ehci))
 908                         info2 |= (urb->dev->ttport-1) << 23;
 909                 else
 910                         info2 |= urb->dev->ttport << 23;
 911
 912                 /* set the address of the TT; for TDI's integrated
 913                  * root hub tt, leave it zeroed.
 914                  */
 915                 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
 916                         info2 |= tt->hub->devnum << 16;
 917
 918                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 919
 920                 break;
 921
 922         case USB_SPEED_HIGH:            /* no TT involved */
 923                 info1 |= QH_HIGH_SPEED;
 924                 if (type == PIPE_CONTROL) {
 925                         info1 |= (EHCI_TUNE_RL_HS << 28);
 926                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 927                         info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
 928                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 929                 } else if (type == PIPE_BULK) {
 930                         info1 |= (EHCI_TUNE_RL_HS << 28);
 931                         /* The USB spec says that high speed bulk endpoints
 932                          * always use 512 byte maxpacket.  But some device
 933                          * vendors decided to ignore that, and MSFT is happy
 934                          * to help them do so.  So now people expect to use
 935                          * such nonconformant devices with Linux too; sigh.
 936                          */
 937                         info1 |= maxp << 16;
 938                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 939                 } else {                /* PIPE_INTERRUPT */
 940                         info1 |= maxp << 16;
 941                         info2 |= mult << 30;
 942                 }
 943                 break;
 944         default:
 945                 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
 946                         urb->dev->speed);
 947 done:
 948                 qh_destroy(ehci, qh);
 949                 return NULL;
 950         }
 951
 952         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 953
 954         /* init as live, toggle clear */
 955         qh->qh_state = QH_STATE_IDLE;
 956         hw = qh->hw;
 957         hw->hw_info1 = cpu_to_hc32(ehci, info1);
 958         hw->hw_info2 = cpu_to_hc32(ehci, info2);
 959         qh->is_out = !is_input;
 960         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 961         return qh;
 962 }
 963
 964 /*-------------------------------------------------------------------------*/
 965
 966 static void enable_async(struct ehci_hcd *ehci)
 967 {
 968         if (ehci->async_count++)
 969                 return;
 970
 971         /* Stop waiting to turn off the async schedule */
 972         ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
 973
 974         /* Don't start the schedule until ASS is 0 */
 975         ehci_poll_ASS(ehci);
 976         turn_on_io_watchdog(ehci);
 977 }
 978
 979 static void disable_async(struct ehci_hcd *ehci)
 980 {
 981         if (--ehci->async_count)
 982                 return;
 983
 984         /* The async schedule and unlink lists are supposed to be empty */
 985         WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
 986                         !list_empty(&ehci->async_idle));
 987
 988         /* Don't turn off the schedule until ASS is 1 */
 989         ehci_poll_ASS(ehci);
 990 }
 991
 992 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 993
 994 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 995 {
 996         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 997         struct ehci_qh  *head;
 998
 999         /* Don't link a QH if there's a Clear-TT-Buffer pending */
1000         if (unlikely(qh->clearing_tt))
1001                 return;
1002
1003         WARN_ON(qh->qh_state != QH_STATE_IDLE);
1004
1005         /* clear halt and/or toggle; and maybe recover from silicon quirk */
1006         qh_refresh(ehci, qh);
1007
1008         /* splice right after start */
1009         head = ehci->async;
1010         qh->qh_next = head->qh_next;
1011         qh->hw->hw_next = head->hw->hw_next;
1012         wmb ();
1013
1014         head->qh_next.qh = qh;
1015         head->hw->hw_next = dma;
1016
1017         qh->qh_state = QH_STATE_LINKED;
1018         qh->xacterrs = 0;
1019         qh->unlink_reason = 0;
1020         /* qtd completions reported later by interrupt */
1021
1022         enable_async(ehci);
1023 }
1024
1025 /*-------------------------------------------------------------------------*/
1026
1027 /*
1028  * For control/bulk/interrupt, return QH with these TDs appended.
1029  * Allocates and initializes the QH if necessary.
1030  * Returns null if it can't allocate a QH it needs to.
1031  * If the QH has TDs (urbs) already, that's great.
1032  */
1033 static struct ehci_qh *qh_append_tds (
1034         struct ehci_hcd         *ehci,
1035         struct urb              *urb,
1036         struct list_head        *qtd_list,
1037         int                     epnum,
1038         void                    **ptr
1039 )
1040 {
1041         struct ehci_qh          *qh = NULL;
1042         __hc32                  qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1043
1044         qh = (struct ehci_qh *) *ptr;
1045         if (unlikely (qh == NULL)) {
1046                 /* can't sleep here, we have ehci->lock... */
1047                 qh = qh_make (ehci, urb, GFP_ATOMIC);
1048                 *ptr = qh;
1049         }
1050         if (likely (qh != NULL)) {
1051                 struct ehci_qtd *qtd;
1052
1053                 if (unlikely (list_empty (qtd_list)))
1054                         qtd = NULL;
1055                 else
1056                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
1057                                         qtd_list);
1058
1059                 /* control qh may need patching ... */
1060                 if (unlikely (epnum == 0)) {
1061
1062                         /* usb_reset_device() briefly reverts to address 0 */
1063                         if (usb_pipedevice (urb->pipe) == 0)
1064                                 qh->hw->hw_info1 &= ~qh_addr_mask;
1065                 }
1066
1067                 /* just one way to queue requests: swap with the dummy qtd.
1068                  * only hc or qh_refresh() ever modify the overlay.
1069                  */
1070                 if (likely (qtd != NULL)) {
1071                         struct ehci_qtd         *dummy;
1072                         dma_addr_t              dma;
1073                         __hc32                  token;
1074
1075                         /* to avoid racing the HC, use the dummy td instead of
1076                          * the first td of our list (becomes new dummy).  both
1077                          * tds stay deactivated until we're done, when the
1078                          * HC is allowed to fetch the old dummy (4.10.2).
1079                          */
1080                         token = qtd->hw_token;
1081                         qtd->hw_token = HALT_BIT(ehci);
1082
1083                         dummy = qh->dummy;
1084
1085                         dma = dummy->qtd_dma;
1086                         *dummy = *qtd;
1087                         dummy->qtd_dma = dma;
1088
1089                         list_del (&qtd->qtd_list);
1090                         list_add (&dummy->qtd_list, qtd_list);
1091                         list_splice_tail(qtd_list, &qh->qtd_list);
1092
1093                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1094                         qh->dummy = qtd;
1095
1096                         /* hc must see the new dummy at list end */
1097                         dma = qtd->qtd_dma;
1098                         qtd = list_entry (qh->qtd_list.prev,
1099                                         struct ehci_qtd, qtd_list);
1100                         qtd->hw_next = QTD_NEXT(ehci, dma);
1101
1102                         /* let the hc process these next qtds */
1103                         wmb ();
1104                         dummy->hw_token = token;
1105
1106                         urb->hcpriv = qh;
1107                 }
1108         }
1109         return qh;
1110 }
1111
1112 /*-------------------------------------------------------------------------*/
1113
1114 static int
1115 submit_async (
1116         struct ehci_hcd         *ehci,
1117         struct urb              *urb,
1118         struct list_head        *qtd_list,
1119         gfp_t                   mem_flags
1120 ) {
1121         int                     epnum;
1122         unsigned long           flags;
1123         struct ehci_qh          *qh = NULL;
1124         int                     rc;
1125
1126         epnum = urb->ep->desc.bEndpointAddress;
1127
1128 #ifdef EHCI_URB_TRACE
1129         {
1130                 struct ehci_qtd *qtd;
1131                 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1132                 ehci_dbg(ehci,
1133                          "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1134                          __func__, urb->dev->devpath, urb,
1135                          epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1136                          urb->transfer_buffer_length,
1137                          qtd, urb->ep->hcpriv);
1138         }
1139 #endif
1140
1141         spin_lock_irqsave (&ehci->lock, flags);
1142         if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1143                 rc = -ESHUTDOWN;
1144                 goto done;
1145         }
1146         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1147         if (unlikely(rc))
1148                 goto done;
1149
1150         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1151         if (unlikely(qh == NULL)) {
1152                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1153                 rc = -ENOMEM;
1154                 goto done;
1155         }
1156
1157         /* Control/bulk operations through TTs don't need scheduling,
1158          * the HC and TT handle it when the TT has a buffer ready.
1159          */
1160         if (likely (qh->qh_state == QH_STATE_IDLE))
1161                 qh_link_async(ehci, qh);
1162  done:
1163         spin_unlock_irqrestore (&ehci->lock, flags);
1164         if (unlikely (qh == NULL))
1165                 qtd_list_free (ehci, urb, qtd_list);
1166         return rc;
1167 }
1168
1169 /*-------------------------------------------------------------------------*/
1170 #ifdef CONFIG_USB_HCD_TEST_MODE
1171 /*
1172  * This function creates the qtds and submits them for the
1173  * SINGLE_STEP_SET_FEATURE Test.
1174  * This is done in two parts: first SETUP req for GetDesc is sent then
1175  * 15 seconds later, the IN stage for GetDesc starts to req data from dev
1176  *
1177  * is_setup : i/p arguement decides which of the two stage needs to be
1178  * performed; TRUE - SETUP and FALSE - IN+STATUS
1179  * Returns 0 if success
1180  */
1181 static int submit_single_step_set_feature(
1182         struct usb_hcd  *hcd,
1183         struct urb      *urb,
1184         int             is_setup
1185 ) {
1186         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1187         struct list_head        qtd_list;
1188         struct list_head        *head;
1189
1190         struct ehci_qtd         *qtd, *qtd_prev;
1191         dma_addr_t              buf;
1192         int                     len, maxpacket;
1193         u32                     token;
1194
1195         INIT_LIST_HEAD(&qtd_list);
1196         head = &qtd_list;
1197
1198         /* URBs map to sequences of QTDs:  one logical transaction */
1199         qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
1200         if (unlikely(!qtd))
1201                 return -1;
1202         list_add_tail(&qtd->qtd_list, head);
1203         qtd->urb = urb;
1204
1205         token = QTD_STS_ACTIVE;
1206         token |= (EHCI_TUNE_CERR << 10);
1207
1208         len = urb->transfer_buffer_length;
1209         /*
1210          * Check if the request is to perform just the SETUP stage (getDesc)
1211          * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
1212          * 15 secs after the setup
1213          */
1214         if (is_setup) {
1215                 /* SETUP pid */
1216                 qtd_fill(ehci, qtd, urb->setup_dma,
1217                                 sizeof(struct usb_ctrlrequest),
1218                                 token | (2 /* "setup" */ << 8), 8);
1219
1220                 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
1221                 return 0; /*Return now; we shall come back after 15 seconds*/
1222         }
1223
1224         /*
1225          * IN: data transfer stage:  buffer setup : start the IN txn phase for
1226          * the get_Desc SETUP which was sent 15seconds back
1227          */
1228         token ^= QTD_TOGGLE;   /*We need to start IN with DATA-1 Pid-sequence*/
1229         buf = urb->transfer_dma;
1230
1231         token |= (1 /* "in" */ << 8);  /*This is IN stage*/
1232
1233         maxpacket = usb_maxpacket(urb->dev, urb->pipe, 0);
1234
1235         qtd_fill(ehci, qtd, buf, len, token, maxpacket);
1236
1237         /*
1238          * Our IN phase shall always be a short read; so keep the queue running
1239          * and let it advance to the next qtd which zero length OUT status
1240          */
1241         qtd->hw_alt_next = EHCI_LIST_END(ehci);
1242
1243         /* STATUS stage for GetDesc control request */
1244         token ^= 0x0100;        /* "in" <--> "out"  */
1245         token |= QTD_TOGGLE;    /* force DATA1 */
1246
1247         qtd_prev = qtd;
1248         qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
1249         if (unlikely(!qtd))
1250                 goto cleanup;
1251         qtd->urb = urb;
1252         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1253         list_add_tail(&qtd->qtd_list, head);
1254
1255         /* dont fill any data in such packets */
1256         qtd_fill(ehci, qtd, 0, 0, token, 0);
1257
1258         /* by default, enable interrupt on urb completion */
1259         if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
1260                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
1261
1262         submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
1263
1264         return 0;
1265
1266 cleanup:
1267         qtd_list_free(ehci, urb, head);
1268         return -1;
1269 }
1270 #endif /* CONFIG_USB_HCD_TEST_MODE */
1271
1272 /*-------------------------------------------------------------------------*/
1273
1274 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1275 {
1276         struct ehci_qh          *prev;
1277
1278         /* Add to the end of the list of QHs waiting for the next IAAD */
1279         qh->qh_state = QH_STATE_UNLINK_WAIT;
1280         list_add_tail(&qh->unlink_node, &ehci->async_unlink);
1281
1282         /* Unlink it from the schedule */
1283         prev = ehci->async;
1284         while (prev->qh_next.qh != qh)
1285                 prev = prev->qh_next.qh;
1286
1287         prev->hw->hw_next = qh->hw->hw_next;
1288         prev->qh_next = qh->qh_next;
1289         if (ehci->qh_scan_next == qh)
1290                 ehci->qh_scan_next = qh->qh_next.qh;
1291 }
1292
1293 static void start_iaa_cycle(struct ehci_hcd *ehci)
1294 {
1295         /* If the controller isn't running, we don't have to wait for it */
1296         if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1297                 end_unlink_async(ehci);
1298
1299         /* Otherwise start a new IAA cycle if one isn't already running */
1300         } else if (ehci->rh_state == EHCI_RH_RUNNING &&
1301                         !ehci->iaa_in_progress) {
1302
1303                 /* Make sure the unlinks are all visible to the hardware */
1304                 wmb();
1305
1306                 ehci_writel(ehci, ehci->command | CMD_IAAD,
1307                                 &ehci->regs->command);
1308                 ehci_readl(ehci, &ehci->regs->command);
1309                 ehci->iaa_in_progress = true;
1310                 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1311         }
1312 }
1313
1314 static void end_iaa_cycle(struct ehci_hcd *ehci)
1315 {
1316         if (ehci->has_synopsys_hc_bug)
1317                 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1318                             &ehci->regs->async_next);
1319
1320         /* The current IAA cycle has ended */
1321         ehci->iaa_in_progress = false;
1322
1323         end_unlink_async(ehci);
1324 }
1325
1326 /* See if the async qh for the qtds being unlinked are now gone from the HC */
1327
1328 static void end_unlink_async(struct ehci_hcd *ehci)
1329 {
1330         struct ehci_qh          *qh;
1331         bool                    early_exit;
1332
1333         if (list_empty(&ehci->async_unlink))
1334                 return;
1335         qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
1336                         unlink_node);   /* QH whose IAA cycle just ended */
1337
1338         /*
1339          * If async_unlinking is set then this routine is already running,
1340          * either on the stack or on another CPU.
1341          */
1342         early_exit = ehci->async_unlinking;
1343
1344         /* If the controller isn't running, process all the waiting QHs */
1345         if (ehci->rh_state < EHCI_RH_RUNNING)
1346                 list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
1347
1348         /*
1349          * Intel (?) bug: The HC can write back the overlay region even
1350          * after the IAA interrupt occurs.  In self-defense, always go
1351          * through two IAA cycles for each QH.
1352          */
1353         else if (qh->qh_state == QH_STATE_UNLINK) {
1354                 /*
1355                  * Second IAA cycle has finished.  Process only the first
1356                  * waiting QH (NVIDIA (?) bug).
1357                  */
1358                 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1359         }
1360
1361         /*
1362          * AMD/ATI (?) bug: The HC can continue to use an active QH long
1363          * after the IAA interrupt occurs.  To prevent problems, QHs that
1364          * may still be active will wait until 2 ms have passed with no
1365          * change to the hw_current and hw_token fields (this delay occurs
1366          * between the two IAA cycles).
1367          *
1368          * The EHCI spec (4.8.2) says that active QHs must not be removed
1369          * from the async schedule and recommends waiting until the QH
1370          * goes inactive.  This is ridiculous because the QH will _never_
1371          * become inactive if the endpoint NAKs indefinitely.
1372          */
1373
1374         /* Some reasons for unlinking guarantee the QH can't be active */
1375         else if (qh->unlink_reason & (QH_UNLINK_HALTED |
1376                         QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
1377                 goto DelayDone;
1378
1379         /* The QH can't be active if the queue was and still is empty... */
1380         else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
1381                         list_empty(&qh->qtd_list))
1382                 goto DelayDone;
1383
1384         /* ... or if the QH has halted */
1385         else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
1386                 goto DelayDone;
1387
1388         /* Otherwise we have to wait until the QH stops changing */
1389         else {
1390                 __hc32          qh_current, qh_token;
1391
1392                 qh_current = qh->hw->hw_current;
1393                 qh_token = qh->hw->hw_token;
1394                 if (qh_current != ehci->old_current ||
1395                                 qh_token != ehci->old_token) {
1396                         ehci->old_current = qh_current;
1397                         ehci->old_token = qh_token;
1398                         ehci_enable_event(ehci,
1399                                         EHCI_HRTIMER_ACTIVE_UNLINK, true);
1400                         return;
1401                 }
1402  DelayDone:
1403                 qh->qh_state = QH_STATE_UNLINK;
1404                 early_exit = true;
1405         }
1406         ehci->old_current = ~0;         /* Prepare for next QH */
1407
1408         /* Start a new IAA cycle if any QHs are waiting for it */
1409         if (!list_empty(&ehci->async_unlink))
1410                 start_iaa_cycle(ehci);
1411
1412         /*
1413          * Don't allow nesting or concurrent calls,
1414          * or wait for the second IAA cycle for the next QH.
1415          */
1416         if (early_exit)
1417                 return;
1418
1419         /* Process the idle QHs */
1420         ehci->async_unlinking = true;
1421         while (!list_empty(&ehci->async_idle)) {
1422                 qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
1423                                 unlink_node);
1424                 list_del(&qh->unlink_node);
1425
1426                 qh->qh_state = QH_STATE_IDLE;
1427                 qh->qh_next.qh = NULL;
1428
1429                 if (!list_empty(&qh->qtd_list))
1430                         qh_completions(ehci, qh);
1431                 if (!list_empty(&qh->qtd_list) &&
1432                                 ehci->rh_state == EHCI_RH_RUNNING)
1433                         qh_link_async(ehci, qh);
1434                 disable_async(ehci);
1435         }
1436         ehci->async_unlinking = false;
1437 }
1438
1439 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
1440
1441 static void unlink_empty_async(struct ehci_hcd *ehci)
1442 {
1443         struct ehci_qh          *qh;
1444         struct ehci_qh          *qh_to_unlink = NULL;
1445         int                     count = 0;
1446
1447         /* Find the last async QH which has been empty for a timer cycle */
1448         for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
1449                 if (list_empty(&qh->qtd_list) &&
1450                                 qh->qh_state == QH_STATE_LINKED) {
1451                         ++count;
1452                         if (qh->unlink_cycle != ehci->async_unlink_cycle)
1453                                 qh_to_unlink = qh;
1454                 }
1455         }
1456
1457         /* If nothing else is being unlinked, unlink the last empty QH */
1458         if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
1459                 qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
1460                 start_unlink_async(ehci, qh_to_unlink);
1461                 --count;
1462         }
1463
1464         /* Other QHs will be handled later */
1465         if (count > 0) {
1466                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1467                 ++ehci->async_unlink_cycle;
1468         }
1469 }
1470
1471 #ifdef  CONFIG_PM
1472
1473 /* The root hub is suspended; unlink all the async QHs */
1474 static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
1475 {
1476         struct ehci_qh          *qh;
1477
1478         while (ehci->async->qh_next.qh) {
1479                 qh = ehci->async->qh_next.qh;
1480                 WARN_ON(!list_empty(&qh->qtd_list));
1481                 single_unlink_async(ehci, qh);
1482         }
1483 }
1484
1485 #endif
1486
1487 /* makes sure the async qh will become idle */
1488 /* caller must own ehci->lock */
1489
1490 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1491 {
1492         /* If the QH isn't linked then there's nothing we can do. */
1493         if (qh->qh_state != QH_STATE_LINKED)
1494                 return;
1495
1496         single_unlink_async(ehci, qh);
1497         start_iaa_cycle(ehci);
1498 }
1499
1500 /*-------------------------------------------------------------------------*/
1501
1502 static void scan_async (struct ehci_hcd *ehci)
1503 {
1504         struct ehci_qh          *qh;
1505         bool                    check_unlinks_later = false;
1506
1507         ehci->qh_scan_next = ehci->async->qh_next.qh;
1508         while (ehci->qh_scan_next) {
1509                 qh = ehci->qh_scan_next;
1510                 ehci->qh_scan_next = qh->qh_next.qh;
1511
1512                 /* clean any finished work for this qh */
1513                 if (!list_empty(&qh->qtd_list)) {
1514                         int temp;
1515
1516                         /*
1517                          * Unlinks could happen here; completion reporting
1518                          * drops the lock.  That's why ehci->qh_scan_next
1519                          * always holds the next qh to scan; if the next qh
1520                          * gets unlinked then ehci->qh_scan_next is adjusted
1521                          * in single_unlink_async().
1522                          */
1523                         temp = qh_completions(ehci, qh);
1524                         if (unlikely(temp)) {
1525                                 start_unlink_async(ehci, qh);
1526                         } else if (list_empty(&qh->qtd_list)
1527                                         && qh->qh_state == QH_STATE_LINKED) {
1528                                 qh->unlink_cycle = ehci->async_unlink_cycle;
1529                                 check_unlinks_later = true;
1530                         }
1531                 }
1532         }
1533
1534         /*
1535          * Unlink empty entries, reducing DMA usage as well
1536          * as HCD schedule-scanning costs.  Delay for any qh
1537          * we just scanned, there's a not-unusual case that it
1538          * doesn't stay idle for long.
1539          */
1540         if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1541                         !(ehci->enabled_hrtimer_events &
1542                                 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1543                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1544                 ++ehci->async_unlink_cycle;
1545         }
1546 }