2 * Enhanced Host Controller Interface (EHCI) driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * Copyright (c) 2000-2004 by David Brownell
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/usb/otg.h>
39 #include <linux/moduleparam.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/debugfs.h>
42 #include <linux/slab.h>
44 #include <asm/byteorder.h>
47 #include <asm/unaligned.h>
49 #if defined(CONFIG_PPC_PS3)
50 #include <asm/firmware.h>
53 /*-------------------------------------------------------------------------*/
56 * EHCI hc_driver implementation ... experimental, incomplete.
57 * Based on the final 1.0 register interface specification.
59 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
60 * First was PCMCIA, like ISA; then CardBus, which is PCI.
61 * Next comes "CardBay", using USB 2.0 signals.
63 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
64 * Special thanks to Intel and VIA for providing host controllers to
65 * test this driver on, and Cypress (including In-System Design) for
66 * providing early devices for those host controllers to talk to!
69 #define DRIVER_AUTHOR "David Brownell"
70 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
72 static const char hcd_name [] = "ehci_hcd";
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT 0
81 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT 1
84 * Some drivers think it's safe to schedule isochronous transfers more than
85 * 256 ms into the future (partly as a result of an old bug in the scheduling
86 * code). In an attempt to avoid trouble, we will use a minimum scheduling
87 * length of 512 frames instead of 256.
89 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
91 /* Initial IRQ latency: faster than hw default */
92 static int log2_irq_thresh = 0; // 0 to 6
93 module_param (log2_irq_thresh, int, S_IRUGO);
94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
96 /* initial park setting: slower than hw default */
97 static unsigned park = 0;
98 module_param (park, uint, S_IRUGO);
99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
101 /* for flakey hardware, ignore overcurrent indicators */
102 static bool ignore_oc;
103 module_param (ignore_oc, bool, S_IRUGO);
104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
108 /*-------------------------------------------------------------------------*/
111 #include "pci-quirks.h"
113 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
117 * The MosChip MCS9990 controller updates its microframe counter
118 * a little before the frame counter, and occasionally we will read
119 * the invalid intermediate value. Avoid problems by checking the
120 * microframe number (the low-order 3 bits); if they are 0 then
121 * re-read the register to get the correct value.
123 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
127 uf = ehci_readl(ehci, &ehci->regs->frame_index);
128 if (unlikely((uf & 7) == 0))
129 uf = ehci_readl(ehci, &ehci->regs->frame_index);
133 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
135 if (ehci->frame_index_bug)
136 return ehci_moschip_read_frame_index(ehci);
137 return ehci_readl(ehci, &ehci->regs->frame_index);
140 #include "ehci-dbg.c"
142 /*-------------------------------------------------------------------------*/
145 * ehci_handshake - spin reading hc until handshake completes or fails
146 * @ptr: address of hc register to be read
147 * @mask: bits to look at in result of read
148 * @done: value of those bits when handshake succeeds
149 * @usec: timeout in microseconds
151 * Returns negative errno, or zero on success
153 * Success happens when the "mask" bits have the specified value (hardware
154 * handshake done). There are two failure modes: "usec" have passed (major
155 * hardware flakeout), or the register reads as all-ones (hardware removed).
157 * That last failure should_only happen in cases like physical cardbus eject
158 * before driver shutdown. But it also seems to be caused by bugs in cardbus
159 * bridge shutdown: shutting down the bridge before the devices using it.
161 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
162 u32 mask, u32 done, int usec)
167 result = ehci_readl(ehci, ptr);
168 if (result == ~(u32)0) /* card removed */
178 EXPORT_SYMBOL_GPL(ehci_handshake);
180 /* check TDI/ARC silicon is in host mode */
181 static int tdi_in_host_mode (struct ehci_hcd *ehci)
185 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
186 return (tmp & 3) == USBMODE_CM_HC;
190 * Force HC to halt state from unknown (EHCI spec section 2.3).
191 * Must be called with interrupts enabled and the lock not held.
193 static int ehci_halt (struct ehci_hcd *ehci)
197 spin_lock_irq(&ehci->lock);
199 /* disable any irqs left enabled by previous code */
200 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
202 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
203 spin_unlock_irq(&ehci->lock);
208 * This routine gets called during probe before ehci->command
209 * has been initialized, so we can't rely on its value.
211 ehci->command &= ~CMD_RUN;
212 temp = ehci_readl(ehci, &ehci->regs->command);
213 temp &= ~(CMD_RUN | CMD_IAAD);
214 ehci_writel(ehci, temp, &ehci->regs->command);
216 spin_unlock_irq(&ehci->lock);
217 synchronize_irq(ehci_to_hcd(ehci)->irq);
219 return ehci_handshake(ehci, &ehci->regs->status,
220 STS_HALT, STS_HALT, 16 * 125);
223 /* put TDI/ARC silicon into EHCI mode */
224 static void tdi_reset (struct ehci_hcd *ehci)
228 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
229 tmp |= USBMODE_CM_HC;
230 /* The default byte access to MMR space is LE after
231 * controller reset. Set the required endian mode
232 * for transfer buffers to match the host microprocessor
234 if (ehci_big_endian_mmio(ehci))
236 ehci_writel(ehci, tmp, &ehci->regs->usbmode);
240 * Reset a non-running (STS_HALT == 1) controller.
241 * Must be called with interrupts enabled and the lock not held.
243 int ehci_reset(struct ehci_hcd *ehci)
246 u32 command = ehci_readl(ehci, &ehci->regs->command);
248 /* If the EHCI debug controller is active, special care must be
249 * taken before and after a host controller reset */
250 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
253 command |= CMD_RESET;
254 dbg_cmd (ehci, "reset", command);
255 ehci_writel(ehci, command, &ehci->regs->command);
256 ehci->rh_state = EHCI_RH_HALTED;
257 ehci->next_statechange = jiffies;
258 retval = ehci_handshake(ehci, &ehci->regs->command,
259 CMD_RESET, 0, 250 * 1000);
261 if (ehci->has_hostpc) {
262 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
263 &ehci->regs->usbmode_ex);
264 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
269 if (ehci_is_TDI(ehci))
273 dbgp_external_startup(ehci_to_hcd(ehci));
275 ehci->port_c_suspend = ehci->suspended_ports =
276 ehci->resuming_ports = 0;
279 EXPORT_SYMBOL_GPL(ehci_reset);
282 * Idle the controller (turn off the schedules).
283 * Must be called with interrupts enabled and the lock not held.
285 static void ehci_quiesce (struct ehci_hcd *ehci)
289 if (ehci->rh_state != EHCI_RH_RUNNING)
292 /* wait for any schedule enables/disables to take effect */
293 temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
294 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
297 /* then disable anything that's still active */
298 spin_lock_irq(&ehci->lock);
299 ehci->command &= ~(CMD_ASE | CMD_PSE);
300 ehci_writel(ehci, ehci->command, &ehci->regs->command);
301 spin_unlock_irq(&ehci->lock);
303 /* hardware can take 16 microframes to turn off ... */
304 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
308 /*-------------------------------------------------------------------------*/
310 static void end_iaa_cycle(struct ehci_hcd *ehci);
311 static void end_unlink_async(struct ehci_hcd *ehci);
312 static void unlink_empty_async(struct ehci_hcd *ehci);
313 static void ehci_work(struct ehci_hcd *ehci);
314 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
315 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
316 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
318 #include "ehci-timer.c"
319 #include "ehci-hub.c"
320 #include "ehci-mem.c"
322 #include "ehci-sched.c"
323 #include "ehci-sysfs.c"
325 /*-------------------------------------------------------------------------*/
327 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
328 * The firmware seems to think that powering off is a wakeup event!
329 * This routine turns off remote wakeup and everything else, on all ports.
331 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
333 int port = HCS_N_PORTS(ehci->hcs_params);
336 spin_unlock_irq(&ehci->lock);
337 ehci_port_power(ehci, port, false);
338 spin_lock_irq(&ehci->lock);
339 ehci_writel(ehci, PORT_RWC_BITS,
340 &ehci->regs->port_status[port]);
345 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
346 * Must be called with interrupts enabled and the lock not held.
348 static void ehci_silence_controller(struct ehci_hcd *ehci)
352 spin_lock_irq(&ehci->lock);
353 ehci->rh_state = EHCI_RH_HALTED;
354 ehci_turn_off_all_ports(ehci);
356 /* make BIOS/etc use companion controller during reboot */
357 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
359 /* unblock posted writes */
360 ehci_readl(ehci, &ehci->regs->configured_flag);
361 spin_unlock_irq(&ehci->lock);
364 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
365 * This forcibly disables dma and IRQs, helping kexec and other cases
366 * where the next system software may expect clean state.
368 static void ehci_shutdown(struct usb_hcd *hcd)
370 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
373 * Protect the system from crashing at system shutdown in cases where
374 * usb host is not added yet from OTG controller driver.
375 * As ehci_setup() not done yet, so stop accessing registers or
376 * variables initialized in ehci_setup()
381 spin_lock_irq(&ehci->lock);
382 ehci->shutdown = true;
383 ehci->rh_state = EHCI_RH_STOPPING;
384 ehci->enabled_hrtimer_events = 0;
385 spin_unlock_irq(&ehci->lock);
387 ehci_silence_controller(ehci);
389 hrtimer_cancel(&ehci->hrtimer);
392 /*-------------------------------------------------------------------------*/
395 * ehci_work is called from some interrupts, timers, and so on.
396 * it calls driver completion functions, after dropping ehci->lock.
398 static void ehci_work (struct ehci_hcd *ehci)
400 /* another CPU may drop ehci->lock during a schedule scan while
401 * it reports urb completions. this flag guards against bogus
402 * attempts at re-entrant schedule scanning.
404 if (ehci->scanning) {
405 ehci->need_rescan = true;
408 ehci->scanning = true;
411 ehci->need_rescan = false;
412 if (ehci->async_count)
414 if (ehci->intr_count > 0)
416 if (ehci->isoc_count > 0)
418 if (ehci->need_rescan)
420 ehci->scanning = false;
422 /* the IO watchdog guards against hardware or driver bugs that
423 * misplace IRQs, and should let us run completely without IRQs.
424 * such lossage has been observed on both VT6202 and VT8235.
426 turn_on_io_watchdog(ehci);
430 * Called when the ehci_hcd module is removed.
432 static void ehci_stop (struct usb_hcd *hcd)
434 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
436 ehci_dbg (ehci, "stop\n");
438 /* no more interrupts ... */
440 spin_lock_irq(&ehci->lock);
441 ehci->enabled_hrtimer_events = 0;
442 spin_unlock_irq(&ehci->lock);
445 ehci_silence_controller(ehci);
448 hrtimer_cancel(&ehci->hrtimer);
449 remove_sysfs_files(ehci);
450 remove_debug_files (ehci);
452 /* root hub is shut down separately (first, when possible) */
453 spin_lock_irq (&ehci->lock);
455 spin_unlock_irq (&ehci->lock);
456 ehci_mem_cleanup (ehci);
458 if (ehci->amd_pll_fix == 1)
461 dbg_status (ehci, "ehci_stop completed",
462 ehci_readl(ehci, &ehci->regs->status));
465 /* one-time init, only for memory state */
466 static int ehci_init(struct usb_hcd *hcd)
468 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
472 struct ehci_qh_hw *hw;
474 spin_lock_init(&ehci->lock);
477 * keep io watchdog by default, those good HCDs could turn off it later
479 ehci->need_io_watchdog = 1;
481 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
482 ehci->hrtimer.function = ehci_hrtimer_func;
483 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
485 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
488 * by default set standard 80% (== 100 usec/uframe) max periodic
489 * bandwidth as required by USB 2.0
491 ehci->uframe_periodic_max = 100;
494 * hw default: 1K periodic list heads, one per frame.
495 * periodic_size can shrink by USBCMD update if hcc_params allows.
497 ehci->periodic_size = DEFAULT_I_TDPS;
498 INIT_LIST_HEAD(&ehci->async_unlink);
499 INIT_LIST_HEAD(&ehci->async_idle);
500 INIT_LIST_HEAD(&ehci->intr_unlink_wait);
501 INIT_LIST_HEAD(&ehci->intr_unlink);
502 INIT_LIST_HEAD(&ehci->intr_qh_list);
503 INIT_LIST_HEAD(&ehci->cached_itd_list);
504 INIT_LIST_HEAD(&ehci->cached_sitd_list);
505 INIT_LIST_HEAD(&ehci->tt_list);
507 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
508 /* periodic schedule size can be smaller than default */
509 switch (EHCI_TUNE_FLS) {
510 case 0: ehci->periodic_size = 1024; break;
511 case 1: ehci->periodic_size = 512; break;
512 case 2: ehci->periodic_size = 256; break;
516 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
519 /* controllers may cache some of the periodic schedule ... */
520 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
522 else // N microframes cached
523 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
526 * dedicate a qh for the async ring head, since we couldn't unlink
527 * a 'real' qh without stopping the async schedule [4.8]. use it
528 * as the 'reclamation list head' too.
529 * its dummy is used in hw_alt_next of many tds, to prevent the qh
530 * from automatically advancing to the next td after short reads.
532 ehci->async->qh_next.qh = NULL;
533 hw = ehci->async->hw;
534 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
535 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
536 #if defined(CONFIG_PPC_PS3)
537 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
539 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
540 hw->hw_qtd_next = EHCI_LIST_END(ehci);
541 ehci->async->qh_state = QH_STATE_LINKED;
542 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
544 /* clear interrupt enables, set irq latency */
545 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
547 temp = 1 << (16 + log2_irq_thresh);
548 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
550 ehci_dbg(ehci, "enable per-port change event\n");
553 if (HCC_CANPARK(hcc_params)) {
554 /* HW default park == 3, on hardware that supports it (like
555 * NVidia and ALI silicon), maximizes throughput on the async
556 * schedule by avoiding QH fetches between transfers.
558 * With fast usb storage devices and NForce2, "park" seems to
559 * make problems: throughput reduction (!), data errors...
562 park = min(park, (unsigned) 3);
566 ehci_dbg(ehci, "park %d\n", park);
568 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
569 /* periodic schedule size can be smaller than default */
571 temp |= (EHCI_TUNE_FLS << 2);
573 ehci->command = temp;
575 /* Accept arbitrarily long scatter-gather lists */
576 if (!(hcd->driver->flags & HCD_LOCAL_MEM))
577 hcd->self.sg_tablesize = ~0;
579 /* Prepare for unlinking active QHs */
580 ehci->old_current = ~0;
584 /* start HC running; it's halted, ehci_init() has been run (once) */
585 static int ehci_run (struct usb_hcd *hcd)
587 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
592 hcd->uses_new_polling = 1;
594 /* EHCI spec section 4.1 */
596 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
597 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
600 * hcc_params controls whether ehci->regs->segment must (!!!)
601 * be used; it constrains QH/ITD/SITD and QTD locations.
602 * pci_pool consistent memory always uses segment zero.
603 * streaming mappings for I/O buffers, like pci_map_single(),
604 * can return segments above 4GB, if the device allows.
606 * NOTE: the dma mask is visible through dev->dma_mask, so
607 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
608 * Scsi_Host.highmem_io, and so forth. It's readonly to all
609 * host side drivers though.
611 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
612 if (HCC_64BIT_ADDR(hcc_params)) {
613 ehci_writel(ehci, 0, &ehci->regs->segment);
615 // this is deeply broken on almost all architectures
616 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
617 ehci_info(ehci, "enabled 64bit DMA\n");
622 // Philips, Intel, and maybe others need CMD_RUN before the
623 // root hub will detect new devices (why?); NEC doesn't
624 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
625 ehci->command |= CMD_RUN;
626 ehci_writel(ehci, ehci->command, &ehci->regs->command);
627 dbg_cmd (ehci, "init", ehci->command);
630 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
631 * are explicitly handed to companion controller(s), so no TT is
632 * involved with the root hub. (Except where one is integrated,
633 * and there's no companion controller unless maybe for USB OTG.)
635 * Turning on the CF flag will transfer ownership of all ports
636 * from the companions to the EHCI controller. If any of the
637 * companions are in the middle of a port reset at the time, it
638 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
639 * guarantees that no resets are in progress. After we set CF,
640 * a short delay lets the hardware catch up; new resets shouldn't
641 * be started before the port switching actions could complete.
643 down_write(&ehci_cf_port_reset_rwsem);
644 ehci->rh_state = EHCI_RH_RUNNING;
645 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
647 /* Wait until HC become operational */
648 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
650 rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT, 0, 100 * 1000);
652 up_write(&ehci_cf_port_reset_rwsem);
655 ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
656 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
660 ehci->last_periodic_enable = ktime_get_real();
662 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
664 "USB %x.%x started, EHCI %x.%02x%s\n",
665 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
666 temp >> 8, temp & 0xff,
667 ignore_oc ? ", overcurrent ignored" : "");
669 ehci_writel(ehci, INTR_MASK,
670 &ehci->regs->intr_enable); /* Turn On Interrupts */
672 /* GRR this is run-once init(), being done every time the HC starts.
673 * So long as they're part of class devices, we can't do it init()
674 * since the class device isn't created that early.
676 create_debug_files(ehci);
677 create_sysfs_files(ehci);
682 int ehci_setup(struct usb_hcd *hcd)
684 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
687 ehci->regs = (void __iomem *)ehci->caps +
688 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
689 dbg_hcs_params(ehci, "reset");
690 dbg_hcc_params(ehci, "reset");
692 /* cache this readonly data; minimize chip reads */
693 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
695 ehci->sbrn = HCD_USB2;
697 /* data structure init */
698 retval = ehci_init(hcd);
702 retval = ehci_halt(ehci);
704 ehci_mem_cleanup(ehci);
712 EXPORT_SYMBOL_GPL(ehci_setup);
714 /*-------------------------------------------------------------------------*/
716 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
718 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
719 u32 status, masked_status, pcd_status = 0, cmd;
724 * For threadirqs option we use spin_lock_irqsave() variant to prevent
725 * deadlock with ehci hrtimer callback, because hrtimer callbacks run
726 * in interrupt context even when threadirqs is specified. We can go
727 * back to spin_lock() variant when hrtimer callbacks become threaded.
729 spin_lock_irqsave(&ehci->lock, flags);
731 status = ehci_readl(ehci, &ehci->regs->status);
733 /* e.g. cardbus physical eject */
734 if (status == ~(u32) 0) {
735 ehci_dbg (ehci, "device removed\n");
740 * We don't use STS_FLR, but some controllers don't like it to
741 * remain on, so mask it out along with the other status bits.
743 masked_status = status & (INTR_MASK | STS_FLR);
746 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
747 spin_unlock_irqrestore(&ehci->lock, flags);
751 /* clear (just) interrupts */
752 ehci_writel(ehci, masked_status, &ehci->regs->status);
753 cmd = ehci_readl(ehci, &ehci->regs->command);
756 /* normal [4.15.1.2] or error [4.15.1.1] completion */
757 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
758 if (likely ((status & STS_ERR) == 0))
759 COUNT (ehci->stats.normal);
761 COUNT (ehci->stats.error);
765 /* complete the unlinking of some qh [4.15.2.3] */
766 if (status & STS_IAA) {
768 /* Turn off the IAA watchdog */
769 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
772 * Mild optimization: Allow another IAAD to reset the
773 * hrtimer, if one occurs before the next expiration.
774 * In theory we could always cancel the hrtimer, but
775 * tests show that about half the time it will be reset
776 * for some other event anyway.
778 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
779 ++ehci->next_hrtimer_event;
781 /* guard against (alleged) silicon errata */
783 ehci_dbg(ehci, "IAA with IAAD still set?\n");
784 if (ehci->iaa_in_progress)
785 COUNT(ehci->stats.iaa);
789 /* remote wakeup [4.3.1] */
790 if (status & STS_PCD) {
791 unsigned i = HCS_N_PORTS (ehci->hcs_params);
794 /* kick root hub later */
797 /* resume root hub? */
798 if (ehci->rh_state == EHCI_RH_SUSPENDED)
799 usb_hcd_resume_root_hub(hcd);
801 /* get per-port change detect bits */
808 /* leverage per-port change bits feature */
809 if (!(ppcd & (1 << i)))
811 pstatus = ehci_readl(ehci,
812 &ehci->regs->port_status[i]);
814 if (pstatus & PORT_OWNER)
816 if (!(test_bit(i, &ehci->suspended_ports) &&
817 ((pstatus & PORT_RESUME) ||
818 !(pstatus & PORT_SUSPEND)) &&
819 (pstatus & PORT_PE) &&
820 ehci->reset_done[i] == 0))
823 /* start USB_RESUME_TIMEOUT msec resume signaling from
824 * this port, and make hub_wq collect
825 * PORT_STAT_C_SUSPEND to stop that signaling.
827 ehci->reset_done[i] = jiffies +
828 msecs_to_jiffies(USB_RESUME_TIMEOUT);
829 set_bit(i, &ehci->resuming_ports);
830 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
831 usb_hcd_start_port_resume(&hcd->self, i);
832 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
836 /* PCI errors [4.15.2.4] */
837 if (unlikely ((status & STS_FATAL) != 0)) {
838 ehci_err(ehci, "fatal error\n");
839 dbg_cmd(ehci, "fatal", cmd);
840 dbg_status(ehci, "fatal", status);
844 /* Don't let the controller do anything more */
845 ehci->shutdown = true;
846 ehci->rh_state = EHCI_RH_STOPPING;
847 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
848 ehci_writel(ehci, ehci->command, &ehci->regs->command);
849 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
850 ehci_handle_controller_death(ehci);
852 /* Handle completions when the controller stops */
858 spin_unlock_irqrestore(&ehci->lock, flags);
860 usb_hcd_poll_rh_status(hcd);
864 /*-------------------------------------------------------------------------*/
867 * non-error returns are a promise to giveback() the urb later
868 * we drop ownership so next owner (or urb unlink) can get it
870 * urb + dev is in hcd.self.controller.urb_list
871 * we're queueing TDs onto software and hardware lists
873 * hcd-specific init for hcpriv hasn't been done yet
875 * NOTE: control, bulk, and interrupt share the same code to append TDs
876 * to a (possibly active) QH, and the same QH scanning code.
878 static int ehci_urb_enqueue (
883 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
884 struct list_head qtd_list;
886 INIT_LIST_HEAD (&qtd_list);
888 switch (usb_pipetype (urb->pipe)) {
890 /* qh_completions() code doesn't handle all the fault cases
891 * in multi-TD control transfers. Even 1KB is rare anyway.
893 if (urb->transfer_buffer_length > (16 * 1024))
896 /* case PIPE_BULK: */
898 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
900 return submit_async(ehci, urb, &qtd_list, mem_flags);
903 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
905 return intr_submit(ehci, urb, &qtd_list, mem_flags);
907 case PIPE_ISOCHRONOUS:
908 if (urb->dev->speed == USB_SPEED_HIGH)
909 return itd_submit (ehci, urb, mem_flags);
911 return sitd_submit (ehci, urb, mem_flags);
915 /* remove from hardware lists
916 * completions normally happen asynchronously
919 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
921 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
926 spin_lock_irqsave (&ehci->lock, flags);
927 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
931 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
933 * We don't expedite dequeue for isochronous URBs.
934 * Just wait until they complete normally or their
938 qh = (struct ehci_qh *) urb->hcpriv;
939 qh->unlink_reason |= QH_UNLINK_REQUESTED;
940 switch (qh->qh_state) {
941 case QH_STATE_LINKED:
942 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
943 start_unlink_intr(ehci, qh);
945 start_unlink_async(ehci, qh);
947 case QH_STATE_COMPLETING:
948 qh->dequeue_during_giveback = 1;
950 case QH_STATE_UNLINK:
951 case QH_STATE_UNLINK_WAIT:
952 /* already started */
955 /* QH might be waiting for a Clear-TT-Buffer */
956 qh_completions(ehci, qh);
961 spin_unlock_irqrestore (&ehci->lock, flags);
965 /*-------------------------------------------------------------------------*/
967 // bulk qh holds the data toggle
970 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
972 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
976 /* ASSERT: any requests/urbs are being unlinked */
977 /* ASSERT: nobody can be submitting urbs for this any more */
980 spin_lock_irqsave (&ehci->lock, flags);
985 /* endpoints can be iso streams. for now, we don't
986 * accelerate iso completions ... so spin a while.
988 if (qh->hw == NULL) {
989 struct ehci_iso_stream *stream = ep->hcpriv;
991 if (!list_empty(&stream->td_list))
994 /* BUG_ON(!list_empty(&stream->free_list)); */
995 reserve_release_iso_bandwidth(ehci, stream, -1);
1000 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1001 switch (qh->qh_state) {
1002 case QH_STATE_LINKED:
1003 if (list_empty(&qh->qtd_list))
1004 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
1007 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
1008 start_unlink_async(ehci, qh);
1010 start_unlink_intr(ehci, qh);
1012 case QH_STATE_COMPLETING: /* already in unlinking */
1013 case QH_STATE_UNLINK: /* wait for hw to finish? */
1014 case QH_STATE_UNLINK_WAIT:
1016 spin_unlock_irqrestore (&ehci->lock, flags);
1017 schedule_timeout_uninterruptible(1);
1019 case QH_STATE_IDLE: /* fully unlinked */
1020 if (qh->clearing_tt)
1022 if (list_empty (&qh->qtd_list)) {
1023 if (qh->ps.bw_uperiod)
1024 reserve_release_intr_bandwidth(ehci, qh, -1);
1025 qh_destroy(ehci, qh);
1028 /* else FALL THROUGH */
1030 /* caller was supposed to have unlinked any requests;
1031 * that's not our job. just leak this memory.
1033 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1034 qh, ep->desc.bEndpointAddress, qh->qh_state,
1035 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1040 spin_unlock_irqrestore (&ehci->lock, flags);
1044 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1046 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1048 int eptype = usb_endpoint_type(&ep->desc);
1049 int epnum = usb_endpoint_num(&ep->desc);
1050 int is_out = usb_endpoint_dir_out(&ep->desc);
1051 unsigned long flags;
1053 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1056 spin_lock_irqsave(&ehci->lock, flags);
1059 /* For Bulk and Interrupt endpoints we maintain the toggle state
1060 * in the hardware; the toggle bits in udev aren't used at all.
1061 * When an endpoint is reset by usb_clear_halt() we must reset
1062 * the toggle bit in the QH.
1065 if (!list_empty(&qh->qtd_list)) {
1066 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1068 /* The toggle value in the QH can't be updated
1069 * while the QH is active. Unlink it now;
1070 * re-linking will call qh_refresh().
1072 usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1073 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1074 if (eptype == USB_ENDPOINT_XFER_BULK)
1075 start_unlink_async(ehci, qh);
1077 start_unlink_intr(ehci, qh);
1080 spin_unlock_irqrestore(&ehci->lock, flags);
1083 static int ehci_get_frame (struct usb_hcd *hcd)
1085 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1086 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1089 /*-------------------------------------------------------------------------*/
1091 /* Device addition and removal */
1093 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1095 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1097 spin_lock_irq(&ehci->lock);
1099 spin_unlock_irq(&ehci->lock);
1102 /*-------------------------------------------------------------------------*/
1106 /* suspend/resume, section 4.3 */
1108 /* These routines handle the generic parts of controller suspend/resume */
1110 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1112 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1114 if (time_before(jiffies, ehci->next_statechange))
1118 * Root hub was already suspended. Disable IRQ emission and
1119 * mark HW unaccessible. The PM and USB cores make sure that
1120 * the root hub is either suspended or stopped.
1122 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1124 spin_lock_irq(&ehci->lock);
1125 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1126 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1128 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1129 spin_unlock_irq(&ehci->lock);
1131 synchronize_irq(hcd->irq);
1133 /* Check for race with a wakeup request */
1134 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1135 ehci_resume(hcd, false);
1141 EXPORT_SYMBOL_GPL(ehci_suspend);
1143 /* Returns 0 if power was preserved, 1 if power was lost */
1144 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1146 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1148 if (time_before(jiffies, ehci->next_statechange))
1151 /* Mark hardware accessible again as we are back to full power by now */
1152 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1155 return 0; /* Controller is dead */
1158 * If CF is still set and reset isn't forced
1159 * then we maintained suspend power.
1160 * Just undo the effect of ehci_suspend().
1162 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1164 int mask = INTR_MASK;
1166 ehci_prepare_ports_for_controller_resume(ehci);
1168 spin_lock_irq(&ehci->lock);
1172 if (!hcd->self.root_hub->do_remote_wakeup)
1174 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1175 ehci_readl(ehci, &ehci->regs->intr_enable);
1177 spin_unlock_irq(&ehci->lock);
1182 * Else reset, to cope with power loss or resume from hibernation
1183 * having let the firmware kick in during reboot.
1185 usb_root_hub_lost_power(hcd->self.root_hub);
1186 (void) ehci_halt(ehci);
1187 (void) ehci_reset(ehci);
1189 spin_lock_irq(&ehci->lock);
1193 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1194 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1195 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1197 ehci->rh_state = EHCI_RH_SUSPENDED;
1198 spin_unlock_irq(&ehci->lock);
1202 EXPORT_SYMBOL_GPL(ehci_resume);
1206 /*-------------------------------------------------------------------------*/
1209 * Generic structure: This gets copied for platform drivers so that
1210 * individual entries can be overridden as needed.
1213 static const struct hc_driver ehci_hc_driver = {
1214 .description = hcd_name,
1215 .product_desc = "EHCI Host Controller",
1216 .hcd_priv_size = sizeof(struct ehci_hcd),
1219 * generic hardware linkage
1222 .flags = HCD_MEMORY | HCD_USB2 | HCD_BH,
1225 * basic lifecycle operations
1227 .reset = ehci_setup,
1230 .shutdown = ehci_shutdown,
1233 * managing i/o requests and associated device resources
1235 .urb_enqueue = ehci_urb_enqueue,
1236 .urb_dequeue = ehci_urb_dequeue,
1237 .endpoint_disable = ehci_endpoint_disable,
1238 .endpoint_reset = ehci_endpoint_reset,
1239 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
1242 * scheduling support
1244 .get_frame_number = ehci_get_frame,
1249 .hub_status_data = ehci_hub_status_data,
1250 .hub_control = ehci_hub_control,
1251 .bus_suspend = ehci_bus_suspend,
1252 .bus_resume = ehci_bus_resume,
1253 .relinquish_port = ehci_relinquish_port,
1254 .port_handed_over = ehci_port_handed_over,
1259 .free_dev = ehci_remove_device,
1262 void ehci_init_driver(struct hc_driver *drv,
1263 const struct ehci_driver_overrides *over)
1265 /* Copy the generic table to drv and then apply the overrides */
1266 *drv = ehci_hc_driver;
1269 drv->hcd_priv_size += over->extra_priv_size;
1271 drv->reset = over->reset;
1272 if (over->port_power)
1273 drv->port_power = over->port_power;
1276 EXPORT_SYMBOL_GPL(ehci_init_driver);
1278 /*-------------------------------------------------------------------------*/
1280 MODULE_DESCRIPTION(DRIVER_DESC);
1281 MODULE_AUTHOR (DRIVER_AUTHOR);
1282 MODULE_LICENSE ("GPL");
1284 #ifdef CONFIG_USB_EHCI_SH
1285 #include "ehci-sh.c"
1286 #define PLATFORM_DRIVER ehci_hcd_sh_driver
1289 #ifdef CONFIG_PPC_PS3
1290 #include "ehci-ps3.c"
1291 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1294 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1295 #include "ehci-ppc-of.c"
1296 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1299 #ifdef CONFIG_XPS_USB_HCD_XILINX
1300 #include "ehci-xilinx-of.c"
1301 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1304 #ifdef CONFIG_TILE_USB
1305 #include "ehci-tilegx.c"
1306 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver
1309 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1310 #include "ehci-pmcmsp.c"
1311 #define PLATFORM_DRIVER ehci_hcd_msp_driver
1314 #ifdef CONFIG_SPARC_LEON
1315 #include "ehci-grlib.c"
1316 #define PLATFORM_DRIVER ehci_grlib_driver
1319 #ifdef CONFIG_USB_EHCI_MV
1320 #include "ehci-mv.c"
1321 #define PLATFORM_DRIVER ehci_mv_driver
1324 static int __init ehci_hcd_init(void)
1331 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1332 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1333 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1334 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1335 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1336 " before uhci_hcd and ohci_hcd, not after\n");
1338 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1340 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1341 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1343 #ifdef CONFIG_DYNAMIC_DEBUG
1344 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1345 if (!ehci_debug_root) {
1351 #ifdef PLATFORM_DRIVER
1352 retval = platform_driver_register(&PLATFORM_DRIVER);
1357 #ifdef PS3_SYSTEM_BUS_DRIVER
1358 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1363 #ifdef OF_PLATFORM_DRIVER
1364 retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1369 #ifdef XILINX_OF_PLATFORM_DRIVER
1370 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1376 #ifdef XILINX_OF_PLATFORM_DRIVER
1377 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1380 #ifdef OF_PLATFORM_DRIVER
1381 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1384 #ifdef PS3_SYSTEM_BUS_DRIVER
1385 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1388 #ifdef PLATFORM_DRIVER
1389 platform_driver_unregister(&PLATFORM_DRIVER);
1392 #ifdef CONFIG_DYNAMIC_DEBUG
1393 debugfs_remove(ehci_debug_root);
1394 ehci_debug_root = NULL;
1397 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1400 module_init(ehci_hcd_init);
1402 static void __exit ehci_hcd_cleanup(void)
1404 #ifdef XILINX_OF_PLATFORM_DRIVER
1405 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1407 #ifdef OF_PLATFORM_DRIVER
1408 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1410 #ifdef PLATFORM_DRIVER
1411 platform_driver_unregister(&PLATFORM_DRIVER);
1413 #ifdef PS3_SYSTEM_BUS_DRIVER
1414 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1416 #ifdef CONFIG_DYNAMIC_DEBUG
1417 debugfs_remove(ehci_debug_root);
1419 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1421 module_exit(ehci_hcd_cleanup);