2 * Xilinx USB peripheral controller driver
4 * Copyright (C) 2004 by Thomas Rathbone
5 * Copyright (C) 2005 by HP Labs
6 * Copyright (C) 2005 by David Brownell
7 * Copyright (C) 2010 - 2014 Xilinx, Inc.
9 * Some parts of this driver code is based on the driver for at91-series
10 * USB peripheral controller (at91_udc.c).
12 * This program is free software; you can redistribute it
13 * and/or modify it under the terms of the GNU General Public
14 * License as published by the Free Software Foundation;
15 * either version 2 of the License, or (at your option) any
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/interrupt.h>
24 #include <linux/module.h>
25 #include <linux/of_address.h>
26 #include <linux/of_device.h>
27 #include <linux/of_platform.h>
28 #include <linux/of_irq.h>
29 #include <linux/prefetch.h>
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/gadget.h>
33 /* Register offsets for the USB device.*/
34 #define XUSB_EP0_CONFIG_OFFSET 0x0000 /* EP0 Config Reg Offset */
35 #define XUSB_SETUP_PKT_ADDR_OFFSET 0x0080 /* Setup Packet Address */
36 #define XUSB_ADDRESS_OFFSET 0x0100 /* Address Register */
37 #define XUSB_CONTROL_OFFSET 0x0104 /* Control Register */
38 #define XUSB_STATUS_OFFSET 0x0108 /* Status Register */
39 #define XUSB_FRAMENUM_OFFSET 0x010C /* Frame Number Register */
40 #define XUSB_IER_OFFSET 0x0110 /* Interrupt Enable Register */
41 #define XUSB_BUFFREADY_OFFSET 0x0114 /* Buffer Ready Register */
42 #define XUSB_TESTMODE_OFFSET 0x0118 /* Test Mode Register */
43 #define XUSB_DMA_RESET_OFFSET 0x0200 /* DMA Soft Reset Register */
44 #define XUSB_DMA_CONTROL_OFFSET 0x0204 /* DMA Control Register */
45 #define XUSB_DMA_DSAR_ADDR_OFFSET 0x0208 /* DMA source Address Reg */
46 #define XUSB_DMA_DDAR_ADDR_OFFSET 0x020C /* DMA destination Addr Reg */
47 #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */
48 #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */
50 /* Endpoint Configuration Space offsets */
51 #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */
52 #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */
53 #define XUSB_EP_BUF1COUNT_OFFSET 0x0C /* Buffer 1 Count */
55 #define XUSB_CONTROL_USB_READY_MASK 0x80000000 /* USB ready Mask */
56 #define XUSB_CONTROL_USB_RMTWAKE_MASK 0x40000000 /* Remote wake up mask */
58 /* Interrupt register related masks.*/
59 #define XUSB_STATUS_GLOBAL_INTR_MASK 0x80000000 /* Global Intr Enable */
60 #define XUSB_STATUS_DMADONE_MASK 0x04000000 /* DMA done Mask */
61 #define XUSB_STATUS_DMAERR_MASK 0x02000000 /* DMA Error Mask */
62 #define XUSB_STATUS_DMABUSY_MASK 0x80000000 /* DMA Error Mask */
63 #define XUSB_STATUS_RESUME_MASK 0x01000000 /* USB Resume Mask */
64 #define XUSB_STATUS_RESET_MASK 0x00800000 /* USB Reset Mask */
65 #define XUSB_STATUS_SUSPEND_MASK 0x00400000 /* USB Suspend Mask */
66 #define XUSB_STATUS_DISCONNECT_MASK 0x00200000 /* USB Disconnect Mask */
67 #define XUSB_STATUS_FIFO_BUFF_RDY_MASK 0x00100000 /* FIFO Buff Ready Mask */
68 #define XUSB_STATUS_FIFO_BUFF_FREE_MASK 0x00080000 /* FIFO Buff Free Mask */
69 #define XUSB_STATUS_SETUP_PACKET_MASK 0x00040000 /* Setup packet received */
70 #define XUSB_STATUS_EP1_BUFF2_COMP_MASK 0x00000200 /* EP 1 Buff 2 Processed */
71 #define XUSB_STATUS_EP1_BUFF1_COMP_MASK 0x00000002 /* EP 1 Buff 1 Processed */
72 #define XUSB_STATUS_EP0_BUFF2_COMP_MASK 0x00000100 /* EP 0 Buff 2 Processed */
73 #define XUSB_STATUS_EP0_BUFF1_COMP_MASK 0x00000001 /* EP 0 Buff 1 Processed */
74 #define XUSB_STATUS_HIGH_SPEED_MASK 0x00010000 /* USB Speed Mask */
75 /* Suspend,Reset,Suspend and Disconnect Mask */
76 #define XUSB_STATUS_INTR_EVENT_MASK 0x01E00000
77 /* Buffers completion Mask */
78 #define XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK 0x0000FEFF
79 /* Mask for buffer 0 and buffer 1 completion for all Endpoints */
80 #define XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK 0x00000101
81 #define XUSB_STATUS_EP_BUFF2_SHIFT 8 /* EP buffer offset */
83 /* Endpoint Configuration Status Register */
84 #define XUSB_EP_CFG_VALID_MASK 0x80000000 /* Endpoint Valid bit */
85 #define XUSB_EP_CFG_STALL_MASK 0x40000000 /* Endpoint Stall bit */
86 #define XUSB_EP_CFG_DATA_TOGGLE_MASK 0x08000000 /* Endpoint Data toggle */
88 /* USB device specific global configuration constants.*/
89 #define XUSB_MAX_ENDPOINTS 8 /* Maximum End Points */
90 #define XUSB_EP_NUMBER_ZERO 0 /* End point Zero */
91 /* DPRAM is the source address for DMA transfer */
92 #define XUSB_DMA_READ_FROM_DPRAM 0x80000000
93 #define XUSB_DMA_DMASR_BUSY 0x80000000 /* DMA busy */
94 #define XUSB_DMA_DMASR_ERROR 0x40000000 /* DMA Error */
96 * When this bit is set, the DMA buffer ready bit is set by hardware upon
97 * DMA transfer completion.
99 #define XUSB_DMA_BRR_CTRL 0x40000000 /* DMA bufready ctrl bit */
101 #define SETUP_PHASE 0x0000 /* Setup Phase */
102 #define DATA_PHASE 0x0001 /* Data Phase */
103 #define STATUS_PHASE 0x0002 /* Status Phase */
105 #define EP0_MAX_PACKET 64 /* Endpoint 0 maximum packet length */
106 #define STATUSBUFF_SIZE 2 /* Buffer size for GET_STATUS command */
107 #define EPNAME_SIZE 4 /* Buffer size for endpoint name */
109 /* container_of helper macros */
110 #define to_udc(g) container_of((g), struct xusb_udc, gadget)
111 #define to_xusb_ep(ep) container_of((ep), struct xusb_ep, ep_usb)
112 #define to_xusb_req(req) container_of((req), struct xusb_req, usb_req)
115 * struct xusb_req - Xilinx USB device request structure
116 * @usb_req: Linux usb request structure
117 * @queue: usb device request queue
118 * @ep: pointer to xusb_endpoint structure
121 struct usb_request usb_req;
122 struct list_head queue;
127 * struct xusb_ep - USB end point structure.
128 * @ep_usb: usb endpoint instance
129 * @queue: endpoint message queue
130 * @udc: xilinx usb peripheral driver instance pointer
131 * @desc: pointer to the usb endpoint descriptor
132 * @rambase: the endpoint buffer address
133 * @offset: the endpoint register offset value
134 * @name: name of the endpoint
135 * @epnumber: endpoint number
136 * @maxpacket: maximum packet size the endpoint can store
137 * @buffer0count: the size of the packet recieved in the first buffer
138 * @buffer1count: the size of the packet received in the second buffer
139 * @curbufnum: current buffer of endpoint that will be processed next
140 * @buffer0ready: the busy state of first buffer
141 * @buffer1ready: the busy state of second buffer
142 * @is_in: endpoint direction (IN or OUT)
143 * @is_iso: endpoint type(isochronous or non isochronous)
146 struct usb_ep ep_usb;
147 struct list_head queue;
148 struct xusb_udc *udc;
149 const struct usb_endpoint_descriptor *desc;
165 * struct xusb_udc - USB peripheral driver structure
166 * @gadget: USB gadget driver instance
167 * @ep: an array of endpoint structures
168 * @driver: pointer to the usb gadget driver instance
169 * @setup: usb_ctrlrequest structure for control requests
170 * @req: pointer to dummy request for get status command
171 * @dev: pointer to device structure in gadget
172 * @usb_state: device in suspended state or not
173 * @remote_wkp: remote wakeup enabled by host
174 * @setupseqtx: tx status
175 * @setupseqrx: rx status
176 * @addr: the usb device base address
177 * @lock: instance of spinlock
178 * @dma_enabled: flag indicating whether the dma is included in the system
179 * @read_fn: function pointer to read device registers
180 * @write_fn: function pointer to write to device registers
183 struct usb_gadget gadget;
184 struct xusb_ep ep[8];
185 struct usb_gadget_driver *driver;
186 struct usb_ctrlrequest setup;
187 struct xusb_req *req;
197 unsigned int (*read_fn)(void __iomem *);
198 void (*write_fn)(void __iomem *, u32, u32);
201 /* Endpoint buffer start addresses in the core */
202 static u32 rambase[8] = { 0x22, 0x1000, 0x1100, 0x1200, 0x1300, 0x1400, 0x1500,
205 static const char driver_name[] = "xilinx-udc";
206 static const char ep0name[] = "ep0";
208 /* Control endpoint configuration.*/
209 static const struct usb_endpoint_descriptor config_bulk_out_desc = {
210 .bLength = USB_DT_ENDPOINT_SIZE,
211 .bDescriptorType = USB_DT_ENDPOINT,
212 .bEndpointAddress = USB_DIR_OUT,
213 .bmAttributes = USB_ENDPOINT_XFER_BULK,
214 .wMaxPacketSize = cpu_to_le16(EP0_MAX_PACKET),
218 * xudc_write32 - little endian write to device registers
219 * @addr: base addr of device registers
220 * @offset: register offset
221 * @val: data to be written
223 static void xudc_write32(void __iomem *addr, u32 offset, u32 val)
225 iowrite32(val, addr + offset);
229 * xudc_read32 - little endian read from device registers
230 * @addr: addr of device register
231 * Return: value at addr
233 static unsigned int xudc_read32(void __iomem *addr)
235 return ioread32(addr);
239 * xudc_write32_be - big endian write to device registers
240 * @addr: base addr of device registers
241 * @offset: register offset
242 * @val: data to be written
244 static void xudc_write32_be(void __iomem *addr, u32 offset, u32 val)
246 iowrite32be(val, addr + offset);
250 * xudc_read32_be - big endian read from device registers
251 * @addr: addr of device register
252 * Return: value at addr
254 static unsigned int xudc_read32_be(void __iomem *addr)
256 return ioread32be(addr);
260 * xudc_wrstatus - Sets up the usb device status stages.
261 * @udc: pointer to the usb device controller structure.
263 static void xudc_wrstatus(struct xusb_udc *udc)
265 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
268 epcfgreg = udc->read_fn(udc->addr + ep0->offset)|
269 XUSB_EP_CFG_DATA_TOGGLE_MASK;
270 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
271 udc->write_fn(udc->addr, ep0->offset + XUSB_EP_BUF0COUNT_OFFSET, 0);
272 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
276 * xudc_epconfig - Configures the given endpoint.
277 * @ep: pointer to the usb device endpoint structure.
278 * @udc: pointer to the usb peripheral controller structure.
280 * This function configures a specific endpoint with the given configuration
283 static void xudc_epconfig(struct xusb_ep *ep, struct xusb_udc *udc)
288 * Configure the end point direction, type, Max Packet Size and the
289 * EP buffer location.
291 epcfgreg = ((ep->is_in << 29) | (ep->is_iso << 28) |
292 (ep->ep_usb.maxpacket << 15) | (ep->rambase));
293 udc->write_fn(udc->addr, ep->offset, epcfgreg);
295 /* Set the Buffer count and the Buffer ready bits.*/
296 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF0COUNT_OFFSET,
298 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF1COUNT_OFFSET,
300 if (ep->buffer0ready)
301 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
303 if (ep->buffer1ready)
304 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
305 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
309 * xudc_start_dma - Starts DMA transfer.
310 * @ep: pointer to the usb device endpoint structure.
311 * @src: DMA source address.
312 * @dst: DMA destination address.
313 * @length: number of bytes to transfer.
315 * Return: 0 on success, error code on failure
317 * This function starts DMA transfer by writing to DMA source,
318 * destination and lenth registers.
320 static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src,
321 dma_addr_t dst, u32 length)
323 struct xusb_udc *udc = ep->udc;
329 * Set the addresses in the DMA source and
330 * destination registers and then set the length
331 * into the DMA length register.
333 udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src);
334 udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst);
335 udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length);
338 * Wait till DMA transaction is complete and
339 * check whether the DMA transaction was
343 reg = udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET);
344 if (!(reg & XUSB_DMA_DMASR_BUSY))
348 * We can't sleep here, because it's also called from
353 dev_err(udc->dev, "DMA timeout\n");
359 if ((udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET) &
360 XUSB_DMA_DMASR_ERROR) == XUSB_DMA_DMASR_ERROR){
361 dev_err(udc->dev, "DMA Error\n");
369 * xudc_dma_send - Sends IN data using DMA.
370 * @ep: pointer to the usb device endpoint structure.
371 * @req: pointer to the usb request structure.
372 * @buffer: pointer to data to be sent.
373 * @length: number of bytes to send.
375 * Return: 0 on success, -EAGAIN if no buffer is free and error
378 * This function sends data using DMA.
380 static int xudc_dma_send(struct xusb_ep *ep, struct xusb_req *req,
381 u8 *buffer, u32 length)
386 struct xusb_udc *udc = ep->udc;
388 src = req->usb_req.dma + req->usb_req.actual;
389 if (req->usb_req.length)
390 dma_sync_single_for_device(udc->dev, src,
391 length, DMA_TO_DEVICE);
392 if (!ep->curbufnum && !ep->buffer0ready) {
393 /* Get the Buffer address and copy the transmit data.*/
394 eprambase = (u32 __force *)(udc->addr + ep->rambase);
395 dst = virt_to_phys(eprambase);
396 udc->write_fn(udc->addr, ep->offset +
397 XUSB_EP_BUF0COUNT_OFFSET, length);
398 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
399 XUSB_DMA_BRR_CTRL | (1 << ep->epnumber));
400 ep->buffer0ready = 1;
402 } else if (ep->curbufnum && !ep->buffer1ready) {
403 /* Get the Buffer address and copy the transmit data.*/
404 eprambase = (u32 __force *)(udc->addr + ep->rambase +
405 ep->ep_usb.maxpacket);
406 dst = virt_to_phys(eprambase);
407 udc->write_fn(udc->addr, ep->offset +
408 XUSB_EP_BUF1COUNT_OFFSET, length);
409 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
410 XUSB_DMA_BRR_CTRL | (1 << (ep->epnumber +
411 XUSB_STATUS_EP_BUFF2_SHIFT)));
412 ep->buffer1ready = 1;
415 /* None of ping pong buffers are ready currently .*/
419 return xudc_start_dma(ep, src, dst, length);
423 * xudc_dma_receive - Receives OUT data using DMA.
424 * @ep: pointer to the usb device endpoint structure.
425 * @req: pointer to the usb request structure.
426 * @buffer: pointer to storage buffer of received data.
427 * @length: number of bytes to receive.
429 * Return: 0 on success, -EAGAIN if no buffer is free and error
432 * This function receives data using DMA.
434 static int xudc_dma_receive(struct xusb_ep *ep, struct xusb_req *req,
435 u8 *buffer, u32 length)
440 struct xusb_udc *udc = ep->udc;
442 dst = req->usb_req.dma + req->usb_req.actual;
443 if (!ep->curbufnum && !ep->buffer0ready) {
444 /* Get the Buffer address and copy the transmit data */
445 eprambase = (u32 __force *)(udc->addr + ep->rambase);
446 src = virt_to_phys(eprambase);
447 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
448 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
449 (1 << ep->epnumber));
450 ep->buffer0ready = 1;
452 } else if (ep->curbufnum && !ep->buffer1ready) {
453 /* Get the Buffer address and copy the transmit data */
454 eprambase = (u32 __force *)(udc->addr +
455 ep->rambase + ep->ep_usb.maxpacket);
456 src = virt_to_phys(eprambase);
457 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
458 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
459 (1 << (ep->epnumber +
460 XUSB_STATUS_EP_BUFF2_SHIFT)));
461 ep->buffer1ready = 1;
464 /* None of the ping-pong buffers are ready currently */
468 return xudc_start_dma(ep, src, dst, length);
472 * xudc_eptxrx - Transmits or receives data to or from an endpoint.
473 * @ep: pointer to the usb endpoint configuration structure.
474 * @req: pointer to the usb request structure.
475 * @bufferptr: pointer to buffer containing the data to be sent.
476 * @bufferlen: The number of data bytes to be sent.
478 * Return: 0 on success, -EAGAIN if no buffer is free.
480 * This function copies the transmit/receive data to/from the end point buffer
481 * and enables the buffer for transmission/reception.
483 static int xudc_eptxrx(struct xusb_ep *ep, struct xusb_req *req,
484 u8 *bufferptr, u32 bufferlen)
489 struct xusb_udc *udc = ep->udc;
491 bytestosend = bufferlen;
492 if (udc->dma_enabled) {
494 rc = xudc_dma_send(ep, req, bufferptr, bufferlen);
496 rc = xudc_dma_receive(ep, req, bufferptr, bufferlen);
499 /* Put the transmit buffer into the correct ping-pong buffer.*/
500 if (!ep->curbufnum && !ep->buffer0ready) {
501 /* Get the Buffer address and copy the transmit data.*/
502 eprambase = (u32 __force *)(udc->addr + ep->rambase);
504 memcpy(eprambase, bufferptr, bytestosend);
505 udc->write_fn(udc->addr, ep->offset +
506 XUSB_EP_BUF0COUNT_OFFSET, bufferlen);
508 memcpy(bufferptr, eprambase, bytestosend);
511 * Enable the buffer for transmission.
513 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
515 ep->buffer0ready = 1;
517 } else if (ep->curbufnum && !ep->buffer1ready) {
518 /* Get the Buffer address and copy the transmit data.*/
519 eprambase = (u32 __force *)(udc->addr + ep->rambase +
520 ep->ep_usb.maxpacket);
522 memcpy(eprambase, bufferptr, bytestosend);
523 udc->write_fn(udc->addr, ep->offset +
524 XUSB_EP_BUF1COUNT_OFFSET, bufferlen);
526 memcpy(bufferptr, eprambase, bytestosend);
529 * Enable the buffer for transmission.
531 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
532 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
533 ep->buffer1ready = 1;
536 /* None of the ping-pong buffers are ready currently */
543 * xudc_done - Exeutes the endpoint data transfer completion tasks.
544 * @ep: pointer to the usb device endpoint structure.
545 * @req: pointer to the usb request structure.
546 * @status: Status of the data transfer.
548 * Deletes the message from the queue and updates data transfer completion
551 static void xudc_done(struct xusb_ep *ep, struct xusb_req *req, int status)
553 struct xusb_udc *udc = ep->udc;
555 list_del_init(&req->queue);
557 if (req->usb_req.status == -EINPROGRESS)
558 req->usb_req.status = status;
560 status = req->usb_req.status;
562 if (status && status != -ESHUTDOWN)
563 dev_dbg(udc->dev, "%s done %p, status %d\n",
564 ep->ep_usb.name, req, status);
565 /* unmap request if DMA is present*/
566 if (udc->dma_enabled && ep->epnumber && req->usb_req.length)
567 usb_gadget_unmap_request(&udc->gadget, &req->usb_req,
570 if (req->usb_req.complete) {
571 spin_unlock(&udc->lock);
572 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
573 spin_lock(&udc->lock);
578 * xudc_read_fifo - Reads the data from the given endpoint buffer.
579 * @ep: pointer to the usb device endpoint structure.
580 * @req: pointer to the usb request structure.
582 * Return: 0 if request is completed and -EAGAIN if not completed.
584 * Pulls OUT packet data from the endpoint buffer.
586 static int xudc_read_fifo(struct xusb_ep *ep, struct xusb_req *req)
589 u32 is_short, count, bufferspace;
593 int retval = -EAGAIN;
594 struct xusb_udc *udc = ep->udc;
596 if (ep->buffer0ready && ep->buffer1ready) {
597 dev_dbg(udc->dev, "Packet NOT ready!\n");
602 bufoffset = XUSB_EP_BUF1COUNT_OFFSET;
604 bufoffset = XUSB_EP_BUF0COUNT_OFFSET;
606 count = udc->read_fn(udc->addr + ep->offset + bufoffset);
608 if (!ep->buffer0ready && !ep->buffer1ready)
611 buf = req->usb_req.buf + req->usb_req.actual;
613 bufferspace = req->usb_req.length - req->usb_req.actual;
614 is_short = count < ep->ep_usb.maxpacket;
616 if (unlikely(!bufferspace)) {
618 * This happens when the driver's buffer
619 * is smaller than what the host sent.
620 * discard the extra data.
622 if (req->usb_req.status != -EOVERFLOW)
623 dev_dbg(udc->dev, "%s overflow %d\n",
624 ep->ep_usb.name, count);
625 req->usb_req.status = -EOVERFLOW;
626 xudc_done(ep, req, -EOVERFLOW);
630 ret = xudc_eptxrx(ep, req, buf, count);
633 req->usb_req.actual += min(count, bufferspace);
634 dev_dbg(udc->dev, "read %s, %d bytes%s req %p %d/%d\n",
635 ep->ep_usb.name, count, is_short ? "/S" : "", req,
636 req->usb_req.actual, req->usb_req.length);
637 bufferspace -= count;
639 if ((req->usb_req.actual == req->usb_req.length) || is_short) {
640 if (udc->dma_enabled && req->usb_req.length)
641 dma_sync_single_for_cpu(udc->dev,
645 xudc_done(ep, req, 0);
654 dev_dbg(udc->dev, "receive busy\n");
658 /* DMA error, dequeue the request */
659 xudc_done(ep, req, -ECONNRESET);
668 * xudc_write_fifo - Writes data into the given endpoint buffer.
669 * @ep: pointer to the usb device endpoint structure.
670 * @req: pointer to the usb request structure.
672 * Return: 0 if request is completed and -EAGAIN if not completed.
674 * Loads endpoint buffer for an IN packet.
676 static int xudc_write_fifo(struct xusb_ep *ep, struct xusb_req *req)
681 int retval = -EAGAIN;
682 struct xusb_udc *udc = ep->udc;
683 int is_last, is_short = 0;
686 max = le16_to_cpu(ep->desc->wMaxPacketSize);
687 buf = req->usb_req.buf + req->usb_req.actual;
689 length = req->usb_req.length - req->usb_req.actual;
690 length = min(length, max);
692 ret = xudc_eptxrx(ep, req, buf, length);
695 req->usb_req.actual += length;
696 if (unlikely(length != max)) {
697 is_last = is_short = 1;
699 if (likely(req->usb_req.length !=
700 req->usb_req.actual) || req->usb_req.zero)
705 dev_dbg(udc->dev, "%s: wrote %s %d bytes%s%s %d left %p\n",
706 __func__, ep->ep_usb.name, length, is_last ? "/L" : "",
707 is_short ? "/S" : "",
708 req->usb_req.length - req->usb_req.actual, req);
711 xudc_done(ep, req, 0);
716 dev_dbg(udc->dev, "Send busy\n");
720 /* DMA error, dequeue the request */
721 xudc_done(ep, req, -ECONNRESET);
730 * xudc_nuke - Cleans up the data transfer message list.
731 * @ep: pointer to the usb device endpoint structure.
732 * @status: Status of the data transfer.
734 static void xudc_nuke(struct xusb_ep *ep, int status)
736 struct xusb_req *req;
738 while (!list_empty(&ep->queue)) {
739 req = list_first_entry(&ep->queue, struct xusb_req, queue);
740 xudc_done(ep, req, status);
745 * xudc_ep_set_halt - Stalls/unstalls the given endpoint.
746 * @_ep: pointer to the usb device endpoint structure.
747 * @value: value to indicate stall/unstall.
749 * Return: 0 for success and error value on failure
751 static int xudc_ep_set_halt(struct usb_ep *_ep, int value)
753 struct xusb_ep *ep = to_xusb_ep(_ep);
754 struct xusb_udc *udc;
758 if (!_ep || (!ep->desc && ep->epnumber)) {
759 pr_debug("%s: bad ep or descriptor\n", __func__);
764 if (ep->is_in && (!list_empty(&ep->queue)) && value) {
765 dev_dbg(udc->dev, "requests pending can't halt\n");
769 if (ep->buffer0ready || ep->buffer1ready) {
770 dev_dbg(udc->dev, "HW buffers busy can't halt\n");
774 spin_lock_irqsave(&udc->lock, flags);
777 /* Stall the device.*/
778 epcfgreg = udc->read_fn(udc->addr + ep->offset);
779 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
780 udc->write_fn(udc->addr, ep->offset, epcfgreg);
782 /* Unstall the device.*/
783 epcfgreg = udc->read_fn(udc->addr + ep->offset);
784 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
785 udc->write_fn(udc->addr, ep->offset, epcfgreg);
787 /* Reset the toggle bit.*/
788 epcfgreg = udc->read_fn(ep->udc->addr + ep->offset);
789 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
790 udc->write_fn(udc->addr, ep->offset, epcfgreg);
794 spin_unlock_irqrestore(&udc->lock, flags);
799 * xudc_ep_enable - Enables the given endpoint.
800 * @ep: pointer to the xusb endpoint structure.
801 * @desc: pointer to usb endpoint descriptor.
803 * Return: 0 for success and error value on failure
805 static int __xudc_ep_enable(struct xusb_ep *ep,
806 const struct usb_endpoint_descriptor *desc)
808 struct xusb_udc *udc = ep->udc;
814 ep->is_in = ((desc->bEndpointAddress & USB_DIR_IN) != 0);
815 /* Bit 3...0:endpoint number */
816 ep->epnumber = (desc->bEndpointAddress & 0x0f);
818 ep->ep_usb.desc = desc;
819 tmp = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
820 ep->ep_usb.maxpacket = maxpacket = le16_to_cpu(desc->wMaxPacketSize);
823 case USB_ENDPOINT_XFER_CONTROL:
824 dev_dbg(udc->dev, "only one control endpoint\n");
828 case USB_ENDPOINT_XFER_INT:
831 if (maxpacket > 64) {
832 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
836 case USB_ENDPOINT_XFER_BULK:
839 if (!(is_power_of_2(maxpacket) && maxpacket >= 8 &&
841 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
845 case USB_ENDPOINT_XFER_ISOC:
851 ep->buffer0ready = 0;
852 ep->buffer1ready = 0;
854 ep->rambase = rambase[ep->epnumber];
855 xudc_epconfig(ep, udc);
857 dev_dbg(udc->dev, "Enable Endpoint %d max pkt is %d\n",
858 ep->epnumber, maxpacket);
860 /* Enable the End point.*/
861 epcfg = udc->read_fn(udc->addr + ep->offset);
862 epcfg |= XUSB_EP_CFG_VALID_MASK;
863 udc->write_fn(udc->addr, ep->offset, epcfg);
867 /* Enable buffer completion interrupts for endpoint */
868 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
869 ier |= (XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK << ep->epnumber);
870 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
872 /* for OUT endpoint set buffers ready to receive */
873 if (ep->epnumber && !ep->is_in) {
874 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
876 ep->buffer0ready = 1;
877 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
878 (1 << (ep->epnumber +
879 XUSB_STATUS_EP_BUFF2_SHIFT)));
880 ep->buffer1ready = 1;
887 * xudc_ep_enable - Enables the given endpoint.
888 * @_ep: pointer to the usb endpoint structure.
889 * @desc: pointer to usb endpoint descriptor.
891 * Return: 0 for success and error value on failure
893 static int xudc_ep_enable(struct usb_ep *_ep,
894 const struct usb_endpoint_descriptor *desc)
897 struct xusb_udc *udc;
901 if (!_ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
902 pr_debug("%s: bad ep or descriptor\n", __func__);
906 ep = to_xusb_ep(_ep);
909 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
910 dev_dbg(udc->dev, "bogus device state\n");
914 spin_lock_irqsave(&udc->lock, flags);
915 ret = __xudc_ep_enable(ep, desc);
916 spin_unlock_irqrestore(&udc->lock, flags);
922 * xudc_ep_disable - Disables the given endpoint.
923 * @_ep: pointer to the usb endpoint structure.
925 * Return: 0 for success and error value on failure
927 static int xudc_ep_disable(struct usb_ep *_ep)
932 struct xusb_udc *udc;
935 pr_debug("%s: invalid ep\n", __func__);
939 ep = to_xusb_ep(_ep);
942 spin_lock_irqsave(&udc->lock, flags);
944 xudc_nuke(ep, -ESHUTDOWN);
946 /* Restore the endpoint's pristine config */
948 ep->ep_usb.desc = NULL;
950 dev_dbg(udc->dev, "USB Ep %d disable\n ", ep->epnumber);
951 /* Disable the endpoint.*/
952 epcfg = udc->read_fn(udc->addr + ep->offset);
953 epcfg &= ~XUSB_EP_CFG_VALID_MASK;
954 udc->write_fn(udc->addr, ep->offset, epcfg);
956 spin_unlock_irqrestore(&udc->lock, flags);
961 * xudc_ep_alloc_request - Initializes the request queue.
962 * @_ep: pointer to the usb endpoint structure.
963 * @gfp_flags: Flags related to the request call.
965 * Return: pointer to request structure on success and a NULL on failure.
967 static struct usb_request *xudc_ep_alloc_request(struct usb_ep *_ep,
970 struct xusb_ep *ep = to_xusb_ep(_ep);
971 struct xusb_udc *udc;
972 struct xusb_req *req;
975 req = kzalloc(sizeof(*req), gfp_flags);
980 INIT_LIST_HEAD(&req->queue);
981 return &req->usb_req;
985 * xudc_free_request - Releases the request from queue.
986 * @_ep: pointer to the usb device endpoint structure.
987 * @_req: pointer to the usb request structure.
989 static void xudc_free_request(struct usb_ep *_ep, struct usb_request *_req)
991 struct xusb_req *req = to_xusb_req(_req);
997 * xudc_ep0_queue - Adds the request to endpoint 0 queue.
998 * @ep0: pointer to the xusb endpoint 0 structure.
999 * @req: pointer to the xusb request structure.
1001 * Return: 0 for success and error value on failure
1003 static int __xudc_ep0_queue(struct xusb_ep *ep0, struct xusb_req *req)
1005 struct xusb_udc *udc = ep0->udc;
1009 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1010 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1013 if (!list_empty(&ep0->queue)) {
1014 dev_dbg(udc->dev, "%s:ep0 busy\n", __func__);
1018 req->usb_req.status = -EINPROGRESS;
1019 req->usb_req.actual = 0;
1021 list_add_tail(&req->queue, &ep0->queue);
1023 if (udc->setup.bRequestType & USB_DIR_IN) {
1024 prefetch(req->usb_req.buf);
1025 length = req->usb_req.length;
1026 corebuf = (void __force *) ((ep0->rambase << 2) +
1028 length = req->usb_req.actual = min_t(u32, length,
1030 memcpy(corebuf, req->usb_req.buf, length);
1031 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, length);
1032 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1034 if (udc->setup.wLength) {
1035 /* Enable EP0 buffer to receive data */
1036 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1037 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1047 * xudc_ep0_queue - Adds the request to endpoint 0 queue.
1048 * @_ep: pointer to the usb endpoint 0 structure.
1049 * @_req: pointer to the usb request structure.
1050 * @gfp_flags: Flags related to the request call.
1052 * Return: 0 for success and error value on failure
1054 static int xudc_ep0_queue(struct usb_ep *_ep, struct usb_request *_req,
1057 struct xusb_req *req = to_xusb_req(_req);
1058 struct xusb_ep *ep0 = to_xusb_ep(_ep);
1059 struct xusb_udc *udc = ep0->udc;
1060 unsigned long flags;
1063 spin_lock_irqsave(&udc->lock, flags);
1064 ret = __xudc_ep0_queue(ep0, req);
1065 spin_unlock_irqrestore(&udc->lock, flags);
1071 * xudc_ep_queue - Adds the request to endpoint queue.
1072 * @_ep: pointer to the usb endpoint structure.
1073 * @_req: pointer to the usb request structure.
1074 * @gfp_flags: Flags related to the request call.
1076 * Return: 0 for success and error value on failure
1078 static int xudc_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1081 struct xusb_req *req = to_xusb_req(_req);
1082 struct xusb_ep *ep = to_xusb_ep(_ep);
1083 struct xusb_udc *udc = ep->udc;
1085 unsigned long flags;
1088 dev_dbg(udc->dev, "%s:queing request to disabled %s\n",
1089 __func__, ep->name);
1093 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1094 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1098 spin_lock_irqsave(&udc->lock, flags);
1100 _req->status = -EINPROGRESS;
1103 if (udc->dma_enabled) {
1104 ret = usb_gadget_map_request(&udc->gadget, &req->usb_req,
1107 dev_dbg(udc->dev, "gadget_map failed ep%d\n",
1109 spin_unlock_irqrestore(&udc->lock, flags);
1114 if (list_empty(&ep->queue)) {
1116 dev_dbg(udc->dev, "xudc_write_fifo from ep_queue\n");
1117 if (!xudc_write_fifo(ep, req))
1120 dev_dbg(udc->dev, "xudc_read_fifo from ep_queue\n");
1121 if (!xudc_read_fifo(ep, req))
1127 list_add_tail(&req->queue, &ep->queue);
1129 spin_unlock_irqrestore(&udc->lock, flags);
1134 * xudc_ep_dequeue - Removes the request from the queue.
1135 * @_ep: pointer to the usb device endpoint structure.
1136 * @_req: pointer to the usb request structure.
1138 * Return: 0 for success and error value on failure
1140 static int xudc_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1142 struct xusb_ep *ep = to_xusb_ep(_ep);
1143 struct xusb_req *req = to_xusb_req(_req);
1144 struct xusb_udc *udc = ep->udc;
1145 unsigned long flags;
1147 spin_lock_irqsave(&udc->lock, flags);
1148 /* Make sure it's actually queued on this endpoint */
1149 list_for_each_entry(req, &ep->queue, queue) {
1150 if (&req->usb_req == _req)
1153 if (&req->usb_req != _req) {
1154 spin_unlock_irqrestore(&ep->udc->lock, flags);
1157 xudc_done(ep, req, -ECONNRESET);
1158 spin_unlock_irqrestore(&udc->lock, flags);
1164 * xudc_ep0_enable - Enables the given endpoint.
1165 * @ep: pointer to the usb endpoint structure.
1166 * @desc: pointer to usb endpoint descriptor.
1168 * Return: error always.
1170 * endpoint 0 enable should not be called by gadget layer.
1172 static int xudc_ep0_enable(struct usb_ep *ep,
1173 const struct usb_endpoint_descriptor *desc)
1179 * xudc_ep0_disable - Disables the given endpoint.
1180 * @ep: pointer to the usb endpoint structure.
1182 * Return: error always.
1184 * endpoint 0 disable should not be called by gadget layer.
1186 static int xudc_ep0_disable(struct usb_ep *ep)
1191 static const struct usb_ep_ops xusb_ep0_ops = {
1192 .enable = xudc_ep0_enable,
1193 .disable = xudc_ep0_disable,
1194 .alloc_request = xudc_ep_alloc_request,
1195 .free_request = xudc_free_request,
1196 .queue = xudc_ep0_queue,
1197 .dequeue = xudc_ep_dequeue,
1198 .set_halt = xudc_ep_set_halt,
1201 static const struct usb_ep_ops xusb_ep_ops = {
1202 .enable = xudc_ep_enable,
1203 .disable = xudc_ep_disable,
1204 .alloc_request = xudc_ep_alloc_request,
1205 .free_request = xudc_free_request,
1206 .queue = xudc_ep_queue,
1207 .dequeue = xudc_ep_dequeue,
1208 .set_halt = xudc_ep_set_halt,
1212 * xudc_get_frame - Reads the current usb frame number.
1213 * @gadget: pointer to the usb gadget structure.
1215 * Return: current frame number for success and error value on failure.
1217 static int xudc_get_frame(struct usb_gadget *gadget)
1219 struct xusb_udc *udc;
1225 udc = to_udc(gadget);
1226 frame = udc->read_fn(udc->addr + XUSB_FRAMENUM_OFFSET);
1231 * xudc_wakeup - Send remote wakeup signal to host
1232 * @gadget: pointer to the usb gadget structure.
1234 * Return: 0 on success and error on failure
1236 static int xudc_wakeup(struct usb_gadget *gadget)
1238 struct xusb_udc *udc = to_udc(gadget);
1240 int status = -EINVAL;
1241 unsigned long flags;
1243 spin_lock_irqsave(&udc->lock, flags);
1245 /* Remote wake up not enabled by host */
1246 if (!udc->remote_wkp)
1249 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1250 crtlreg |= XUSB_CONTROL_USB_RMTWAKE_MASK;
1251 /* set remote wake up bit */
1252 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1254 * wait for a while and reset remote wake up bit since this bit
1255 * is not cleared by HW after sending remote wakeup to host.
1259 crtlreg &= ~XUSB_CONTROL_USB_RMTWAKE_MASK;
1260 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1263 spin_unlock_irqrestore(&udc->lock, flags);
1268 * xudc_pullup - start/stop USB traffic
1269 * @gadget: pointer to the usb gadget structure.
1270 * @is_on: flag to start or stop
1274 * This function starts/stops SIE engine of IP based on is_on.
1276 static int xudc_pullup(struct usb_gadget *gadget, int is_on)
1278 struct xusb_udc *udc = to_udc(gadget);
1279 unsigned long flags;
1282 spin_lock_irqsave(&udc->lock, flags);
1284 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1286 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
1288 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
1290 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1292 spin_unlock_irqrestore(&udc->lock, flags);
1298 * xudc_eps_init - initialize endpoints.
1299 * @udc: pointer to the usb device controller structure.
1301 static void xudc_eps_init(struct xusb_udc *udc)
1305 INIT_LIST_HEAD(&udc->gadget.ep_list);
1307 for (ep_number = 0; ep_number < XUSB_MAX_ENDPOINTS; ep_number++) {
1308 struct xusb_ep *ep = &udc->ep[ep_number];
1311 list_add_tail(&ep->ep_usb.ep_list,
1312 &udc->gadget.ep_list);
1313 usb_ep_set_maxpacket_limit(&ep->ep_usb,
1314 (unsigned short) ~0);
1315 snprintf(ep->name, EPNAME_SIZE, "ep%d", ep_number);
1316 ep->ep_usb.name = ep->name;
1317 ep->ep_usb.ops = &xusb_ep_ops;
1319 ep->ep_usb.caps.type_iso = true;
1320 ep->ep_usb.caps.type_bulk = true;
1321 ep->ep_usb.caps.type_int = true;
1323 ep->ep_usb.name = ep0name;
1324 usb_ep_set_maxpacket_limit(&ep->ep_usb, EP0_MAX_PACKET);
1325 ep->ep_usb.ops = &xusb_ep0_ops;
1327 ep->ep_usb.caps.type_control = true;
1330 ep->ep_usb.caps.dir_in = true;
1331 ep->ep_usb.caps.dir_out = true;
1334 ep->epnumber = ep_number;
1337 * The configuration register address offset between
1338 * each endpoint is 0x10.
1340 ep->offset = XUSB_EP0_CONFIG_OFFSET + (ep_number * 0x10);
1344 xudc_epconfig(ep, udc);
1346 /* Initialize one queue per endpoint */
1347 INIT_LIST_HEAD(&ep->queue);
1352 * xudc_stop_activity - Stops any further activity on the device.
1353 * @udc: pointer to the usb device controller structure.
1355 static void xudc_stop_activity(struct xusb_udc *udc)
1360 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1362 xudc_nuke(ep, -ESHUTDOWN);
1367 * xudc_start - Starts the device.
1368 * @gadget: pointer to the usb gadget structure
1369 * @driver: pointer to gadget driver structure
1371 * Return: zero on success and error on failure
1373 static int xudc_start(struct usb_gadget *gadget,
1374 struct usb_gadget_driver *driver)
1376 struct xusb_udc *udc = to_udc(gadget);
1377 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1378 const struct usb_endpoint_descriptor *desc = &config_bulk_out_desc;
1379 unsigned long flags;
1382 spin_lock_irqsave(&udc->lock, flags);
1385 dev_err(udc->dev, "%s is already bound to %s\n",
1386 udc->gadget.name, udc->driver->driver.name);
1391 /* hook up the driver */
1392 udc->driver = driver;
1393 udc->gadget.speed = driver->max_speed;
1395 /* Enable the control endpoint. */
1396 ret = __xudc_ep_enable(ep0, desc);
1398 /* Set device address and remote wakeup to 0 */
1399 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1400 udc->remote_wkp = 0;
1402 spin_unlock_irqrestore(&udc->lock, flags);
1407 * xudc_stop - stops the device.
1408 * @gadget: pointer to the usb gadget structure
1409 * @driver: pointer to usb gadget driver structure
1411 * Return: zero always
1413 static int xudc_stop(struct usb_gadget *gadget)
1415 struct xusb_udc *udc = to_udc(gadget);
1416 unsigned long flags;
1418 spin_lock_irqsave(&udc->lock, flags);
1420 udc->gadget.speed = USB_SPEED_UNKNOWN;
1423 /* Set device address and remote wakeup to 0 */
1424 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1425 udc->remote_wkp = 0;
1427 xudc_stop_activity(udc);
1429 spin_unlock_irqrestore(&udc->lock, flags);
1434 static const struct usb_gadget_ops xusb_udc_ops = {
1435 .get_frame = xudc_get_frame,
1436 .wakeup = xudc_wakeup,
1437 .pullup = xudc_pullup,
1438 .udc_start = xudc_start,
1439 .udc_stop = xudc_stop,
1443 * xudc_clear_stall_all_ep - clears stall of every endpoint.
1444 * @udc: pointer to the udc structure.
1446 static void xudc_clear_stall_all_ep(struct xusb_udc *udc)
1452 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1454 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1455 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1456 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1458 /* Reset the toggle bit.*/
1459 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1460 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
1461 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1467 * xudc_startup_handler - The usb device controller interrupt handler.
1468 * @udc: pointer to the udc structure.
1469 * @intrstatus: The mask value containing the interrupt sources.
1471 * This function handles the RESET,SUSPEND,RESUME and DISCONNECT interrupts.
1473 static void xudc_startup_handler(struct xusb_udc *udc, u32 intrstatus)
1477 if (intrstatus & XUSB_STATUS_RESET_MASK) {
1479 dev_dbg(udc->dev, "Reset\n");
1481 if (intrstatus & XUSB_STATUS_HIGH_SPEED_MASK)
1482 udc->gadget.speed = USB_SPEED_HIGH;
1484 udc->gadget.speed = USB_SPEED_FULL;
1486 xudc_stop_activity(udc);
1487 xudc_clear_stall_all_ep(udc);
1488 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
1490 /* Set device address and remote wakeup to 0 */
1491 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1492 udc->remote_wkp = 0;
1494 /* Enable the suspend, resume and disconnect */
1495 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1496 intrreg |= XUSB_STATUS_SUSPEND_MASK | XUSB_STATUS_RESUME_MASK |
1497 XUSB_STATUS_DISCONNECT_MASK;
1498 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1500 if (intrstatus & XUSB_STATUS_SUSPEND_MASK) {
1502 dev_dbg(udc->dev, "Suspend\n");
1504 /* Enable the reset, resume and disconnect */
1505 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1506 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1507 XUSB_STATUS_DISCONNECT_MASK;
1508 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1510 udc->usb_state = USB_STATE_SUSPENDED;
1512 if (udc->driver->suspend) {
1513 spin_unlock(&udc->lock);
1514 udc->driver->suspend(&udc->gadget);
1515 spin_lock(&udc->lock);
1518 if (intrstatus & XUSB_STATUS_RESUME_MASK) {
1519 bool condition = (udc->usb_state != USB_STATE_SUSPENDED);
1521 dev_WARN_ONCE(udc->dev, condition,
1522 "Resume IRQ while not suspended\n");
1524 dev_dbg(udc->dev, "Resume\n");
1526 /* Enable the reset, suspend and disconnect */
1527 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1528 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_SUSPEND_MASK |
1529 XUSB_STATUS_DISCONNECT_MASK;
1530 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1534 if (udc->driver->resume) {
1535 spin_unlock(&udc->lock);
1536 udc->driver->resume(&udc->gadget);
1537 spin_lock(&udc->lock);
1540 if (intrstatus & XUSB_STATUS_DISCONNECT_MASK) {
1542 dev_dbg(udc->dev, "Disconnect\n");
1544 /* Enable the reset, resume and suspend */
1545 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1546 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1547 XUSB_STATUS_SUSPEND_MASK;
1548 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1550 if (udc->driver && udc->driver->disconnect) {
1551 spin_unlock(&udc->lock);
1552 udc->driver->disconnect(&udc->gadget);
1553 spin_lock(&udc->lock);
1559 * xudc_ep0_stall - Stall endpoint zero.
1560 * @udc: pointer to the udc structure.
1562 * This function stalls endpoint zero.
1564 static void xudc_ep0_stall(struct xusb_udc *udc)
1567 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1569 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1570 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1571 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1575 * xudc_setaddress - executes SET_ADDRESS command
1576 * @udc: pointer to the udc structure.
1578 * This function executes USB SET_ADDRESS command
1580 static void xudc_setaddress(struct xusb_udc *udc)
1582 struct xusb_ep *ep0 = &udc->ep[0];
1583 struct xusb_req *req = udc->req;
1586 req->usb_req.length = 0;
1587 ret = __xudc_ep0_queue(ep0, req);
1591 dev_err(udc->dev, "Can't respond to SET ADDRESS request\n");
1592 xudc_ep0_stall(udc);
1596 * xudc_getstatus - executes GET_STATUS command
1597 * @udc: pointer to the udc structure.
1599 * This function executes USB GET_STATUS command
1601 static void xudc_getstatus(struct xusb_udc *udc)
1603 struct xusb_ep *ep0 = &udc->ep[0];
1604 struct xusb_req *req = udc->req;
1605 struct xusb_ep *target_ep;
1612 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
1613 case USB_RECIP_DEVICE:
1614 /* Get device status */
1615 status = 1 << USB_DEVICE_SELF_POWERED;
1616 if (udc->remote_wkp)
1617 status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1619 case USB_RECIP_INTERFACE:
1621 case USB_RECIP_ENDPOINT:
1622 epnum = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1623 if (epnum >= XUSB_MAX_ENDPOINTS)
1625 target_ep = &udc->ep[epnum];
1626 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1627 halt = epcfgreg & XUSB_EP_CFG_STALL_MASK;
1628 if (udc->setup.wIndex & USB_DIR_IN) {
1629 if (!target_ep->is_in)
1632 if (target_ep->is_in)
1636 status = 1 << USB_ENDPOINT_HALT;
1642 req->usb_req.length = 2;
1643 *(u16 *)req->usb_req.buf = cpu_to_le16(status);
1644 ret = __xudc_ep0_queue(ep0, req);
1648 dev_err(udc->dev, "Can't respond to getstatus request\n");
1649 xudc_ep0_stall(udc);
1653 * xudc_set_clear_feature - Executes the set feature and clear feature commands.
1654 * @udc: pointer to the usb device controller structure.
1656 * Processes the SET_FEATURE and CLEAR_FEATURE commands.
1658 static void xudc_set_clear_feature(struct xusb_udc *udc)
1660 struct xusb_ep *ep0 = &udc->ep[0];
1661 struct xusb_req *req = udc->req;
1662 struct xusb_ep *target_ep;
1666 int flag = (udc->setup.bRequest == USB_REQ_SET_FEATURE ? 1 : 0);
1669 switch (udc->setup.bRequestType) {
1670 case USB_RECIP_DEVICE:
1671 switch (udc->setup.wValue) {
1672 case USB_DEVICE_TEST_MODE:
1674 * The Test Mode will be executed
1675 * after the status phase.
1678 case USB_DEVICE_REMOTE_WAKEUP:
1680 udc->remote_wkp = 1;
1682 udc->remote_wkp = 0;
1685 xudc_ep0_stall(udc);
1689 case USB_RECIP_ENDPOINT:
1690 if (!udc->setup.wValue) {
1691 endpoint = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1692 if (endpoint >= XUSB_MAX_ENDPOINTS) {
1693 xudc_ep0_stall(udc);
1696 target_ep = &udc->ep[endpoint];
1697 outinbit = udc->setup.wIndex & USB_ENDPOINT_DIR_MASK;
1698 outinbit = outinbit >> 7;
1700 /* Make sure direction matches.*/
1701 if (outinbit != target_ep->is_in) {
1702 xudc_ep0_stall(udc);
1705 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1707 /* Clear the stall.*/
1708 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1709 udc->write_fn(udc->addr,
1710 target_ep->offset, epcfgreg);
1713 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1714 udc->write_fn(udc->addr,
1718 /* Unstall the endpoint.*/
1719 epcfgreg &= ~(XUSB_EP_CFG_STALL_MASK |
1720 XUSB_EP_CFG_DATA_TOGGLE_MASK);
1721 udc->write_fn(udc->addr,
1729 xudc_ep0_stall(udc);
1733 req->usb_req.length = 0;
1734 ret = __xudc_ep0_queue(ep0, req);
1738 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
1739 xudc_ep0_stall(udc);
1743 * xudc_handle_setup - Processes the setup packet.
1744 * @udc: pointer to the usb device controller structure.
1746 * Process setup packet and delegate to gadget layer.
1748 static void xudc_handle_setup(struct xusb_udc *udc)
1750 struct xusb_ep *ep0 = &udc->ep[0];
1751 struct usb_ctrlrequest setup;
1754 /* Load up the chapter 9 command buffer.*/
1755 ep0rambase = (u32 __force *) (udc->addr + XUSB_SETUP_PKT_ADDR_OFFSET);
1756 memcpy(&setup, ep0rambase, 8);
1759 udc->setup.wValue = cpu_to_le16(setup.wValue);
1760 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
1761 udc->setup.wLength = cpu_to_le16(setup.wLength);
1763 /* Clear previous requests */
1764 xudc_nuke(ep0, -ECONNRESET);
1766 if (udc->setup.bRequestType & USB_DIR_IN) {
1767 /* Execute the get command.*/
1768 udc->setupseqrx = STATUS_PHASE;
1769 udc->setupseqtx = DATA_PHASE;
1771 /* Execute the put command.*/
1772 udc->setupseqrx = DATA_PHASE;
1773 udc->setupseqtx = STATUS_PHASE;
1776 switch (udc->setup.bRequest) {
1777 case USB_REQ_GET_STATUS:
1778 /* Data+Status phase form udc */
1779 if ((udc->setup.bRequestType &
1780 (USB_DIR_IN | USB_TYPE_MASK)) !=
1781 (USB_DIR_IN | USB_TYPE_STANDARD))
1783 xudc_getstatus(udc);
1785 case USB_REQ_SET_ADDRESS:
1786 /* Status phase from udc */
1787 if (udc->setup.bRequestType != (USB_DIR_OUT |
1788 USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1790 xudc_setaddress(udc);
1792 case USB_REQ_CLEAR_FEATURE:
1793 case USB_REQ_SET_FEATURE:
1794 /* Requests with no data phase, status phase from udc */
1795 if ((udc->setup.bRequestType & USB_TYPE_MASK)
1796 != USB_TYPE_STANDARD)
1798 xudc_set_clear_feature(udc);
1804 spin_unlock(&udc->lock);
1805 if (udc->driver->setup(&udc->gadget, &setup) < 0)
1806 xudc_ep0_stall(udc);
1807 spin_lock(&udc->lock);
1811 * xudc_ep0_out - Processes the endpoint 0 OUT token.
1812 * @udc: pointer to the usb device controller structure.
1814 static void xudc_ep0_out(struct xusb_udc *udc)
1816 struct xusb_ep *ep0 = &udc->ep[0];
1817 struct xusb_req *req;
1819 unsigned int bytes_to_rx;
1822 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1824 switch (udc->setupseqrx) {
1827 * This resets both state machines for the next
1830 udc->setupseqrx = SETUP_PHASE;
1831 udc->setupseqtx = SETUP_PHASE;
1832 req->usb_req.actual = req->usb_req.length;
1833 xudc_done(ep0, req, 0);
1836 bytes_to_rx = udc->read_fn(udc->addr +
1837 XUSB_EP_BUF0COUNT_OFFSET);
1838 /* Copy the data to be received from the DPRAM. */
1839 ep0rambase = (u8 __force *) (udc->addr +
1840 (ep0->rambase << 2));
1841 buffer = req->usb_req.buf + req->usb_req.actual;
1842 req->usb_req.actual = req->usb_req.actual + bytes_to_rx;
1843 memcpy(buffer, ep0rambase, bytes_to_rx);
1845 if (req->usb_req.length == req->usb_req.actual) {
1846 /* Data transfer completed get ready for Status stage */
1849 /* Enable EP0 buffer to receive data */
1850 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1851 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1860 * xudc_ep0_in - Processes the endpoint 0 IN token.
1861 * @udc: pointer to the usb device controller structure.
1863 static void xudc_ep0_in(struct xusb_udc *udc)
1865 struct xusb_ep *ep0 = &udc->ep[0];
1866 struct xusb_req *req;
1867 unsigned int bytes_to_tx;
1873 u8 test_mode = udc->setup.wIndex >> 8;
1875 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1876 bytes_to_tx = req->usb_req.length - req->usb_req.actual;
1878 switch (udc->setupseqtx) {
1880 switch (udc->setup.bRequest) {
1881 case USB_REQ_SET_ADDRESS:
1882 /* Set the address of the device.*/
1883 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET,
1886 case USB_REQ_SET_FEATURE:
1887 if (udc->setup.bRequestType ==
1889 if (udc->setup.wValue ==
1890 USB_DEVICE_TEST_MODE)
1891 udc->write_fn(udc->addr,
1892 XUSB_TESTMODE_OFFSET,
1897 req->usb_req.actual = req->usb_req.length;
1898 xudc_done(ep0, req, 0);
1903 * We're done with data transfer, next
1904 * will be zero length OUT with data toggle of
1905 * 1. Setup data_toggle.
1907 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1908 epcfgreg |= XUSB_EP_CFG_DATA_TOGGLE_MASK;
1909 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1910 udc->setupseqtx = STATUS_PHASE;
1912 length = count = min_t(u32, bytes_to_tx,
1914 /* Copy the data to be transmitted into the DPRAM. */
1915 ep0rambase = (u8 __force *) (udc->addr +
1916 (ep0->rambase << 2));
1917 buffer = req->usb_req.buf + req->usb_req.actual;
1918 req->usb_req.actual = req->usb_req.actual + length;
1919 memcpy(ep0rambase, buffer, length);
1921 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, count);
1922 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1930 * xudc_ctrl_ep_handler - Endpoint 0 interrupt handler.
1931 * @udc: pointer to the udc structure.
1932 * @intrstatus: It's the mask value for the interrupt sources on endpoint 0.
1934 * Processes the commands received during enumeration phase.
1936 static void xudc_ctrl_ep_handler(struct xusb_udc *udc, u32 intrstatus)
1939 if (intrstatus & XUSB_STATUS_SETUP_PACKET_MASK) {
1940 xudc_handle_setup(udc);
1942 if (intrstatus & XUSB_STATUS_FIFO_BUFF_RDY_MASK)
1944 else if (intrstatus & XUSB_STATUS_FIFO_BUFF_FREE_MASK)
1950 * xudc_nonctrl_ep_handler - Non control endpoint interrupt handler.
1951 * @udc: pointer to the udc structure.
1952 * @epnum: End point number for which the interrupt is to be processed
1953 * @intrstatus: mask value for interrupt sources of endpoints other
1956 * Processes the buffer completion interrupts.
1958 static void xudc_nonctrl_ep_handler(struct xusb_udc *udc, u8 epnum,
1962 struct xusb_req *req;
1965 ep = &udc->ep[epnum];
1966 /* Process the End point interrupts.*/
1967 if (intrstatus & (XUSB_STATUS_EP0_BUFF1_COMP_MASK << epnum))
1968 ep->buffer0ready = 0;
1969 if (intrstatus & (XUSB_STATUS_EP0_BUFF2_COMP_MASK << epnum))
1970 ep->buffer1ready = 0;
1972 if (list_empty(&ep->queue))
1975 req = list_first_entry(&ep->queue, struct xusb_req, queue);
1978 xudc_write_fifo(ep, req);
1980 xudc_read_fifo(ep, req);
1984 * xudc_irq - The main interrupt handler.
1985 * @irq: The interrupt number.
1986 * @_udc: pointer to the usb device controller structure.
1988 * Return: IRQ_HANDLED after the interrupt is handled.
1990 static irqreturn_t xudc_irq(int irq, void *_udc)
1992 struct xusb_udc *udc = _udc;
1997 unsigned long flags;
1999 spin_lock_irqsave(&udc->lock, flags);
2002 * Event interrupts are level sensitive hence first disable
2003 * IER, read ISR and figure out active interrupts.
2005 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2006 ier &= ~XUSB_STATUS_INTR_EVENT_MASK;
2007 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2009 /* Read the Interrupt Status Register.*/
2010 intrstatus = udc->read_fn(udc->addr + XUSB_STATUS_OFFSET);
2012 /* Call the handler for the event interrupt.*/
2013 if (intrstatus & XUSB_STATUS_INTR_EVENT_MASK) {
2015 * Check if there is any action to be done for :
2016 * - USB Reset received {XUSB_STATUS_RESET_MASK}
2017 * - USB Suspend received {XUSB_STATUS_SUSPEND_MASK}
2018 * - USB Resume received {XUSB_STATUS_RESUME_MASK}
2019 * - USB Disconnect received {XUSB_STATUS_DISCONNECT_MASK}
2021 xudc_startup_handler(udc, intrstatus);
2024 /* Check the buffer completion interrupts */
2025 if (intrstatus & XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK) {
2026 /* Enable Reset, Suspend, Resume and Disconnect */
2027 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2028 ier |= XUSB_STATUS_INTR_EVENT_MASK;
2029 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2031 if (intrstatus & XUSB_STATUS_EP0_BUFF1_COMP_MASK)
2032 xudc_ctrl_ep_handler(udc, intrstatus);
2034 for (index = 1; index < 8; index++) {
2035 bufintr = ((intrstatus &
2036 (XUSB_STATUS_EP1_BUFF1_COMP_MASK <<
2037 (index - 1))) || (intrstatus &
2038 (XUSB_STATUS_EP1_BUFF2_COMP_MASK <<
2041 xudc_nonctrl_ep_handler(udc, index,
2047 spin_unlock_irqrestore(&udc->lock, flags);
2052 * xudc_probe - The device probe function for driver initialization.
2053 * @pdev: pointer to the platform device structure.
2055 * Return: 0 for success and error value on failure
2057 static int xudc_probe(struct platform_device *pdev)
2059 struct device_node *np = pdev->dev.of_node;
2060 struct resource *res;
2061 struct xusb_udc *udc;
2067 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2071 /* Create a dummy request for GET_STATUS, SET_ADDRESS */
2072 udc->req = devm_kzalloc(&pdev->dev, sizeof(struct xusb_req),
2077 buff = devm_kzalloc(&pdev->dev, STATUSBUFF_SIZE, GFP_KERNEL);
2081 udc->req->usb_req.buf = buff;
2083 /* Map the registers */
2084 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2085 udc->addr = devm_ioremap_resource(&pdev->dev, res);
2086 if (IS_ERR(udc->addr))
2087 return PTR_ERR(udc->addr);
2089 irq = platform_get_irq(pdev, 0);
2091 dev_err(&pdev->dev, "unable to get irq\n");
2094 ret = devm_request_irq(&pdev->dev, irq, xudc_irq, 0,
2095 dev_name(&pdev->dev), udc);
2097 dev_dbg(&pdev->dev, "unable to request irq %d", irq);
2101 udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma");
2103 /* Setup gadget structure */
2104 udc->gadget.ops = &xusb_udc_ops;
2105 udc->gadget.max_speed = USB_SPEED_HIGH;
2106 udc->gadget.speed = USB_SPEED_UNKNOWN;
2107 udc->gadget.ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO].ep_usb;
2108 udc->gadget.name = driver_name;
2110 spin_lock_init(&udc->lock);
2112 /* Check for IP endianness */
2113 udc->write_fn = xudc_write32_be;
2114 udc->read_fn = xudc_read32_be;
2115 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, TEST_J);
2116 if ((udc->read_fn(udc->addr + XUSB_TESTMODE_OFFSET))
2118 udc->write_fn = xudc_write32;
2119 udc->read_fn = xudc_read32;
2121 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
2125 /* Set device address to 0.*/
2126 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
2128 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2132 udc->dev = &udc->gadget.dev;
2134 /* Enable the interrupts.*/
2135 ier = XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_INTR_EVENT_MASK |
2136 XUSB_STATUS_FIFO_BUFF_RDY_MASK | XUSB_STATUS_FIFO_BUFF_FREE_MASK |
2137 XUSB_STATUS_SETUP_PACKET_MASK |
2138 XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK;
2140 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2142 platform_set_drvdata(pdev, udc);
2144 dev_vdbg(&pdev->dev, "%s at 0x%08X mapped to %p %s\n",
2145 driver_name, (u32)res->start, udc->addr,
2146 udc->dma_enabled ? "with DMA" : "without DMA");
2150 dev_err(&pdev->dev, "probe failed, %d\n", ret);
2155 * xudc_remove - Releases the resources allocated during the initialization.
2156 * @pdev: pointer to the platform device structure.
2160 static int xudc_remove(struct platform_device *pdev)
2162 struct xusb_udc *udc = platform_get_drvdata(pdev);
2164 usb_del_gadget_udc(&udc->gadget);
2169 /* Match table for of_platform binding */
2170 static const struct of_device_id usb_of_match[] = {
2171 { .compatible = "xlnx,usb2-device-4.00.a", },
2172 { /* end of list */ },
2174 MODULE_DEVICE_TABLE(of, usb_of_match);
2176 static struct platform_driver xudc_driver = {
2178 .name = driver_name,
2179 .of_match_table = usb_of_match,
2181 .probe = xudc_probe,
2182 .remove = xudc_remove,
2185 module_platform_driver(xudc_driver);
2187 MODULE_DESCRIPTION("Xilinx udc driver");
2188 MODULE_AUTHOR("Xilinx, Inc");
2189 MODULE_LICENSE("GPL");