1 // SPDX-License-Identifier: GPL-2.0+
3 * Xilinx USB peripheral controller driver
5 * Copyright (C) 2004 by Thomas Rathbone
6 * Copyright (C) 2005 by HP Labs
7 * Copyright (C) 2005 by David Brownell
8 * Copyright (C) 2010 - 2014 Xilinx, Inc.
10 * Some parts of this driver code is based on the driver for at91-series
11 * USB peripheral controller (at91_udc.c).
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
20 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/prefetch.h>
24 #include <linux/usb/ch9.h>
25 #include <linux/usb/gadget.h>
27 /* Register offsets for the USB device.*/
28 #define XUSB_EP0_CONFIG_OFFSET 0x0000 /* EP0 Config Reg Offset */
29 #define XUSB_SETUP_PKT_ADDR_OFFSET 0x0080 /* Setup Packet Address */
30 #define XUSB_ADDRESS_OFFSET 0x0100 /* Address Register */
31 #define XUSB_CONTROL_OFFSET 0x0104 /* Control Register */
32 #define XUSB_STATUS_OFFSET 0x0108 /* Status Register */
33 #define XUSB_FRAMENUM_OFFSET 0x010C /* Frame Number Register */
34 #define XUSB_IER_OFFSET 0x0110 /* Interrupt Enable Register */
35 #define XUSB_BUFFREADY_OFFSET 0x0114 /* Buffer Ready Register */
36 #define XUSB_TESTMODE_OFFSET 0x0118 /* Test Mode Register */
37 #define XUSB_DMA_RESET_OFFSET 0x0200 /* DMA Soft Reset Register */
38 #define XUSB_DMA_CONTROL_OFFSET 0x0204 /* DMA Control Register */
39 #define XUSB_DMA_DSAR_ADDR_OFFSET 0x0208 /* DMA source Address Reg */
40 #define XUSB_DMA_DDAR_ADDR_OFFSET 0x020C /* DMA destination Addr Reg */
41 #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */
42 #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */
44 /* Endpoint Configuration Space offsets */
45 #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */
46 #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */
47 #define XUSB_EP_BUF1COUNT_OFFSET 0x0C /* Buffer 1 Count */
49 #define XUSB_CONTROL_USB_READY_MASK 0x80000000 /* USB ready Mask */
50 #define XUSB_CONTROL_USB_RMTWAKE_MASK 0x40000000 /* Remote wake up mask */
52 /* Interrupt register related masks.*/
53 #define XUSB_STATUS_GLOBAL_INTR_MASK 0x80000000 /* Global Intr Enable */
54 #define XUSB_STATUS_DMADONE_MASK 0x04000000 /* DMA done Mask */
55 #define XUSB_STATUS_DMAERR_MASK 0x02000000 /* DMA Error Mask */
56 #define XUSB_STATUS_DMABUSY_MASK 0x80000000 /* DMA Error Mask */
57 #define XUSB_STATUS_RESUME_MASK 0x01000000 /* USB Resume Mask */
58 #define XUSB_STATUS_RESET_MASK 0x00800000 /* USB Reset Mask */
59 #define XUSB_STATUS_SUSPEND_MASK 0x00400000 /* USB Suspend Mask */
60 #define XUSB_STATUS_DISCONNECT_MASK 0x00200000 /* USB Disconnect Mask */
61 #define XUSB_STATUS_FIFO_BUFF_RDY_MASK 0x00100000 /* FIFO Buff Ready Mask */
62 #define XUSB_STATUS_FIFO_BUFF_FREE_MASK 0x00080000 /* FIFO Buff Free Mask */
63 #define XUSB_STATUS_SETUP_PACKET_MASK 0x00040000 /* Setup packet received */
64 #define XUSB_STATUS_EP1_BUFF2_COMP_MASK 0x00000200 /* EP 1 Buff 2 Processed */
65 #define XUSB_STATUS_EP1_BUFF1_COMP_MASK 0x00000002 /* EP 1 Buff 1 Processed */
66 #define XUSB_STATUS_EP0_BUFF2_COMP_MASK 0x00000100 /* EP 0 Buff 2 Processed */
67 #define XUSB_STATUS_EP0_BUFF1_COMP_MASK 0x00000001 /* EP 0 Buff 1 Processed */
68 #define XUSB_STATUS_HIGH_SPEED_MASK 0x00010000 /* USB Speed Mask */
69 /* Suspend,Reset,Suspend and Disconnect Mask */
70 #define XUSB_STATUS_INTR_EVENT_MASK 0x01E00000
71 /* Buffers completion Mask */
72 #define XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK 0x0000FEFF
73 /* Mask for buffer 0 and buffer 1 completion for all Endpoints */
74 #define XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK 0x00000101
75 #define XUSB_STATUS_EP_BUFF2_SHIFT 8 /* EP buffer offset */
77 /* Endpoint Configuration Status Register */
78 #define XUSB_EP_CFG_VALID_MASK 0x80000000 /* Endpoint Valid bit */
79 #define XUSB_EP_CFG_STALL_MASK 0x40000000 /* Endpoint Stall bit */
80 #define XUSB_EP_CFG_DATA_TOGGLE_MASK 0x08000000 /* Endpoint Data toggle */
82 /* USB device specific global configuration constants.*/
83 #define XUSB_MAX_ENDPOINTS 8 /* Maximum End Points */
84 #define XUSB_EP_NUMBER_ZERO 0 /* End point Zero */
85 /* DPRAM is the source address for DMA transfer */
86 #define XUSB_DMA_READ_FROM_DPRAM 0x80000000
87 #define XUSB_DMA_DMASR_BUSY 0x80000000 /* DMA busy */
88 #define XUSB_DMA_DMASR_ERROR 0x40000000 /* DMA Error */
90 * When this bit is set, the DMA buffer ready bit is set by hardware upon
91 * DMA transfer completion.
93 #define XUSB_DMA_BRR_CTRL 0x40000000 /* DMA bufready ctrl bit */
95 #define SETUP_PHASE 0x0000 /* Setup Phase */
96 #define DATA_PHASE 0x0001 /* Data Phase */
97 #define STATUS_PHASE 0x0002 /* Status Phase */
99 #define EP0_MAX_PACKET 64 /* Endpoint 0 maximum packet length */
100 #define STATUSBUFF_SIZE 2 /* Buffer size for GET_STATUS command */
101 #define EPNAME_SIZE 4 /* Buffer size for endpoint name */
103 /* container_of helper macros */
104 #define to_udc(g) container_of((g), struct xusb_udc, gadget)
105 #define to_xusb_ep(ep) container_of((ep), struct xusb_ep, ep_usb)
106 #define to_xusb_req(req) container_of((req), struct xusb_req, usb_req)
109 * struct xusb_req - Xilinx USB device request structure
110 * @usb_req: Linux usb request structure
111 * @queue: usb device request queue
112 * @ep: pointer to xusb_endpoint structure
115 struct usb_request usb_req;
116 struct list_head queue;
121 * struct xusb_ep - USB end point structure.
122 * @ep_usb: usb endpoint instance
123 * @queue: endpoint message queue
124 * @udc: xilinx usb peripheral driver instance pointer
125 * @desc: pointer to the usb endpoint descriptor
126 * @rambase: the endpoint buffer address
127 * @offset: the endpoint register offset value
128 * @name: name of the endpoint
129 * @epnumber: endpoint number
130 * @maxpacket: maximum packet size the endpoint can store
131 * @buffer0count: the size of the packet recieved in the first buffer
132 * @buffer1count: the size of the packet received in the second buffer
133 * @curbufnum: current buffer of endpoint that will be processed next
134 * @buffer0ready: the busy state of first buffer
135 * @buffer1ready: the busy state of second buffer
136 * @is_in: endpoint direction (IN or OUT)
137 * @is_iso: endpoint type(isochronous or non isochronous)
140 struct usb_ep ep_usb;
141 struct list_head queue;
142 struct xusb_udc *udc;
143 const struct usb_endpoint_descriptor *desc;
159 * struct xusb_udc - USB peripheral driver structure
160 * @gadget: USB gadget driver instance
161 * @ep: an array of endpoint structures
162 * @driver: pointer to the usb gadget driver instance
163 * @setup: usb_ctrlrequest structure for control requests
164 * @req: pointer to dummy request for get status command
165 * @dev: pointer to device structure in gadget
166 * @usb_state: device in suspended state or not
167 * @remote_wkp: remote wakeup enabled by host
168 * @setupseqtx: tx status
169 * @setupseqrx: rx status
170 * @addr: the usb device base address
171 * @lock: instance of spinlock
172 * @dma_enabled: flag indicating whether the dma is included in the system
173 * @clk: pointer to struct clk
174 * @read_fn: function pointer to read device registers
175 * @write_fn: function pointer to write to device registers
178 struct usb_gadget gadget;
179 struct xusb_ep ep[8];
180 struct usb_gadget_driver *driver;
181 struct usb_ctrlrequest setup;
182 struct xusb_req *req;
193 unsigned int (*read_fn)(void __iomem *reg);
194 void (*write_fn)(void __iomem *, u32, u32);
197 /* Endpoint buffer start addresses in the core */
198 static u32 rambase[8] = { 0x22, 0x1000, 0x1100, 0x1200, 0x1300, 0x1400, 0x1500,
201 static const char driver_name[] = "xilinx-udc";
202 static const char ep0name[] = "ep0";
204 /* Control endpoint configuration.*/
205 static const struct usb_endpoint_descriptor config_bulk_out_desc = {
206 .bLength = USB_DT_ENDPOINT_SIZE,
207 .bDescriptorType = USB_DT_ENDPOINT,
208 .bEndpointAddress = USB_DIR_OUT,
209 .bmAttributes = USB_ENDPOINT_XFER_BULK,
210 .wMaxPacketSize = cpu_to_le16(EP0_MAX_PACKET),
214 * xudc_write32 - little endian write to device registers
215 * @addr: base addr of device registers
216 * @offset: register offset
217 * @val: data to be written
219 static void xudc_write32(void __iomem *addr, u32 offset, u32 val)
221 iowrite32(val, addr + offset);
225 * xudc_read32 - little endian read from device registers
226 * @addr: addr of device register
227 * Return: value at addr
229 static unsigned int xudc_read32(void __iomem *addr)
231 return ioread32(addr);
235 * xudc_write32_be - big endian write to device registers
236 * @addr: base addr of device registers
237 * @offset: register offset
238 * @val: data to be written
240 static void xudc_write32_be(void __iomem *addr, u32 offset, u32 val)
242 iowrite32be(val, addr + offset);
246 * xudc_read32_be - big endian read from device registers
247 * @addr: addr of device register
248 * Return: value at addr
250 static unsigned int xudc_read32_be(void __iomem *addr)
252 return ioread32be(addr);
256 * xudc_wrstatus - Sets up the usb device status stages.
257 * @udc: pointer to the usb device controller structure.
259 static void xudc_wrstatus(struct xusb_udc *udc)
261 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
264 epcfgreg = udc->read_fn(udc->addr + ep0->offset)|
265 XUSB_EP_CFG_DATA_TOGGLE_MASK;
266 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
267 udc->write_fn(udc->addr, ep0->offset + XUSB_EP_BUF0COUNT_OFFSET, 0);
268 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
272 * xudc_epconfig - Configures the given endpoint.
273 * @ep: pointer to the usb device endpoint structure.
274 * @udc: pointer to the usb peripheral controller structure.
276 * This function configures a specific endpoint with the given configuration
279 static void xudc_epconfig(struct xusb_ep *ep, struct xusb_udc *udc)
284 * Configure the end point direction, type, Max Packet Size and the
285 * EP buffer location.
287 epcfgreg = ((ep->is_in << 29) | (ep->is_iso << 28) |
288 (ep->ep_usb.maxpacket << 15) | (ep->rambase));
289 udc->write_fn(udc->addr, ep->offset, epcfgreg);
291 /* Set the Buffer count and the Buffer ready bits.*/
292 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF0COUNT_OFFSET,
294 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF1COUNT_OFFSET,
296 if (ep->buffer0ready)
297 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
299 if (ep->buffer1ready)
300 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
301 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
305 * xudc_start_dma - Starts DMA transfer.
306 * @ep: pointer to the usb device endpoint structure.
307 * @src: DMA source address.
308 * @dst: DMA destination address.
309 * @length: number of bytes to transfer.
311 * Return: 0 on success, error code on failure
313 * This function starts DMA transfer by writing to DMA source,
314 * destination and lenth registers.
316 static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src,
317 dma_addr_t dst, u32 length)
319 struct xusb_udc *udc = ep->udc;
325 * Set the addresses in the DMA source and
326 * destination registers and then set the length
327 * into the DMA length register.
329 udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src);
330 udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst);
331 udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length);
334 * Wait till DMA transaction is complete and
335 * check whether the DMA transaction was
339 reg = udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET);
340 if (!(reg & XUSB_DMA_DMASR_BUSY))
344 * We can't sleep here, because it's also called from
349 dev_err(udc->dev, "DMA timeout\n");
355 if ((udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET) &
356 XUSB_DMA_DMASR_ERROR) == XUSB_DMA_DMASR_ERROR){
357 dev_err(udc->dev, "DMA Error\n");
365 * xudc_dma_send - Sends IN data using DMA.
366 * @ep: pointer to the usb device endpoint structure.
367 * @req: pointer to the usb request structure.
368 * @buffer: pointer to data to be sent.
369 * @length: number of bytes to send.
371 * Return: 0 on success, -EAGAIN if no buffer is free and error
374 * This function sends data using DMA.
376 static int xudc_dma_send(struct xusb_ep *ep, struct xusb_req *req,
377 u8 *buffer, u32 length)
382 struct xusb_udc *udc = ep->udc;
384 src = req->usb_req.dma + req->usb_req.actual;
385 if (req->usb_req.length)
386 dma_sync_single_for_device(udc->dev, src,
387 length, DMA_TO_DEVICE);
388 if (!ep->curbufnum && !ep->buffer0ready) {
389 /* Get the Buffer address and copy the transmit data.*/
390 eprambase = (u32 __force *)(udc->addr + ep->rambase);
391 dst = virt_to_phys(eprambase);
392 udc->write_fn(udc->addr, ep->offset +
393 XUSB_EP_BUF0COUNT_OFFSET, length);
394 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
395 XUSB_DMA_BRR_CTRL | (1 << ep->epnumber));
396 ep->buffer0ready = 1;
398 } else if (ep->curbufnum && !ep->buffer1ready) {
399 /* Get the Buffer address and copy the transmit data.*/
400 eprambase = (u32 __force *)(udc->addr + ep->rambase +
401 ep->ep_usb.maxpacket);
402 dst = virt_to_phys(eprambase);
403 udc->write_fn(udc->addr, ep->offset +
404 XUSB_EP_BUF1COUNT_OFFSET, length);
405 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
406 XUSB_DMA_BRR_CTRL | (1 << (ep->epnumber +
407 XUSB_STATUS_EP_BUFF2_SHIFT)));
408 ep->buffer1ready = 1;
411 /* None of ping pong buffers are ready currently .*/
415 return xudc_start_dma(ep, src, dst, length);
419 * xudc_dma_receive - Receives OUT data using DMA.
420 * @ep: pointer to the usb device endpoint structure.
421 * @req: pointer to the usb request structure.
422 * @buffer: pointer to storage buffer of received data.
423 * @length: number of bytes to receive.
425 * Return: 0 on success, -EAGAIN if no buffer is free and error
428 * This function receives data using DMA.
430 static int xudc_dma_receive(struct xusb_ep *ep, struct xusb_req *req,
431 u8 *buffer, u32 length)
436 struct xusb_udc *udc = ep->udc;
438 dst = req->usb_req.dma + req->usb_req.actual;
439 if (!ep->curbufnum && !ep->buffer0ready) {
440 /* Get the Buffer address and copy the transmit data */
441 eprambase = (u32 __force *)(udc->addr + ep->rambase);
442 src = virt_to_phys(eprambase);
443 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
444 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
445 (1 << ep->epnumber));
446 ep->buffer0ready = 1;
448 } else if (ep->curbufnum && !ep->buffer1ready) {
449 /* Get the Buffer address and copy the transmit data */
450 eprambase = (u32 __force *)(udc->addr +
451 ep->rambase + ep->ep_usb.maxpacket);
452 src = virt_to_phys(eprambase);
453 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
454 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
455 (1 << (ep->epnumber +
456 XUSB_STATUS_EP_BUFF2_SHIFT)));
457 ep->buffer1ready = 1;
460 /* None of the ping-pong buffers are ready currently */
464 return xudc_start_dma(ep, src, dst, length);
468 * xudc_eptxrx - Transmits or receives data to or from an endpoint.
469 * @ep: pointer to the usb endpoint configuration structure.
470 * @req: pointer to the usb request structure.
471 * @bufferptr: pointer to buffer containing the data to be sent.
472 * @bufferlen: The number of data bytes to be sent.
474 * Return: 0 on success, -EAGAIN if no buffer is free.
476 * This function copies the transmit/receive data to/from the end point buffer
477 * and enables the buffer for transmission/reception.
479 static int xudc_eptxrx(struct xusb_ep *ep, struct xusb_req *req,
480 u8 *bufferptr, u32 bufferlen)
485 struct xusb_udc *udc = ep->udc;
487 bytestosend = bufferlen;
488 if (udc->dma_enabled) {
490 rc = xudc_dma_send(ep, req, bufferptr, bufferlen);
492 rc = xudc_dma_receive(ep, req, bufferptr, bufferlen);
495 /* Put the transmit buffer into the correct ping-pong buffer.*/
496 if (!ep->curbufnum && !ep->buffer0ready) {
497 /* Get the Buffer address and copy the transmit data.*/
498 eprambase = (u32 __force *)(udc->addr + ep->rambase);
500 memcpy_toio((void __iomem *)eprambase, bufferptr,
502 udc->write_fn(udc->addr, ep->offset +
503 XUSB_EP_BUF0COUNT_OFFSET, bufferlen);
505 memcpy_toio((void __iomem *)bufferptr, eprambase,
509 * Enable the buffer for transmission.
511 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
513 ep->buffer0ready = 1;
515 } else if (ep->curbufnum && !ep->buffer1ready) {
516 /* Get the Buffer address and copy the transmit data.*/
517 eprambase = (u32 __force *)(udc->addr + ep->rambase +
518 ep->ep_usb.maxpacket);
520 memcpy_toio((void __iomem *)eprambase, bufferptr,
522 udc->write_fn(udc->addr, ep->offset +
523 XUSB_EP_BUF1COUNT_OFFSET, bufferlen);
525 memcpy_toio((void __iomem *)bufferptr, eprambase,
529 * Enable the buffer for transmission.
531 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
532 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
533 ep->buffer1ready = 1;
536 /* None of the ping-pong buffers are ready currently */
543 * xudc_done - Exeutes the endpoint data transfer completion tasks.
544 * @ep: pointer to the usb device endpoint structure.
545 * @req: pointer to the usb request structure.
546 * @status: Status of the data transfer.
548 * Deletes the message from the queue and updates data transfer completion
551 static void xudc_done(struct xusb_ep *ep, struct xusb_req *req, int status)
553 struct xusb_udc *udc = ep->udc;
555 list_del_init(&req->queue);
557 if (req->usb_req.status == -EINPROGRESS)
558 req->usb_req.status = status;
560 status = req->usb_req.status;
562 if (status && status != -ESHUTDOWN)
563 dev_dbg(udc->dev, "%s done %p, status %d\n",
564 ep->ep_usb.name, req, status);
565 /* unmap request if DMA is present*/
566 if (udc->dma_enabled && ep->epnumber && req->usb_req.length)
567 usb_gadget_unmap_request(&udc->gadget, &req->usb_req,
570 if (req->usb_req.complete) {
571 spin_unlock(&udc->lock);
572 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
573 spin_lock(&udc->lock);
578 * xudc_read_fifo - Reads the data from the given endpoint buffer.
579 * @ep: pointer to the usb device endpoint structure.
580 * @req: pointer to the usb request structure.
582 * Return: 0 if request is completed and -EAGAIN if not completed.
584 * Pulls OUT packet data from the endpoint buffer.
586 static int xudc_read_fifo(struct xusb_ep *ep, struct xusb_req *req)
589 u32 is_short, count, bufferspace;
593 int retval = -EAGAIN;
594 struct xusb_udc *udc = ep->udc;
596 if (ep->buffer0ready && ep->buffer1ready) {
597 dev_dbg(udc->dev, "Packet NOT ready!\n");
602 bufoffset = XUSB_EP_BUF1COUNT_OFFSET;
604 bufoffset = XUSB_EP_BUF0COUNT_OFFSET;
606 count = udc->read_fn(udc->addr + ep->offset + bufoffset);
608 if (!ep->buffer0ready && !ep->buffer1ready)
611 buf = req->usb_req.buf + req->usb_req.actual;
613 bufferspace = req->usb_req.length - req->usb_req.actual;
614 is_short = count < ep->ep_usb.maxpacket;
616 if (unlikely(!bufferspace)) {
618 * This happens when the driver's buffer
619 * is smaller than what the host sent.
620 * discard the extra data.
622 if (req->usb_req.status != -EOVERFLOW)
623 dev_dbg(udc->dev, "%s overflow %d\n",
624 ep->ep_usb.name, count);
625 req->usb_req.status = -EOVERFLOW;
626 xudc_done(ep, req, -EOVERFLOW);
630 ret = xudc_eptxrx(ep, req, buf, count);
633 req->usb_req.actual += min(count, bufferspace);
634 dev_dbg(udc->dev, "read %s, %d bytes%s req %p %d/%d\n",
635 ep->ep_usb.name, count, is_short ? "/S" : "", req,
636 req->usb_req.actual, req->usb_req.length);
639 if ((req->usb_req.actual == req->usb_req.length) || is_short) {
640 if (udc->dma_enabled && req->usb_req.length)
641 dma_sync_single_for_cpu(udc->dev,
645 xudc_done(ep, req, 0);
654 dev_dbg(udc->dev, "receive busy\n");
658 /* DMA error, dequeue the request */
659 xudc_done(ep, req, -ECONNRESET);
668 * xudc_write_fifo - Writes data into the given endpoint buffer.
669 * @ep: pointer to the usb device endpoint structure.
670 * @req: pointer to the usb request structure.
672 * Return: 0 if request is completed and -EAGAIN if not completed.
674 * Loads endpoint buffer for an IN packet.
676 static int xudc_write_fifo(struct xusb_ep *ep, struct xusb_req *req)
681 int retval = -EAGAIN;
682 struct xusb_udc *udc = ep->udc;
683 int is_last, is_short = 0;
686 max = le16_to_cpu(ep->desc->wMaxPacketSize);
687 buf = req->usb_req.buf + req->usb_req.actual;
689 length = req->usb_req.length - req->usb_req.actual;
690 length = min(length, max);
692 ret = xudc_eptxrx(ep, req, buf, length);
695 req->usb_req.actual += length;
696 if (unlikely(length != max)) {
697 is_last = is_short = 1;
699 if (likely(req->usb_req.length !=
700 req->usb_req.actual) || req->usb_req.zero)
705 dev_dbg(udc->dev, "%s: wrote %s %d bytes%s%s %d left %p\n",
706 __func__, ep->ep_usb.name, length, is_last ? "/L" : "",
707 is_short ? "/S" : "",
708 req->usb_req.length - req->usb_req.actual, req);
711 xudc_done(ep, req, 0);
716 dev_dbg(udc->dev, "Send busy\n");
720 /* DMA error, dequeue the request */
721 xudc_done(ep, req, -ECONNRESET);
730 * xudc_nuke - Cleans up the data transfer message list.
731 * @ep: pointer to the usb device endpoint structure.
732 * @status: Status of the data transfer.
734 static void xudc_nuke(struct xusb_ep *ep, int status)
736 struct xusb_req *req;
738 while (!list_empty(&ep->queue)) {
739 req = list_first_entry(&ep->queue, struct xusb_req, queue);
740 xudc_done(ep, req, status);
745 * xudc_ep_set_halt - Stalls/unstalls the given endpoint.
746 * @_ep: pointer to the usb device endpoint structure.
747 * @value: value to indicate stall/unstall.
749 * Return: 0 for success and error value on failure
751 static int xudc_ep_set_halt(struct usb_ep *_ep, int value)
753 struct xusb_ep *ep = to_xusb_ep(_ep);
754 struct xusb_udc *udc;
758 if (!_ep || (!ep->desc && ep->epnumber)) {
759 pr_debug("%s: bad ep or descriptor\n", __func__);
764 if (ep->is_in && (!list_empty(&ep->queue)) && value) {
765 dev_dbg(udc->dev, "requests pending can't halt\n");
769 if (ep->buffer0ready || ep->buffer1ready) {
770 dev_dbg(udc->dev, "HW buffers busy can't halt\n");
774 spin_lock_irqsave(&udc->lock, flags);
777 /* Stall the device.*/
778 epcfgreg = udc->read_fn(udc->addr + ep->offset);
779 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
780 udc->write_fn(udc->addr, ep->offset, epcfgreg);
782 /* Unstall the device.*/
783 epcfgreg = udc->read_fn(udc->addr + ep->offset);
784 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
785 udc->write_fn(udc->addr, ep->offset, epcfgreg);
787 /* Reset the toggle bit.*/
788 epcfgreg = udc->read_fn(ep->udc->addr + ep->offset);
789 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
790 udc->write_fn(udc->addr, ep->offset, epcfgreg);
794 spin_unlock_irqrestore(&udc->lock, flags);
799 * __xudc_ep_enable - Enables the given endpoint.
800 * @ep: pointer to the xusb endpoint structure.
801 * @desc: pointer to usb endpoint descriptor.
803 * Return: 0 for success and error value on failure
805 static int __xudc_ep_enable(struct xusb_ep *ep,
806 const struct usb_endpoint_descriptor *desc)
808 struct xusb_udc *udc = ep->udc;
814 ep->is_in = ((desc->bEndpointAddress & USB_DIR_IN) != 0);
815 /* Bit 3...0:endpoint number */
816 ep->epnumber = (desc->bEndpointAddress & 0x0f);
818 ep->ep_usb.desc = desc;
819 tmp = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
820 ep->ep_usb.maxpacket = maxpacket = le16_to_cpu(desc->wMaxPacketSize);
823 case USB_ENDPOINT_XFER_CONTROL:
824 dev_dbg(udc->dev, "only one control endpoint\n");
828 case USB_ENDPOINT_XFER_INT:
831 if (maxpacket > 64) {
832 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
836 case USB_ENDPOINT_XFER_BULK:
839 if (!(is_power_of_2(maxpacket) && maxpacket >= 8 &&
841 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
845 case USB_ENDPOINT_XFER_ISOC:
851 ep->buffer0ready = false;
852 ep->buffer1ready = false;
854 ep->rambase = rambase[ep->epnumber];
855 xudc_epconfig(ep, udc);
857 dev_dbg(udc->dev, "Enable Endpoint %d max pkt is %d\n",
858 ep->epnumber, maxpacket);
860 /* Enable the End point.*/
861 epcfg = udc->read_fn(udc->addr + ep->offset);
862 epcfg |= XUSB_EP_CFG_VALID_MASK;
863 udc->write_fn(udc->addr, ep->offset, epcfg);
867 /* Enable buffer completion interrupts for endpoint */
868 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
869 ier |= (XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK << ep->epnumber);
870 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
872 /* for OUT endpoint set buffers ready to receive */
873 if (ep->epnumber && !ep->is_in) {
874 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
876 ep->buffer0ready = true;
877 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
878 (1 << (ep->epnumber +
879 XUSB_STATUS_EP_BUFF2_SHIFT)));
880 ep->buffer1ready = true;
887 * xudc_ep_enable - Enables the given endpoint.
888 * @_ep: pointer to the usb endpoint structure.
889 * @desc: pointer to usb endpoint descriptor.
891 * Return: 0 for success and error value on failure
893 static int xudc_ep_enable(struct usb_ep *_ep,
894 const struct usb_endpoint_descriptor *desc)
897 struct xusb_udc *udc;
901 if (!_ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
902 pr_debug("%s: bad ep or descriptor\n", __func__);
906 ep = to_xusb_ep(_ep);
909 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
910 dev_dbg(udc->dev, "bogus device state\n");
914 spin_lock_irqsave(&udc->lock, flags);
915 ret = __xudc_ep_enable(ep, desc);
916 spin_unlock_irqrestore(&udc->lock, flags);
922 * xudc_ep_disable - Disables the given endpoint.
923 * @_ep: pointer to the usb endpoint structure.
925 * Return: 0 for success and error value on failure
927 static int xudc_ep_disable(struct usb_ep *_ep)
932 struct xusb_udc *udc;
935 pr_debug("%s: invalid ep\n", __func__);
939 ep = to_xusb_ep(_ep);
942 spin_lock_irqsave(&udc->lock, flags);
944 xudc_nuke(ep, -ESHUTDOWN);
946 /* Restore the endpoint's pristine config */
948 ep->ep_usb.desc = NULL;
950 dev_dbg(udc->dev, "USB Ep %d disable\n ", ep->epnumber);
951 /* Disable the endpoint.*/
952 epcfg = udc->read_fn(udc->addr + ep->offset);
953 epcfg &= ~XUSB_EP_CFG_VALID_MASK;
954 udc->write_fn(udc->addr, ep->offset, epcfg);
956 spin_unlock_irqrestore(&udc->lock, flags);
961 * xudc_ep_alloc_request - Initializes the request queue.
962 * @_ep: pointer to the usb endpoint structure.
963 * @gfp_flags: Flags related to the request call.
965 * Return: pointer to request structure on success and a NULL on failure.
967 static struct usb_request *xudc_ep_alloc_request(struct usb_ep *_ep,
970 struct xusb_ep *ep = to_xusb_ep(_ep);
971 struct xusb_req *req;
973 req = kzalloc(sizeof(*req), gfp_flags);
978 INIT_LIST_HEAD(&req->queue);
979 return &req->usb_req;
983 * xudc_free_request - Releases the request from queue.
984 * @_ep: pointer to the usb device endpoint structure.
985 * @_req: pointer to the usb request structure.
987 static void xudc_free_request(struct usb_ep *_ep, struct usb_request *_req)
989 struct xusb_req *req = to_xusb_req(_req);
995 * __xudc_ep0_queue - Adds the request to endpoint 0 queue.
996 * @ep0: pointer to the xusb endpoint 0 structure.
997 * @req: pointer to the xusb request structure.
999 * Return: 0 for success and error value on failure
1001 static int __xudc_ep0_queue(struct xusb_ep *ep0, struct xusb_req *req)
1003 struct xusb_udc *udc = ep0->udc;
1007 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1008 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1011 if (!list_empty(&ep0->queue)) {
1012 dev_dbg(udc->dev, "%s:ep0 busy\n", __func__);
1016 req->usb_req.status = -EINPROGRESS;
1017 req->usb_req.actual = 0;
1019 list_add_tail(&req->queue, &ep0->queue);
1021 if (udc->setup.bRequestType & USB_DIR_IN) {
1022 prefetch(req->usb_req.buf);
1023 length = req->usb_req.length;
1024 corebuf = (void __force *) ((ep0->rambase << 2) +
1026 length = req->usb_req.actual = min_t(u32, length,
1028 memcpy_toio((void __iomem *)corebuf, req->usb_req.buf, length);
1029 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, length);
1030 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1032 if (udc->setup.wLength) {
1033 /* Enable EP0 buffer to receive data */
1034 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1035 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1045 * xudc_ep0_queue - Adds the request to endpoint 0 queue.
1046 * @_ep: pointer to the usb endpoint 0 structure.
1047 * @_req: pointer to the usb request structure.
1048 * @gfp_flags: Flags related to the request call.
1050 * Return: 0 for success and error value on failure
1052 static int xudc_ep0_queue(struct usb_ep *_ep, struct usb_request *_req,
1055 struct xusb_req *req = to_xusb_req(_req);
1056 struct xusb_ep *ep0 = to_xusb_ep(_ep);
1057 struct xusb_udc *udc = ep0->udc;
1058 unsigned long flags;
1061 spin_lock_irqsave(&udc->lock, flags);
1062 ret = __xudc_ep0_queue(ep0, req);
1063 spin_unlock_irqrestore(&udc->lock, flags);
1069 * xudc_ep_queue - Adds the request to endpoint queue.
1070 * @_ep: pointer to the usb endpoint structure.
1071 * @_req: pointer to the usb request structure.
1072 * @gfp_flags: Flags related to the request call.
1074 * Return: 0 for success and error value on failure
1076 static int xudc_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1079 struct xusb_req *req = to_xusb_req(_req);
1080 struct xusb_ep *ep = to_xusb_ep(_ep);
1081 struct xusb_udc *udc = ep->udc;
1083 unsigned long flags;
1086 dev_dbg(udc->dev, "%s: queuing request to disabled %s\n",
1087 __func__, ep->name);
1091 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1092 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1096 spin_lock_irqsave(&udc->lock, flags);
1098 _req->status = -EINPROGRESS;
1101 if (udc->dma_enabled) {
1102 ret = usb_gadget_map_request(&udc->gadget, &req->usb_req,
1105 dev_dbg(udc->dev, "gadget_map failed ep%d\n",
1107 spin_unlock_irqrestore(&udc->lock, flags);
1112 if (list_empty(&ep->queue)) {
1114 dev_dbg(udc->dev, "xudc_write_fifo from ep_queue\n");
1115 if (!xudc_write_fifo(ep, req))
1118 dev_dbg(udc->dev, "xudc_read_fifo from ep_queue\n");
1119 if (!xudc_read_fifo(ep, req))
1125 list_add_tail(&req->queue, &ep->queue);
1127 spin_unlock_irqrestore(&udc->lock, flags);
1132 * xudc_ep_dequeue - Removes the request from the queue.
1133 * @_ep: pointer to the usb device endpoint structure.
1134 * @_req: pointer to the usb request structure.
1136 * Return: 0 for success and error value on failure
1138 static int xudc_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1140 struct xusb_ep *ep = to_xusb_ep(_ep);
1141 struct xusb_req *req = NULL;
1142 struct xusb_req *iter;
1143 struct xusb_udc *udc = ep->udc;
1144 unsigned long flags;
1146 spin_lock_irqsave(&udc->lock, flags);
1147 /* Make sure it's actually queued on this endpoint */
1148 list_for_each_entry(iter, &ep->queue, queue) {
1149 if (&iter->usb_req != _req)
1155 spin_unlock_irqrestore(&udc->lock, flags);
1158 xudc_done(ep, req, -ECONNRESET);
1159 spin_unlock_irqrestore(&udc->lock, flags);
1165 * xudc_ep0_enable - Enables the given endpoint.
1166 * @ep: pointer to the usb endpoint structure.
1167 * @desc: pointer to usb endpoint descriptor.
1169 * Return: error always.
1171 * endpoint 0 enable should not be called by gadget layer.
1173 static int xudc_ep0_enable(struct usb_ep *ep,
1174 const struct usb_endpoint_descriptor *desc)
1180 * xudc_ep0_disable - Disables the given endpoint.
1181 * @ep: pointer to the usb endpoint structure.
1183 * Return: error always.
1185 * endpoint 0 disable should not be called by gadget layer.
1187 static int xudc_ep0_disable(struct usb_ep *ep)
1192 static const struct usb_ep_ops xusb_ep0_ops = {
1193 .enable = xudc_ep0_enable,
1194 .disable = xudc_ep0_disable,
1195 .alloc_request = xudc_ep_alloc_request,
1196 .free_request = xudc_free_request,
1197 .queue = xudc_ep0_queue,
1198 .dequeue = xudc_ep_dequeue,
1199 .set_halt = xudc_ep_set_halt,
1202 static const struct usb_ep_ops xusb_ep_ops = {
1203 .enable = xudc_ep_enable,
1204 .disable = xudc_ep_disable,
1205 .alloc_request = xudc_ep_alloc_request,
1206 .free_request = xudc_free_request,
1207 .queue = xudc_ep_queue,
1208 .dequeue = xudc_ep_dequeue,
1209 .set_halt = xudc_ep_set_halt,
1213 * xudc_get_frame - Reads the current usb frame number.
1214 * @gadget: pointer to the usb gadget structure.
1216 * Return: current frame number for success and error value on failure.
1218 static int xudc_get_frame(struct usb_gadget *gadget)
1220 struct xusb_udc *udc;
1226 udc = to_udc(gadget);
1227 frame = udc->read_fn(udc->addr + XUSB_FRAMENUM_OFFSET);
1232 * xudc_wakeup - Send remote wakeup signal to host
1233 * @gadget: pointer to the usb gadget structure.
1235 * Return: 0 on success and error on failure
1237 static int xudc_wakeup(struct usb_gadget *gadget)
1239 struct xusb_udc *udc = to_udc(gadget);
1241 int status = -EINVAL;
1242 unsigned long flags;
1244 spin_lock_irqsave(&udc->lock, flags);
1246 /* Remote wake up not enabled by host */
1247 if (!udc->remote_wkp)
1250 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1251 crtlreg |= XUSB_CONTROL_USB_RMTWAKE_MASK;
1252 /* set remote wake up bit */
1253 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1255 * wait for a while and reset remote wake up bit since this bit
1256 * is not cleared by HW after sending remote wakeup to host.
1260 crtlreg &= ~XUSB_CONTROL_USB_RMTWAKE_MASK;
1261 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1264 spin_unlock_irqrestore(&udc->lock, flags);
1269 * xudc_pullup - start/stop USB traffic
1270 * @gadget: pointer to the usb gadget structure.
1271 * @is_on: flag to start or stop
1275 * This function starts/stops SIE engine of IP based on is_on.
1277 static int xudc_pullup(struct usb_gadget *gadget, int is_on)
1279 struct xusb_udc *udc = to_udc(gadget);
1280 unsigned long flags;
1283 spin_lock_irqsave(&udc->lock, flags);
1285 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1287 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
1289 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
1291 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1293 spin_unlock_irqrestore(&udc->lock, flags);
1299 * xudc_eps_init - initialize endpoints.
1300 * @udc: pointer to the usb device controller structure.
1302 static void xudc_eps_init(struct xusb_udc *udc)
1306 INIT_LIST_HEAD(&udc->gadget.ep_list);
1308 for (ep_number = 0; ep_number < XUSB_MAX_ENDPOINTS; ep_number++) {
1309 struct xusb_ep *ep = &udc->ep[ep_number];
1312 list_add_tail(&ep->ep_usb.ep_list,
1313 &udc->gadget.ep_list);
1314 usb_ep_set_maxpacket_limit(&ep->ep_usb,
1315 (unsigned short) ~0);
1316 snprintf(ep->name, EPNAME_SIZE, "ep%d", ep_number);
1317 ep->ep_usb.name = ep->name;
1318 ep->ep_usb.ops = &xusb_ep_ops;
1320 ep->ep_usb.caps.type_iso = true;
1321 ep->ep_usb.caps.type_bulk = true;
1322 ep->ep_usb.caps.type_int = true;
1324 ep->ep_usb.name = ep0name;
1325 usb_ep_set_maxpacket_limit(&ep->ep_usb, EP0_MAX_PACKET);
1326 ep->ep_usb.ops = &xusb_ep0_ops;
1328 ep->ep_usb.caps.type_control = true;
1331 ep->ep_usb.caps.dir_in = true;
1332 ep->ep_usb.caps.dir_out = true;
1335 ep->epnumber = ep_number;
1338 * The configuration register address offset between
1339 * each endpoint is 0x10.
1341 ep->offset = XUSB_EP0_CONFIG_OFFSET + (ep_number * 0x10);
1345 xudc_epconfig(ep, udc);
1347 /* Initialize one queue per endpoint */
1348 INIT_LIST_HEAD(&ep->queue);
1353 * xudc_stop_activity - Stops any further activity on the device.
1354 * @udc: pointer to the usb device controller structure.
1356 static void xudc_stop_activity(struct xusb_udc *udc)
1361 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1363 xudc_nuke(ep, -ESHUTDOWN);
1368 * xudc_start - Starts the device.
1369 * @gadget: pointer to the usb gadget structure
1370 * @driver: pointer to gadget driver structure
1372 * Return: zero on success and error on failure
1374 static int xudc_start(struct usb_gadget *gadget,
1375 struct usb_gadget_driver *driver)
1377 struct xusb_udc *udc = to_udc(gadget);
1378 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1379 const struct usb_endpoint_descriptor *desc = &config_bulk_out_desc;
1380 unsigned long flags;
1383 spin_lock_irqsave(&udc->lock, flags);
1386 dev_err(udc->dev, "%s is already bound to %s\n",
1387 udc->gadget.name, udc->driver->driver.name);
1392 /* hook up the driver */
1393 udc->driver = driver;
1394 udc->gadget.speed = driver->max_speed;
1396 /* Enable the control endpoint. */
1397 ret = __xudc_ep_enable(ep0, desc);
1399 /* Set device address and remote wakeup to 0 */
1400 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1401 udc->remote_wkp = 0;
1403 spin_unlock_irqrestore(&udc->lock, flags);
1408 * xudc_stop - stops the device.
1409 * @gadget: pointer to the usb gadget structure
1411 * Return: zero always
1413 static int xudc_stop(struct usb_gadget *gadget)
1415 struct xusb_udc *udc = to_udc(gadget);
1416 unsigned long flags;
1418 spin_lock_irqsave(&udc->lock, flags);
1420 udc->gadget.speed = USB_SPEED_UNKNOWN;
1423 /* Set device address and remote wakeup to 0 */
1424 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1425 udc->remote_wkp = 0;
1427 xudc_stop_activity(udc);
1429 spin_unlock_irqrestore(&udc->lock, flags);
1434 static const struct usb_gadget_ops xusb_udc_ops = {
1435 .get_frame = xudc_get_frame,
1436 .wakeup = xudc_wakeup,
1437 .pullup = xudc_pullup,
1438 .udc_start = xudc_start,
1439 .udc_stop = xudc_stop,
1443 * xudc_clear_stall_all_ep - clears stall of every endpoint.
1444 * @udc: pointer to the udc structure.
1446 static void xudc_clear_stall_all_ep(struct xusb_udc *udc)
1452 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1454 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1455 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1456 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1458 /* Reset the toggle bit.*/
1459 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1460 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
1461 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1467 * xudc_startup_handler - The usb device controller interrupt handler.
1468 * @udc: pointer to the udc structure.
1469 * @intrstatus: The mask value containing the interrupt sources.
1471 * This function handles the RESET,SUSPEND,RESUME and DISCONNECT interrupts.
1473 static void xudc_startup_handler(struct xusb_udc *udc, u32 intrstatus)
1477 if (intrstatus & XUSB_STATUS_RESET_MASK) {
1479 dev_dbg(udc->dev, "Reset\n");
1481 if (intrstatus & XUSB_STATUS_HIGH_SPEED_MASK)
1482 udc->gadget.speed = USB_SPEED_HIGH;
1484 udc->gadget.speed = USB_SPEED_FULL;
1486 xudc_stop_activity(udc);
1487 xudc_clear_stall_all_ep(udc);
1488 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
1490 /* Set device address and remote wakeup to 0 */
1491 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1492 udc->remote_wkp = 0;
1494 /* Enable the suspend, resume and disconnect */
1495 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1496 intrreg |= XUSB_STATUS_SUSPEND_MASK | XUSB_STATUS_RESUME_MASK |
1497 XUSB_STATUS_DISCONNECT_MASK;
1498 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1500 if (intrstatus & XUSB_STATUS_SUSPEND_MASK) {
1502 dev_dbg(udc->dev, "Suspend\n");
1504 /* Enable the reset, resume and disconnect */
1505 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1506 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1507 XUSB_STATUS_DISCONNECT_MASK;
1508 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1510 udc->usb_state = USB_STATE_SUSPENDED;
1512 if (udc->driver->suspend) {
1513 spin_unlock(&udc->lock);
1514 udc->driver->suspend(&udc->gadget);
1515 spin_lock(&udc->lock);
1518 if (intrstatus & XUSB_STATUS_RESUME_MASK) {
1519 bool condition = (udc->usb_state != USB_STATE_SUSPENDED);
1521 dev_WARN_ONCE(udc->dev, condition,
1522 "Resume IRQ while not suspended\n");
1524 dev_dbg(udc->dev, "Resume\n");
1526 /* Enable the reset, suspend and disconnect */
1527 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1528 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_SUSPEND_MASK |
1529 XUSB_STATUS_DISCONNECT_MASK;
1530 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1534 if (udc->driver->resume) {
1535 spin_unlock(&udc->lock);
1536 udc->driver->resume(&udc->gadget);
1537 spin_lock(&udc->lock);
1540 if (intrstatus & XUSB_STATUS_DISCONNECT_MASK) {
1542 dev_dbg(udc->dev, "Disconnect\n");
1544 /* Enable the reset, resume and suspend */
1545 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1546 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1547 XUSB_STATUS_SUSPEND_MASK;
1548 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1550 if (udc->driver && udc->driver->disconnect) {
1551 spin_unlock(&udc->lock);
1552 udc->driver->disconnect(&udc->gadget);
1553 spin_lock(&udc->lock);
1559 * xudc_ep0_stall - Stall endpoint zero.
1560 * @udc: pointer to the udc structure.
1562 * This function stalls endpoint zero.
1564 static void xudc_ep0_stall(struct xusb_udc *udc)
1567 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1569 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1570 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1571 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1575 * xudc_setaddress - executes SET_ADDRESS command
1576 * @udc: pointer to the udc structure.
1578 * This function executes USB SET_ADDRESS command
1580 static void xudc_setaddress(struct xusb_udc *udc)
1582 struct xusb_ep *ep0 = &udc->ep[0];
1583 struct xusb_req *req = udc->req;
1586 req->usb_req.length = 0;
1587 ret = __xudc_ep0_queue(ep0, req);
1591 dev_err(udc->dev, "Can't respond to SET ADDRESS request\n");
1592 xudc_ep0_stall(udc);
1596 * xudc_getstatus - executes GET_STATUS command
1597 * @udc: pointer to the udc structure.
1599 * This function executes USB GET_STATUS command
1601 static void xudc_getstatus(struct xusb_udc *udc)
1603 struct xusb_ep *ep0 = &udc->ep[0];
1604 struct xusb_req *req = udc->req;
1605 struct xusb_ep *target_ep;
1612 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
1613 case USB_RECIP_DEVICE:
1614 /* Get device status */
1615 status = 1 << USB_DEVICE_SELF_POWERED;
1616 if (udc->remote_wkp)
1617 status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1619 case USB_RECIP_INTERFACE:
1621 case USB_RECIP_ENDPOINT:
1622 epnum = le16_to_cpu(udc->setup.wIndex) & USB_ENDPOINT_NUMBER_MASK;
1623 if (epnum >= XUSB_MAX_ENDPOINTS)
1625 target_ep = &udc->ep[epnum];
1626 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1627 halt = epcfgreg & XUSB_EP_CFG_STALL_MASK;
1628 if (le16_to_cpu(udc->setup.wIndex) & USB_DIR_IN) {
1629 if (!target_ep->is_in)
1632 if (target_ep->is_in)
1636 status = 1 << USB_ENDPOINT_HALT;
1642 req->usb_req.length = 2;
1643 *(__le16 *)req->usb_req.buf = cpu_to_le16(status);
1644 ret = __xudc_ep0_queue(ep0, req);
1648 dev_err(udc->dev, "Can't respond to getstatus request\n");
1649 xudc_ep0_stall(udc);
1653 * xudc_set_clear_feature - Executes the set feature and clear feature commands.
1654 * @udc: pointer to the usb device controller structure.
1656 * Processes the SET_FEATURE and CLEAR_FEATURE commands.
1658 static void xudc_set_clear_feature(struct xusb_udc *udc)
1660 struct xusb_ep *ep0 = &udc->ep[0];
1661 struct xusb_req *req = udc->req;
1662 struct xusb_ep *target_ep;
1666 int flag = (udc->setup.bRequest == USB_REQ_SET_FEATURE ? 1 : 0);
1669 switch (udc->setup.bRequestType) {
1670 case USB_RECIP_DEVICE:
1671 switch (le16_to_cpu(udc->setup.wValue)) {
1672 case USB_DEVICE_TEST_MODE:
1674 * The Test Mode will be executed
1675 * after the status phase.
1678 case USB_DEVICE_REMOTE_WAKEUP:
1680 udc->remote_wkp = 1;
1682 udc->remote_wkp = 0;
1685 xudc_ep0_stall(udc);
1689 case USB_RECIP_ENDPOINT:
1690 if (!udc->setup.wValue) {
1691 endpoint = le16_to_cpu(udc->setup.wIndex) &
1692 USB_ENDPOINT_NUMBER_MASK;
1693 if (endpoint >= XUSB_MAX_ENDPOINTS) {
1694 xudc_ep0_stall(udc);
1697 target_ep = &udc->ep[endpoint];
1698 outinbit = le16_to_cpu(udc->setup.wIndex) &
1699 USB_ENDPOINT_DIR_MASK;
1700 outinbit = outinbit >> 7;
1702 /* Make sure direction matches.*/
1703 if (outinbit != target_ep->is_in) {
1704 xudc_ep0_stall(udc);
1707 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1709 /* Clear the stall.*/
1710 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1711 udc->write_fn(udc->addr,
1712 target_ep->offset, epcfgreg);
1715 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1716 udc->write_fn(udc->addr,
1720 /* Unstall the endpoint.*/
1721 epcfgreg &= ~(XUSB_EP_CFG_STALL_MASK |
1722 XUSB_EP_CFG_DATA_TOGGLE_MASK);
1723 udc->write_fn(udc->addr,
1731 xudc_ep0_stall(udc);
1735 req->usb_req.length = 0;
1736 ret = __xudc_ep0_queue(ep0, req);
1740 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
1741 xudc_ep0_stall(udc);
1745 * xudc_handle_setup - Processes the setup packet.
1746 * @udc: pointer to the usb device controller structure.
1748 * Process setup packet and delegate to gadget layer.
1750 static void xudc_handle_setup(struct xusb_udc *udc)
1751 __must_hold(&udc->lock)
1753 struct xusb_ep *ep0 = &udc->ep[0];
1754 struct usb_ctrlrequest setup;
1757 /* Load up the chapter 9 command buffer.*/
1758 ep0rambase = (u32 __force *) (udc->addr + XUSB_SETUP_PKT_ADDR_OFFSET);
1759 memcpy_toio((void __iomem *)&setup, ep0rambase, 8);
1762 udc->setup.wValue = cpu_to_le16((u16 __force)setup.wValue);
1763 udc->setup.wIndex = cpu_to_le16((u16 __force)setup.wIndex);
1764 udc->setup.wLength = cpu_to_le16((u16 __force)setup.wLength);
1766 /* Clear previous requests */
1767 xudc_nuke(ep0, -ECONNRESET);
1769 if (udc->setup.bRequestType & USB_DIR_IN) {
1770 /* Execute the get command.*/
1771 udc->setupseqrx = STATUS_PHASE;
1772 udc->setupseqtx = DATA_PHASE;
1774 /* Execute the put command.*/
1775 udc->setupseqrx = DATA_PHASE;
1776 udc->setupseqtx = STATUS_PHASE;
1779 switch (udc->setup.bRequest) {
1780 case USB_REQ_GET_STATUS:
1781 /* Data+Status phase form udc */
1782 if ((udc->setup.bRequestType &
1783 (USB_DIR_IN | USB_TYPE_MASK)) !=
1784 (USB_DIR_IN | USB_TYPE_STANDARD))
1786 xudc_getstatus(udc);
1788 case USB_REQ_SET_ADDRESS:
1789 /* Status phase from udc */
1790 if (udc->setup.bRequestType != (USB_DIR_OUT |
1791 USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1793 xudc_setaddress(udc);
1795 case USB_REQ_CLEAR_FEATURE:
1796 case USB_REQ_SET_FEATURE:
1797 /* Requests with no data phase, status phase from udc */
1798 if ((udc->setup.bRequestType & USB_TYPE_MASK)
1799 != USB_TYPE_STANDARD)
1801 xudc_set_clear_feature(udc);
1807 spin_unlock(&udc->lock);
1808 if (udc->driver->setup(&udc->gadget, &setup) < 0)
1809 xudc_ep0_stall(udc);
1810 spin_lock(&udc->lock);
1814 * xudc_ep0_out - Processes the endpoint 0 OUT token.
1815 * @udc: pointer to the usb device controller structure.
1817 static void xudc_ep0_out(struct xusb_udc *udc)
1819 struct xusb_ep *ep0 = &udc->ep[0];
1820 struct xusb_req *req;
1822 unsigned int bytes_to_rx;
1825 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1827 switch (udc->setupseqrx) {
1830 * This resets both state machines for the next
1833 udc->setupseqrx = SETUP_PHASE;
1834 udc->setupseqtx = SETUP_PHASE;
1835 req->usb_req.actual = req->usb_req.length;
1836 xudc_done(ep0, req, 0);
1839 bytes_to_rx = udc->read_fn(udc->addr +
1840 XUSB_EP_BUF0COUNT_OFFSET);
1841 /* Copy the data to be received from the DPRAM. */
1842 ep0rambase = (u8 __force *) (udc->addr +
1843 (ep0->rambase << 2));
1844 buffer = req->usb_req.buf + req->usb_req.actual;
1845 req->usb_req.actual = req->usb_req.actual + bytes_to_rx;
1846 memcpy_toio((void __iomem *)buffer, ep0rambase, bytes_to_rx);
1848 if (req->usb_req.length == req->usb_req.actual) {
1849 /* Data transfer completed get ready for Status stage */
1852 /* Enable EP0 buffer to receive data */
1853 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1854 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1863 * xudc_ep0_in - Processes the endpoint 0 IN token.
1864 * @udc: pointer to the usb device controller structure.
1866 static void xudc_ep0_in(struct xusb_udc *udc)
1868 struct xusb_ep *ep0 = &udc->ep[0];
1869 struct xusb_req *req;
1870 unsigned int bytes_to_tx;
1876 u8 test_mode = le16_to_cpu(udc->setup.wIndex) >> 8;
1878 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1879 bytes_to_tx = req->usb_req.length - req->usb_req.actual;
1881 switch (udc->setupseqtx) {
1883 switch (udc->setup.bRequest) {
1884 case USB_REQ_SET_ADDRESS:
1885 /* Set the address of the device.*/
1886 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET,
1887 le16_to_cpu(udc->setup.wValue));
1889 case USB_REQ_SET_FEATURE:
1890 if (udc->setup.bRequestType ==
1892 if (le16_to_cpu(udc->setup.wValue) ==
1893 USB_DEVICE_TEST_MODE)
1894 udc->write_fn(udc->addr,
1895 XUSB_TESTMODE_OFFSET,
1900 req->usb_req.actual = req->usb_req.length;
1901 xudc_done(ep0, req, 0);
1906 * We're done with data transfer, next
1907 * will be zero length OUT with data toggle of
1908 * 1. Setup data_toggle.
1910 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1911 epcfgreg |= XUSB_EP_CFG_DATA_TOGGLE_MASK;
1912 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1913 udc->setupseqtx = STATUS_PHASE;
1915 length = count = min_t(u32, bytes_to_tx,
1917 /* Copy the data to be transmitted into the DPRAM. */
1918 ep0rambase = (u8 __force *) (udc->addr +
1919 (ep0->rambase << 2));
1920 buffer = req->usb_req.buf + req->usb_req.actual;
1921 req->usb_req.actual = req->usb_req.actual + length;
1922 memcpy_toio((void __iomem *)ep0rambase, buffer, length);
1924 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, count);
1925 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1933 * xudc_ctrl_ep_handler - Endpoint 0 interrupt handler.
1934 * @udc: pointer to the udc structure.
1935 * @intrstatus: It's the mask value for the interrupt sources on endpoint 0.
1937 * Processes the commands received during enumeration phase.
1939 static void xudc_ctrl_ep_handler(struct xusb_udc *udc, u32 intrstatus)
1942 if (intrstatus & XUSB_STATUS_SETUP_PACKET_MASK) {
1943 xudc_handle_setup(udc);
1945 if (intrstatus & XUSB_STATUS_FIFO_BUFF_RDY_MASK)
1947 else if (intrstatus & XUSB_STATUS_FIFO_BUFF_FREE_MASK)
1953 * xudc_nonctrl_ep_handler - Non control endpoint interrupt handler.
1954 * @udc: pointer to the udc structure.
1955 * @epnum: End point number for which the interrupt is to be processed
1956 * @intrstatus: mask value for interrupt sources of endpoints other
1959 * Processes the buffer completion interrupts.
1961 static void xudc_nonctrl_ep_handler(struct xusb_udc *udc, u8 epnum,
1965 struct xusb_req *req;
1968 ep = &udc->ep[epnum];
1969 /* Process the End point interrupts.*/
1970 if (intrstatus & (XUSB_STATUS_EP0_BUFF1_COMP_MASK << epnum))
1971 ep->buffer0ready = 0;
1972 if (intrstatus & (XUSB_STATUS_EP0_BUFF2_COMP_MASK << epnum))
1973 ep->buffer1ready = false;
1975 if (list_empty(&ep->queue))
1978 req = list_first_entry(&ep->queue, struct xusb_req, queue);
1981 xudc_write_fifo(ep, req);
1983 xudc_read_fifo(ep, req);
1987 * xudc_irq - The main interrupt handler.
1988 * @irq: The interrupt number.
1989 * @_udc: pointer to the usb device controller structure.
1991 * Return: IRQ_HANDLED after the interrupt is handled.
1993 static irqreturn_t xudc_irq(int irq, void *_udc)
1995 struct xusb_udc *udc = _udc;
2000 unsigned long flags;
2002 spin_lock_irqsave(&udc->lock, flags);
2005 * Event interrupts are level sensitive hence first disable
2006 * IER, read ISR and figure out active interrupts.
2008 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2009 ier &= ~XUSB_STATUS_INTR_EVENT_MASK;
2010 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2012 /* Read the Interrupt Status Register.*/
2013 intrstatus = udc->read_fn(udc->addr + XUSB_STATUS_OFFSET);
2015 /* Call the handler for the event interrupt.*/
2016 if (intrstatus & XUSB_STATUS_INTR_EVENT_MASK) {
2018 * Check if there is any action to be done for :
2019 * - USB Reset received {XUSB_STATUS_RESET_MASK}
2020 * - USB Suspend received {XUSB_STATUS_SUSPEND_MASK}
2021 * - USB Resume received {XUSB_STATUS_RESUME_MASK}
2022 * - USB Disconnect received {XUSB_STATUS_DISCONNECT_MASK}
2024 xudc_startup_handler(udc, intrstatus);
2027 /* Check the buffer completion interrupts */
2028 if (intrstatus & XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK) {
2029 /* Enable Reset, Suspend, Resume and Disconnect */
2030 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2031 ier |= XUSB_STATUS_INTR_EVENT_MASK;
2032 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2034 if (intrstatus & XUSB_STATUS_EP0_BUFF1_COMP_MASK)
2035 xudc_ctrl_ep_handler(udc, intrstatus);
2037 for (index = 1; index < 8; index++) {
2038 bufintr = ((intrstatus &
2039 (XUSB_STATUS_EP1_BUFF1_COMP_MASK <<
2040 (index - 1))) || (intrstatus &
2041 (XUSB_STATUS_EP1_BUFF2_COMP_MASK <<
2044 xudc_nonctrl_ep_handler(udc, index,
2050 spin_unlock_irqrestore(&udc->lock, flags);
2055 * xudc_probe - The device probe function for driver initialization.
2056 * @pdev: pointer to the platform device structure.
2058 * Return: 0 for success and error value on failure
2060 static int xudc_probe(struct platform_device *pdev)
2062 struct device_node *np = pdev->dev.of_node;
2063 struct resource *res;
2064 struct xusb_udc *udc;
2070 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2074 /* Create a dummy request for GET_STATUS, SET_ADDRESS */
2075 udc->req = devm_kzalloc(&pdev->dev, sizeof(struct xusb_req),
2080 buff = devm_kzalloc(&pdev->dev, STATUSBUFF_SIZE, GFP_KERNEL);
2084 udc->req->usb_req.buf = buff;
2086 /* Map the registers */
2087 udc->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
2088 if (IS_ERR(udc->addr))
2089 return PTR_ERR(udc->addr);
2091 irq = platform_get_irq(pdev, 0);
2094 ret = devm_request_irq(&pdev->dev, irq, xudc_irq, 0,
2095 dev_name(&pdev->dev), udc);
2097 dev_dbg(&pdev->dev, "unable to request irq %d", irq);
2101 udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma");
2103 /* Setup gadget structure */
2104 udc->gadget.ops = &xusb_udc_ops;
2105 udc->gadget.max_speed = USB_SPEED_HIGH;
2106 udc->gadget.speed = USB_SPEED_UNKNOWN;
2107 udc->gadget.ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO].ep_usb;
2108 udc->gadget.name = driver_name;
2110 udc->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
2111 if (IS_ERR(udc->clk)) {
2112 if (PTR_ERR(udc->clk) != -ENOENT) {
2113 ret = PTR_ERR(udc->clk);
2118 * Clock framework support is optional, continue on,
2119 * anyways if we don't find a matching clock
2121 dev_warn(&pdev->dev, "s_axi_aclk clock property is not found\n");
2125 ret = clk_prepare_enable(udc->clk);
2127 dev_err(&pdev->dev, "Unable to enable clock.\n");
2131 spin_lock_init(&udc->lock);
2133 /* Check for IP endianness */
2134 udc->write_fn = xudc_write32_be;
2135 udc->read_fn = xudc_read32_be;
2136 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, USB_TEST_J);
2137 if ((udc->read_fn(udc->addr + XUSB_TESTMODE_OFFSET))
2139 udc->write_fn = xudc_write32;
2140 udc->read_fn = xudc_read32;
2142 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
2146 /* Set device address to 0.*/
2147 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
2149 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2151 goto err_disable_unprepare_clk;
2153 udc->dev = &udc->gadget.dev;
2155 /* Enable the interrupts.*/
2156 ier = XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_INTR_EVENT_MASK |
2157 XUSB_STATUS_FIFO_BUFF_RDY_MASK | XUSB_STATUS_FIFO_BUFF_FREE_MASK |
2158 XUSB_STATUS_SETUP_PACKET_MASK |
2159 XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK;
2161 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2163 platform_set_drvdata(pdev, udc);
2165 dev_vdbg(&pdev->dev, "%s at 0x%08X mapped to %p %s\n",
2166 driver_name, (u32)res->start, udc->addr,
2167 udc->dma_enabled ? "with DMA" : "without DMA");
2171 err_disable_unprepare_clk:
2172 clk_disable_unprepare(udc->clk);
2174 dev_err(&pdev->dev, "probe failed, %d\n", ret);
2179 * xudc_remove - Releases the resources allocated during the initialization.
2180 * @pdev: pointer to the platform device structure.
2184 static void xudc_remove(struct platform_device *pdev)
2186 struct xusb_udc *udc = platform_get_drvdata(pdev);
2188 usb_del_gadget_udc(&udc->gadget);
2189 clk_disable_unprepare(udc->clk);
2192 #ifdef CONFIG_PM_SLEEP
2193 static int xudc_suspend(struct device *dev)
2195 struct xusb_udc *udc;
2197 unsigned long flags;
2199 udc = dev_get_drvdata(dev);
2201 spin_lock_irqsave(&udc->lock, flags);
2203 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2204 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
2206 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2208 spin_unlock_irqrestore(&udc->lock, flags);
2209 if (udc->driver && udc->driver->suspend)
2210 udc->driver->suspend(&udc->gadget);
2212 clk_disable(udc->clk);
2217 static int xudc_resume(struct device *dev)
2219 struct xusb_udc *udc;
2221 unsigned long flags;
2224 udc = dev_get_drvdata(dev);
2226 ret = clk_enable(udc->clk);
2230 spin_lock_irqsave(&udc->lock, flags);
2232 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2233 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
2235 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2237 spin_unlock_irqrestore(&udc->lock, flags);
2241 #endif /* CONFIG_PM_SLEEP */
2243 static const struct dev_pm_ops xudc_pm_ops = {
2244 SET_SYSTEM_SLEEP_PM_OPS(xudc_suspend, xudc_resume)
2247 /* Match table for of_platform binding */
2248 static const struct of_device_id usb_of_match[] = {
2249 { .compatible = "xlnx,usb2-device-4.00.a", },
2250 { /* end of list */ },
2252 MODULE_DEVICE_TABLE(of, usb_of_match);
2254 static struct platform_driver xudc_driver = {
2256 .name = driver_name,
2257 .of_match_table = usb_of_match,
2260 .probe = xudc_probe,
2261 .remove_new = xudc_remove,
2264 module_platform_driver(xudc_driver);
2266 MODULE_DESCRIPTION("Xilinx udc driver");
2267 MODULE_AUTHOR("Xilinx, Inc");
2268 MODULE_LICENSE("GPL");