drivers/usb/gadget/udc/s3c2410_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/s3c2410_udc.c
   3  *
   4  * Samsung S3C24xx series on-chip full speed USB device controllers
   5  *
   6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #define pr_fmt(fmt) "s3c2410_udc: " fmt
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/delay.h>
  20 #include <linux/ioport.h>
  21 #include <linux/sched.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/init.h>
  25 #include <linux/timer.h>
  26 #include <linux/list.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/gpio.h>
  31 #include <linux/prefetch.h>
  32 #include <linux/io.h>
  33
  34 #include <linux/debugfs.h>
  35 #include <linux/seq_file.h>
  36
  37 #include <linux/usb.h>
  38 #include <linux/usb/gadget.h>
  39
  40 #include <asm/byteorder.h>
  41 #include <asm/irq.h>
  42 #include <asm/unaligned.h>
  43 #include <mach/irqs.h>
  44
  45 #include <mach/hardware.h>
  46
  47 #include <plat/regs-udc.h>
  48 #include <linux/platform_data/usb-s3c2410_udc.h>
  49
  50
  51 #include "s3c2410_udc.h"
  52
  53 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  54 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  55                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  56
  57 static const char               gadget_name[] = "s3c2410_udc";
  58 static const char               driver_desc[] = DRIVER_DESC;
  59
  60 static struct s3c2410_udc       *the_controller;
  61 static struct clk               *udc_clock;
  62 static struct clk               *usb_bus_clock;
  63 static void __iomem             *base_addr;
  64 static u64                      rsrc_start;
  65 static u64                      rsrc_len;
  66 static struct dentry            *s3c2410_udc_debugfs_root;
  67
  68 static inline u32 udc_read(u32 reg)
  69 {
  70         return readb(base_addr + reg);
  71 }
  72
  73 static inline void udc_write(u32 value, u32 reg)
  74 {
  75         writeb(value, base_addr + reg);
  76 }
  77
  78 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  79 {
  80         writeb(value, base + reg);
  81 }
  82
  83 static struct s3c2410_udc_mach_info *udc_info;
  84
  85 /*************************** DEBUG FUNCTION ***************************/
  86 #define DEBUG_NORMAL    1
  87 #define DEBUG_VERBOSE   2
  88
  89 #ifdef CONFIG_USB_S3C2410_DEBUG
  90 #define USB_S3C2410_DEBUG_LEVEL 0
  91
  92 static uint32_t s3c2410_ticks = 0;
  93
  94 __printf(2, 3)
  95 static void dprintk(int level, const char *fmt, ...)
  96 {
  97         static long prevticks;
  98         static int invocation;
  99         struct va_format vaf;
 100         va_list args;
 101
 102         if (level > USB_S3C2410_DEBUG_LEVEL)
 103                 return;
 104
 105         va_start(args, fmt);
 106
 107         vaf.fmt = fmt;
 108         vaf.va = &args;
 109
 110         if (s3c2410_ticks != prevticks) {
 111                 prevticks = s3c2410_ticks;
 112                 invocation = 0;
 113         }
 114
 115         pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 116
 117         va_end(args);
 118 }
 119 #else
 120 __printf(2, 3)
 121 static void dprintk(int level, const char *fmt, ...)
 122 {
 123 }
 124 #endif
 125
 126 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 127 {
 128         u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 129         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 130         u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 131         u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 132
 133         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 134         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 135         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 136         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 137         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 138         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 139         udc_write(0, S3C2410_UDC_INDEX_REG);
 140         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 141         udc_write(1, S3C2410_UDC_INDEX_REG);
 142         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 143         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 144         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 145         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 146         udc_write(2, S3C2410_UDC_INDEX_REG);
 147         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 148         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 149         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 150         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 151
 152         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 153                  "PWR_REG        : 0x%04X\n"
 154                  "EP_INT_REG     : 0x%04X\n"
 155                  "USB_INT_REG    : 0x%04X\n"
 156                  "EP_INT_EN_REG  : 0x%04X\n"
 157                  "USB_INT_EN_REG : 0x%04X\n"
 158                  "EP0_CSR        : 0x%04X\n"
 159                  "EP1_I_CSR1     : 0x%04X\n"
 160                  "EP1_I_CSR2     : 0x%04X\n"
 161                  "EP1_O_CSR1     : 0x%04X\n"
 162                  "EP1_O_CSR2     : 0x%04X\n"
 163                  "EP2_I_CSR1     : 0x%04X\n"
 164                  "EP2_I_CSR2     : 0x%04X\n"
 165                  "EP2_O_CSR1     : 0x%04X\n"
 166                  "EP2_O_CSR2     : 0x%04X\n",
 167                         addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 168                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 169                         ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 170                         ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 171                 );
 172
 173         return 0;
 174 }
 175
 176 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 177                                          struct file *file)
 178 {
 179         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 180 }
 181
 182 static const struct file_operations s3c2410_udc_debugfs_fops = {
 183         .open           = s3c2410_udc_debugfs_fops_open,
 184         .read           = seq_read,
 185         .llseek         = seq_lseek,
 186         .release        = single_release,
 187         .owner          = THIS_MODULE,
 188 };
 189
 190 /* io macros */
 191
 192 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 193 {
 194         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 195         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 196                         S3C2410_UDC_EP0_CSR_REG);
 197 }
 198
 199 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 200 {
 201         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 202         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 203 }
 204
 205 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 206 {
 207         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 208         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 209 }
 210
 211 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 212 {
 213         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 214         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 215 }
 216
 217 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 218 {
 219         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 220         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 221 }
 222
 223 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 224 {
 225         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 226         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 227 }
 228
 229 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 230 {
 231         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 232
 233         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 234                                 | S3C2410_UDC_EP0_CSR_DE),
 235                         S3C2410_UDC_EP0_CSR_REG);
 236 }
 237
 238 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 239 {
 240         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 241         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 242                         | S3C2410_UDC_EP0_CSR_DE),
 243                 S3C2410_UDC_EP0_CSR_REG);
 244 }
 245
 246 /*------------------------- I/O ----------------------------------*/
 247
 248 /*
 249  *      s3c2410_udc_done
 250  */
 251 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 252                 struct s3c2410_request *req, int status)
 253 {
 254         unsigned halted = ep->halted;
 255
 256         list_del_init(&req->queue);
 257
 258         if (likely(req->req.status == -EINPROGRESS))
 259                 req->req.status = status;
 260         else
 261                 status = req->req.status;
 262
 263         ep->halted = 1;
 264         usb_gadget_giveback_request(&ep->ep, &req->req);
 265         ep->halted = halted;
 266 }
 267
 268 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 269                 struct s3c2410_ep *ep, int status)
 270 {
 271         while (!list_empty(&ep->queue)) {
 272                 struct s3c2410_request *req;
 273                 req = list_entry(ep->queue.next, struct s3c2410_request,
 274                                 queue);
 275                 s3c2410_udc_done(ep, req, status);
 276         }
 277 }
 278
 279 static inline int s3c2410_udc_fifo_count_out(void)
 280 {
 281         int tmp;
 282
 283         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 284         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 285         return tmp;
 286 }
 287
 288 /*
 289  *      s3c2410_udc_write_packet
 290  */
 291 static inline int s3c2410_udc_write_packet(int fifo,
 292                 struct s3c2410_request *req,
 293                 unsigned max)
 294 {
 295         unsigned len = min(req->req.length - req->req.actual, max);
 296         u8 *buf = req->req.buf + req->req.actual;
 297
 298         prefetch(buf);
 299
 300         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 301                 req->req.actual, req->req.length, len, req->req.actual + len);
 302
 303         req->req.actual += len;
 304
 305         udelay(5);
 306         writesb(base_addr + fifo, buf, len);
 307         return len;
 308 }
 309
 310 /*
 311  *      s3c2410_udc_write_fifo
 312  *
 313  * return:  0 = still running, 1 = completed, negative = errno
 314  */
 315 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 316                 struct s3c2410_request *req)
 317 {
 318         unsigned        count;
 319         int             is_last;
 320         u32             idx;
 321         int             fifo_reg;
 322         u32             ep_csr;
 323
 324         idx = ep->bEndpointAddress & 0x7F;
 325         switch (idx) {
 326         default:
 327                 idx = 0;
 328         case 0:
 329                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 330                 break;
 331         case 1:
 332                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 333                 break;
 334         case 2:
 335                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 336                 break;
 337         case 3:
 338                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 339                 break;
 340         case 4:
 341                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 342                 break;
 343         }
 344
 345         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 346
 347         /* last packet is often short (sometimes a zlp) */
 348         if (count != ep->ep.maxpacket)
 349                 is_last = 1;
 350         else if (req->req.length != req->req.actual || req->req.zero)
 351                 is_last = 0;
 352         else
 353                 is_last = 2;
 354
 355         /* Only ep0 debug messages are interesting */
 356         if (idx == 0)
 357                 dprintk(DEBUG_NORMAL,
 358                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 359                         idx, count, req->req.actual, req->req.length,
 360                         is_last, req->req.zero);
 361
 362         if (is_last) {
 363                 /* The order is important. It prevents sending 2 packets
 364                  * at the same time */
 365
 366                 if (idx == 0) {
 367                         /* Reset signal => no need to say 'data sent' */
 368                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 369                                         & S3C2410_UDC_USBINT_RESET))
 370                                 s3c2410_udc_set_ep0_de_in(base_addr);
 371                         ep->dev->ep0state = EP0_IDLE;
 372                 } else {
 373                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 374                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 375                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 376                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 377                                         S3C2410_UDC_IN_CSR1_REG);
 378                 }
 379
 380                 s3c2410_udc_done(ep, req, 0);
 381                 is_last = 1;
 382         } else {
 383                 if (idx == 0) {
 384                         /* Reset signal => no need to say 'data sent' */
 385                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 386                                         & S3C2410_UDC_USBINT_RESET))
 387                                 s3c2410_udc_set_ep0_ipr(base_addr);
 388                 } else {
 389                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 390                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 391                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 392                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 393                                         S3C2410_UDC_IN_CSR1_REG);
 394                 }
 395         }
 396
 397         return is_last;
 398 }
 399
 400 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 401                 struct s3c2410_request *req, unsigned avail)
 402 {
 403         unsigned len;
 404
 405         len = min(req->req.length - req->req.actual, avail);
 406         req->req.actual += len;
 407
 408         readsb(fifo + base_addr, buf, len);
 409         return len;
 410 }
 411
 412 /*
 413  * return:  0 = still running, 1 = queue empty, negative = errno
 414  */
 415 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 416                                  struct s3c2410_request *req)
 417 {
 418         u8              *buf;
 419         u32             ep_csr;
 420         unsigned        bufferspace;
 421         int             is_last = 1;
 422         unsigned        avail;
 423         int             fifo_count = 0;
 424         u32             idx;
 425         int             fifo_reg;
 426
 427         idx = ep->bEndpointAddress & 0x7F;
 428
 429         switch (idx) {
 430         default:
 431                 idx = 0;
 432         case 0:
 433                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 434                 break;
 435         case 1:
 436                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 437                 break;
 438         case 2:
 439                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 440                 break;
 441         case 3:
 442                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 443                 break;
 444         case 4:
 445                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 446                 break;
 447         }
 448
 449         if (!req->req.length)
 450                 return 1;
 451
 452         buf = req->req.buf + req->req.actual;
 453         bufferspace = req->req.length - req->req.actual;
 454         if (!bufferspace) {
 455                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 456                 return -1;
 457         }
 458
 459         udc_write(idx, S3C2410_UDC_INDEX_REG);
 460
 461         fifo_count = s3c2410_udc_fifo_count_out();
 462         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 463
 464         if (fifo_count > ep->ep.maxpacket)
 465                 avail = ep->ep.maxpacket;
 466         else
 467                 avail = fifo_count;
 468
 469         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 470
 471         /* checking this with ep0 is not accurate as we already
 472          * read a control request
 473          **/
 474         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 475                 is_last = 1;
 476                 /* overflowed this request?  flush extra data */
 477                 if (fifo_count != avail)
 478                         req->req.status = -EOVERFLOW;
 479         } else {
 480                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 481         }
 482
 483         udc_write(idx, S3C2410_UDC_INDEX_REG);
 484         fifo_count = s3c2410_udc_fifo_count_out();
 485
 486         /* Only ep0 debug messages are interesting */
 487         if (idx == 0)
 488                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 489                         __func__, fifo_count, is_last);
 490
 491         if (is_last) {
 492                 if (idx == 0) {
 493                         s3c2410_udc_set_ep0_de_out(base_addr);
 494                         ep->dev->ep0state = EP0_IDLE;
 495                 } else {
 496                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 497                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 498                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 499                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 500                                         S3C2410_UDC_OUT_CSR1_REG);
 501                 }
 502
 503                 s3c2410_udc_done(ep, req, 0);
 504         } else {
 505                 if (idx == 0) {
 506                         s3c2410_udc_clear_ep0_opr(base_addr);
 507                 } else {
 508                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 509                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 510                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 511                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 512                                         S3C2410_UDC_OUT_CSR1_REG);
 513                 }
 514         }
 515
 516         return is_last;
 517 }
 518
 519 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 520 {
 521         unsigned char *outbuf = (unsigned char *)crq;
 522         int bytes_read = 0;
 523
 524         udc_write(0, S3C2410_UDC_INDEX_REG);
 525
 526         bytes_read = s3c2410_udc_fifo_count_out();
 527
 528         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 529
 530         if (bytes_read > sizeof(struct usb_ctrlrequest))
 531                 bytes_read = sizeof(struct usb_ctrlrequest);
 532
 533         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 534
 535         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 536                 bytes_read, crq->bRequest, crq->bRequestType,
 537                 crq->wValue, crq->wIndex, crq->wLength);
 538
 539         return bytes_read;
 540 }
 541
 542 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 543                 struct usb_ctrlrequest *crq)
 544 {
 545         u16 status = 0;
 546         u8 ep_num = crq->wIndex & 0x7F;
 547         u8 is_in = crq->wIndex & USB_DIR_IN;
 548
 549         switch (crq->bRequestType & USB_RECIP_MASK) {
 550         case USB_RECIP_INTERFACE:
 551                 break;
 552
 553         case USB_RECIP_DEVICE:
 554                 status = dev->devstatus;
 555                 break;
 556
 557         case USB_RECIP_ENDPOINT:
 558                 if (ep_num > 4 || crq->wLength > 2)
 559                         return 1;
 560
 561                 if (ep_num == 0) {
 562                         udc_write(0, S3C2410_UDC_INDEX_REG);
 563                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 564                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 565                 } else {
 566                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 567                         if (is_in) {
 568                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 569                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 570                         } else {
 571                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 572                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 573                         }
 574                 }
 575
 576                 status = status ? 1 : 0;
 577                 break;
 578
 579         default:
 580                 return 1;
 581         }
 582
 583         /* Seems to be needed to get it working. ouch :( */
 584         udelay(5);
 585         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 586         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 587         s3c2410_udc_set_ep0_de_in(base_addr);
 588
 589         return 0;
 590 }
 591 /*------------------------- usb state machine -------------------------------*/
 592 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 593
 594 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 595                                         struct s3c2410_ep *ep,
 596                                         struct usb_ctrlrequest *crq,
 597                                         u32 ep0csr)
 598 {
 599         int len, ret, tmp;
 600
 601         /* start control request? */
 602         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 603                 return;
 604
 605         s3c2410_udc_nuke(dev, ep, -EPROTO);
 606
 607         len = s3c2410_udc_read_fifo_crq(crq);
 608         if (len != sizeof(*crq)) {
 609                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 610                         " wanted %d bytes got %d. Stalling out...\n",
 611                         sizeof(*crq), len);
 612                 s3c2410_udc_set_ep0_ss(base_addr);
 613                 return;
 614         }
 615
 616         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 617                 crq->bRequest, crq->bRequestType, crq->wLength);
 618
 619         /* cope with automagic for some standard requests. */
 620         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 621                 == USB_TYPE_STANDARD;
 622         dev->req_config = 0;
 623         dev->req_pending = 1;
 624
 625         switch (crq->bRequest) {
 626         case USB_REQ_SET_CONFIGURATION:
 627                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 628
 629                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 630                         dev->req_config = 1;
 631                         s3c2410_udc_set_ep0_de_out(base_addr);
 632                 }
 633                 break;
 634
 635         case USB_REQ_SET_INTERFACE:
 636                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 637
 638                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 639                         dev->req_config = 1;
 640                         s3c2410_udc_set_ep0_de_out(base_addr);
 641                 }
 642                 break;
 643
 644         case USB_REQ_SET_ADDRESS:
 645                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 646
 647                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 648                         tmp = crq->wValue & 0x7F;
 649                         dev->address = tmp;
 650                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 651                                         S3C2410_UDC_FUNC_ADDR_REG);
 652                         s3c2410_udc_set_ep0_de_out(base_addr);
 653                         return;
 654                 }
 655                 break;
 656
 657         case USB_REQ_GET_STATUS:
 658                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 659                 s3c2410_udc_clear_ep0_opr(base_addr);
 660
 661                 if (dev->req_std) {
 662                         if (!s3c2410_udc_get_status(dev, crq))
 663                                 return;
 664                 }
 665                 break;
 666
 667         case USB_REQ_CLEAR_FEATURE:
 668                 s3c2410_udc_clear_ep0_opr(base_addr);
 669
 670                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 671                         break;
 672
 673                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 674                         break;
 675
 676                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 677                 s3c2410_udc_set_ep0_de_out(base_addr);
 678                 return;
 679
 680         case USB_REQ_SET_FEATURE:
 681                 s3c2410_udc_clear_ep0_opr(base_addr);
 682
 683                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 684                         break;
 685
 686                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 687                         break;
 688
 689                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 690                 s3c2410_udc_set_ep0_de_out(base_addr);
 691                 return;
 692
 693         default:
 694                 s3c2410_udc_clear_ep0_opr(base_addr);
 695                 break;
 696         }
 697
 698         if (crq->bRequestType & USB_DIR_IN)
 699                 dev->ep0state = EP0_IN_DATA_PHASE;
 700         else
 701                 dev->ep0state = EP0_OUT_DATA_PHASE;
 702
 703         if (!dev->driver)
 704                 return;
 705
 706         /* deliver the request to the gadget driver */
 707         ret = dev->driver->setup(&dev->gadget, crq);
 708         if (ret < 0) {
 709                 if (dev->req_config) {
 710                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 711                                 crq->bRequest, ret);
 712                         return;
 713                 }
 714
 715                 if (ret == -EOPNOTSUPP)
 716                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 717                 else
 718                         dprintk(DEBUG_NORMAL,
 719                                 "dev->driver->setup failed. (%d)\n", ret);
 720
 721                 udelay(5);
 722                 s3c2410_udc_set_ep0_ss(base_addr);
 723                 s3c2410_udc_set_ep0_de_out(base_addr);
 724                 dev->ep0state = EP0_IDLE;
 725                 /* deferred i/o == no response yet */
 726         } else if (dev->req_pending) {
 727                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 728                 dev->req_pending = 0;
 729         }
 730
 731         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 732 }
 733
 734 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 735 {
 736         u32                     ep0csr;
 737         struct s3c2410_ep       *ep = &dev->ep[0];
 738         struct s3c2410_request  *req;
 739         struct usb_ctrlrequest  crq;
 740
 741         if (list_empty(&ep->queue))
 742                 req = NULL;
 743         else
 744                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 745
 746         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 747          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 748
 749         udc_write(0, S3C2410_UDC_INDEX_REG);
 750         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 751
 752         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 753                 ep0csr, ep0states[dev->ep0state]);
 754
 755         /* clear stall status */
 756         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 757                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 758                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 759                 s3c2410_udc_clear_ep0_sst(base_addr);
 760                 dev->ep0state = EP0_IDLE;
 761                 return;
 762         }
 763
 764         /* clear setup end */
 765         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 766                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 767                 s3c2410_udc_nuke(dev, ep, 0);
 768                 s3c2410_udc_clear_ep0_se(base_addr);
 769                 dev->ep0state = EP0_IDLE;
 770         }
 771
 772         switch (dev->ep0state) {
 773         case EP0_IDLE:
 774                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 775                 break;
 776
 777         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 778                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 779                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 780                         s3c2410_udc_write_fifo(ep, req);
 781                 break;
 782
 783         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 784                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 785                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 786                         s3c2410_udc_read_fifo(ep, req);
 787                 break;
 788
 789         case EP0_END_XFER:
 790                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 791                 dev->ep0state = EP0_IDLE;
 792                 break;
 793
 794         case EP0_STALL:
 795                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 796                 dev->ep0state = EP0_IDLE;
 797                 break;
 798         }
 799 }
 800
 801 /*
 802  *      handle_ep - Manage I/O endpoints
 803  */
 804
 805 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 806 {
 807         struct s3c2410_request  *req;
 808         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 809         u32                     ep_csr1;
 810         u32                     idx;
 811
 812         if (likely(!list_empty(&ep->queue)))
 813                 req = list_entry(ep->queue.next,
 814                                 struct s3c2410_request, queue);
 815         else
 816                 req = NULL;
 817
 818         idx = ep->bEndpointAddress & 0x7F;
 819
 820         if (is_in) {
 821                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 822                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 823                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 824                         idx, ep_csr1, req ? 1 : 0);
 825
 826                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 827                         dprintk(DEBUG_VERBOSE, "st\n");
 828                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 829                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 830                                         S3C2410_UDC_IN_CSR1_REG);
 831                         return;
 832                 }
 833
 834                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 835                         s3c2410_udc_write_fifo(ep, req);
 836         } else {
 837                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 838                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 839                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 840
 841                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 842                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 843                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 844                                         S3C2410_UDC_OUT_CSR1_REG);
 845                         return;
 846                 }
 847
 848                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 849                         s3c2410_udc_read_fifo(ep, req);
 850         }
 851 }
 852
 853 #include <mach/regs-irq.h>
 854
 855 /*
 856  *      s3c2410_udc_irq - interrupt handler
 857  */
 858 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 859 {
 860         struct s3c2410_udc *dev = _dev;
 861         int usb_status;
 862         int usbd_status;
 863         int pwr_reg;
 864         int ep0csr;
 865         int i;
 866         u32 idx, idx2;
 867         unsigned long flags;
 868
 869         spin_lock_irqsave(&dev->lock, flags);
 870
 871         /* Driver connected ? */
 872         if (!dev->driver) {
 873                 /* Clear interrupts */
 874                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 875                                 S3C2410_UDC_USB_INT_REG);
 876                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 877                                 S3C2410_UDC_EP_INT_REG);
 878         }
 879
 880         /* Save index */
 881         idx = udc_read(S3C2410_UDC_INDEX_REG);
 882
 883         /* Read status registers */
 884         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 885         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 886         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 887
 888         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 889         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 890
 891         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 892                 usb_status, usbd_status, pwr_reg, ep0csr);
 893
 894         /*
 895          * Now, handle interrupts. There's two types :
 896          * - Reset, Resume, Suspend coming -> usb_int_reg
 897          * - EP -> ep_int_reg
 898          */
 899
 900         /* RESET */
 901         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 902                 /* two kind of reset :
 903                  * - reset start -> pwr reg = 8
 904                  * - reset end   -> pwr reg = 0
 905                  **/
 906                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 907                         ep0csr, pwr_reg);
 908
 909                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 910                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 911                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 912                                 S3C2410_UDC_MAXP_REG);
 913                 dev->address = 0;
 914
 915                 dev->ep0state = EP0_IDLE;
 916                 dev->gadget.speed = USB_SPEED_FULL;
 917
 918                 /* clear interrupt */
 919                 udc_write(S3C2410_UDC_USBINT_RESET,
 920                                 S3C2410_UDC_USB_INT_REG);
 921
 922                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 923                 spin_unlock_irqrestore(&dev->lock, flags);
 924                 return IRQ_HANDLED;
 925         }
 926
 927         /* RESUME */
 928         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 929                 dprintk(DEBUG_NORMAL, "USB resume\n");
 930
 931                 /* clear interrupt */
 932                 udc_write(S3C2410_UDC_USBINT_RESUME,
 933                                 S3C2410_UDC_USB_INT_REG);
 934
 935                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 936                                 && dev->driver
 937                                 && dev->driver->resume)
 938                         dev->driver->resume(&dev->gadget);
 939         }
 940
 941         /* SUSPEND */
 942         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 943                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 944
 945                 /* clear interrupt */
 946                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 947                                 S3C2410_UDC_USB_INT_REG);
 948
 949                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 950                                 && dev->driver
 951                                 && dev->driver->suspend)
 952                         dev->driver->suspend(&dev->gadget);
 953
 954                 dev->ep0state = EP0_IDLE;
 955         }
 956
 957         /* EP */
 958         /* control traffic */
 959         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 960          * generate an interrupt
 961          */
 962         if (usbd_status & S3C2410_UDC_INT_EP0) {
 963                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 964                 /* Clear the interrupt bit by setting it to 1 */
 965                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 966                 s3c2410_udc_handle_ep0(dev);
 967         }
 968
 969         /* endpoint data transfers */
 970         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 971                 u32 tmp = 1 << i;
 972                 if (usbd_status & tmp) {
 973                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 974
 975                         /* Clear the interrupt bit by setting it to 1 */
 976                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 977                         s3c2410_udc_handle_ep(&dev->ep[i]);
 978                 }
 979         }
 980
 981         /* what else causes this interrupt? a receive! who is it? */
 982         if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 983                 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 984                         idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 985                         udc_write(i, S3C2410_UDC_INDEX_REG);
 986
 987                         if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 988                                 s3c2410_udc_handle_ep(&dev->ep[i]);
 989
 990                         /* restore index */
 991                         udc_write(idx2, S3C2410_UDC_INDEX_REG);
 992                 }
 993         }
 994
 995         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
 996
 997         /* Restore old index */
 998         udc_write(idx, S3C2410_UDC_INDEX_REG);
 999
1000         spin_unlock_irqrestore(&dev->lock, flags);
1001
1002         return IRQ_HANDLED;
1003 }
1004 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1005
1006 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1007 {
1008         return container_of(ep, struct s3c2410_ep, ep);
1009 }
1010
1011 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1012 {
1013         return container_of(gadget, struct s3c2410_udc, gadget);
1014 }
1015
1016 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1017 {
1018         return container_of(req, struct s3c2410_request, req);
1019 }
1020
1021 /*
1022  *      s3c2410_udc_ep_enable
1023  */
1024 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1025                                  const struct usb_endpoint_descriptor *desc)
1026 {
1027         struct s3c2410_udc      *dev;
1028         struct s3c2410_ep       *ep;
1029         u32                     max, tmp;
1030         unsigned long           flags;
1031         u32                     csr1, csr2;
1032         u32                     int_en_reg;
1033
1034         ep = to_s3c2410_ep(_ep);
1035
1036         if (!_ep || !desc
1037                         || _ep->name == ep0name
1038                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1039                 return -EINVAL;
1040
1041         dev = ep->dev;
1042         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1043                 return -ESHUTDOWN;
1044
1045         max = usb_endpoint_maxp(desc);
1046
1047         local_irq_save(flags);
1048         _ep->maxpacket = max;
1049         ep->ep.desc = desc;
1050         ep->halted = 0;
1051         ep->bEndpointAddress = desc->bEndpointAddress;
1052
1053         /* set max packet */
1054         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1055         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1056
1057         /* set type, direction, address; reset fifo counters */
1058         if (desc->bEndpointAddress & USB_DIR_IN) {
1059                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1060                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1061
1062                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1063                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1064                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1065                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1066         } else {
1067                 /* don't flush in fifo or it will cause endpoint interrupt */
1068                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1069                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1070
1071                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1072                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1073                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1074                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1075
1076                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1077                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1078
1079                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1080                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1081                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1082                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1083         }
1084
1085         /* enable irqs */
1086         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1087         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1088
1089         /* print some debug message */
1090         tmp = desc->bEndpointAddress;
1091         dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1092                  _ep->name, ep->num, tmp,
1093                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1094
1095         local_irq_restore(flags);
1096         s3c2410_udc_set_halt(_ep, 0);
1097
1098         return 0;
1099 }
1100
1101 /*
1102  * s3c2410_udc_ep_disable
1103  */
1104 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1105 {
1106         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1107         unsigned long flags;
1108         u32 int_en_reg;
1109
1110         if (!_ep || !ep->ep.desc) {
1111                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1112                         _ep ? ep->ep.name : NULL);
1113                 return -EINVAL;
1114         }
1115
1116         local_irq_save(flags);
1117
1118         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1119
1120         ep->ep.desc = NULL;
1121         ep->halted = 1;
1122
1123         s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1124
1125         /* disable irqs */
1126         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1127         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1128
1129         local_irq_restore(flags);
1130
1131         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1132
1133         return 0;
1134 }
1135
1136 /*
1137  * s3c2410_udc_alloc_request
1138  */
1139 static struct usb_request *
1140 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1141 {
1142         struct s3c2410_request *req;
1143
1144         dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1145
1146         if (!_ep)
1147                 return NULL;
1148
1149         req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1150         if (!req)
1151                 return NULL;
1152
1153         INIT_LIST_HEAD(&req->queue);
1154         return &req->req;
1155 }
1156
1157 /*
1158  * s3c2410_udc_free_request
1159  */
1160 static void
1161 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1162 {
1163         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1164         struct s3c2410_request  *req = to_s3c2410_req(_req);
1165
1166         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1167
1168         if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1169                 return;
1170
1171         WARN_ON(!list_empty(&req->queue));
1172         kfree(req);
1173 }
1174
1175 /*
1176  *      s3c2410_udc_queue
1177  */
1178 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1179                 gfp_t gfp_flags)
1180 {
1181         struct s3c2410_request  *req = to_s3c2410_req(_req);
1182         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1183         struct s3c2410_udc      *dev;
1184         u32                     ep_csr = 0;
1185         int                     fifo_count = 0;
1186         unsigned long           flags;
1187
1188         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1189                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1190                 return -EINVAL;
1191         }
1192
1193         dev = ep->dev;
1194         if (unlikely(!dev->driver
1195                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1196                 return -ESHUTDOWN;
1197         }
1198
1199         local_irq_save(flags);
1200
1201         if (unlikely(!_req || !_req->complete
1202                         || !_req->buf || !list_empty(&req->queue))) {
1203                 if (!_req)
1204                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1205                 else {
1206                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1207                                 __func__, !_req->complete, !_req->buf,
1208                                 !list_empty(&req->queue));
1209                 }
1210
1211                 local_irq_restore(flags);
1212                 return -EINVAL;
1213         }
1214
1215         _req->status = -EINPROGRESS;
1216         _req->actual = 0;
1217
1218         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1219                  __func__, ep->bEndpointAddress, _req->length);
1220
1221         if (ep->bEndpointAddress) {
1222                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1223
1224                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1225                                 ? S3C2410_UDC_IN_CSR1_REG
1226                                 : S3C2410_UDC_OUT_CSR1_REG);
1227                 fifo_count = s3c2410_udc_fifo_count_out();
1228         } else {
1229                 udc_write(0, S3C2410_UDC_INDEX_REG);
1230                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1231                 fifo_count = s3c2410_udc_fifo_count_out();
1232         }
1233
1234         /* kickstart this i/o queue? */
1235         if (list_empty(&ep->queue) && !ep->halted) {
1236                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1237                         switch (dev->ep0state) {
1238                         case EP0_IN_DATA_PHASE:
1239                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1240                                                 && s3c2410_udc_write_fifo(ep,
1241                                                         req)) {
1242                                         dev->ep0state = EP0_IDLE;
1243                                         req = NULL;
1244                                 }
1245                                 break;
1246
1247                         case EP0_OUT_DATA_PHASE:
1248                                 if ((!_req->length)
1249                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1250                                                 && s3c2410_udc_read_fifo(ep,
1251                                                         req))) {
1252                                         dev->ep0state = EP0_IDLE;
1253                                         req = NULL;
1254                                 }
1255                                 break;
1256
1257                         default:
1258                                 local_irq_restore(flags);
1259                                 return -EL2HLT;
1260                         }
1261                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1262                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1263                                 && s3c2410_udc_write_fifo(ep, req)) {
1264                         req = NULL;
1265                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1266                                 && fifo_count
1267                                 && s3c2410_udc_read_fifo(ep, req)) {
1268                         req = NULL;
1269                 }
1270         }
1271
1272         /* pio or dma irq handler advances the queue. */
1273         if (likely(req))
1274                 list_add_tail(&req->queue, &ep->queue);
1275
1276         local_irq_restore(flags);
1277
1278         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1279         return 0;
1280 }
1281
1282 /*
1283  *      s3c2410_udc_dequeue
1284  */
1285 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1286 {
1287         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1288         struct s3c2410_udc      *udc;
1289         int                     retval = -EINVAL;
1290         unsigned long           flags;
1291         struct s3c2410_request  *req = NULL;
1292
1293         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1294
1295         if (!the_controller->driver)
1296                 return -ESHUTDOWN;
1297
1298         if (!_ep || !_req)
1299                 return retval;
1300
1301         udc = to_s3c2410_udc(ep->gadget);
1302
1303         local_irq_save(flags);
1304
1305         list_for_each_entry(req, &ep->queue, queue) {
1306                 if (&req->req == _req) {
1307                         list_del_init(&req->queue);
1308                         _req->status = -ECONNRESET;
1309                         retval = 0;
1310                         break;
1311                 }
1312         }
1313
1314         if (retval == 0) {
1315                 dprintk(DEBUG_VERBOSE,
1316                         "dequeued req %p from %s, len %d buf %p\n",
1317                         req, _ep->name, _req->length, _req->buf);
1318
1319                 s3c2410_udc_done(ep, req, -ECONNRESET);
1320         }
1321
1322         local_irq_restore(flags);
1323         return retval;
1324 }
1325
1326 /*
1327  * s3c2410_udc_set_halt
1328  */
1329 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1330 {
1331         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1332         u32                     ep_csr = 0;
1333         unsigned long           flags;
1334         u32                     idx;
1335
1336         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1337                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1338                 return -EINVAL;
1339         }
1340
1341         local_irq_save(flags);
1342
1343         idx = ep->bEndpointAddress & 0x7F;
1344
1345         if (idx == 0) {
1346                 s3c2410_udc_set_ep0_ss(base_addr);
1347                 s3c2410_udc_set_ep0_de_out(base_addr);
1348         } else {
1349                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1350                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1351                                 ? S3C2410_UDC_IN_CSR1_REG
1352                                 : S3C2410_UDC_OUT_CSR1_REG);
1353
1354                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1355                         if (value)
1356                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1357                                         S3C2410_UDC_IN_CSR1_REG);
1358                         else {
1359                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1360                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1361                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1362                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1363                         }
1364                 } else {
1365                         if (value)
1366                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1367                                         S3C2410_UDC_OUT_CSR1_REG);
1368                         else {
1369                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1370                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1371                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1372                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1373                         }
1374                 }
1375         }
1376
1377         ep->halted = value ? 1 : 0;
1378         local_irq_restore(flags);
1379
1380         return 0;
1381 }
1382
1383 static const struct usb_ep_ops s3c2410_ep_ops = {
1384         .enable         = s3c2410_udc_ep_enable,
1385         .disable        = s3c2410_udc_ep_disable,
1386
1387         .alloc_request  = s3c2410_udc_alloc_request,
1388         .free_request   = s3c2410_udc_free_request,
1389
1390         .queue          = s3c2410_udc_queue,
1391         .dequeue        = s3c2410_udc_dequeue,
1392
1393         .set_halt       = s3c2410_udc_set_halt,
1394 };
1395
1396 /*------------------------- usb_gadget_ops ----------------------------------*/
1397
1398 /*
1399  *      s3c2410_udc_get_frame
1400  */
1401 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1402 {
1403         int tmp;
1404
1405         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1406
1407         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1408         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1409         return tmp;
1410 }
1411
1412 /*
1413  *      s3c2410_udc_wakeup
1414  */
1415 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1416 {
1417         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1418         return 0;
1419 }
1420
1421 /*
1422  *      s3c2410_udc_set_selfpowered
1423  */
1424 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1425 {
1426         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1427
1428         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1429
1430         gadget->is_selfpowered = (value != 0);
1431         if (value)
1432                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1433         else
1434                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1435
1436         return 0;
1437 }
1438
1439 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1440 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1441
1442 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1443 {
1444         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1445
1446         if (udc_info && (udc_info->udc_command ||
1447                 gpio_is_valid(udc_info->pullup_pin))) {
1448
1449                 if (is_on)
1450                         s3c2410_udc_enable(udc);
1451                 else {
1452                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1453                                 if (udc->driver && udc->driver->disconnect)
1454                                         udc->driver->disconnect(&udc->gadget);
1455
1456                         }
1457                         s3c2410_udc_disable(udc);
1458                 }
1459         } else {
1460                 return -EOPNOTSUPP;
1461         }
1462
1463         return 0;
1464 }
1465
1466 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1467 {
1468         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1469
1470         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1471
1472         udc->vbus = (is_active != 0);
1473         s3c2410_udc_set_pullup(udc, is_active);
1474         return 0;
1475 }
1476
1477 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1478 {
1479         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1480
1481         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1482
1483         s3c2410_udc_set_pullup(udc, is_on);
1484         return 0;
1485 }
1486
1487 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1488 {
1489         struct s3c2410_udc      *dev = _dev;
1490         unsigned int            value;
1491
1492         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1493
1494         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1495         if (udc_info->vbus_pin_inverted)
1496                 value = !value;
1497
1498         if (value != dev->vbus)
1499                 s3c2410_udc_vbus_session(&dev->gadget, value);
1500
1501         return IRQ_HANDLED;
1502 }
1503
1504 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1505 {
1506         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1507
1508         if (udc_info && udc_info->vbus_draw) {
1509                 udc_info->vbus_draw(ma);
1510                 return 0;
1511         }
1512
1513         return -ENOTSUPP;
1514 }
1515
1516 static int s3c2410_udc_start(struct usb_gadget *g,
1517                 struct usb_gadget_driver *driver);
1518 static int s3c2410_udc_stop(struct usb_gadget *g);
1519
1520 static const struct usb_gadget_ops s3c2410_ops = {
1521         .get_frame              = s3c2410_udc_get_frame,
1522         .wakeup                 = s3c2410_udc_wakeup,
1523         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1524         .pullup                 = s3c2410_udc_pullup,
1525         .vbus_session           = s3c2410_udc_vbus_session,
1526         .vbus_draw              = s3c2410_vbus_draw,
1527         .udc_start              = s3c2410_udc_start,
1528         .udc_stop               = s3c2410_udc_stop,
1529 };
1530
1531 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1532 {
1533         if (!udc_info)
1534                 return;
1535
1536         if (udc_info->udc_command) {
1537                 udc_info->udc_command(cmd);
1538         } else if (gpio_is_valid(udc_info->pullup_pin)) {
1539                 int value;
1540
1541                 switch (cmd) {
1542                 case S3C2410_UDC_P_ENABLE:
1543                         value = 1;
1544                         break;
1545                 case S3C2410_UDC_P_DISABLE:
1546                         value = 0;
1547                         break;
1548                 default:
1549                         return;
1550                 }
1551                 value ^= udc_info->pullup_pin_inverted;
1552
1553                 gpio_set_value(udc_info->pullup_pin, value);
1554         }
1555 }
1556
1557 /*------------------------- gadget driver handling---------------------------*/
1558 /*
1559  * s3c2410_udc_disable
1560  */
1561 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1562 {
1563         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1564
1565         /* Disable all interrupts */
1566         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1567         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1568
1569         /* Clear the interrupt registers */
1570         udc_write(S3C2410_UDC_USBINT_RESET
1571                                 | S3C2410_UDC_USBINT_RESUME
1572                                 | S3C2410_UDC_USBINT_SUSPEND,
1573                         S3C2410_UDC_USB_INT_REG);
1574
1575         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1576
1577         /* Good bye, cruel world */
1578         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1579
1580         /* Set speed to unknown */
1581         dev->gadget.speed = USB_SPEED_UNKNOWN;
1582 }
1583
1584 /*
1585  * s3c2410_udc_reinit
1586  */
1587 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1588 {
1589         u32 i;
1590
1591         /* device/ep0 records init */
1592         INIT_LIST_HEAD(&dev->gadget.ep_list);
1593         INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1594         dev->ep0state = EP0_IDLE;
1595
1596         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1597                 struct s3c2410_ep *ep = &dev->ep[i];
1598
1599                 if (i != 0)
1600                         list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1601
1602                 ep->dev = dev;
1603                 ep->ep.desc = NULL;
1604                 ep->halted = 0;
1605                 INIT_LIST_HEAD(&ep->queue);
1606                 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1607         }
1608 }
1609
1610 /*
1611  * s3c2410_udc_enable
1612  */
1613 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1614 {
1615         int i;
1616
1617         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1618
1619         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1620         dev->gadget.speed = USB_SPEED_FULL;
1621
1622         /* Set MAXP for all endpoints */
1623         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1624                 udc_write(i, S3C2410_UDC_INDEX_REG);
1625                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1626                                 S3C2410_UDC_MAXP_REG);
1627         }
1628
1629         /* Set default power state */
1630         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1631
1632         /* Enable reset and suspend interrupt interrupts */
1633         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1634                         S3C2410_UDC_USB_INT_EN_REG);
1635
1636         /* Enable ep0 interrupt */
1637         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1638
1639         /* time to say "hello, world" */
1640         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1641 }
1642
1643 static int s3c2410_udc_start(struct usb_gadget *g,
1644                 struct usb_gadget_driver *driver)
1645 {
1646         struct s3c2410_udc *udc = to_s3c2410(g);
1647
1648         dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1649
1650         /* Hook the driver */
1651         udc->driver = driver;
1652
1653         /* Enable udc */
1654         s3c2410_udc_enable(udc);
1655
1656         return 0;
1657 }
1658
1659 static int s3c2410_udc_stop(struct usb_gadget *g)
1660 {
1661         struct s3c2410_udc *udc = to_s3c2410(g);
1662
1663         udc->driver = NULL;
1664
1665         /* Disable udc */
1666         s3c2410_udc_disable(udc);
1667
1668         return 0;
1669 }
1670
1671 /*---------------------------------------------------------------------------*/
1672 static struct s3c2410_udc memory = {
1673         .gadget = {
1674                 .ops            = &s3c2410_ops,
1675                 .ep0            = &memory.ep[0].ep,
1676                 .name           = gadget_name,
1677                 .dev = {
1678                         .init_name      = "gadget",
1679                 },
1680         },
1681
1682         /* control endpoint */
1683         .ep[0] = {
1684                 .num            = 0,
1685                 .ep = {
1686                         .name           = ep0name,
1687                         .ops            = &s3c2410_ep_ops,
1688                         .maxpacket      = EP0_FIFO_SIZE,
1689                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1690                                                 USB_EP_CAPS_DIR_ALL),
1691                 },
1692                 .dev            = &memory,
1693         },
1694
1695         /* first group of endpoints */
1696         .ep[1] = {
1697                 .num            = 1,
1698                 .ep = {
1699                         .name           = "ep1-bulk",
1700                         .ops            = &s3c2410_ep_ops,
1701                         .maxpacket      = EP_FIFO_SIZE,
1702                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1703                                                 USB_EP_CAPS_DIR_ALL),
1704                 },
1705                 .dev            = &memory,
1706                 .fifo_size      = EP_FIFO_SIZE,
1707                 .bEndpointAddress = 1,
1708                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1709         },
1710         .ep[2] = {
1711                 .num            = 2,
1712                 .ep = {
1713                         .name           = "ep2-bulk",
1714                         .ops            = &s3c2410_ep_ops,
1715                         .maxpacket      = EP_FIFO_SIZE,
1716                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1717                                                 USB_EP_CAPS_DIR_ALL),
1718                 },
1719                 .dev            = &memory,
1720                 .fifo_size      = EP_FIFO_SIZE,
1721                 .bEndpointAddress = 2,
1722                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1723         },
1724         .ep[3] = {
1725                 .num            = 3,
1726                 .ep = {
1727                         .name           = "ep3-bulk",
1728                         .ops            = &s3c2410_ep_ops,
1729                         .maxpacket      = EP_FIFO_SIZE,
1730                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1731                                                 USB_EP_CAPS_DIR_ALL),
1732                 },
1733                 .dev            = &memory,
1734                 .fifo_size      = EP_FIFO_SIZE,
1735                 .bEndpointAddress = 3,
1736                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1737         },
1738         .ep[4] = {
1739                 .num            = 4,
1740                 .ep = {
1741                         .name           = "ep4-bulk",
1742                         .ops            = &s3c2410_ep_ops,
1743                         .maxpacket      = EP_FIFO_SIZE,
1744                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1745                                                 USB_EP_CAPS_DIR_ALL),
1746                 },
1747                 .dev            = &memory,
1748                 .fifo_size      = EP_FIFO_SIZE,
1749                 .bEndpointAddress = 4,
1750                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1751         }
1752
1753 };
1754
1755 /*
1756  *      probe - binds to the platform device
1757  */
1758 static int s3c2410_udc_probe(struct platform_device *pdev)
1759 {
1760         struct s3c2410_udc *udc = &memory;
1761         struct device *dev = &pdev->dev;
1762         int retval;
1763         int irq;
1764
1765         dev_dbg(dev, "%s()\n", __func__);
1766
1767         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1768         if (IS_ERR(usb_bus_clock)) {
1769                 dev_err(dev, "failed to get usb bus clock source\n");
1770                 return PTR_ERR(usb_bus_clock);
1771         }
1772
1773         clk_prepare_enable(usb_bus_clock);
1774
1775         udc_clock = clk_get(NULL, "usb-device");
1776         if (IS_ERR(udc_clock)) {
1777                 dev_err(dev, "failed to get udc clock source\n");
1778                 return PTR_ERR(udc_clock);
1779         }
1780
1781         clk_prepare_enable(udc_clock);
1782
1783         mdelay(10);
1784
1785         dev_dbg(dev, "got and enabled clocks\n");
1786
1787         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1788                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1789                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1790                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1791                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1792                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1793         }
1794
1795         spin_lock_init(&udc->lock);
1796         udc_info = dev_get_platdata(&pdev->dev);
1797
1798         rsrc_start = S3C2410_PA_USBDEV;
1799         rsrc_len   = S3C24XX_SZ_USBDEV;
1800
1801         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1802                 return -EBUSY;
1803
1804         base_addr = ioremap(rsrc_start, rsrc_len);
1805         if (!base_addr) {
1806                 retval = -ENOMEM;
1807                 goto err_mem;
1808         }
1809
1810         the_controller = udc;
1811         platform_set_drvdata(pdev, udc);
1812
1813         s3c2410_udc_disable(udc);
1814         s3c2410_udc_reinit(udc);
1815
1816         /* irq setup after old hardware state is cleaned up */
1817         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1818                              0, gadget_name, udc);
1819
1820         if (retval != 0) {
1821                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1822                 retval = -EBUSY;
1823                 goto err_map;
1824         }
1825
1826         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1827
1828         if (udc_info && udc_info->vbus_pin > 0) {
1829                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1830                 if (retval < 0) {
1831                         dev_err(dev, "cannot claim vbus pin\n");
1832                         goto err_int;
1833                 }
1834
1835                 irq = gpio_to_irq(udc_info->vbus_pin);
1836                 if (irq < 0) {
1837                         dev_err(dev, "no irq for gpio vbus pin\n");
1838                         retval = irq;
1839                         goto err_gpio_claim;
1840                 }
1841
1842                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1843                                      IRQF_TRIGGER_RISING
1844                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1845                                      gadget_name, udc);
1846
1847                 if (retval != 0) {
1848                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1849                                 irq, retval);
1850                         retval = -EBUSY;
1851                         goto err_gpio_claim;
1852                 }
1853
1854                 dev_dbg(dev, "got irq %i\n", irq);
1855         } else {
1856                 udc->vbus = 1;
1857         }
1858
1859         if (udc_info && !udc_info->udc_command &&
1860                 gpio_is_valid(udc_info->pullup_pin)) {
1861
1862                 retval = gpio_request_one(udc_info->pullup_pin,
1863                                 udc_info->vbus_pin_inverted ?
1864                                 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1865                                 "udc pullup");
1866                 if (retval)
1867                         goto err_vbus_irq;
1868         }
1869
1870         retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1871         if (retval)
1872                 goto err_add_udc;
1873
1874         if (s3c2410_udc_debugfs_root) {
1875                 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1876                                 s3c2410_udc_debugfs_root,
1877                                 udc, &s3c2410_udc_debugfs_fops);
1878                 if (!udc->regs_info)
1879                         dev_warn(dev, "debugfs file creation failed\n");
1880         }
1881
1882         dev_dbg(dev, "probe ok\n");
1883
1884         return 0;
1885
1886 err_add_udc:
1887         if (udc_info && !udc_info->udc_command &&
1888                         gpio_is_valid(udc_info->pullup_pin))
1889                 gpio_free(udc_info->pullup_pin);
1890 err_vbus_irq:
1891         if (udc_info && udc_info->vbus_pin > 0)
1892                 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1893 err_gpio_claim:
1894         if (udc_info && udc_info->vbus_pin > 0)
1895                 gpio_free(udc_info->vbus_pin);
1896 err_int:
1897         free_irq(IRQ_USBD, udc);
1898 err_map:
1899         iounmap(base_addr);
1900 err_mem:
1901         release_mem_region(rsrc_start, rsrc_len);
1902
1903         return retval;
1904 }
1905
1906 /*
1907  *      s3c2410_udc_remove
1908  */
1909 static int s3c2410_udc_remove(struct platform_device *pdev)
1910 {
1911         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1912         unsigned int irq;
1913
1914         dev_dbg(&pdev->dev, "%s()\n", __func__);
1915
1916         if (udc->driver)
1917                 return -EBUSY;
1918
1919         usb_del_gadget_udc(&udc->gadget);
1920         debugfs_remove(udc->regs_info);
1921
1922         if (udc_info && !udc_info->udc_command &&
1923                 gpio_is_valid(udc_info->pullup_pin))
1924                 gpio_free(udc_info->pullup_pin);
1925
1926         if (udc_info && udc_info->vbus_pin > 0) {
1927                 irq = gpio_to_irq(udc_info->vbus_pin);
1928                 free_irq(irq, udc);
1929         }
1930
1931         free_irq(IRQ_USBD, udc);
1932
1933         iounmap(base_addr);
1934         release_mem_region(rsrc_start, rsrc_len);
1935
1936         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1937                 clk_disable_unprepare(udc_clock);
1938                 clk_put(udc_clock);
1939                 udc_clock = NULL;
1940         }
1941
1942         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1943                 clk_disable_unprepare(usb_bus_clock);
1944                 clk_put(usb_bus_clock);
1945                 usb_bus_clock = NULL;
1946         }
1947
1948         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1949         return 0;
1950 }
1951
1952 #ifdef CONFIG_PM
1953 static int
1954 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1955 {
1956         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1957
1958         return 0;
1959 }
1960
1961 static int s3c2410_udc_resume(struct platform_device *pdev)
1962 {
1963         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1964
1965         return 0;
1966 }
1967 #else
1968 #define s3c2410_udc_suspend     NULL
1969 #define s3c2410_udc_resume      NULL
1970 #endif
1971
1972 static const struct platform_device_id s3c_udc_ids[] = {
1973         { "s3c2410-usbgadget", },
1974         { "s3c2440-usbgadget", },
1975         { }
1976 };
1977 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1978
1979 static struct platform_driver udc_driver_24x0 = {
1980         .driver         = {
1981                 .name   = "s3c24x0-usbgadget",
1982         },
1983         .probe          = s3c2410_udc_probe,
1984         .remove         = s3c2410_udc_remove,
1985         .suspend        = s3c2410_udc_suspend,
1986         .resume         = s3c2410_udc_resume,
1987         .id_table       = s3c_udc_ids,
1988 };
1989
1990 static int __init udc_init(void)
1991 {
1992         int retval;
1993
1994         dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1995
1996         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
1997         if (IS_ERR(s3c2410_udc_debugfs_root)) {
1998                 pr_err("%s: debugfs dir creation failed %ld\n",
1999                         gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2000                 s3c2410_udc_debugfs_root = NULL;
2001         }
2002
2003         retval = platform_driver_register(&udc_driver_24x0);
2004         if (retval)
2005                 goto err;
2006
2007         return 0;
2008
2009 err:
2010         debugfs_remove(s3c2410_udc_debugfs_root);
2011         return retval;
2012 }
2013
2014 static void __exit udc_exit(void)
2015 {
2016         platform_driver_unregister(&udc_driver_24x0);
2017         debugfs_remove(s3c2410_udc_debugfs_root);
2018 }
2019
2020 module_init(udc_init);
2021 module_exit(udc_exit);
2022
2023 MODULE_AUTHOR(DRIVER_AUTHOR);
2024 MODULE_DESCRIPTION(DRIVER_DESC);
2025 MODULE_LICENSE("GPL");