1 // SPDX-License-Identifier: GPL-2.0+
3 * Handles the Intel 27x USB Device Controller (UDC)
5 * Inspired by original driver by Frank Becker, David Brownell, and others.
6 * Copyright (C) 2008 Robert Jarzmik
8 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/errno.h>
12 #include <linux/err.h>
13 #include <linux/platform_device.h>
14 #include <linux/delay.h>
15 #include <linux/list.h>
16 #include <linux/interrupt.h>
17 #include <linux/proc_fs.h>
18 #include <linux/clk.h>
19 #include <linux/irq.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/slab.h>
23 #include <linux/prefetch.h>
24 #include <linux/byteorder/generic.h>
25 #include <linux/platform_data/pxa2xx_udc.h>
26 #include <linux/of_device.h>
27 #include <linux/of_gpio.h>
29 #include <linux/usb.h>
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/gadget.h>
32 #include <linux/usb/phy.h>
34 #include "pxa27x_udc.h"
37 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
40 * Such controller drivers work with a gadget driver. The gadget driver
41 * returns descriptors, implements configuration and data protocols used
42 * by the host to interact with this device, and allocates endpoints to
43 * the different protocol interfaces. The controller driver virtualizes
44 * usb hardware so that the gadget drivers will be more portable.
46 * This UDC hardware wants to implement a bit too much USB protocol. The
47 * biggest issues are: that the endpoints have to be set up before the
48 * controller can be enabled (minor, and not uncommon); and each endpoint
49 * can only have one configuration, interface and alternative interface
50 * number (major, and very unusual). Once set up, these cannot be changed
51 * without a controller reset.
53 * The workaround is to setup all combinations necessary for the gadgets which
54 * will work with this driver. This is done in pxa_udc structure, statically.
55 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
56 * (You could modify this if needed. Some drivers have a "fifo_mode" module
57 * parameter to facilitate such changes.)
59 * The combinations have been tested with these gadgets :
61 * - file storage gadget
64 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
65 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
67 * All the requests are handled the same way :
68 * - the drivers tries to handle the request directly to the IO
69 * - if the IO fifo is not big enough, the remaining is send/received in
73 #define DRIVER_VERSION "2008-04-18"
74 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
76 static const char driver_name[] = "pxa27x_udc";
77 static struct pxa_udc *the_controller;
79 static void handle_ep(struct pxa_ep *ep);
84 #ifdef CONFIG_USB_GADGET_DEBUG_FS
86 #include <linux/debugfs.h>
87 #include <linux/uaccess.h>
88 #include <linux/seq_file.h>
90 static int state_dbg_show(struct seq_file *s, void *p)
92 struct pxa_udc *udc = s->private;
98 /* basic device status */
99 seq_printf(s, DRIVER_DESC "\n"
101 "Gadget driver: %s\n",
102 driver_name, DRIVER_VERSION,
103 udc->driver ? udc->driver->driver.name : "(none)");
105 tmp = udc_readl(udc, UDCCR);
107 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), con=%d,inter=%d,altinter=%d\n",
109 (tmp & UDCCR_OEN) ? " oen":"",
110 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
111 (tmp & UDCCR_AHNP) ? " rem" : "",
112 (tmp & UDCCR_BHNP) ? " rstir" : "",
113 (tmp & UDCCR_DWRE) ? " dwre" : "",
114 (tmp & UDCCR_SMAC) ? " smac" : "",
115 (tmp & UDCCR_EMCE) ? " emce" : "",
116 (tmp & UDCCR_UDR) ? " udr" : "",
117 (tmp & UDCCR_UDA) ? " uda" : "",
118 (tmp & UDCCR_UDE) ? " ude" : "",
119 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
120 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
121 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
122 /* registers for device and ep0 */
123 seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
124 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
125 seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
126 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
127 seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
128 seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, reconfig=%lu\n",
129 udc->stats.irqs_reset, udc->stats.irqs_suspend,
130 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
134 DEFINE_SHOW_ATTRIBUTE(state_dbg);
136 static int queues_dbg_show(struct seq_file *s, void *p)
138 struct pxa_udc *udc = s->private;
140 struct pxa27x_request *req;
146 /* dump endpoint queues */
147 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
148 ep = &udc->pxa_ep[i];
149 maxpkt = ep->fifo_size;
150 seq_printf(s, "%-12s max_pkt=%d %s\n",
151 EPNAME(ep), maxpkt, "pio");
153 if (list_empty(&ep->queue)) {
154 seq_puts(s, "\t(nothing queued)\n");
158 list_for_each_entry(req, &ep->queue, queue) {
159 seq_printf(s, "\treq %p len %d/%d buf %p\n",
160 &req->req, req->req.actual,
161 req->req.length, req->req.buf);
167 DEFINE_SHOW_ATTRIBUTE(queues_dbg);
169 static int eps_dbg_show(struct seq_file *s, void *p)
171 struct pxa_udc *udc = s->private;
179 ep = &udc->pxa_ep[0];
180 tmp = udc_ep_readl(ep, UDCCSR);
181 seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n",
183 (tmp & UDCCSR0_SA) ? " sa" : "",
184 (tmp & UDCCSR0_RNE) ? " rne" : "",
185 (tmp & UDCCSR0_FST) ? " fst" : "",
186 (tmp & UDCCSR0_SST) ? " sst" : "",
187 (tmp & UDCCSR0_DME) ? " dme" : "",
188 (tmp & UDCCSR0_IPR) ? " ipr" : "",
189 (tmp & UDCCSR0_OPC) ? " opc" : "");
190 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
191 ep = &udc->pxa_ep[i];
192 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
193 seq_printf(s, "%-12s: IN %lu(%lu reqs), OUT %lu(%lu reqs), irqs=%lu, udccr=0x%08x, udccsr=0x%03x, udcbcr=%d\n",
195 ep->stats.in_bytes, ep->stats.in_ops,
196 ep->stats.out_bytes, ep->stats.out_ops,
198 tmp, udc_ep_readl(ep, UDCCSR),
199 udc_ep_readl(ep, UDCBCR));
204 DEFINE_SHOW_ATTRIBUTE(eps_dbg);
206 static void pxa_init_debugfs(struct pxa_udc *udc)
210 root = debugfs_create_dir(udc->gadget.name, usb_debug_root);
211 debugfs_create_file("udcstate", 0400, root, udc, &state_dbg_fops);
212 debugfs_create_file("queues", 0400, root, udc, &queues_dbg_fops);
213 debugfs_create_file("epstate", 0400, root, udc, &eps_dbg_fops);
216 static void pxa_cleanup_debugfs(struct pxa_udc *udc)
218 debugfs_remove(debugfs_lookup(udc->gadget.name, usb_debug_root));
222 static inline void pxa_init_debugfs(struct pxa_udc *udc)
226 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
232 * is_match_usb_pxa - check if usb_ep and pxa_ep match
233 * @udc_usb_ep: usb endpoint
235 * @config: configuration required in pxa_ep
236 * @interface: interface required in pxa_ep
237 * @altsetting: altsetting required in pxa_ep
239 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
241 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
242 int config, int interface, int altsetting)
244 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
246 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
248 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
250 if ((ep->config != config) || (ep->interface != interface)
251 || (ep->alternate != altsetting))
257 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
259 * @udc_usb_ep: udc_usb_ep structure
261 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
262 * This is necessary because of the strong pxa hardware restriction requiring
263 * that once pxa endpoints are initialized, their configuration is freezed, and
264 * no change can be made to their address, direction, or in which configuration,
265 * interface or altsetting they are active ... which differs from more usual
266 * models which have endpoints be roughly just addressable fifos, and leave
267 * configuration events up to gadget drivers (like all control messages).
269 * Note that there is still a blurred point here :
270 * - we rely on UDCCR register "active interface" and "active altsetting".
271 * This is a nonsense in regard of USB spec, where multiple interfaces are
272 * active at the same time.
273 * - if we knew for sure that the pxa can handle multiple interface at the
274 * same time, assuming Intel's Developer Guide is wrong, this function
275 * should be reviewed, and a cache of couples (iface, altsetting) should
276 * be kept in the pxa_udc structure. In this case this function would match
277 * against the cache of couples instead of the "last altsetting" set up.
279 * Returns the matched pxa_ep structure or NULL if none found
281 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
282 struct udc_usb_ep *udc_usb_ep)
286 int cfg = udc->config;
287 int iface = udc->last_interface;
288 int alt = udc->last_alternate;
290 if (udc_usb_ep == &udc->udc_usb_ep[0])
291 return &udc->pxa_ep[0];
293 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
294 ep = &udc->pxa_ep[i];
295 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
302 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
305 * Context: interrupt handler
307 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
308 * previously set up (and is not NULL). The update is necessary is a
309 * configuration change or altsetting change was issued by the USB host.
311 static void update_pxa_ep_matches(struct pxa_udc *udc)
314 struct udc_usb_ep *udc_usb_ep;
316 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
317 udc_usb_ep = &udc->udc_usb_ep[i];
318 if (udc_usb_ep->pxa_ep)
319 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
324 * pio_irq_enable - Enables irq generation for one endpoint
327 static void pio_irq_enable(struct pxa_ep *ep)
329 struct pxa_udc *udc = ep->dev;
330 int index = EPIDX(ep);
331 u32 udcicr0 = udc_readl(udc, UDCICR0);
332 u32 udcicr1 = udc_readl(udc, UDCICR1);
335 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
337 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
341 * pio_irq_disable - Disables irq generation for one endpoint
344 static void pio_irq_disable(struct pxa_ep *ep)
346 struct pxa_udc *udc = ep->dev;
347 int index = EPIDX(ep);
348 u32 udcicr0 = udc_readl(udc, UDCICR0);
349 u32 udcicr1 = udc_readl(udc, UDCICR1);
352 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
354 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
358 * udc_set_mask_UDCCR - set bits in UDCCR
360 * @mask: bits to set in UDCCR
362 * Sets bits in UDCCR, leaving DME and FST bits as they were.
364 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
366 u32 udccr = udc_readl(udc, UDCCR);
367 udc_writel(udc, UDCCR,
368 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
372 * udc_clear_mask_UDCCR - clears bits in UDCCR
374 * @mask: bit to clear in UDCCR
376 * Clears bits in UDCCR, leaving DME and FST bits as they were.
378 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
380 u32 udccr = udc_readl(udc, UDCCR);
381 udc_writel(udc, UDCCR,
382 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
386 * ep_write_UDCCSR - set bits in UDCCSR
388 * @mask: bits to set in UDCCR
390 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
392 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
393 * SET_INTERFACE and SET_CONFIGURATION.
395 static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
399 udc_ep_writel(ep, UDCCSR, mask);
403 * ep_count_bytes_remain - get how many bytes in udc endpoint
406 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
408 static int ep_count_bytes_remain(struct pxa_ep *ep)
412 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
416 * ep_is_empty - checks if ep has byte ready for reading
419 * If endpoint is the control endpoint, checks if there are bytes in the
420 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
421 * are ready for reading on OUT endpoint.
423 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
425 static int ep_is_empty(struct pxa_ep *ep)
429 if (!is_ep0(ep) && ep->dir_in)
432 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
434 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
439 * ep_is_full - checks if ep has place to write bytes
442 * If endpoint is not the control endpoint and is an IN endpoint, checks if
443 * there is place to write bytes into the endpoint.
445 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
447 static int ep_is_full(struct pxa_ep *ep)
450 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
453 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
457 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
460 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
462 static int epout_has_pkt(struct pxa_ep *ep)
464 if (!is_ep0(ep) && ep->dir_in)
467 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
468 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
472 * set_ep0state - Set ep0 automata state
476 static void set_ep0state(struct pxa_udc *udc, int state)
478 struct pxa_ep *ep = &udc->pxa_ep[0];
479 char *old_stname = EP0_STNAME(udc);
481 udc->ep0state = state;
482 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
483 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
484 udc_ep_readl(ep, UDCBCR));
488 * ep0_idle - Put control endpoint into idle state
491 static void ep0_idle(struct pxa_udc *dev)
493 set_ep0state(dev, WAIT_FOR_SETUP);
497 * inc_ep_stats_reqs - Update ep stats counts
498 * @ep: physical endpoint
499 * @is_in: ep direction (USB_DIR_IN or 0)
502 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
511 * inc_ep_stats_bytes - Update ep stats counts
512 * @ep: physical endpoint
513 * @count: bytes transferred on endpoint
514 * @is_in: ep direction (USB_DIR_IN or 0)
516 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
519 ep->stats.in_bytes += count;
521 ep->stats.out_bytes += count;
525 * pxa_ep_setup - Sets up an usb physical endpoint
526 * @ep: pxa27x physical endpoint
528 * Find the physical pxa27x ep, and setup its UDCCR
530 static void pxa_ep_setup(struct pxa_ep *ep)
534 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
535 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
536 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
537 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
538 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
539 | ((ep->dir_in) ? UDCCONR_ED : 0)
540 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
543 udc_ep_writel(ep, UDCCR, new_udccr);
547 * pxa_eps_setup - Sets up all usb physical endpoints
550 * Setup all pxa physical endpoints, except ep0
552 static void pxa_eps_setup(struct pxa_udc *dev)
556 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
558 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
559 pxa_ep_setup(&dev->pxa_ep[i]);
563 * pxa_ep_alloc_request - Allocate usb request
567 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
568 * must still pass correctly initialized endpoints, since other controller
569 * drivers may care about how it's currently set up (dma issues etc).
571 static struct usb_request *
572 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
574 struct pxa27x_request *req;
576 req = kzalloc(sizeof *req, gfp_flags);
580 INIT_LIST_HEAD(&req->queue);
582 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
588 * pxa_ep_free_request - Free usb request
592 * Wrapper around kfree to free _req
594 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
596 struct pxa27x_request *req;
598 req = container_of(_req, struct pxa27x_request, req);
599 WARN_ON(!list_empty(&req->queue));
604 * ep_add_request - add a request to the endpoint's queue
608 * Context: ep->lock held
610 * Queues the request in the endpoint's queue, and enables the interrupts
613 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
617 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
618 req->req.length, udc_ep_readl(ep, UDCCSR));
621 list_add_tail(&req->queue, &ep->queue);
626 * ep_del_request - removes a request from the endpoint's queue
630 * Context: ep->lock held
632 * Unqueue the request from the endpoint's queue. If there are no more requests
633 * on the endpoint, and if it's not the control endpoint, interrupts are
634 * disabled on the endpoint.
636 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
640 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
641 req->req.length, udc_ep_readl(ep, UDCCSR));
643 list_del_init(&req->queue);
645 if (!is_ep0(ep) && list_empty(&ep->queue))
650 * req_done - Complete an usb request
651 * @ep: pxa physical endpoint
653 * @status: usb request status sent to gadget API
654 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
656 * Context: ep->lock held if flags not NULL, else ep->lock released
658 * Retire a pxa27x usb request. Endpoint must be locked.
660 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
661 unsigned long *pflags)
665 ep_del_request(ep, req);
666 if (likely(req->req.status == -EINPROGRESS))
667 req->req.status = status;
669 status = req->req.status;
671 if (status && status != -ESHUTDOWN)
672 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
674 req->req.actual, req->req.length);
677 spin_unlock_irqrestore(&ep->lock, *pflags);
678 local_irq_save(flags);
679 usb_gadget_giveback_request(&req->udc_usb_ep->usb_ep, &req->req);
680 local_irq_restore(flags);
682 spin_lock_irqsave(&ep->lock, *pflags);
686 * ep_end_out_req - Ends endpoint OUT request
687 * @ep: physical endpoint
689 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
691 * Context: ep->lock held or released (see req_done())
693 * Ends endpoint OUT request (completes usb request).
695 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
696 unsigned long *pflags)
698 inc_ep_stats_reqs(ep, !USB_DIR_IN);
699 req_done(ep, req, 0, pflags);
703 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
704 * @ep: physical endpoint
706 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
708 * Context: ep->lock held or released (see req_done())
710 * Ends control endpoint OUT request (completes usb request), and puts
711 * control endpoint into idle state
713 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
714 unsigned long *pflags)
716 set_ep0state(ep->dev, OUT_STATUS_STAGE);
717 ep_end_out_req(ep, req, pflags);
722 * ep_end_in_req - Ends endpoint IN request
723 * @ep: physical endpoint
725 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
727 * Context: ep->lock held or released (see req_done())
729 * Ends endpoint IN request (completes usb request).
731 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
732 unsigned long *pflags)
734 inc_ep_stats_reqs(ep, USB_DIR_IN);
735 req_done(ep, req, 0, pflags);
739 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
740 * @ep: physical endpoint
742 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
744 * Context: ep->lock held or released (see req_done())
746 * Ends control endpoint IN request (completes usb request), and puts
747 * control endpoint into status state
749 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
750 unsigned long *pflags)
752 set_ep0state(ep->dev, IN_STATUS_STAGE);
753 ep_end_in_req(ep, req, pflags);
757 * nuke - Dequeue all requests
759 * @status: usb request status
761 * Context: ep->lock released
763 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
764 * disabled on that endpoint (because no more requests).
766 static void nuke(struct pxa_ep *ep, int status)
768 struct pxa27x_request *req;
771 spin_lock_irqsave(&ep->lock, flags);
772 while (!list_empty(&ep->queue)) {
773 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
774 req_done(ep, req, status, &flags);
776 spin_unlock_irqrestore(&ep->lock, flags);
780 * read_packet - transfer 1 packet from an OUT endpoint into request
781 * @ep: pxa physical endpoint
784 * Takes bytes from OUT endpoint and transfers them info the usb request.
785 * If there is less space in request than bytes received in OUT endpoint,
786 * bytes are left in the OUT endpoint.
788 * Returns how many bytes were actually transferred
790 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
793 int bytes_ep, bufferspace, count, i;
795 bytes_ep = ep_count_bytes_remain(ep);
796 bufferspace = req->req.length - req->req.actual;
798 buf = (u32 *)(req->req.buf + req->req.actual);
801 if (likely(!ep_is_empty(ep)))
802 count = min(bytes_ep, bufferspace);
806 for (i = count; i > 0; i -= 4)
807 *buf++ = udc_ep_readl(ep, UDCDR);
808 req->req.actual += count;
810 ep_write_UDCCSR(ep, UDCCSR_PC);
816 * write_packet - transfer 1 packet from request into an IN endpoint
817 * @ep: pxa physical endpoint
819 * @max: max bytes that fit into endpoint
821 * Takes bytes from usb request, and transfers them into the physical
822 * endpoint. If there are no bytes to transfer, doesn't write anything
823 * to physical endpoint.
825 * Returns how many bytes were actually transferred.
827 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
830 int length, count, remain, i;
834 buf = (u32 *)(req->req.buf + req->req.actual);
837 length = min(req->req.length - req->req.actual, max);
838 req->req.actual += length;
840 remain = length & 0x3;
841 count = length & ~(0x3);
842 for (i = count; i > 0 ; i -= 4)
843 udc_ep_writel(ep, UDCDR, *buf++);
846 for (i = remain; i > 0; i--)
847 udc_ep_writeb(ep, UDCDR, *buf_8++);
849 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
850 udc_ep_readl(ep, UDCCSR));
856 * read_fifo - Transfer packets from OUT endpoint into usb request
857 * @ep: pxa physical endpoint
860 * Context: interrupt handler
862 * Unload as many packets as possible from the fifo we use for usb OUT
863 * transfers and put them into the request. Caller should have made sure
864 * there's at least one packet ready.
865 * Doesn't complete the request, that's the caller's job
867 * Returns 1 if the request completed, 0 otherwise
869 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
871 int count, is_short, completed = 0;
873 while (epout_has_pkt(ep)) {
874 count = read_packet(ep, req);
875 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
877 is_short = (count < ep->fifo_size);
878 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
879 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
880 &req->req, req->req.actual, req->req.length);
883 if (is_short || req->req.actual == req->req.length) {
887 /* finished that packet. the next one may be waiting... */
893 * write_fifo - transfer packets from usb request into an IN endpoint
894 * @ep: pxa physical endpoint
895 * @req: pxa usb request
897 * Write to an IN endpoint fifo, as many packets as possible.
898 * irqs will use this to write the rest later.
899 * caller guarantees at least one packet buffer is ready (or a zlp).
900 * Doesn't complete the request, that's the caller's job
902 * Returns 1 if request fully transferred, 0 if partial transfer
904 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
907 int count, is_short, is_last = 0, completed = 0, totcount = 0;
912 udccsr = udc_ep_readl(ep, UDCCSR);
913 if (udccsr & UDCCSR_PC) {
914 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
916 ep_write_UDCCSR(ep, UDCCSR_PC);
918 if (udccsr & UDCCSR_TRN) {
919 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
921 ep_write_UDCCSR(ep, UDCCSR_TRN);
924 count = write_packet(ep, req, max);
925 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
928 /* last packet is usually short (or a zlp) */
929 if (unlikely(count < max)) {
933 if (likely(req->req.length > req->req.actual)
938 /* interrupt/iso maxpacket may not fill the fifo */
939 is_short = unlikely(max < ep->fifo_size);
943 ep_write_UDCCSR(ep, UDCCSR_SP);
945 /* requests complete when all IN data is in the FIFO */
950 } while (!ep_is_full(ep));
952 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
953 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
954 req->req.length - req->req.actual, &req->req);
960 * read_ep0_fifo - Transfer packets from control endpoint into usb request
961 * @ep: control endpoint
962 * @req: pxa usb request
964 * Special ep0 version of the above read_fifo. Reads as many bytes from control
965 * endpoint as can be read, and stores them into usb request (limited by request
968 * Returns 0 if usb request only partially filled, 1 if fully filled
970 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
972 int count, is_short, completed = 0;
974 while (epout_has_pkt(ep)) {
975 count = read_packet(ep, req);
976 ep_write_UDCCSR(ep, UDCCSR0_OPC);
977 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
979 is_short = (count < ep->fifo_size);
980 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
981 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
982 &req->req, req->req.actual, req->req.length);
984 if (is_short || req->req.actual >= req->req.length) {
994 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
995 * @ep: control endpoint
998 * Context: interrupt handler
1000 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1001 * If the request doesn't fit, the remaining part will be sent from irq.
1002 * The request is considered fully written only if either :
1003 * - last write transferred all remaining bytes, but fifo was not fully filled
1004 * - last write was a 0 length write
1006 * Returns 1 if request fully written, 0 if request only partially sent
1008 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1011 int is_last, is_short;
1013 count = write_packet(ep, req, EP0_FIFO_SIZE);
1014 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1016 is_short = (count < EP0_FIFO_SIZE);
1017 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1019 /* Sends either a short packet or a 0 length packet */
1020 if (unlikely(is_short))
1021 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1023 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1024 count, is_short ? "/S" : "", is_last ? "/L" : "",
1025 req->req.length - req->req.actual,
1026 &req->req, udc_ep_readl(ep, UDCCSR));
1032 * pxa_ep_queue - Queue a request into an IN endpoint
1033 * @_ep: usb endpoint
1034 * @_req: usb request
1037 * Context: thread context or from the interrupt handler in the
1038 * special case of ep0 setup :
1039 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1041 * Returns 0 if succedeed, error otherwise
1043 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1046 struct udc_usb_ep *udc_usb_ep;
1048 struct pxa27x_request *req;
1049 struct pxa_udc *dev;
1050 unsigned long flags;
1054 int recursion_detected;
1056 req = container_of(_req, struct pxa27x_request, req);
1057 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1059 if (unlikely(!_req || !_req->complete || !_req->buf))
1065 ep = udc_usb_ep->pxa_ep;
1070 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1071 ep_dbg(ep, "bogus device state\n");
1075 /* iso is always one packet per request, that's the only way
1076 * we can report per-packet status. that also helps with dma.
1078 if (unlikely(EPXFERTYPE_is_ISO(ep)
1079 && req->req.length > ep->fifo_size))
1082 spin_lock_irqsave(&ep->lock, flags);
1083 recursion_detected = ep->in_handle_ep;
1085 is_first_req = list_empty(&ep->queue);
1086 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1087 _req, is_first_req ? "yes" : "no",
1088 _req->length, _req->buf);
1091 _req->status = -ESHUTDOWN;
1097 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1101 length = _req->length;
1102 _req->status = -EINPROGRESS;
1105 ep_add_request(ep, req);
1106 spin_unlock_irqrestore(&ep->lock, flags);
1109 switch (dev->ep0state) {
1110 case WAIT_ACK_SET_CONF_INTERF:
1112 ep_end_in_req(ep, req, NULL);
1114 ep_err(ep, "got a request of %d bytes while"
1115 "in state WAIT_ACK_SET_CONF_INTERF\n",
1117 ep_del_request(ep, req);
1123 if (!ep_is_full(ep))
1124 if (write_ep0_fifo(ep, req))
1125 ep0_end_in_req(ep, req, NULL);
1127 case OUT_DATA_STAGE:
1128 if ((length == 0) || !epout_has_pkt(ep))
1129 if (read_ep0_fifo(ep, req))
1130 ep0_end_out_req(ep, req, NULL);
1133 ep_err(ep, "odd state %s to send me a request\n",
1134 EP0_STNAME(ep->dev));
1135 ep_del_request(ep, req);
1140 if (!recursion_detected)
1147 spin_unlock_irqrestore(&ep->lock, flags);
1152 * pxa_ep_dequeue - Dequeue one request
1153 * @_ep: usb endpoint
1154 * @_req: usb request
1156 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1158 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1161 struct udc_usb_ep *udc_usb_ep;
1162 struct pxa27x_request *req;
1163 unsigned long flags;
1168 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1169 ep = udc_usb_ep->pxa_ep;
1170 if (!ep || is_ep0(ep))
1173 spin_lock_irqsave(&ep->lock, flags);
1175 /* make sure it's actually queued on this endpoint */
1176 list_for_each_entry(req, &ep->queue, queue) {
1177 if (&req->req == _req) {
1183 spin_unlock_irqrestore(&ep->lock, flags);
1185 req_done(ep, req, -ECONNRESET, NULL);
1190 * pxa_ep_set_halt - Halts operations on one endpoint
1191 * @_ep: usb endpoint
1194 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1196 static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1199 struct udc_usb_ep *udc_usb_ep;
1200 unsigned long flags;
1206 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1207 ep = udc_usb_ep->pxa_ep;
1208 if (!ep || is_ep0(ep))
1213 * This path (reset toggle+halt) is needed to implement
1214 * SET_INTERFACE on normal hardware. but it can't be
1215 * done from software on the PXA UDC, and the hardware
1216 * forgets to do it as part of SET_INTERFACE automagic.
1218 ep_dbg(ep, "only host can clear halt\n");
1222 spin_lock_irqsave(&ep->lock, flags);
1225 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1228 /* FST, FEF bits are the same for control and non control endpoints */
1230 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1232 set_ep0state(ep->dev, STALL);
1235 spin_unlock_irqrestore(&ep->lock, flags);
1240 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1241 * @_ep: usb endpoint
1243 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1245 static int pxa_ep_fifo_status(struct usb_ep *_ep)
1248 struct udc_usb_ep *udc_usb_ep;
1252 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1253 ep = udc_usb_ep->pxa_ep;
1254 if (!ep || is_ep0(ep))
1259 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1262 return ep_count_bytes_remain(ep) + 1;
1266 * pxa_ep_fifo_flush - Flushes one endpoint
1267 * @_ep: usb endpoint
1269 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1271 static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1274 struct udc_usb_ep *udc_usb_ep;
1275 unsigned long flags;
1279 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1280 ep = udc_usb_ep->pxa_ep;
1281 if (!ep || is_ep0(ep))
1284 spin_lock_irqsave(&ep->lock, flags);
1286 if (unlikely(!list_empty(&ep->queue)))
1287 ep_dbg(ep, "called while queue list not empty\n");
1288 ep_dbg(ep, "called\n");
1290 /* for OUT, just read and discard the FIFO contents. */
1292 while (!ep_is_empty(ep))
1293 udc_ep_readl(ep, UDCDR);
1295 /* most IN status is the same, but ISO can't stall */
1297 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1298 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1301 spin_unlock_irqrestore(&ep->lock, flags);
1305 * pxa_ep_enable - Enables usb endpoint
1306 * @_ep: usb endpoint
1307 * @desc: usb endpoint descriptor
1309 * Nothing much to do here, as ep configuration is done once and for all
1310 * before udc is enabled. After udc enable, no physical endpoint configuration
1312 * Function makes sanity checks and flushes the endpoint.
1314 static int pxa_ep_enable(struct usb_ep *_ep,
1315 const struct usb_endpoint_descriptor *desc)
1318 struct udc_usb_ep *udc_usb_ep;
1319 struct pxa_udc *udc;
1324 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1325 if (udc_usb_ep->pxa_ep) {
1326 ep = udc_usb_ep->pxa_ep;
1327 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1330 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1333 if (!ep || is_ep0(ep)) {
1334 dev_err(udc_usb_ep->dev->dev,
1335 "unable to match pxa_ep for ep %s\n",
1340 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1341 || (ep->type != usb_endpoint_type(desc))) {
1342 ep_err(ep, "type mismatch\n");
1346 if (ep->fifo_size < usb_endpoint_maxp(desc)) {
1347 ep_err(ep, "bad maxpacket\n");
1351 udc_usb_ep->pxa_ep = ep;
1354 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1355 ep_err(ep, "bogus device state\n");
1361 /* flush fifo (mostly for OUT buffers) */
1362 pxa_ep_fifo_flush(_ep);
1364 ep_dbg(ep, "enabled\n");
1369 * pxa_ep_disable - Disable usb endpoint
1370 * @_ep: usb endpoint
1372 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1374 * Function flushes the endpoint and related requests.
1376 static int pxa_ep_disable(struct usb_ep *_ep)
1379 struct udc_usb_ep *udc_usb_ep;
1384 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1385 ep = udc_usb_ep->pxa_ep;
1386 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1390 nuke(ep, -ESHUTDOWN);
1392 pxa_ep_fifo_flush(_ep);
1393 udc_usb_ep->pxa_ep = NULL;
1395 ep_dbg(ep, "disabled\n");
1399 static const struct usb_ep_ops pxa_ep_ops = {
1400 .enable = pxa_ep_enable,
1401 .disable = pxa_ep_disable,
1403 .alloc_request = pxa_ep_alloc_request,
1404 .free_request = pxa_ep_free_request,
1406 .queue = pxa_ep_queue,
1407 .dequeue = pxa_ep_dequeue,
1409 .set_halt = pxa_ep_set_halt,
1410 .fifo_status = pxa_ep_fifo_status,
1411 .fifo_flush = pxa_ep_fifo_flush,
1415 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1417 * @on: 0 if disconnect pullup resistor, 1 otherwise
1420 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1421 * declare it as a full speed usb device
1423 static void dplus_pullup(struct pxa_udc *udc, int on)
1426 gpiod_set_value(udc->gpiod, on);
1427 } else if (udc->udc_command) {
1429 udc->udc_command(PXA2XX_UDC_CMD_CONNECT);
1431 udc->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1433 udc->pullup_on = on;
1437 * pxa_udc_get_frame - Returns usb frame number
1438 * @_gadget: usb gadget
1440 static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1442 struct pxa_udc *udc = to_gadget_udc(_gadget);
1444 return (udc_readl(udc, UDCFNR) & 0x7ff);
1448 * pxa_udc_wakeup - Force udc device out of suspend
1449 * @_gadget: usb gadget
1451 * Returns 0 if successful, error code otherwise
1453 static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1455 struct pxa_udc *udc = to_gadget_udc(_gadget);
1457 /* host may not have enabled remote wakeup */
1458 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1459 return -EHOSTUNREACH;
1460 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1464 static void udc_enable(struct pxa_udc *udc);
1465 static void udc_disable(struct pxa_udc *udc);
1468 * should_enable_udc - Tells if UDC should be enabled
1472 * The UDC should be enabled if :
1473 * - the pullup resistor is connected
1474 * - and a gadget driver is bound
1475 * - and vbus is sensed (or no vbus sense is available)
1477 * Returns 1 if UDC should be enabled, 0 otherwise
1479 static int should_enable_udc(struct pxa_udc *udc)
1483 put_on = ((udc->pullup_on) && (udc->driver));
1484 put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver)));
1489 * should_disable_udc - Tells if UDC should be disabled
1493 * The UDC should be disabled if :
1494 * - the pullup resistor is not connected
1495 * - or no gadget driver is bound
1496 * - or no vbus is sensed (when vbus sesing is available)
1498 * Returns 1 if UDC should be disabled
1500 static int should_disable_udc(struct pxa_udc *udc)
1504 put_off = ((!udc->pullup_on) || (!udc->driver));
1505 put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver)));
1510 * pxa_udc_pullup - Offer manual D+ pullup control
1511 * @_gadget: usb gadget using the control
1512 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1514 * Context: task context, might sleep
1516 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1518 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1520 struct pxa_udc *udc = to_gadget_udc(_gadget);
1522 if (!udc->gpiod && !udc->udc_command)
1525 dplus_pullup(udc, is_active);
1527 if (should_enable_udc(udc))
1529 if (should_disable_udc(udc))
1535 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1536 * @_gadget: usb gadget
1537 * @is_active: 0 if should disable the udc, 1 if should enable
1539 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1540 * udc, and deactivates D+ pullup resistor.
1544 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1546 struct pxa_udc *udc = to_gadget_udc(_gadget);
1548 udc->vbus_sensed = is_active;
1549 if (should_enable_udc(udc))
1551 if (should_disable_udc(udc))
1558 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1559 * @_gadget: usb gadget
1560 * @mA: current drawn
1562 * Context: task context, might sleep
1564 * Called after a configuration was chosen by a USB host, to inform how much
1565 * current can be drawn by the device from VBus line.
1567 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1569 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1571 struct pxa_udc *udc;
1573 udc = to_gadget_udc(_gadget);
1574 if (!IS_ERR_OR_NULL(udc->transceiver))
1575 return usb_phy_set_power(udc->transceiver, mA);
1580 * pxa_udc_phy_event - Called by phy upon VBus event
1581 * @nb: notifier block
1582 * @action: phy action, is vbus connect or disconnect
1583 * @data: the usb_gadget structure in pxa_udc
1585 * Called by the USB Phy when a cable connect or disconnect is sensed.
1589 static int pxa_udc_phy_event(struct notifier_block *nb, unsigned long action,
1592 struct usb_gadget *gadget = data;
1595 case USB_EVENT_VBUS:
1596 usb_gadget_vbus_connect(gadget);
1598 case USB_EVENT_NONE:
1599 usb_gadget_vbus_disconnect(gadget);
1606 static struct notifier_block pxa27x_udc_phy = {
1607 .notifier_call = pxa_udc_phy_event,
1610 static int pxa27x_udc_start(struct usb_gadget *g,
1611 struct usb_gadget_driver *driver);
1612 static int pxa27x_udc_stop(struct usb_gadget *g);
1614 static const struct usb_gadget_ops pxa_udc_ops = {
1615 .get_frame = pxa_udc_get_frame,
1616 .wakeup = pxa_udc_wakeup,
1617 .pullup = pxa_udc_pullup,
1618 .vbus_session = pxa_udc_vbus_session,
1619 .vbus_draw = pxa_udc_vbus_draw,
1620 .udc_start = pxa27x_udc_start,
1621 .udc_stop = pxa27x_udc_stop,
1625 * udc_disable - disable udc device controller
1629 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1632 static void udc_disable(struct pxa_udc *udc)
1637 udc_writel(udc, UDCICR0, 0);
1638 udc_writel(udc, UDCICR1, 0);
1640 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1643 udc->gadget.speed = USB_SPEED_UNKNOWN;
1644 clk_disable(udc->clk);
1650 * udc_init_data - Initialize udc device data structures
1653 * Initializes gadget endpoint list, endpoints locks. No action is taken
1656 static void udc_init_data(struct pxa_udc *dev)
1661 /* device/ep0 records init */
1662 INIT_LIST_HEAD(&dev->gadget.ep_list);
1663 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1664 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1665 dev->gadget.quirk_altset_not_supp = 1;
1668 /* PXA endpoints init */
1669 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1670 ep = &dev->pxa_ep[i];
1672 ep->enabled = is_ep0(ep);
1673 INIT_LIST_HEAD(&ep->queue);
1674 spin_lock_init(&ep->lock);
1677 /* USB endpoints init */
1678 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
1679 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1680 &dev->gadget.ep_list);
1681 usb_ep_set_maxpacket_limit(&dev->udc_usb_ep[i].usb_ep,
1682 dev->udc_usb_ep[i].usb_ep.maxpacket);
1687 * udc_enable - Enables the udc device
1690 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1691 * interrupts, sets usb as UDC client and setups endpoints.
1693 static void udc_enable(struct pxa_udc *udc)
1698 clk_enable(udc->clk);
1699 udc_writel(udc, UDCICR0, 0);
1700 udc_writel(udc, UDCICR1, 0);
1701 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1704 udc->gadget.speed = USB_SPEED_FULL;
1705 memset(&udc->stats, 0, sizeof(udc->stats));
1708 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1709 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1711 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1712 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1715 * Caller must be able to sleep in order to cope with startup transients
1719 /* enable suspend/resume and reset irqs */
1720 udc_writel(udc, UDCICR1,
1721 UDCICR1_IECC | UDCICR1_IERU
1722 | UDCICR1_IESU | UDCICR1_IERS);
1724 /* enable ep0 irqs */
1725 pio_irq_enable(&udc->pxa_ep[0]);
1731 * pxa27x_udc_start - Register gadget driver
1733 * @driver: gadget driver
1735 * When a driver is successfully registered, it will receive control requests
1736 * including set_configuration(), which enables non-control requests. Then
1737 * usb traffic follows until a disconnect is reported. Then a host may connect
1738 * again, or the driver might get unbound.
1740 * Note that the udc is not automatically enabled. Check function
1741 * should_enable_udc().
1743 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1745 static int pxa27x_udc_start(struct usb_gadget *g,
1746 struct usb_gadget_driver *driver)
1748 struct pxa_udc *udc = to_pxa(g);
1751 /* first hook up the driver ... */
1752 udc->driver = driver;
1754 if (!IS_ERR_OR_NULL(udc->transceiver)) {
1755 retval = otg_set_peripheral(udc->transceiver->otg,
1758 dev_err(udc->dev, "can't bind to transceiver\n");
1763 if (should_enable_udc(udc))
1773 * stop_activity - Stops udc endpoints
1776 * Disables all udc endpoints (even control endpoint), report disconnect to
1779 static void stop_activity(struct pxa_udc *udc)
1783 udc->gadget.speed = USB_SPEED_UNKNOWN;
1785 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1786 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1790 * pxa27x_udc_stop - Unregister the gadget driver
1793 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1795 static int pxa27x_udc_stop(struct usb_gadget *g)
1797 struct pxa_udc *udc = to_pxa(g);
1804 if (!IS_ERR_OR_NULL(udc->transceiver))
1805 return otg_set_peripheral(udc->transceiver->otg, NULL);
1810 * handle_ep0_ctrl_req - handle control endpoint control request
1812 * @req: control request
1814 static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1815 struct pxa27x_request *req)
1817 struct pxa_ep *ep = &udc->pxa_ep[0];
1819 struct usb_ctrlrequest r;
1823 int have_extrabytes = 0;
1824 unsigned long flags;
1827 spin_lock_irqsave(&ep->lock, flags);
1830 * In the PXA320 manual, in the section about Back-to-Back setup
1831 * packets, it describes this situation. The solution is to set OPC to
1832 * get rid of the status packet, and then continue with the setup
1833 * packet. Generalize to pxa27x CPUs.
1835 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1836 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1838 /* read SETUP packet */
1839 for (i = 0; i < 2; i++) {
1840 if (unlikely(ep_is_empty(ep)))
1842 u.word[i] = udc_ep_readl(ep, UDCDR);
1845 have_extrabytes = !ep_is_empty(ep);
1846 while (!ep_is_empty(ep)) {
1847 i = udc_ep_readl(ep, UDCDR);
1848 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1851 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1852 u.r.bRequestType, u.r.bRequest,
1853 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1854 le16_to_cpu(u.r.wLength));
1855 if (unlikely(have_extrabytes))
1858 if (u.r.bRequestType & USB_DIR_IN)
1859 set_ep0state(udc, IN_DATA_STAGE);
1861 set_ep0state(udc, OUT_DATA_STAGE);
1863 /* Tell UDC to enter Data Stage */
1864 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1866 spin_unlock_irqrestore(&ep->lock, flags);
1867 i = udc->driver->setup(&udc->gadget, &u.r);
1868 spin_lock_irqsave(&ep->lock, flags);
1872 spin_unlock_irqrestore(&ep->lock, flags);
1875 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1876 udc_ep_readl(ep, UDCCSR), i);
1877 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1878 set_ep0state(udc, STALL);
1883 * handle_ep0 - Handle control endpoint data transfers
1885 * @fifo_irq: 1 if triggered by fifo service type irq
1886 * @opc_irq: 1 if triggered by output packet complete type irq
1888 * Context : interrupt handler
1890 * Tries to transfer all pending request data into the endpoint and/or
1891 * transfer all pending data in the endpoint into usb requests.
1892 * Handles states of ep0 automata.
1894 * PXA27x hardware handles several standard usb control requests without
1895 * driver notification. The requests fully handled by hardware are :
1896 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1898 * The requests handled by hardware, but with irq notification are :
1899 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1900 * The remaining standard requests really handled by handle_ep0 are :
1901 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1902 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1903 * uniformly, by gadget drivers.
1905 * The control endpoint state machine is _not_ USB spec compliant, it's even
1906 * hardly compliant with Intel PXA270 developers guide.
1907 * The key points which inferred this state machine are :
1908 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1910 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
1911 * cleared by software.
1912 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1913 * before reading ep0.
1914 * This is true only for PXA27x. This is not true anymore for PXA3xx family
1915 * (check Back-to-Back setup packet in developers guide).
1916 * - irq can be called on a "packet complete" event (opc_irq=1), while
1917 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1918 * from experimentation).
1919 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
1920 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1921 * => we never actually read the "status stage" packet of an IN data stage
1922 * => this is not documented in Intel documentation
1923 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
1924 * STAGE. The driver add STATUS STAGE to send last zero length packet in
1926 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
1927 * event is detected, we terminate the status stage without ackowledging the
1928 * packet (not to risk to loose a potential SETUP packet)
1930 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
1933 struct pxa_ep *ep = &udc->pxa_ep[0];
1934 struct pxa27x_request *req = NULL;
1937 if (!list_empty(&ep->queue))
1938 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
1940 udccsr0 = udc_ep_readl(ep, UDCCSR);
1941 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
1942 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
1943 (fifo_irq << 1 | opc_irq));
1945 if (udccsr0 & UDCCSR0_SST) {
1946 ep_dbg(ep, "clearing stall status\n");
1948 ep_write_UDCCSR(ep, UDCCSR0_SST);
1952 if (udccsr0 & UDCCSR0_SA) {
1954 set_ep0state(udc, SETUP_STAGE);
1957 switch (udc->ep0state) {
1958 case WAIT_FOR_SETUP:
1960 * Hardware bug : beware, we cannot clear OPC, since we would
1961 * miss a potential OPC irq for a setup packet.
1962 * So, we only do ... nothing, and hope for a next irq with
1967 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
1968 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
1969 handle_ep0_ctrl_req(udc, req);
1971 case IN_DATA_STAGE: /* GET_DESCRIPTOR */
1972 if (epout_has_pkt(ep))
1973 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1974 if (req && !ep_is_full(ep))
1975 completed = write_ep0_fifo(ep, req);
1977 ep0_end_in_req(ep, req, NULL);
1979 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
1980 if (epout_has_pkt(ep) && req)
1981 completed = read_ep0_fifo(ep, req);
1983 ep0_end_out_req(ep, req, NULL);
1986 ep_write_UDCCSR(ep, UDCCSR0_FST);
1988 case IN_STATUS_STAGE:
1990 * Hardware bug : beware, we cannot clear OPC, since we would
1991 * miss a potential PC irq for a setup packet.
1992 * So, we only put the ep0 into WAIT_FOR_SETUP state.
1997 case OUT_STATUS_STAGE:
1998 case WAIT_ACK_SET_CONF_INTERF:
1999 ep_warn(ep, "should never get in %s state here!!!\n",
2000 EP0_STNAME(ep->dev));
2007 * handle_ep - Handle endpoint data tranfers
2008 * @ep: pxa physical endpoint
2010 * Tries to transfer all pending request data into the endpoint and/or
2011 * transfer all pending data in the endpoint into usb requests.
2013 * Is always called from the interrupt handler. ep->lock must not be held.
2015 static void handle_ep(struct pxa_ep *ep)
2017 struct pxa27x_request *req;
2020 int is_in = ep->dir_in;
2022 unsigned long flags;
2024 spin_lock_irqsave(&ep->lock, flags);
2025 if (ep->in_handle_ep)
2026 goto recursion_detected;
2027 ep->in_handle_ep = 1;
2031 udccsr = udc_ep_readl(ep, UDCCSR);
2033 if (likely(!list_empty(&ep->queue)))
2034 req = list_entry(ep->queue.next,
2035 struct pxa27x_request, queue);
2039 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2040 req, udccsr, loop++);
2042 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2043 udc_ep_writel(ep, UDCCSR,
2044 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2048 if (unlikely(is_in)) {
2049 if (likely(!ep_is_full(ep)))
2050 completed = write_fifo(ep, req);
2052 if (likely(epout_has_pkt(ep)))
2053 completed = read_fifo(ep, req);
2058 ep_end_in_req(ep, req, &flags);
2060 ep_end_out_req(ep, req, &flags);
2062 } while (completed);
2064 ep->in_handle_ep = 0;
2066 spin_unlock_irqrestore(&ep->lock, flags);
2070 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2072 * @config: usb configuration
2074 * Post the request to upper level.
2075 * Don't use any pxa specific harware configuration capabilities
2077 static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2079 struct usb_ctrlrequest req ;
2081 dev_dbg(udc->dev, "config=%d\n", config);
2083 udc->config = config;
2084 udc->last_interface = 0;
2085 udc->last_alternate = 0;
2087 req.bRequestType = 0;
2088 req.bRequest = USB_REQ_SET_CONFIGURATION;
2089 req.wValue = config;
2093 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2094 udc->driver->setup(&udc->gadget, &req);
2095 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2099 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2101 * @iface: interface number
2102 * @alt: alternate setting number
2104 * Post the request to upper level.
2105 * Don't use any pxa specific harware configuration capabilities
2107 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2109 struct usb_ctrlrequest req;
2111 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2113 udc->last_interface = iface;
2114 udc->last_alternate = alt;
2116 req.bRequestType = USB_RECIP_INTERFACE;
2117 req.bRequest = USB_REQ_SET_INTERFACE;
2122 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2123 udc->driver->setup(&udc->gadget, &req);
2124 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2128 * irq_handle_data - Handle data transfer
2129 * @irq: irq IRQ number
2130 * @udc: dev pxa_udc device structure
2132 * Called from irq handler, transferts data to or from endpoint to queue
2134 static void irq_handle_data(int irq, struct pxa_udc *udc)
2138 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2139 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2141 if (udcisr0 & UDCISR_INT_MASK) {
2142 udc->pxa_ep[0].stats.irqs++;
2143 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2144 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2145 !!(udcisr0 & UDCICR_PKTCOMPL));
2149 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2150 if (!(udcisr0 & UDCISR_INT_MASK))
2153 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2155 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2156 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2157 ep = &udc->pxa_ep[i];
2163 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2164 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2165 if (!(udcisr1 & UDCISR_INT_MASK))
2168 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2169 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2170 ep = &udc->pxa_ep[i];
2179 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2182 static void irq_udc_suspend(struct pxa_udc *udc)
2184 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2185 udc->stats.irqs_suspend++;
2187 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2188 && udc->driver && udc->driver->suspend)
2189 udc->driver->suspend(&udc->gadget);
2194 * irq_udc_resume - Handle IRQ "UDC Resume"
2197 static void irq_udc_resume(struct pxa_udc *udc)
2199 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2200 udc->stats.irqs_resume++;
2202 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2203 && udc->driver && udc->driver->resume)
2204 udc->driver->resume(&udc->gadget);
2208 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2211 static void irq_udc_reconfig(struct pxa_udc *udc)
2213 unsigned config, interface, alternate, config_change;
2214 u32 udccr = udc_readl(udc, UDCCR);
2216 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2217 udc->stats.irqs_reconfig++;
2219 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2220 config_change = (config != udc->config);
2221 pxa27x_change_configuration(udc, config);
2223 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2224 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2225 pxa27x_change_interface(udc, interface, alternate);
2228 update_pxa_ep_matches(udc);
2229 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2233 * irq_udc_reset - Handle IRQ "UDC Reset"
2236 static void irq_udc_reset(struct pxa_udc *udc)
2238 u32 udccr = udc_readl(udc, UDCCR);
2239 struct pxa_ep *ep = &udc->pxa_ep[0];
2241 dev_info(udc->dev, "USB reset\n");
2242 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2243 udc->stats.irqs_reset++;
2245 if ((udccr & UDCCR_UDA) == 0) {
2246 dev_dbg(udc->dev, "USB reset start\n");
2249 udc->gadget.speed = USB_SPEED_FULL;
2250 memset(&udc->stats, 0, sizeof udc->stats);
2253 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2258 * pxa_udc_irq - Main irq handler
2262 * Handles all udc interrupts
2264 static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2266 struct pxa_udc *udc = _dev;
2267 u32 udcisr0 = udc_readl(udc, UDCISR0);
2268 u32 udcisr1 = udc_readl(udc, UDCISR1);
2269 u32 udccr = udc_readl(udc, UDCCR);
2272 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2273 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2275 udcisr1_spec = udcisr1 & 0xf8000000;
2276 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2277 irq_udc_suspend(udc);
2278 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2279 irq_udc_resume(udc);
2280 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2281 irq_udc_reconfig(udc);
2282 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2285 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2286 irq_handle_data(irq, udc);
2291 static struct pxa_udc memory = {
2293 .ops = &pxa_udc_ops,
2294 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2295 .name = driver_name,
2297 .init_name = "gadget",
2312 /* Endpoints for gadget zero */
2313 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2314 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2315 /* Endpoints for ether gadget, file storage gadget */
2316 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2317 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2318 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2319 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2320 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2321 /* Endpoints for RNDIS, serial */
2322 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2323 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2324 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2326 * All the following endpoints are only for completion. They
2327 * won't never work, as multiple interfaces are really broken on
2330 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2331 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2332 /* Endpoint for CDC Ether */
2333 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2334 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2338 #if defined(CONFIG_OF)
2339 static const struct of_device_id udc_pxa_dt_ids[] = {
2340 { .compatible = "marvell,pxa270-udc" },
2343 MODULE_DEVICE_TABLE(of, udc_pxa_dt_ids);
2347 * pxa_udc_probe - probes the udc device
2348 * @pdev: platform device
2350 * Perform basic init : allocates udc clock, creates sysfs files, requests
2353 static int pxa_udc_probe(struct platform_device *pdev)
2355 struct pxa_udc *udc = &memory;
2356 int retval = 0, gpio;
2357 struct pxa2xx_udc_mach_info *mach = dev_get_platdata(&pdev->dev);
2358 unsigned long gpio_flags;
2361 gpio_flags = mach->gpio_pullup_inverted ? GPIOF_ACTIVE_LOW : 0;
2362 gpio = mach->gpio_pullup;
2363 if (gpio_is_valid(gpio)) {
2364 retval = devm_gpio_request_one(&pdev->dev, gpio,
2369 udc->gpiod = gpio_to_desc(mach->gpio_pullup);
2371 udc->udc_command = mach->udc_command;
2373 udc->gpiod = devm_gpiod_get(&pdev->dev, NULL, GPIOD_ASIS);
2376 udc->regs = devm_platform_ioremap_resource(pdev, 0);
2377 if (IS_ERR(udc->regs))
2378 return PTR_ERR(udc->regs);
2379 udc->irq = platform_get_irq(pdev, 0);
2383 udc->dev = &pdev->dev;
2384 if (of_have_populated_dt()) {
2386 devm_usb_get_phy_by_phandle(udc->dev, "phys", 0);
2387 if (IS_ERR(udc->transceiver))
2388 return PTR_ERR(udc->transceiver);
2390 udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2393 if (IS_ERR(udc->gpiod)) {
2394 dev_err(&pdev->dev, "Couldn't find or request D+ gpio : %ld\n",
2395 PTR_ERR(udc->gpiod));
2396 return PTR_ERR(udc->gpiod);
2399 gpiod_direction_output(udc->gpiod, 0);
2401 udc->clk = devm_clk_get(&pdev->dev, NULL);
2402 if (IS_ERR(udc->clk))
2403 return PTR_ERR(udc->clk);
2405 retval = clk_prepare(udc->clk);
2409 udc->vbus_sensed = 0;
2411 the_controller = udc;
2412 platform_set_drvdata(pdev, udc);
2415 /* irq setup after old hardware state is cleaned up */
2416 retval = devm_request_irq(&pdev->dev, udc->irq, pxa_udc_irq,
2417 IRQF_SHARED, driver_name, udc);
2419 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2420 driver_name, udc->irq, retval);
2424 if (!IS_ERR_OR_NULL(udc->transceiver))
2425 usb_register_notifier(udc->transceiver, &pxa27x_udc_phy);
2426 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2428 goto err_add_gadget;
2430 pxa_init_debugfs(udc);
2431 if (should_enable_udc(udc))
2436 if (!IS_ERR_OR_NULL(udc->transceiver))
2437 usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy);
2439 clk_unprepare(udc->clk);
2444 * pxa_udc_remove - removes the udc device driver
2445 * @_dev: platform device
2447 static int pxa_udc_remove(struct platform_device *_dev)
2449 struct pxa_udc *udc = platform_get_drvdata(_dev);
2451 usb_del_gadget_udc(&udc->gadget);
2452 pxa_cleanup_debugfs(udc);
2454 if (!IS_ERR_OR_NULL(udc->transceiver)) {
2455 usb_unregister_notifier(udc->transceiver, &pxa27x_udc_phy);
2456 usb_put_phy(udc->transceiver);
2459 udc->transceiver = NULL;
2460 the_controller = NULL;
2461 clk_unprepare(udc->clk);
2466 static void pxa_udc_shutdown(struct platform_device *_dev)
2468 struct pxa_udc *udc = platform_get_drvdata(_dev);
2470 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2474 #ifdef CONFIG_PXA27x
2475 extern void pxa27x_clear_otgph(void);
2477 #define pxa27x_clear_otgph() do {} while (0)
2482 * pxa_udc_suspend - Suspend udc device
2483 * @_dev: platform device
2484 * @state: suspend state
2486 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2489 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2491 struct pxa_udc *udc = platform_get_drvdata(_dev);
2494 ep = &udc->pxa_ep[0];
2495 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2498 udc->pullup_resume = udc->pullup_on;
2499 dplus_pullup(udc, 0);
2502 udc->driver->disconnect(&udc->gadget);
2508 * pxa_udc_resume - Resume udc device
2509 * @_dev: platform device
2511 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2514 static int pxa_udc_resume(struct platform_device *_dev)
2516 struct pxa_udc *udc = platform_get_drvdata(_dev);
2519 ep = &udc->pxa_ep[0];
2520 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2522 dplus_pullup(udc, udc->pullup_resume);
2523 if (should_enable_udc(udc))
2526 * We do not handle OTG yet.
2528 * OTGPH bit is set when sleep mode is entered.
2529 * it indicates that OTG pad is retaining its state.
2530 * Upon exit from sleep mode and before clearing OTGPH,
2531 * Software must configure the USB OTG pad, UDC, and UHC
2532 * to the state they were in before entering sleep mode.
2534 pxa27x_clear_otgph();
2540 /* work with hotplug and coldplug */
2541 MODULE_ALIAS("platform:pxa27x-udc");
2543 static struct platform_driver udc_driver = {
2545 .name = "pxa27x-udc",
2546 .of_match_table = of_match_ptr(udc_pxa_dt_ids),
2548 .probe = pxa_udc_probe,
2549 .remove = pxa_udc_remove,
2550 .shutdown = pxa_udc_shutdown,
2552 .suspend = pxa_udc_suspend,
2553 .resume = pxa_udc_resume
2557 module_platform_driver(udc_driver);
2559 MODULE_DESCRIPTION(DRIVER_DESC);
2560 MODULE_AUTHOR("Robert Jarzmik");
2561 MODULE_LICENSE("GPL");