drivers/usb/gadget/udc/bdc/bdc_core.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * bdc_core.c - BRCM BDC USB3.0 device controller core operations
   4  *
   5  * Copyright (C) 2014 Broadcom Corporation
   6  *
   7  * Author: Ashwini Pahuja
   8  */
   9 #include <linux/module.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/spinlock.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/io.h>
  17 #include <linux/list.h>
  18 #include <linux/delay.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/dmapool.h>
  21 #include <linux/of.h>
  22 #include <linux/phy/phy.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/usb/ch9.h>
  25 #include <linux/usb/gadget.h>
  26 #include <linux/clk.h>
  27
  28 #include "bdc.h"
  29 #include "bdc_dbg.h"
  30
  31 /* Poll till controller status is not OIP */
  32 static int poll_oip(struct bdc *bdc, int usec)
  33 {
  34         u32 status;
  35         /* Poll till STS!= OIP */
  36         while (usec) {
  37                 status = bdc_readl(bdc->regs, BDC_BDCSC);
  38                 if (BDC_CSTS(status) != BDC_OIP) {
  39                         dev_dbg(bdc->dev,
  40                                 "poll_oip complete status=%d",
  41                                 BDC_CSTS(status));
  42                         return 0;
  43                 }
  44                 udelay(10);
  45                 usec -= 10;
  46         }
  47         dev_err(bdc->dev, "Err: operation timedout BDCSC: 0x%08x\n", status);
  48
  49         return -ETIMEDOUT;
  50 }
  51
  52 /* Stop the BDC controller */
  53 int bdc_stop(struct bdc *bdc)
  54 {
  55         int ret;
  56         u32 temp;
  57
  58         dev_dbg(bdc->dev, "%s ()\n\n", __func__);
  59         temp = bdc_readl(bdc->regs, BDC_BDCSC);
  60         /* Check if BDC is already halted */
  61         if (BDC_CSTS(temp) == BDC_HLT) {
  62                 dev_vdbg(bdc->dev, "BDC already halted\n");
  63                 return 0;
  64         }
  65         temp &= ~BDC_COP_MASK;
  66         temp |= BDC_COS|BDC_COP_STP;
  67         bdc_writel(bdc->regs, BDC_BDCSC, temp);
  68
  69         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
  70         if (ret)
  71                 dev_err(bdc->dev, "bdc stop operation failed");
  72
  73         return ret;
  74 }
  75
  76 /* Issue a reset to BDC controller */
  77 int bdc_reset(struct bdc *bdc)
  78 {
  79         u32 temp;
  80         int ret;
  81
  82         dev_dbg(bdc->dev, "%s ()\n", __func__);
  83         /* First halt the controller */
  84         ret = bdc_stop(bdc);
  85         if (ret)
  86                 return ret;
  87
  88         temp = bdc_readl(bdc->regs, BDC_BDCSC);
  89         temp &= ~BDC_COP_MASK;
  90         temp |= BDC_COS|BDC_COP_RST;
  91         bdc_writel(bdc->regs, BDC_BDCSC, temp);
  92         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
  93         if (ret)
  94                 dev_err(bdc->dev, "bdc reset operation failed");
  95
  96         return ret;
  97 }
  98
  99 /* Run the BDC controller */
 100 int bdc_run(struct bdc *bdc)
 101 {
 102         u32 temp;
 103         int ret;
 104
 105         dev_dbg(bdc->dev, "%s ()\n", __func__);
 106         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 107         /* if BDC is already in running state then do not do anything */
 108         if (BDC_CSTS(temp) == BDC_NOR) {
 109                 dev_warn(bdc->dev, "bdc is already in running state\n");
 110                 return 0;
 111         }
 112         temp &= ~BDC_COP_MASK;
 113         temp |= BDC_COP_RUN;
 114         temp |= BDC_COS;
 115         bdc_writel(bdc->regs, BDC_BDCSC, temp);
 116         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
 117         if (ret) {
 118                 dev_err(bdc->dev, "bdc run operation failed:%d", ret);
 119                 return ret;
 120         }
 121         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 122         if (BDC_CSTS(temp) != BDC_NOR) {
 123                 dev_err(bdc->dev, "bdc not in normal mode after RUN op :%d\n",
 124                                                                 BDC_CSTS(temp));
 125                 return -ESHUTDOWN;
 126         }
 127
 128         return 0;
 129 }
 130
 131 /*
 132  * Present the termination to the host, typically called from upstream port
 133  * event with Vbus present =1
 134  */
 135 void bdc_softconn(struct bdc *bdc)
 136 {
 137         u32 uspc;
 138
 139         uspc = bdc_readl(bdc->regs, BDC_USPC);
 140         uspc &= ~BDC_PST_MASK;
 141         uspc |= BDC_LINK_STATE_RX_DET;
 142         uspc |= BDC_SWS;
 143         dev_dbg(bdc->dev, "%s () uspc=%08x\n", __func__, uspc);
 144         bdc_writel(bdc->regs, BDC_USPC, uspc);
 145 }
 146
 147 /* Remove the termination */
 148 void bdc_softdisconn(struct bdc *bdc)
 149 {
 150         u32 uspc;
 151
 152         uspc = bdc_readl(bdc->regs, BDC_USPC);
 153         uspc |= BDC_SDC;
 154         uspc &= ~BDC_SCN;
 155         dev_dbg(bdc->dev, "%s () uspc=%x\n", __func__, uspc);
 156         bdc_writel(bdc->regs, BDC_USPC, uspc);
 157 }
 158
 159 /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
 160 static int scratchpad_setup(struct bdc *bdc)
 161 {
 162         int sp_buff_size;
 163         u32 low32;
 164         u32 upp32;
 165
 166         sp_buff_size = BDC_SPB(bdc_readl(bdc->regs, BDC_BDCCFG0));
 167         dev_dbg(bdc->dev, "%s() sp_buff_size=%d\n", __func__, sp_buff_size);
 168         if (!sp_buff_size) {
 169                 dev_dbg(bdc->dev, "Scratchpad buffer not needed\n");
 170                 return 0;
 171         }
 172         /* Refer to BDC spec, Table 4 for description of SPB */
 173         sp_buff_size = 1 << (sp_buff_size + 5);
 174         dev_dbg(bdc->dev, "Allocating %d bytes for scratchpad\n", sp_buff_size);
 175         bdc->scratchpad.buff  =  dma_zalloc_coherent(bdc->dev, sp_buff_size,
 176                                         &bdc->scratchpad.sp_dma, GFP_KERNEL);
 177
 178         if (!bdc->scratchpad.buff)
 179                 goto fail;
 180
 181         bdc->sp_buff_size = sp_buff_size;
 182         bdc->scratchpad.size = sp_buff_size;
 183         low32 = lower_32_bits(bdc->scratchpad.sp_dma);
 184         upp32 = upper_32_bits(bdc->scratchpad.sp_dma);
 185         cpu_to_le32s(&low32);
 186         cpu_to_le32s(&upp32);
 187         bdc_writel(bdc->regs, BDC_SPBBAL, low32);
 188         bdc_writel(bdc->regs, BDC_SPBBAH, upp32);
 189         return 0;
 190
 191 fail:
 192         bdc->scratchpad.buff = NULL;
 193
 194         return -ENOMEM;
 195 }
 196
 197 /* Allocate the status report ring */
 198 static int setup_srr(struct bdc *bdc, int interrupter)
 199 {
 200         dev_dbg(bdc->dev, "%s() NUM_SR_ENTRIES:%d\n", __func__, NUM_SR_ENTRIES);
 201         /* Reset the SRR */
 202         bdc_writel(bdc->regs, BDC_SRRINT(0), BDC_SRR_RWS | BDC_SRR_RST);
 203         bdc->srr.dqp_index = 0;
 204         /* allocate the status report descriptors */
 205         bdc->srr.sr_bds = dma_zalloc_coherent(
 206                                         bdc->dev,
 207                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd),
 208                                         &bdc->srr.dma_addr,
 209                                         GFP_KERNEL);
 210         if (!bdc->srr.sr_bds)
 211                 return -ENOMEM;
 212
 213         return 0;
 214 }
 215
 216 /* Initialize the HW regs and internal data structures */
 217 static void bdc_mem_init(struct bdc *bdc, bool reinit)
 218 {
 219         u8 size = 0;
 220         u32 usb2_pm;
 221         u32 low32;
 222         u32 upp32;
 223         u32 temp;
 224
 225         dev_dbg(bdc->dev, "%s ()\n", __func__);
 226         bdc->ep0_state = WAIT_FOR_SETUP;
 227         bdc->dev_addr = 0;
 228         bdc->srr.eqp_index = 0;
 229         bdc->srr.dqp_index = 0;
 230         bdc->zlp_needed = false;
 231         bdc->delayed_status = false;
 232
 233         bdc_writel(bdc->regs, BDC_SPBBAL, bdc->scratchpad.sp_dma);
 234         /* Init the SRR */
 235         temp = BDC_SRR_RWS | BDC_SRR_RST;
 236         /* Reset the SRR */
 237         bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
 238         dev_dbg(bdc->dev, "bdc->srr.sr_bds =%p\n", bdc->srr.sr_bds);
 239         temp = lower_32_bits(bdc->srr.dma_addr);
 240         size = fls(NUM_SR_ENTRIES) - 2;
 241         temp |= size;
 242         dev_dbg(bdc->dev, "SRRBAL[0]=%08x NUM_SR_ENTRIES:%d size:%d\n",
 243                                                 temp, NUM_SR_ENTRIES, size);
 244
 245         low32 = lower_32_bits(temp);
 246         upp32 = upper_32_bits(bdc->srr.dma_addr);
 247         cpu_to_le32s(&low32);
 248         cpu_to_le32s(&upp32);
 249
 250         /* Write the dma addresses into regs*/
 251         bdc_writel(bdc->regs, BDC_SRRBAL(0), low32);
 252         bdc_writel(bdc->regs, BDC_SRRBAH(0), upp32);
 253
 254         temp = bdc_readl(bdc->regs, BDC_SRRINT(0));
 255         temp |= BDC_SRR_IE;
 256         temp &= ~(BDC_SRR_RST | BDC_SRR_RWS);
 257         bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
 258
 259         /* Set the Interrupt Coalescence ~500 usec */
 260         temp = bdc_readl(bdc->regs, BDC_INTCTLS(0));
 261         temp &= ~0xffff;
 262         temp |= INT_CLS;
 263         bdc_writel(bdc->regs, BDC_INTCTLS(0), temp);
 264
 265         usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
 266         dev_dbg(bdc->dev, "usb2_pm=%08x", usb2_pm);
 267         /* Enable hardware LPM Enable */
 268         usb2_pm |= BDC_HLE;
 269         bdc_writel(bdc->regs, BDC_USPPM2, usb2_pm);
 270
 271         /* readback for debug */
 272         usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
 273         dev_dbg(bdc->dev, "usb2_pm=%08x\n", usb2_pm);
 274
 275         /* Disable any unwanted SR's on SRR */
 276         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 277         /* We don't want Microframe counter wrap SR */
 278         temp |= BDC_MASK_MCW;
 279         bdc_writel(bdc->regs, BDC_BDCSC, temp);
 280
 281         /*
 282          * In some error cases, driver has to reset the entire BDC controller
 283          * in that case reinit is passed as 1
 284          */
 285         if (reinit) {
 286                 int i;
 287                 /* Enable interrupts */
 288                 temp = bdc_readl(bdc->regs, BDC_BDCSC);
 289                 temp |= BDC_GIE;
 290                 bdc_writel(bdc->regs, BDC_BDCSC, temp);
 291                 /* Init scratchpad to 0 */
 292                 memset(bdc->scratchpad.buff, 0, bdc->sp_buff_size);
 293                 /* Initialize SRR to 0 */
 294                 memset(bdc->srr.sr_bds, 0,
 295                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd));
 296                 /* clear ep flags to avoid post disconnect stops/deconfigs */
 297                 for (i = 1; i < bdc->num_eps; ++i)
 298                         bdc->bdc_ep_array[i]->flags = 0;
 299         } else {
 300                 /* One time initiaization only */
 301                 /* Enable status report function pointers */
 302                 bdc->sr_handler[0] = bdc_sr_xsf;
 303                 bdc->sr_handler[1] = bdc_sr_uspc;
 304
 305                 /* EP0 status report function pointers */
 306                 bdc->sr_xsf_ep0[0] = bdc_xsf_ep0_setup_recv;
 307                 bdc->sr_xsf_ep0[1] = bdc_xsf_ep0_data_start;
 308                 bdc->sr_xsf_ep0[2] = bdc_xsf_ep0_status_start;
 309         }
 310 }
 311
 312 /* Free the dynamic memory */
 313 static void bdc_mem_free(struct bdc *bdc)
 314 {
 315         dev_dbg(bdc->dev, "%s\n", __func__);
 316         /* Free SRR */
 317         if (bdc->srr.sr_bds)
 318                 dma_free_coherent(bdc->dev,
 319                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd),
 320                                         bdc->srr.sr_bds, bdc->srr.dma_addr);
 321
 322         /* Free scratchpad */
 323         if (bdc->scratchpad.buff)
 324                 dma_free_coherent(bdc->dev, bdc->sp_buff_size,
 325                                 bdc->scratchpad.buff, bdc->scratchpad.sp_dma);
 326
 327         /* Destroy the dma pools */
 328         dma_pool_destroy(bdc->bd_table_pool);
 329
 330         /* Free the bdc_ep array */
 331         kfree(bdc->bdc_ep_array);
 332
 333         bdc->srr.sr_bds = NULL;
 334         bdc->scratchpad.buff = NULL;
 335         bdc->bd_table_pool = NULL;
 336         bdc->bdc_ep_array = NULL;
 337 }
 338
 339 /*
 340  * bdc reinit gives a controller reset and reinitialize the registers,
 341  * called from disconnect/bus reset scenario's, to ensure proper HW cleanup
 342  */
 343 int bdc_reinit(struct bdc *bdc)
 344 {
 345         int ret;
 346
 347         dev_dbg(bdc->dev, "%s\n", __func__);
 348         ret = bdc_stop(bdc);
 349         if (ret)
 350                 goto out;
 351
 352         ret = bdc_reset(bdc);
 353         if (ret)
 354                 goto out;
 355
 356         /* the reinit flag is 1 */
 357         bdc_mem_init(bdc, true);
 358         ret = bdc_run(bdc);
 359 out:
 360         bdc->reinit = false;
 361
 362         return ret;
 363 }
 364
 365 /* Allocate all the dyanmic memory */
 366 static int bdc_mem_alloc(struct bdc *bdc)
 367 {
 368         u32 page_size;
 369         unsigned int num_ieps, num_oeps;
 370
 371         dev_dbg(bdc->dev,
 372                 "%s() NUM_BDS_PER_TABLE:%d\n", __func__,
 373                 NUM_BDS_PER_TABLE);
 374         page_size = BDC_PGS(bdc_readl(bdc->regs, BDC_BDCCFG0));
 375         /* page size is 2^pgs KB */
 376         page_size = 1 << page_size;
 377         /* KB */
 378         page_size <<= 10;
 379         dev_dbg(bdc->dev, "page_size=%d\n", page_size);
 380
 381         /* Create a pool of bd tables */
 382         bdc->bd_table_pool =
 383             dma_pool_create("BDC BD tables", bdc->dev, NUM_BDS_PER_TABLE * 16,
 384                                                                 16, page_size);
 385
 386         if (!bdc->bd_table_pool)
 387                 goto fail;
 388
 389         if (scratchpad_setup(bdc))
 390                 goto fail;
 391
 392         /* read from regs */
 393         num_ieps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNIC));
 394         num_oeps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNOC));
 395         /* +2: 1 for ep0 and the other is rsvd i.e. bdc_ep[0] is rsvd */
 396         bdc->num_eps = num_ieps + num_oeps + 2;
 397         dev_dbg(bdc->dev,
 398                 "ieps:%d eops:%d num_eps:%d\n",
 399                 num_ieps, num_oeps, bdc->num_eps);
 400         /* allocate array of ep pointers */
 401         bdc->bdc_ep_array = kcalloc(bdc->num_eps, sizeof(struct bdc_ep *),
 402                                                                 GFP_KERNEL);
 403         if (!bdc->bdc_ep_array)
 404                 goto fail;
 405
 406         dev_dbg(bdc->dev, "Allocating sr report0\n");
 407         if (setup_srr(bdc, 0))
 408                 goto fail;
 409
 410         return 0;
 411 fail:
 412         dev_warn(bdc->dev, "Couldn't initialize memory\n");
 413         bdc_mem_free(bdc);
 414
 415         return -ENOMEM;
 416 }
 417
 418 /* opposite to bdc_hw_init */
 419 static void bdc_hw_exit(struct bdc *bdc)
 420 {
 421         dev_dbg(bdc->dev, "%s ()\n", __func__);
 422         bdc_mem_free(bdc);
 423 }
 424
 425 /* Initialize the bdc HW and memory */
 426 static int bdc_hw_init(struct bdc *bdc)
 427 {
 428         int ret;
 429
 430         dev_dbg(bdc->dev, "%s ()\n", __func__);
 431         ret = bdc_reset(bdc);
 432         if (ret) {
 433                 dev_err(bdc->dev, "err resetting bdc abort bdc init%d\n", ret);
 434                 return ret;
 435         }
 436         ret = bdc_mem_alloc(bdc);
 437         if (ret) {
 438                 dev_err(bdc->dev, "Mem alloc failed, aborting\n");
 439                 return -ENOMEM;
 440         }
 441         bdc_mem_init(bdc, 0);
 442         bdc_dbg_regs(bdc);
 443         dev_dbg(bdc->dev, "HW Init done\n");
 444
 445         return 0;
 446 }
 447
 448 static int bdc_phy_init(struct bdc *bdc)
 449 {
 450         int phy_num;
 451         int ret;
 452
 453         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 454                 ret = phy_init(bdc->phys[phy_num]);
 455                 if (ret)
 456                         goto err_exit_phy;
 457                 ret = phy_power_on(bdc->phys[phy_num]);
 458                 if (ret) {
 459                         phy_exit(bdc->phys[phy_num]);
 460                         goto err_exit_phy;
 461                 }
 462         }
 463
 464         return 0;
 465
 466 err_exit_phy:
 467         while (--phy_num >= 0) {
 468                 phy_power_off(bdc->phys[phy_num]);
 469                 phy_exit(bdc->phys[phy_num]);
 470         }
 471
 472         return ret;
 473 }
 474
 475 static void bdc_phy_exit(struct bdc *bdc)
 476 {
 477         int phy_num;
 478
 479         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 480                 phy_power_off(bdc->phys[phy_num]);
 481                 phy_exit(bdc->phys[phy_num]);
 482         }
 483 }
 484
 485 static int bdc_probe(struct platform_device *pdev)
 486 {
 487         struct bdc *bdc;
 488         struct resource *res;
 489         int ret = -ENOMEM;
 490         int irq;
 491         u32 temp;
 492         struct device *dev = &pdev->dev;
 493         struct clk *clk;
 494         int phy_num;
 495
 496         dev_dbg(dev, "%s()\n", __func__);
 497
 498         clk = devm_clk_get(dev, "sw_usbd");
 499         if (IS_ERR(clk)) {
 500                 dev_info(dev, "Clock not found in Device Tree\n");
 501                 clk = NULL;
 502         }
 503
 504         ret = clk_prepare_enable(clk);
 505         if (ret) {
 506                 dev_err(dev, "could not enable clock\n");
 507                 return ret;
 508         }
 509
 510         bdc = devm_kzalloc(dev, sizeof(*bdc), GFP_KERNEL);
 511         if (!bdc)
 512                 return -ENOMEM;
 513
 514         bdc->clk = clk;
 515
 516         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 517         bdc->regs = devm_ioremap_resource(dev, res);
 518         if (IS_ERR(bdc->regs)) {
 519                 dev_err(dev, "ioremap error\n");
 520                 return -ENOMEM;
 521         }
 522         irq = platform_get_irq(pdev, 0);
 523         if (irq < 0) {
 524                 dev_err(dev, "platform_get_irq failed:%d\n", irq);
 525                 return irq;
 526         }
 527         spin_lock_init(&bdc->lock);
 528         platform_set_drvdata(pdev, bdc);
 529         bdc->irq = irq;
 530         bdc->dev = dev;
 531         dev_dbg(dev, "bdc->regs: %p irq=%d\n", bdc->regs, bdc->irq);
 532
 533         bdc->num_phys = of_count_phandle_with_args(dev->of_node,
 534                                                 "phys", "#phy-cells");
 535         if (bdc->num_phys > 0) {
 536                 bdc->phys = devm_kcalloc(dev, bdc->num_phys,
 537                                         sizeof(struct phy *), GFP_KERNEL);
 538                 if (!bdc->phys)
 539                         return -ENOMEM;
 540         } else {
 541                 bdc->num_phys = 0;
 542         }
 543         dev_info(dev, "Using %d phy(s)\n", bdc->num_phys);
 544
 545         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 546                 bdc->phys[phy_num] = devm_of_phy_get_by_index(
 547                         dev, dev->of_node, phy_num);
 548                 if (IS_ERR(bdc->phys[phy_num])) {
 549                         ret = PTR_ERR(bdc->phys[phy_num]);
 550                         dev_err(bdc->dev,
 551                                 "BDC phy specified but not found:%d\n", ret);
 552                         return ret;
 553                 }
 554         }
 555
 556         ret = bdc_phy_init(bdc);
 557         if (ret) {
 558                 dev_err(bdc->dev, "BDC phy init failure:%d\n", ret);
 559                 return ret;
 560         }
 561
 562         temp = bdc_readl(bdc->regs, BDC_BDCCAP1);
 563         if ((temp & BDC_P64) &&
 564                         !dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {
 565                 dev_dbg(dev, "Using 64-bit address\n");
 566         } else {
 567                 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 568                 if (ret) {
 569                         dev_err(dev,
 570                                 "No suitable DMA config available, abort\n");
 571                         ret = -ENOTSUPP;
 572                         goto phycleanup;
 573                 }
 574                 dev_dbg(dev, "Using 32-bit address\n");
 575         }
 576         ret = bdc_hw_init(bdc);
 577         if (ret) {
 578                 dev_err(dev, "BDC init failure:%d\n", ret);
 579                 goto phycleanup;
 580         }
 581         ret = bdc_udc_init(bdc);
 582         if (ret) {
 583                 dev_err(dev, "BDC Gadget init failure:%d\n", ret);
 584                 goto cleanup;
 585         }
 586         return 0;
 587
 588 cleanup:
 589         bdc_hw_exit(bdc);
 590 phycleanup:
 591         bdc_phy_exit(bdc);
 592         return ret;
 593 }
 594
 595 static int bdc_remove(struct platform_device *pdev)
 596 {
 597         struct bdc *bdc;
 598
 599         bdc  = platform_get_drvdata(pdev);
 600         dev_dbg(bdc->dev, "%s ()\n", __func__);
 601         bdc_udc_exit(bdc);
 602         bdc_hw_exit(bdc);
 603         bdc_phy_exit(bdc);
 604         clk_disable_unprepare(bdc->clk);
 605         return 0;
 606 }
 607
 608 #ifdef CONFIG_PM_SLEEP
 609 static int bdc_suspend(struct device *dev)
 610 {
 611         struct bdc *bdc = dev_get_drvdata(dev);
 612         int ret;
 613
 614         /* Halt the controller */
 615         ret = bdc_stop(bdc);
 616         if (!ret)
 617                 clk_disable_unprepare(bdc->clk);
 618
 619         return ret;
 620 }
 621
 622 static int bdc_resume(struct device *dev)
 623 {
 624         struct bdc *bdc = dev_get_drvdata(dev);
 625         int ret;
 626
 627         ret = clk_prepare_enable(bdc->clk);
 628         if (ret) {
 629                 dev_err(bdc->dev, "err enabling the clock\n");
 630                 return ret;
 631         }
 632         ret = bdc_reinit(bdc);
 633         if (ret) {
 634                 dev_err(bdc->dev, "err in bdc reinit\n");
 635                 return ret;
 636         }
 637
 638         return 0;
 639 }
 640
 641 #endif /* CONFIG_PM_SLEEP */
 642
 643 static SIMPLE_DEV_PM_OPS(bdc_pm_ops, bdc_suspend,
 644                 bdc_resume);
 645
 646 static const struct of_device_id bdc_of_match[] = {
 647         { .compatible = "brcm,bdc-v0.16" },
 648         { .compatible = "brcm,bdc" },
 649         { /* sentinel */ }
 650 };
 651
 652 static struct platform_driver bdc_driver = {
 653         .driver         = {
 654                 .name   = BRCM_BDC_NAME,
 655                 .pm = &bdc_pm_ops,
 656                 .of_match_table = bdc_of_match,
 657         },
 658         .probe          = bdc_probe,
 659         .remove         = bdc_remove,
 660 };
 661
 662 module_platform_driver(bdc_driver);
 663 MODULE_AUTHOR("Ashwini Pahuja <ashwini.linux@gmail.com>");
 664 MODULE_LICENSE("GPL");
 665 MODULE_DESCRIPTION(BRCM_BDC_DESC);