1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Atmel USBA high speed USB device controller
5 * Copyright (C) 2005-2007 Atmel Corporation
8 #include <linux/clk/at91_pmc.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
13 #include <linux/slab.h>
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/list.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/ctype.h>
21 #include <linux/usb.h>
22 #include <linux/usb/ch9.h>
23 #include <linux/usb/gadget.h>
24 #include <linux/delay.h>
26 #include <linux/irq.h>
27 #include <linux/gpio/consumer.h>
29 #include "atmel_usba_udc.h"
30 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
31 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
33 #ifdef CONFIG_USB_GADGET_DEBUG_FS
34 #include <linux/debugfs.h>
35 #include <linux/uaccess.h>
37 static int queue_dbg_open(struct inode *inode, struct file *file)
39 struct usba_ep *ep = inode->i_private;
40 struct usba_request *req, *req_copy;
41 struct list_head *queue_data;
43 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
46 INIT_LIST_HEAD(queue_data);
48 spin_lock_irq(&ep->udc->lock);
49 list_for_each_entry(req, &ep->queue, queue) {
50 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
53 list_add_tail(&req_copy->queue, queue_data);
55 spin_unlock_irq(&ep->udc->lock);
57 file->private_data = queue_data;
61 spin_unlock_irq(&ep->udc->lock);
62 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
63 list_del(&req->queue);
71 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
75 * I/i: interrupt/no interrupt
77 * S/s: short ok/short not ok
80 * F/f: submitted/not submitted to FIFO
81 * D/d: using/not using DMA
82 * L/l: last transaction/not last transaction
84 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
85 size_t nbytes, loff_t *ppos)
87 struct list_head *queue = file->private_data;
88 struct usba_request *req, *tmp_req;
89 size_t len, remaining, actual = 0;
92 if (!access_ok(buf, nbytes))
95 inode_lock(file_inode(file));
96 list_for_each_entry_safe(req, tmp_req, queue, queue) {
97 len = snprintf(tmpbuf, sizeof(tmpbuf),
98 "%8p %08x %c%c%c %5d %c%c%c\n",
99 req->req.buf, req->req.length,
100 req->req.no_interrupt ? 'i' : 'I',
101 req->req.zero ? 'Z' : 'z',
102 req->req.short_not_ok ? 's' : 'S',
104 req->submitted ? 'F' : 'f',
105 req->using_dma ? 'D' : 'd',
106 req->last_transaction ? 'L' : 'l');
107 len = min(len, sizeof(tmpbuf));
111 list_del(&req->queue);
114 remaining = __copy_to_user(buf, tmpbuf, len);
115 actual += len - remaining;
122 inode_unlock(file_inode(file));
127 static int queue_dbg_release(struct inode *inode, struct file *file)
129 struct list_head *queue_data = file->private_data;
130 struct usba_request *req, *tmp_req;
132 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
133 list_del(&req->queue);
140 static int regs_dbg_open(struct inode *inode, struct file *file)
142 struct usba_udc *udc;
148 udc = inode->i_private;
149 data = kmalloc(inode->i_size, GFP_KERNEL);
153 spin_lock_irq(&udc->lock);
154 for (i = 0; i < inode->i_size / 4; i++)
155 data[i] = readl_relaxed(udc->regs + i * 4);
156 spin_unlock_irq(&udc->lock);
158 file->private_data = data;
167 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
168 size_t nbytes, loff_t *ppos)
170 struct inode *inode = file_inode(file);
174 ret = simple_read_from_buffer(buf, nbytes, ppos,
176 file_inode(file)->i_size);
182 static int regs_dbg_release(struct inode *inode, struct file *file)
184 kfree(file->private_data);
188 static const struct file_operations queue_dbg_fops = {
189 .owner = THIS_MODULE,
190 .open = queue_dbg_open,
192 .read = queue_dbg_read,
193 .release = queue_dbg_release,
196 static const struct file_operations regs_dbg_fops = {
197 .owner = THIS_MODULE,
198 .open = regs_dbg_open,
199 .llseek = generic_file_llseek,
200 .read = regs_dbg_read,
201 .release = regs_dbg_release,
204 static void usba_ep_init_debugfs(struct usba_udc *udc,
207 struct dentry *ep_root;
209 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
210 ep->debugfs_dir = ep_root;
212 debugfs_create_file("queue", 0400, ep_root, ep, &queue_dbg_fops);
214 debugfs_create_u32("dma_status", 0400, ep_root,
215 &ep->last_dma_status);
216 if (ep_is_control(ep))
217 debugfs_create_u32("state", 0400, ep_root, &ep->state);
220 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
222 debugfs_remove_recursive(ep->debugfs_dir);
225 static void usba_init_debugfs(struct usba_udc *udc)
228 struct resource *regs_resource;
230 root = debugfs_create_dir(udc->gadget.name, usb_debug_root);
231 udc->debugfs_root = root;
233 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
237 debugfs_create_file_size("regs", 0400, root, udc,
239 resource_size(regs_resource));
242 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
245 static void usba_cleanup_debugfs(struct usba_udc *udc)
247 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
248 debugfs_remove_recursive(udc->debugfs_root);
251 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
257 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
262 static inline void usba_init_debugfs(struct usba_udc *udc)
267 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
273 static ushort fifo_mode;
275 module_param(fifo_mode, ushort, 0x0);
276 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
278 /* mode 0 - uses autoconfig */
280 /* mode 1 - fits in 8KB, generic max fifo configuration */
281 static struct usba_fifo_cfg mode_1_cfg[] = {
282 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
283 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
284 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
285 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
286 { .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
287 { .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
288 { .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
291 /* mode 2 - fits in 8KB, performance max fifo configuration */
292 static struct usba_fifo_cfg mode_2_cfg[] = {
293 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
294 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
295 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
296 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
299 /* mode 3 - fits in 8KB, mixed fifo configuration */
300 static struct usba_fifo_cfg mode_3_cfg[] = {
301 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
302 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
303 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
304 { .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
305 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
306 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
307 { .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
310 /* mode 4 - fits in 8KB, custom fifo configuration */
311 static struct usba_fifo_cfg mode_4_cfg[] = {
312 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
313 { .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
314 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
315 { .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
316 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
317 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
318 { .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
319 { .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
320 { .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
322 /* Add additional configurations here */
324 static int usba_config_fifo_table(struct usba_udc *udc)
333 udc->fifo_cfg = NULL;
337 udc->fifo_cfg = mode_1_cfg;
338 n = ARRAY_SIZE(mode_1_cfg);
341 udc->fifo_cfg = mode_2_cfg;
342 n = ARRAY_SIZE(mode_2_cfg);
345 udc->fifo_cfg = mode_3_cfg;
346 n = ARRAY_SIZE(mode_3_cfg);
349 udc->fifo_cfg = mode_4_cfg;
350 n = ARRAY_SIZE(mode_4_cfg);
353 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
358 static inline u32 usba_int_enb_get(struct usba_udc *udc)
360 return udc->int_enb_cache;
363 static inline void usba_int_enb_set(struct usba_udc *udc, u32 mask)
367 val = udc->int_enb_cache | mask;
368 usba_writel(udc, INT_ENB, val);
369 udc->int_enb_cache = val;
372 static inline void usba_int_enb_clear(struct usba_udc *udc, u32 mask)
376 val = udc->int_enb_cache & ~mask;
377 usba_writel(udc, INT_ENB, val);
378 udc->int_enb_cache = val;
381 static int vbus_is_present(struct usba_udc *udc)
384 return gpiod_get_value(udc->vbus_pin);
386 /* No Vbus detection: Assume always present */
390 static void toggle_bias(struct usba_udc *udc, int is_on)
392 if (udc->errata && udc->errata->toggle_bias)
393 udc->errata->toggle_bias(udc, is_on);
396 static void generate_bias_pulse(struct usba_udc *udc)
398 if (!udc->bias_pulse_needed)
401 if (udc->errata && udc->errata->pulse_bias)
402 udc->errata->pulse_bias(udc);
404 udc->bias_pulse_needed = false;
407 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
409 unsigned int transaction_len;
411 transaction_len = req->req.length - req->req.actual;
412 req->last_transaction = 1;
413 if (transaction_len > ep->ep.maxpacket) {
414 transaction_len = ep->ep.maxpacket;
415 req->last_transaction = 0;
416 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
417 req->last_transaction = 0;
419 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
420 ep->ep.name, req, transaction_len,
421 req->last_transaction ? ", done" : "");
423 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
424 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
425 req->req.actual += transaction_len;
428 static void submit_request(struct usba_ep *ep, struct usba_request *req)
430 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
431 ep->ep.name, req, req->req.length);
436 if (req->using_dma) {
437 if (req->req.length == 0) {
438 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
443 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
445 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
447 usba_dma_writel(ep, ADDRESS, req->req.dma);
448 usba_dma_writel(ep, CONTROL, req->ctrl);
450 next_fifo_transaction(ep, req);
451 if (req->last_transaction) {
452 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
453 if (ep_is_control(ep))
454 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
456 if (ep_is_control(ep))
457 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
458 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
463 static void submit_next_request(struct usba_ep *ep)
465 struct usba_request *req;
467 if (list_empty(&ep->queue)) {
468 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
472 req = list_entry(ep->queue.next, struct usba_request, queue);
474 submit_request(ep, req);
477 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
479 ep->state = STATUS_STAGE_IN;
480 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
481 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
484 static void receive_data(struct usba_ep *ep)
486 struct usba_udc *udc = ep->udc;
487 struct usba_request *req;
488 unsigned long status;
489 unsigned int bytecount, nr_busy;
492 status = usba_ep_readl(ep, STA);
493 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
495 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
497 while (nr_busy > 0) {
498 if (list_empty(&ep->queue)) {
499 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
502 req = list_entry(ep->queue.next,
503 struct usba_request, queue);
505 bytecount = USBA_BFEXT(BYTE_COUNT, status);
507 if (status & (1 << 31))
509 if (req->req.actual + bytecount >= req->req.length) {
511 bytecount = req->req.length - req->req.actual;
514 memcpy_fromio(req->req.buf + req->req.actual,
515 ep->fifo, bytecount);
516 req->req.actual += bytecount;
518 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
521 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
523 list_del_init(&req->queue);
524 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
525 spin_unlock(&udc->lock);
526 usb_gadget_giveback_request(&ep->ep, &req->req);
527 spin_lock(&udc->lock);
530 status = usba_ep_readl(ep, STA);
531 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
533 if (is_complete && ep_is_control(ep)) {
534 send_status(udc, ep);
541 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
543 struct usba_udc *udc = ep->udc;
545 WARN_ON(!list_empty(&req->queue));
547 if (req->req.status == -EINPROGRESS)
548 req->req.status = status;
551 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
553 DBG(DBG_GADGET | DBG_REQ,
554 "%s: req %p complete: status %d, actual %u\n",
555 ep->ep.name, req, req->req.status, req->req.actual);
557 spin_unlock(&udc->lock);
558 usb_gadget_giveback_request(&ep->ep, &req->req);
559 spin_lock(&udc->lock);
563 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
565 struct usba_request *req, *tmp_req;
567 list_for_each_entry_safe(req, tmp_req, list, queue) {
568 list_del_init(&req->queue);
569 request_complete(ep, req, status);
574 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
576 struct usba_ep *ep = to_usba_ep(_ep);
577 struct usba_udc *udc = ep->udc;
578 unsigned long flags, maxpacket;
579 unsigned int nr_trans;
581 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
583 maxpacket = usb_endpoint_maxp(desc);
585 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
587 || desc->bDescriptorType != USB_DT_ENDPOINT
589 || maxpacket > ep->fifo_size) {
590 DBG(DBG_ERR, "ep_enable: Invalid argument");
597 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
598 ep->ep.name, ep->ept_cfg, maxpacket);
600 if (usb_endpoint_dir_in(desc)) {
602 ep->ept_cfg |= USBA_EPT_DIR_IN;
605 switch (usb_endpoint_type(desc)) {
606 case USB_ENDPOINT_XFER_CONTROL:
607 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
609 case USB_ENDPOINT_XFER_ISOC:
611 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
617 * Bits 11:12 specify number of _additional_
618 * transactions per microframe.
620 nr_trans = usb_endpoint_maxp_mult(desc);
625 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
626 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
629 case USB_ENDPOINT_XFER_BULK:
630 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
632 case USB_ENDPOINT_XFER_INT:
633 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
637 spin_lock_irqsave(&ep->udc->lock, flags);
640 ep->ep.maxpacket = maxpacket;
642 usba_ep_writel(ep, CFG, ep->ept_cfg);
643 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
648 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index) |
649 USBA_BF(DMA_INT, 1 << ep->index));
650 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
651 usba_ep_writel(ep, CTL_ENB, ctrl);
653 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index));
656 spin_unlock_irqrestore(&udc->lock, flags);
658 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
659 (unsigned long)usba_ep_readl(ep, CFG));
660 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
661 (unsigned long)usba_int_enb_get(udc));
666 static int usba_ep_disable(struct usb_ep *_ep)
668 struct usba_ep *ep = to_usba_ep(_ep);
669 struct usba_udc *udc = ep->udc;
673 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
675 spin_lock_irqsave(&udc->lock, flags);
678 spin_unlock_irqrestore(&udc->lock, flags);
679 DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
684 list_splice_init(&ep->queue, &req_list);
686 usba_dma_writel(ep, CONTROL, 0);
687 usba_dma_writel(ep, ADDRESS, 0);
688 usba_dma_readl(ep, STATUS);
690 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
691 usba_int_enb_clear(udc, USBA_BF(EPT_INT, 1 << ep->index));
693 request_complete_list(ep, &req_list, -ESHUTDOWN);
695 spin_unlock_irqrestore(&udc->lock, flags);
700 static struct usb_request *
701 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
703 struct usba_request *req;
705 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
707 req = kzalloc(sizeof(*req), gfp_flags);
711 INIT_LIST_HEAD(&req->queue);
717 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
719 struct usba_request *req = to_usba_req(_req);
721 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
726 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
727 struct usba_request *req, gfp_t gfp_flags)
732 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
733 ep->ep.name, req->req.length, &req->req.dma,
734 req->req.zero ? 'Z' : 'z',
735 req->req.short_not_ok ? 'S' : 's',
736 req->req.no_interrupt ? 'I' : 'i');
738 if (req->req.length > 0x10000) {
739 /* Lengths from 0 to 65536 (inclusive) are supported */
740 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
744 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
749 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
750 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
751 | USBA_DMA_END_BUF_EN;
754 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
757 * Add this request to the queue and submit for DMA if
758 * possible. Check if we're still alive first -- we may have
759 * received a reset since last time we checked.
762 spin_lock_irqsave(&udc->lock, flags);
764 if (list_empty(&ep->queue))
765 submit_request(ep, req);
767 list_add_tail(&req->queue, &ep->queue);
770 spin_unlock_irqrestore(&udc->lock, flags);
776 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
778 struct usba_request *req = to_usba_req(_req);
779 struct usba_ep *ep = to_usba_ep(_ep);
780 struct usba_udc *udc = ep->udc;
784 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
785 ep->ep.name, req, _req->length);
787 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
793 req->last_transaction = 0;
795 _req->status = -EINPROGRESS;
799 return queue_dma(udc, ep, req, gfp_flags);
801 /* May have received a reset since last time we checked */
803 spin_lock_irqsave(&udc->lock, flags);
805 list_add_tail(&req->queue, &ep->queue);
807 if ((!ep_is_control(ep) && ep->is_in) ||
809 && (ep->state == DATA_STAGE_IN
810 || ep->state == STATUS_STAGE_IN)))
811 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
813 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
816 spin_unlock_irqrestore(&udc->lock, flags);
822 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
824 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
827 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
829 unsigned int timeout;
833 * Stop the DMA controller. When writing both CH_EN
834 * and LINK to 0, the other bits are not affected.
836 usba_dma_writel(ep, CONTROL, 0);
838 /* Wait for the FIFO to empty */
839 for (timeout = 40; timeout; --timeout) {
840 status = usba_dma_readl(ep, STATUS);
841 if (!(status & USBA_DMA_CH_EN))
850 dev_err(&ep->udc->pdev->dev,
851 "%s: timed out waiting for DMA FIFO to empty\n",
859 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
861 struct usba_ep *ep = to_usba_ep(_ep);
862 struct usba_udc *udc = ep->udc;
863 struct usba_request *req;
867 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
870 spin_lock_irqsave(&udc->lock, flags);
872 list_for_each_entry(req, &ep->queue, queue) {
873 if (&req->req == _req)
877 if (&req->req != _req) {
878 spin_unlock_irqrestore(&udc->lock, flags);
882 if (req->using_dma) {
884 * If this request is currently being transferred,
885 * stop the DMA controller and reset the FIFO.
887 if (ep->queue.next == &req->queue) {
888 status = usba_dma_readl(ep, STATUS);
889 if (status & USBA_DMA_CH_EN)
890 stop_dma(ep, &status);
892 #ifdef CONFIG_USB_GADGET_DEBUG_FS
893 ep->last_dma_status = status;
896 usba_writel(udc, EPT_RST, 1 << ep->index);
898 usba_update_req(ep, req, status);
903 * Errors should stop the queue from advancing until the
904 * completion function returns.
906 list_del_init(&req->queue);
908 request_complete(ep, req, -ECONNRESET);
910 /* Process the next request if any */
911 submit_next_request(ep);
912 spin_unlock_irqrestore(&udc->lock, flags);
917 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
919 struct usba_ep *ep = to_usba_ep(_ep);
920 struct usba_udc *udc = ep->udc;
924 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
925 value ? "set" : "clear");
928 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
933 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
938 spin_lock_irqsave(&udc->lock, flags);
941 * We can't halt IN endpoints while there are still data to be
944 if (!list_empty(&ep->queue)
945 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
946 & USBA_BF(BUSY_BANKS, -1L))))) {
950 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
952 usba_ep_writel(ep, CLR_STA,
953 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
954 usba_ep_readl(ep, STA);
957 spin_unlock_irqrestore(&udc->lock, flags);
962 static int usba_ep_fifo_status(struct usb_ep *_ep)
964 struct usba_ep *ep = to_usba_ep(_ep);
966 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
969 static void usba_ep_fifo_flush(struct usb_ep *_ep)
971 struct usba_ep *ep = to_usba_ep(_ep);
972 struct usba_udc *udc = ep->udc;
974 usba_writel(udc, EPT_RST, 1 << ep->index);
977 static const struct usb_ep_ops usba_ep_ops = {
978 .enable = usba_ep_enable,
979 .disable = usba_ep_disable,
980 .alloc_request = usba_ep_alloc_request,
981 .free_request = usba_ep_free_request,
982 .queue = usba_ep_queue,
983 .dequeue = usba_ep_dequeue,
984 .set_halt = usba_ep_set_halt,
985 .fifo_status = usba_ep_fifo_status,
986 .fifo_flush = usba_ep_fifo_flush,
989 static int usba_udc_get_frame(struct usb_gadget *gadget)
991 struct usba_udc *udc = to_usba_udc(gadget);
993 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
996 static int usba_udc_wakeup(struct usb_gadget *gadget)
998 struct usba_udc *udc = to_usba_udc(gadget);
1003 spin_lock_irqsave(&udc->lock, flags);
1004 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1005 ctrl = usba_readl(udc, CTRL);
1006 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1009 spin_unlock_irqrestore(&udc->lock, flags);
1015 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1017 struct usba_udc *udc = to_usba_udc(gadget);
1018 unsigned long flags;
1020 gadget->is_selfpowered = (is_selfpowered != 0);
1021 spin_lock_irqsave(&udc->lock, flags);
1023 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1025 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1026 spin_unlock_irqrestore(&udc->lock, flags);
1031 static int atmel_usba_pullup(struct usb_gadget *gadget, int is_on);
1032 static int atmel_usba_start(struct usb_gadget *gadget,
1033 struct usb_gadget_driver *driver);
1034 static int atmel_usba_stop(struct usb_gadget *gadget);
1036 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1037 struct usb_endpoint_descriptor *desc,
1038 struct usb_ss_ep_comp_descriptor *ep_comp)
1043 /* Look at endpoints until an unclaimed one looks usable */
1044 list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1045 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1053 if (fifo_mode == 0) {
1054 /* Optimize hw fifo size based on ep type and other info */
1055 ep = to_usba_ep(_ep);
1057 switch (usb_endpoint_type(desc)) {
1058 case USB_ENDPOINT_XFER_CONTROL:
1062 case USB_ENDPOINT_XFER_ISOC:
1063 ep->fifo_size = 1024;
1064 if (ep->udc->ep_prealloc)
1068 case USB_ENDPOINT_XFER_BULK:
1069 ep->fifo_size = 512;
1070 if (ep->udc->ep_prealloc)
1074 case USB_ENDPOINT_XFER_INT:
1075 if (desc->wMaxPacketSize == 0)
1077 roundup_pow_of_two(_ep->maxpacket_limit);
1080 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1081 if (ep->udc->ep_prealloc)
1086 /* It might be a little bit late to set this */
1087 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1089 /* Generate ept_cfg basd on FIFO size and number of banks */
1090 if (ep->fifo_size <= 8)
1091 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1093 /* LSB is bit 1, not 0 */
1095 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1097 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1103 static const struct usb_gadget_ops usba_udc_ops = {
1104 .get_frame = usba_udc_get_frame,
1105 .wakeup = usba_udc_wakeup,
1106 .set_selfpowered = usba_udc_set_selfpowered,
1107 .pullup = atmel_usba_pullup,
1108 .udc_start = atmel_usba_start,
1109 .udc_stop = atmel_usba_stop,
1110 .match_ep = atmel_usba_match_ep,
1113 static struct usb_endpoint_descriptor usba_ep0_desc = {
1114 .bLength = USB_DT_ENDPOINT_SIZE,
1115 .bDescriptorType = USB_DT_ENDPOINT,
1116 .bEndpointAddress = 0,
1117 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1118 .wMaxPacketSize = cpu_to_le16(64),
1119 /* FIXME: I have no idea what to put here */
1123 static const struct usb_gadget usba_gadget_template = {
1124 .ops = &usba_udc_ops,
1125 .max_speed = USB_SPEED_HIGH,
1126 .name = "atmel_usba_udc",
1130 * Called with interrupts disabled and udc->lock held.
1132 static void reset_all_endpoints(struct usba_udc *udc)
1135 struct usba_request *req, *tmp_req;
1137 usba_writel(udc, EPT_RST, ~0UL);
1139 ep = to_usba_ep(udc->gadget.ep0);
1140 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1141 list_del_init(&req->queue);
1142 request_complete(ep, req, -ECONNRESET);
1146 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1150 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1151 return to_usba_ep(udc->gadget.ep0);
1153 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1154 u8 bEndpointAddress;
1158 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1159 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1161 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1162 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1169 /* Called with interrupts disabled and udc->lock held */
1170 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1172 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1173 ep->state = WAIT_FOR_SETUP;
1176 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1178 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1183 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1187 DBG(DBG_BUS, "setting address %u...\n", addr);
1188 regval = usba_readl(udc, CTRL);
1189 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1190 usba_writel(udc, CTRL, regval);
1193 static int do_test_mode(struct usba_udc *udc)
1195 static const char test_packet_buffer[] = {
1197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1199 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1201 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1202 /* JJJJJJJKKKKKKK * 8 */
1203 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1204 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1206 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1207 /* {JKKKKKKK * 10}, JK */
1208 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1211 struct device *dev = &udc->pdev->dev;
1214 test_mode = udc->test_mode;
1216 /* Start from a clean slate */
1217 reset_all_endpoints(udc);
1219 switch (test_mode) {
1222 usba_writel(udc, TST, USBA_TST_J_MODE);
1223 dev_info(dev, "Entering Test_J mode...\n");
1227 usba_writel(udc, TST, USBA_TST_K_MODE);
1228 dev_info(dev, "Entering Test_K mode...\n");
1232 * Test_SE0_NAK: Force high-speed mode and set up ep0
1233 * for Bulk IN transfers
1235 ep = &udc->usba_ep[0];
1236 usba_writel(udc, TST,
1237 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1238 usba_ep_writel(ep, CFG,
1239 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1241 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1242 | USBA_BF(BK_NUMBER, 1));
1243 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1244 set_protocol_stall(udc, ep);
1245 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1247 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1248 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1253 ep = &udc->usba_ep[0];
1254 usba_ep_writel(ep, CFG,
1255 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1257 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1258 | USBA_BF(BK_NUMBER, 1));
1259 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1260 set_protocol_stall(udc, ep);
1261 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1263 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1264 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1265 memcpy_toio(ep->fifo, test_packet_buffer,
1266 sizeof(test_packet_buffer));
1267 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1268 dev_info(dev, "Entering Test_Packet mode...\n");
1272 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1279 /* Avoid overly long expressions */
1280 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1282 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1287 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1289 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1294 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1296 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1301 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1302 struct usb_ctrlrequest *crq)
1306 switch (crq->bRequest) {
1307 case USB_REQ_GET_STATUS: {
1310 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1311 status = cpu_to_le16(udc->devstatus);
1312 } else if (crq->bRequestType
1313 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1314 status = cpu_to_le16(0);
1315 } else if (crq->bRequestType
1316 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1317 struct usba_ep *target;
1319 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1324 if (is_stalled(udc, target))
1325 status |= cpu_to_le16(1);
1329 /* Write directly to the FIFO. No queueing is done. */
1330 if (crq->wLength != cpu_to_le16(sizeof(status)))
1332 ep->state = DATA_STAGE_IN;
1333 writew_relaxed(status, ep->fifo);
1334 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1338 case USB_REQ_CLEAR_FEATURE: {
1339 if (crq->bRequestType == USB_RECIP_DEVICE) {
1340 if (feature_is_dev_remote_wakeup(crq))
1342 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1344 /* Can't CLEAR_FEATURE TEST_MODE */
1346 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1347 struct usba_ep *target;
1349 if (crq->wLength != cpu_to_le16(0)
1350 || !feature_is_ep_halt(crq))
1352 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1356 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1357 if (target->index != 0)
1358 usba_ep_writel(target, CLR_STA,
1364 send_status(udc, ep);
1368 case USB_REQ_SET_FEATURE: {
1369 if (crq->bRequestType == USB_RECIP_DEVICE) {
1370 if (feature_is_dev_test_mode(crq)) {
1371 send_status(udc, ep);
1372 ep->state = STATUS_STAGE_TEST;
1373 udc->test_mode = le16_to_cpu(crq->wIndex);
1375 } else if (feature_is_dev_remote_wakeup(crq)) {
1376 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1380 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1381 struct usba_ep *target;
1383 if (crq->wLength != cpu_to_le16(0)
1384 || !feature_is_ep_halt(crq))
1387 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1391 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1395 send_status(udc, ep);
1399 case USB_REQ_SET_ADDRESS:
1400 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1403 set_address(udc, le16_to_cpu(crq->wValue));
1404 send_status(udc, ep);
1405 ep->state = STATUS_STAGE_ADDR;
1410 spin_unlock(&udc->lock);
1411 retval = udc->driver->setup(&udc->gadget, crq);
1412 spin_lock(&udc->lock);
1418 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1419 "halting endpoint...\n",
1420 ep->ep.name, crq->bRequestType, crq->bRequest,
1421 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1422 le16_to_cpu(crq->wLength));
1423 set_protocol_stall(udc, ep);
1427 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1429 struct usba_request *req;
1434 epstatus = usba_ep_readl(ep, STA);
1435 epctrl = usba_ep_readl(ep, CTL);
1437 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1438 ep->ep.name, ep->state, epstatus, epctrl);
1441 if (!list_empty(&ep->queue))
1442 req = list_entry(ep->queue.next,
1443 struct usba_request, queue);
1445 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1447 next_fifo_transaction(ep, req);
1449 submit_request(ep, req);
1451 if (req->last_transaction) {
1452 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1453 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1457 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1458 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1460 switch (ep->state) {
1462 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1463 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1464 ep->state = STATUS_STAGE_OUT;
1466 case STATUS_STAGE_ADDR:
1467 /* Activate our new address */
1468 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1470 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1471 ep->state = WAIT_FOR_SETUP;
1473 case STATUS_STAGE_IN:
1475 list_del_init(&req->queue);
1476 request_complete(ep, req, 0);
1477 submit_next_request(ep);
1479 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1480 ep->state = WAIT_FOR_SETUP;
1482 case STATUS_STAGE_TEST:
1483 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1484 ep->state = WAIT_FOR_SETUP;
1485 if (do_test_mode(udc))
1486 set_protocol_stall(udc, ep);
1489 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1490 "halting endpoint...\n",
1491 ep->ep.name, ep->state);
1492 set_protocol_stall(udc, ep);
1498 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1499 switch (ep->state) {
1500 case STATUS_STAGE_OUT:
1501 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1502 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1505 list_del_init(&req->queue);
1506 request_complete(ep, req, 0);
1508 ep->state = WAIT_FOR_SETUP;
1511 case DATA_STAGE_OUT:
1516 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1517 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1518 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1519 "halting endpoint...\n",
1520 ep->ep.name, ep->state);
1521 set_protocol_stall(udc, ep);
1527 if (epstatus & USBA_RX_SETUP) {
1529 struct usb_ctrlrequest crq;
1530 unsigned long data[2];
1532 unsigned int pkt_len;
1535 if (ep->state != WAIT_FOR_SETUP) {
1537 * Didn't expect a SETUP packet at this
1538 * point. Clean up any pending requests (which
1539 * may be successful).
1541 int status = -EPROTO;
1544 * RXRDY and TXCOMP are dropped when SETUP
1545 * packets arrive. Just pretend we received
1546 * the status packet.
1548 if (ep->state == STATUS_STAGE_OUT
1549 || ep->state == STATUS_STAGE_IN) {
1550 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1555 list_del_init(&req->queue);
1556 request_complete(ep, req, status);
1560 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1561 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1562 if (pkt_len != sizeof(crq)) {
1563 pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1564 pkt_len, sizeof(crq));
1565 set_protocol_stall(udc, ep);
1569 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1570 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1572 /* Free up one bank in the FIFO so that we can
1573 * generate or receive a reply right away. */
1574 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1576 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1577 ep->state, crq.crq.bRequestType,
1578 crq.crq.bRequest); */
1580 if (crq.crq.bRequestType & USB_DIR_IN) {
1582 * The USB 2.0 spec states that "if wLength is
1583 * zero, there is no data transfer phase."
1584 * However, testusb #14 seems to actually
1585 * expect a data phase even if wLength = 0...
1587 ep->state = DATA_STAGE_IN;
1589 if (crq.crq.wLength != cpu_to_le16(0))
1590 ep->state = DATA_STAGE_OUT;
1592 ep->state = STATUS_STAGE_IN;
1597 ret = handle_ep0_setup(udc, ep, &crq.crq);
1599 spin_unlock(&udc->lock);
1600 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1601 spin_lock(&udc->lock);
1604 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1605 crq.crq.bRequestType, crq.crq.bRequest,
1606 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1609 /* Let the host know that we failed */
1610 set_protocol_stall(udc, ep);
1615 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1617 struct usba_request *req;
1621 epstatus = usba_ep_readl(ep, STA);
1622 epctrl = usba_ep_readl(ep, CTL);
1624 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1626 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1627 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1629 if (list_empty(&ep->queue)) {
1630 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1631 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1635 req = list_entry(ep->queue.next, struct usba_request, queue);
1637 if (req->using_dma) {
1638 /* Send a zero-length packet */
1639 usba_ep_writel(ep, SET_STA,
1641 usba_ep_writel(ep, CTL_DIS,
1643 list_del_init(&req->queue);
1644 submit_next_request(ep);
1645 request_complete(ep, req, 0);
1648 next_fifo_transaction(ep, req);
1650 submit_request(ep, req);
1652 if (req->last_transaction) {
1653 list_del_init(&req->queue);
1654 submit_next_request(ep);
1655 request_complete(ep, req, 0);
1659 epstatus = usba_ep_readl(ep, STA);
1660 epctrl = usba_ep_readl(ep, CTL);
1662 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1663 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1668 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1670 struct usba_request *req;
1671 u32 status, control, pending;
1673 status = usba_dma_readl(ep, STATUS);
1674 control = usba_dma_readl(ep, CONTROL);
1675 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1676 ep->last_dma_status = status;
1678 pending = status & control;
1679 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1681 if (status & USBA_DMA_CH_EN) {
1682 dev_err(&udc->pdev->dev,
1683 "DMA_CH_EN is set after transfer is finished!\n");
1684 dev_err(&udc->pdev->dev,
1685 "status=%#08x, pending=%#08x, control=%#08x\n",
1686 status, pending, control);
1689 * try to pretend nothing happened. We might have to
1690 * do something here...
1694 if (list_empty(&ep->queue))
1695 /* Might happen if a reset comes along at the right moment */
1698 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1699 req = list_entry(ep->queue.next, struct usba_request, queue);
1700 usba_update_req(ep, req, status);
1702 list_del_init(&req->queue);
1703 submit_next_request(ep);
1704 request_complete(ep, req, 0);
1708 static int start_clock(struct usba_udc *udc);
1709 static void stop_clock(struct usba_udc *udc);
1711 static irqreturn_t usba_udc_irq(int irq, void *devid)
1713 struct usba_udc *udc = devid;
1714 u32 status, int_enb;
1718 spin_lock(&udc->lock);
1720 int_enb = usba_int_enb_get(udc);
1721 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1722 DBG(DBG_INT, "irq, status=%#08x\n", status);
1724 if (status & USBA_DET_SUSPEND) {
1725 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND|USBA_WAKE_UP);
1726 usba_int_enb_set(udc, USBA_WAKE_UP);
1727 usba_int_enb_clear(udc, USBA_DET_SUSPEND);
1728 udc->suspended = true;
1729 toggle_bias(udc, 0);
1730 udc->bias_pulse_needed = true;
1732 DBG(DBG_BUS, "Suspend detected\n");
1733 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1734 && udc->driver && udc->driver->suspend) {
1735 spin_unlock(&udc->lock);
1736 udc->driver->suspend(&udc->gadget);
1737 spin_lock(&udc->lock);
1741 if (status & USBA_WAKE_UP) {
1743 toggle_bias(udc, 1);
1744 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1745 DBG(DBG_BUS, "Wake Up CPU detected\n");
1748 if (status & USBA_END_OF_RESUME) {
1749 udc->suspended = false;
1750 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1751 usba_int_enb_clear(udc, USBA_WAKE_UP);
1752 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1753 generate_bias_pulse(udc);
1754 DBG(DBG_BUS, "Resume detected\n");
1755 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1756 && udc->driver && udc->driver->resume) {
1757 spin_unlock(&udc->lock);
1758 udc->driver->resume(&udc->gadget);
1759 spin_lock(&udc->lock);
1763 dma_status = USBA_BFEXT(DMA_INT, status);
1767 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1769 for (i = 1; i <= USBA_NR_DMAS; i++)
1770 if (dma_status & (1 << i))
1771 usba_dma_irq(udc, &udc->usba_ep[i]);
1774 ep_status = USBA_BFEXT(EPT_INT, status);
1778 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1780 for (i = 0; i < udc->num_ep; i++)
1781 if (ep_status & (1 << i)) {
1782 if (ep_is_control(&udc->usba_ep[i]))
1783 usba_control_irq(udc, &udc->usba_ep[i]);
1785 usba_ep_irq(udc, &udc->usba_ep[i]);
1789 if (status & USBA_END_OF_RESET) {
1790 struct usba_ep *ep0, *ep;
1793 usba_writel(udc, INT_CLR,
1794 USBA_END_OF_RESET|USBA_END_OF_RESUME
1795 |USBA_DET_SUSPEND|USBA_WAKE_UP);
1796 generate_bias_pulse(udc);
1797 reset_all_endpoints(udc);
1799 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1800 udc->gadget.speed = USB_SPEED_UNKNOWN;
1801 spin_unlock(&udc->lock);
1802 usb_gadget_udc_reset(&udc->gadget, udc->driver);
1803 spin_lock(&udc->lock);
1806 if (status & USBA_HIGH_SPEED)
1807 udc->gadget.speed = USB_SPEED_HIGH;
1809 udc->gadget.speed = USB_SPEED_FULL;
1810 DBG(DBG_BUS, "%s bus reset detected\n",
1811 usb_speed_string(udc->gadget.speed));
1813 ep0 = &udc->usba_ep[0];
1814 ep0->ep.desc = &usba_ep0_desc;
1815 ep0->state = WAIT_FOR_SETUP;
1816 usba_ep_writel(ep0, CFG,
1817 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1818 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1819 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1820 usba_ep_writel(ep0, CTL_ENB,
1821 USBA_EPT_ENABLE | USBA_RX_SETUP);
1823 /* If we get reset while suspended... */
1824 udc->suspended = false;
1825 usba_int_enb_clear(udc, USBA_WAKE_UP);
1827 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1) |
1828 USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1831 * Unclear why we hit this irregularly, e.g. in usbtest,
1832 * but it's clearly harmless...
1834 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1835 dev_err(&udc->pdev->dev,
1836 "ODD: EP0 configuration is invalid!\n");
1838 /* Preallocate other endpoints */
1839 for (i = 1; i < udc->num_ep; i++) {
1840 ep = &udc->usba_ep[i];
1841 if (ep->ep.claimed) {
1842 usba_ep_writel(ep, CFG, ep->ept_cfg);
1843 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1844 dev_err(&udc->pdev->dev,
1845 "ODD: EP%d configuration is invalid!\n", i);
1850 spin_unlock(&udc->lock);
1855 static int start_clock(struct usba_udc *udc)
1862 pm_stay_awake(&udc->pdev->dev);
1864 ret = clk_prepare_enable(udc->pclk);
1867 ret = clk_prepare_enable(udc->hclk);
1869 clk_disable_unprepare(udc->pclk);
1873 udc->clocked = true;
1877 static void stop_clock(struct usba_udc *udc)
1882 clk_disable_unprepare(udc->hclk);
1883 clk_disable_unprepare(udc->pclk);
1885 udc->clocked = false;
1887 pm_relax(&udc->pdev->dev);
1890 static int usba_start(struct usba_udc *udc)
1892 unsigned long flags;
1895 ret = start_clock(udc);
1902 spin_lock_irqsave(&udc->lock, flags);
1903 toggle_bias(udc, 1);
1904 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1905 /* Clear all requested and pending interrupts... */
1906 usba_writel(udc, INT_ENB, 0);
1907 udc->int_enb_cache = 0;
1908 usba_writel(udc, INT_CLR,
1909 USBA_END_OF_RESET|USBA_END_OF_RESUME
1910 |USBA_DET_SUSPEND|USBA_WAKE_UP);
1911 /* ...and enable just 'reset' IRQ to get us started */
1912 usba_int_enb_set(udc, USBA_END_OF_RESET);
1913 spin_unlock_irqrestore(&udc->lock, flags);
1918 static void usba_stop(struct usba_udc *udc)
1920 unsigned long flags;
1925 spin_lock_irqsave(&udc->lock, flags);
1926 udc->gadget.speed = USB_SPEED_UNKNOWN;
1927 reset_all_endpoints(udc);
1929 /* This will also disable the DP pullup */
1930 toggle_bias(udc, 0);
1931 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1932 spin_unlock_irqrestore(&udc->lock, flags);
1937 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1939 struct usba_udc *udc = devid;
1945 mutex_lock(&udc->vbus_mutex);
1947 vbus = vbus_is_present(udc);
1948 if (vbus != udc->vbus_prev) {
1952 udc->suspended = false;
1953 if (udc->driver->disconnect)
1954 udc->driver->disconnect(&udc->gadget);
1958 udc->vbus_prev = vbus;
1961 mutex_unlock(&udc->vbus_mutex);
1965 static int atmel_usba_pullup(struct usb_gadget *gadget, int is_on)
1967 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1968 unsigned long flags;
1971 spin_lock_irqsave(&udc->lock, flags);
1972 ctrl = usba_readl(udc, CTRL);
1974 ctrl &= ~USBA_DETACH;
1976 ctrl |= USBA_DETACH;
1977 usba_writel(udc, CTRL, ctrl);
1978 spin_unlock_irqrestore(&udc->lock, flags);
1983 static int atmel_usba_start(struct usb_gadget *gadget,
1984 struct usb_gadget_driver *driver)
1987 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1988 unsigned long flags;
1990 spin_lock_irqsave(&udc->lock, flags);
1991 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1992 udc->driver = driver;
1993 spin_unlock_irqrestore(&udc->lock, flags);
1995 mutex_lock(&udc->vbus_mutex);
1998 enable_irq(gpiod_to_irq(udc->vbus_pin));
2000 /* If Vbus is present, enable the controller and wait for reset */
2001 udc->vbus_prev = vbus_is_present(udc);
2002 if (udc->vbus_prev) {
2003 ret = usba_start(udc);
2008 mutex_unlock(&udc->vbus_mutex);
2013 disable_irq(gpiod_to_irq(udc->vbus_pin));
2015 mutex_unlock(&udc->vbus_mutex);
2017 spin_lock_irqsave(&udc->lock, flags);
2018 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
2020 spin_unlock_irqrestore(&udc->lock, flags);
2024 static int atmel_usba_stop(struct usb_gadget *gadget)
2026 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2029 disable_irq(gpiod_to_irq(udc->vbus_pin));
2031 udc->suspended = false;
2039 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2041 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2042 is_on ? AT91_PMC_BIASEN : 0);
2045 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2047 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2048 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2052 static const struct usba_udc_errata at91sam9rl_errata = {
2053 .toggle_bias = at91sam9rl_toggle_bias,
2056 static const struct usba_udc_errata at91sam9g45_errata = {
2057 .pulse_bias = at91sam9g45_pulse_bias,
2060 static const struct usba_ep_config ep_config_sam9[] __initconst = {
2061 { .nr_banks = 1 }, /* ep 0 */
2062 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 1 */
2063 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 2 */
2064 { .nr_banks = 3, .can_dma = 1 }, /* ep 3 */
2065 { .nr_banks = 3, .can_dma = 1 }, /* ep 4 */
2066 { .nr_banks = 3, .can_dma = 1, .can_isoc = 1 }, /* ep 5 */
2067 { .nr_banks = 3, .can_dma = 1, .can_isoc = 1 }, /* ep 6 */
2070 static const struct usba_ep_config ep_config_sama5[] __initconst = {
2071 { .nr_banks = 1 }, /* ep 0 */
2072 { .nr_banks = 3, .can_dma = 1, .can_isoc = 1 }, /* ep 1 */
2073 { .nr_banks = 3, .can_dma = 1, .can_isoc = 1 }, /* ep 2 */
2074 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 3 */
2075 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 4 */
2076 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 5 */
2077 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 6 */
2078 { .nr_banks = 2, .can_dma = 1, .can_isoc = 1 }, /* ep 7 */
2079 { .nr_banks = 2, .can_isoc = 1 }, /* ep 8 */
2080 { .nr_banks = 2, .can_isoc = 1 }, /* ep 9 */
2081 { .nr_banks = 2, .can_isoc = 1 }, /* ep 10 */
2082 { .nr_banks = 2, .can_isoc = 1 }, /* ep 11 */
2083 { .nr_banks = 2, .can_isoc = 1 }, /* ep 12 */
2084 { .nr_banks = 2, .can_isoc = 1 }, /* ep 13 */
2085 { .nr_banks = 2, .can_isoc = 1 }, /* ep 14 */
2086 { .nr_banks = 2, .can_isoc = 1 }, /* ep 15 */
2089 static const struct usba_udc_config udc_at91sam9rl_cfg = {
2090 .errata = &at91sam9rl_errata,
2091 .config = ep_config_sam9,
2092 .num_ep = ARRAY_SIZE(ep_config_sam9),
2093 .ep_prealloc = true,
2096 static const struct usba_udc_config udc_at91sam9g45_cfg = {
2097 .errata = &at91sam9g45_errata,
2098 .config = ep_config_sam9,
2099 .num_ep = ARRAY_SIZE(ep_config_sam9),
2100 .ep_prealloc = true,
2103 static const struct usba_udc_config udc_sama5d3_cfg = {
2104 .config = ep_config_sama5,
2105 .num_ep = ARRAY_SIZE(ep_config_sama5),
2106 .ep_prealloc = true,
2109 static const struct usba_udc_config udc_sam9x60_cfg = {
2110 .num_ep = ARRAY_SIZE(ep_config_sam9),
2111 .config = ep_config_sam9,
2112 .ep_prealloc = false,
2115 static const struct of_device_id atmel_udc_dt_ids[] = {
2116 { .compatible = "atmel,at91sam9rl-udc", .data = &udc_at91sam9rl_cfg },
2117 { .compatible = "atmel,at91sam9g45-udc", .data = &udc_at91sam9g45_cfg },
2118 { .compatible = "atmel,sama5d3-udc", .data = &udc_sama5d3_cfg },
2119 { .compatible = "microchip,sam9x60-udc", .data = &udc_sam9x60_cfg },
2123 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2125 static const struct of_device_id atmel_pmc_dt_ids[] = {
2126 { .compatible = "atmel,at91sam9g45-pmc" },
2127 { .compatible = "atmel,at91sam9rl-pmc" },
2128 { .compatible = "atmel,at91sam9x5-pmc" },
2132 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2133 struct usba_udc *udc)
2135 struct device_node *np = pdev->dev.of_node;
2136 const struct of_device_id *match;
2137 struct device_node *pp;
2139 struct usba_ep *eps, *ep;
2140 const struct usba_udc_config *udc_config;
2142 match = of_match_node(atmel_udc_dt_ids, np);
2144 return ERR_PTR(-EINVAL);
2146 udc_config = match->data;
2147 udc->ep_prealloc = udc_config->ep_prealloc;
2148 udc->errata = udc_config->errata;
2150 pp = of_find_matching_node_and_match(NULL, atmel_pmc_dt_ids,
2153 return ERR_PTR(-ENODEV);
2155 udc->pmc = syscon_node_to_regmap(pp);
2157 if (IS_ERR(udc->pmc))
2158 return ERR_CAST(udc->pmc);
2163 udc->vbus_pin = devm_gpiod_get_optional(&pdev->dev, "atmel,vbus",
2166 if (fifo_mode == 0) {
2167 udc->num_ep = udc_config->num_ep;
2169 udc->num_ep = usba_config_fifo_table(udc);
2172 eps = devm_kcalloc(&pdev->dev, udc->num_ep, sizeof(struct usba_ep),
2175 return ERR_PTR(-ENOMEM);
2177 udc->gadget.ep0 = &eps[0].ep;
2179 INIT_LIST_HEAD(&eps[0].ep.ep_list);
2182 while (i < udc->num_ep) {
2183 const struct usba_ep_config *ep_cfg = &udc_config->config[i];
2187 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : i;
2189 /* Only the first EP is 64 bytes */
2193 ep->fifo_size = 1024;
2196 if (ep->fifo_size < udc->fifo_cfg[i].fifo_size)
2197 dev_warn(&pdev->dev,
2198 "Using default max fifo-size value\n");
2200 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2203 ep->nr_banks = ep_cfg->nr_banks;
2205 if (ep->nr_banks < udc->fifo_cfg[i].nr_banks)
2206 dev_warn(&pdev->dev,
2207 "Using default max nb-banks value\n");
2209 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2212 ep->can_dma = ep_cfg->can_dma;
2213 ep->can_isoc = ep_cfg->can_isoc;
2215 sprintf(ep->name, "ep%d", ep->index);
2216 ep->ep.name = ep->name;
2218 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2219 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2220 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2221 ep->ep.ops = &usba_ep_ops;
2222 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2224 INIT_LIST_HEAD(&ep->queue);
2226 if (ep->index == 0) {
2227 ep->ep.caps.type_control = true;
2229 ep->ep.caps.type_iso = ep->can_isoc;
2230 ep->ep.caps.type_bulk = true;
2231 ep->ep.caps.type_int = true;
2234 ep->ep.caps.dir_in = true;
2235 ep->ep.caps.dir_out = true;
2237 if (fifo_mode != 0) {
2239 * Generate ept_cfg based on FIFO size and
2242 if (ep->fifo_size <= 8)
2243 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2245 /* LSB is bit 1, not 0 */
2247 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2249 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2253 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2259 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2266 return ERR_PTR(ret);
2269 static int usba_udc_probe(struct platform_device *pdev)
2271 struct resource *res;
2272 struct clk *pclk, *hclk;
2273 struct usba_udc *udc;
2276 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2280 udc->gadget = usba_gadget_template;
2281 INIT_LIST_HEAD(&udc->gadget.ep_list);
2283 res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2284 udc->regs = devm_ioremap_resource(&pdev->dev, res);
2285 if (IS_ERR(udc->regs))
2286 return PTR_ERR(udc->regs);
2287 dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n",
2290 res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2291 udc->fifo = devm_ioremap_resource(&pdev->dev, res);
2292 if (IS_ERR(udc->fifo))
2293 return PTR_ERR(udc->fifo);
2294 dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo);
2296 irq = platform_get_irq(pdev, 0);
2300 pclk = devm_clk_get(&pdev->dev, "pclk");
2302 return PTR_ERR(pclk);
2303 hclk = devm_clk_get(&pdev->dev, "hclk");
2305 return PTR_ERR(hclk);
2307 spin_lock_init(&udc->lock);
2308 mutex_init(&udc->vbus_mutex);
2313 platform_set_drvdata(pdev, udc);
2315 /* Make sure we start from a clean slate */
2316 ret = clk_prepare_enable(pclk);
2318 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2322 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2323 clk_disable_unprepare(pclk);
2325 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2327 toggle_bias(udc, 0);
2329 if (IS_ERR(udc->usba_ep))
2330 return PTR_ERR(udc->usba_ep);
2332 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2333 "atmel_usba_udc", udc);
2335 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2341 if (udc->vbus_pin) {
2342 irq_set_status_flags(gpiod_to_irq(udc->vbus_pin), IRQ_NOAUTOEN);
2343 ret = devm_request_threaded_irq(&pdev->dev,
2344 gpiod_to_irq(udc->vbus_pin), NULL,
2345 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2346 "atmel_usba_udc", udc);
2348 udc->vbus_pin = NULL;
2349 dev_warn(&udc->pdev->dev,
2350 "failed to request vbus irq; "
2351 "assuming always on\n");
2355 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2358 device_init_wakeup(&pdev->dev, 1);
2360 usba_init_debugfs(udc);
2361 for (i = 1; i < udc->num_ep; i++)
2362 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2367 static int usba_udc_remove(struct platform_device *pdev)
2369 struct usba_udc *udc;
2372 udc = platform_get_drvdata(pdev);
2374 device_init_wakeup(&pdev->dev, 0);
2375 usb_del_gadget_udc(&udc->gadget);
2377 for (i = 1; i < udc->num_ep; i++)
2378 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2379 usba_cleanup_debugfs(udc);
2384 #ifdef CONFIG_PM_SLEEP
2385 static int usba_udc_suspend(struct device *dev)
2387 struct usba_udc *udc = dev_get_drvdata(dev);
2393 mutex_lock(&udc->vbus_mutex);
2395 if (!device_may_wakeup(dev)) {
2396 udc->suspended = false;
2402 * Device may wake up. We stay clocked if we failed
2403 * to request vbus irq, assuming always on.
2405 if (udc->vbus_pin) {
2406 /* FIXME: right to stop here...??? */
2408 enable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2411 enable_irq_wake(udc->irq);
2414 mutex_unlock(&udc->vbus_mutex);
2418 static int usba_udc_resume(struct device *dev)
2420 struct usba_udc *udc = dev_get_drvdata(dev);
2426 if (device_may_wakeup(dev)) {
2428 disable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2430 disable_irq_wake(udc->irq);
2433 /* If Vbus is present, enable the controller and wait for reset */
2434 mutex_lock(&udc->vbus_mutex);
2435 udc->vbus_prev = vbus_is_present(udc);
2438 mutex_unlock(&udc->vbus_mutex);
2444 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2446 static struct platform_driver udc_driver = {
2447 .remove = usba_udc_remove,
2449 .name = "atmel_usba_udc",
2450 .pm = &usba_udc_pm_ops,
2451 .of_match_table = atmel_udc_dt_ids,
2455 module_platform_driver_probe(udc_driver, usba_udc_probe);
2457 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2458 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2459 MODULE_LICENSE("GPL");
2460 MODULE_ALIAS("platform:atmel_usba_udc");