2 * xhci-dbc.h - xHCI debug capability early driver
4 * Copyright (C) 2016 Intel Corporation
6 * Author: Lu Baolu <baolu.lu@linux.intel.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __LINUX_XHCI_DBC_H
14 #define __LINUX_XHCI_DBC_H
16 #include <linux/types.h>
17 #include <linux/usb/ch9.h>
20 * xHCI Debug Capability Register interfaces:
25 __le32 ersts; /* Event Ring Segment Table Size*/
26 __le32 __reserved_0; /* 0c~0f reserved bits */
27 __le64 erstba; /* Event Ring Segment Table Base Address */
28 __le64 erdp; /* Event Ring Dequeue Pointer */
31 __le32 portsc; /* Port status and control */
32 __le32 __reserved_1; /* 2b~28 reserved bits */
33 __le64 dccp; /* Debug Capability Context Pointer */
34 __le32 devinfo1; /* Device Descriptor Info Register 1 */
35 __le32 devinfo2; /* Device Descriptor Info Register 2 */
38 #define DEBUG_MAX_BURST(p) (((p) >> 16) & 0xff)
40 #define CTRL_DBC_RUN BIT(0)
41 #define CTRL_PORT_ENABLE BIT(1)
42 #define CTRL_HALT_OUT_TR BIT(2)
43 #define CTRL_HALT_IN_TR BIT(3)
44 #define CTRL_DBC_RUN_CHANGE BIT(4)
45 #define CTRL_DBC_ENABLE BIT(31)
47 #define DCST_DEBUG_PORT(p) (((p) >> 24) & 0xff)
49 #define PORTSC_CONN_STATUS BIT(0)
50 #define PORTSC_CONN_CHANGE BIT(17)
51 #define PORTSC_RESET_CHANGE BIT(21)
52 #define PORTSC_LINK_CHANGE BIT(22)
53 #define PORTSC_CONFIG_CHANGE BIT(23)
56 * xHCI Debug Capability data structures:
62 struct xdbc_erst_entry {
68 struct xdbc_info_context {
74 __le32 __reserved_0[7];
77 struct xdbc_ep_context {
82 __le32 __reserved_0[11];
86 struct xdbc_info_context info;
87 struct xdbc_ep_context out;
88 struct xdbc_ep_context in;
91 #define XDBC_INFO_CONTEXT_SIZE 48
92 #define XDBC_MAX_STRING_LENGTH 64
93 #define XDBC_STRING_MANUFACTURER "Linux Foundation"
94 #define XDBC_STRING_PRODUCT "Linux USB GDB Target"
95 #define XDBC_STRING_SERIAL "0001"
98 char string0[XDBC_MAX_STRING_LENGTH];
99 char manufacturer[XDBC_MAX_STRING_LENGTH];
100 char product[XDBC_MAX_STRING_LENGTH];
101 char serial[XDBC_MAX_STRING_LENGTH];
104 #define XDBC_PROTOCOL 1 /* GNU Remote Debug Command Set */
105 #define XDBC_VENDOR_ID 0x1d6b /* Linux Foundation 0x1d6b */
106 #define XDBC_PRODUCT_ID 0x0011 /* __le16 idProduct; device 0011 */
107 #define XDBC_DEVICE_REV 0x0010 /* 0.10 */
110 * xHCI Debug Capability software state structures:
112 struct xdbc_segment {
113 struct xdbc_trb *trbs;
117 #define XDBC_TRBS_PER_SEGMENT 256
120 struct xdbc_segment *segment;
121 struct xdbc_trb *enqueue;
122 struct xdbc_trb *dequeue;
127 * These are the "Endpoint ID" (also known as "Context Index") values for the
128 * OUT Transfer Ring and the IN Transfer Ring of a Debug Capability Context data
130 * According to the "eXtensible Host Controller Interface for Universal Serial
131 * Bus (xHCI)" specification, section "7.6.3.2 Endpoint Contexts and Transfer
132 * Rings", these should be 0 and 1, and those are the values AMD machines give
133 * you; but Intel machines seem to use the formula from section "4.5.1 Device
134 * Context Index", which is supposed to be used for the Device Context only.
135 * Luckily the values from Intel don't overlap with those from AMD, so we can
136 * just test for both.
138 #define XDBC_EPID_OUT 0
139 #define XDBC_EPID_IN 1
140 #define XDBC_EPID_OUT_INTEL 2
141 #define XDBC_EPID_IN_INTEL 3
149 void __iomem *xhci_base;
154 /* DbC register base */
155 struct xdbc_regs __iomem *xdbc_reg;
158 dma_addr_t table_dma;
161 /* event ring segment table */
166 /* event ring segments */
167 struct xdbc_ring evt_ring;
168 struct xdbc_segment evt_seg;
170 /* debug capability contexts */
175 /* descriptor strings */
176 dma_addr_t string_dma;
180 /* bulk OUT endpoint */
181 struct xdbc_ring out_ring;
182 struct xdbc_segment out_seg;
186 /* bulk IN endpoint */
187 struct xdbc_ring in_ring;
188 struct xdbc_segment in_seg;
194 /* spinlock for early_xdbc_write() reentrancy */
198 #define XDBC_PCI_MAX_BUSES 256
199 #define XDBC_PCI_MAX_DEVICES 32
200 #define XDBC_PCI_MAX_FUNCTION 8
202 #define XDBC_TABLE_ENTRY_SIZE 64
203 #define XDBC_ERST_ENTRY_NUM 1
204 #define XDBC_DBCC_ENTRY_NUM 3
205 #define XDBC_STRING_ENTRY_NUM 4
207 /* Bits definitions for xdbc_state.flags: */
208 #define XDBC_FLAGS_INITIALIZED BIT(0)
209 #define XDBC_FLAGS_IN_STALL BIT(1)
210 #define XDBC_FLAGS_OUT_STALL BIT(2)
211 #define XDBC_FLAGS_IN_PROCESS BIT(3)
212 #define XDBC_FLAGS_OUT_PROCESS BIT(4)
213 #define XDBC_FLAGS_CONFIGURED BIT(5)
215 #define XDBC_MAX_PACKET 1024
217 /* Door bell target: */
218 #define OUT_EP_DOORBELL 0
219 #define IN_EP_DOORBELL 1
220 #define DOOR_BELL_TARGET(p) (((p) & 0xff) << 8)
222 #define xdbc_read64(regs) xhci_read_64(NULL, (regs))
223 #define xdbc_write64(val, regs) xhci_write_64(NULL, (val), (regs))
225 #endif /* __LINUX_XHCI_DBC_H */