1 // SPDX-License-Identifier: GPL-2.0
3 * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/ptrace.h>
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
16 #include <linux/debugfs.h>
17 #include <linux/seq_file.h>
18 #include <linux/delay.h>
19 #include <linux/uaccess.h>
21 #include <linux/usb/ch9.h>
28 #define DWC3_LSP_MUX_UNSELECTED 0xfffff
30 #define dump_register(nm) \
32 .name = __stringify(nm), \
33 .offset = DWC3_ ##nm, \
36 #define dump_ep_register_set(n) \
38 .name = "DEPCMDPAR2("__stringify(n)")", \
39 .offset = DWC3_DEP_BASE(n) + \
43 .name = "DEPCMDPAR1("__stringify(n)")", \
44 .offset = DWC3_DEP_BASE(n) + \
48 .name = "DEPCMDPAR0("__stringify(n)")", \
49 .offset = DWC3_DEP_BASE(n) + \
53 .name = "DEPCMD("__stringify(n)")", \
54 .offset = DWC3_DEP_BASE(n) + \
59 static const struct debugfs_reg32 dwc3_regs[] = {
60 dump_register(GSBUSCFG0),
61 dump_register(GSBUSCFG1),
62 dump_register(GTXTHRCFG),
63 dump_register(GRXTHRCFG),
65 dump_register(GEVTEN),
67 dump_register(GUCTL1),
68 dump_register(GSNPSID),
72 dump_register(GBUSERRADDR0),
73 dump_register(GBUSERRADDR1),
74 dump_register(GPRTBIMAP0),
75 dump_register(GPRTBIMAP1),
76 dump_register(GHWPARAMS0),
77 dump_register(GHWPARAMS1),
78 dump_register(GHWPARAMS2),
79 dump_register(GHWPARAMS3),
80 dump_register(GHWPARAMS4),
81 dump_register(GHWPARAMS5),
82 dump_register(GHWPARAMS6),
83 dump_register(GHWPARAMS7),
84 dump_register(GDBGFIFOSPACE),
85 dump_register(GDBGLTSSM),
86 dump_register(GDBGBMU),
87 dump_register(GPRTBIMAP_HS0),
88 dump_register(GPRTBIMAP_HS1),
89 dump_register(GPRTBIMAP_FS0),
90 dump_register(GPRTBIMAP_FS1),
92 dump_register(GUSB2PHYCFG(0)),
93 dump_register(GUSB2PHYCFG(1)),
94 dump_register(GUSB2PHYCFG(2)),
95 dump_register(GUSB2PHYCFG(3)),
96 dump_register(GUSB2PHYCFG(4)),
97 dump_register(GUSB2PHYCFG(5)),
98 dump_register(GUSB2PHYCFG(6)),
99 dump_register(GUSB2PHYCFG(7)),
100 dump_register(GUSB2PHYCFG(8)),
101 dump_register(GUSB2PHYCFG(9)),
102 dump_register(GUSB2PHYCFG(10)),
103 dump_register(GUSB2PHYCFG(11)),
104 dump_register(GUSB2PHYCFG(12)),
105 dump_register(GUSB2PHYCFG(13)),
106 dump_register(GUSB2PHYCFG(14)),
107 dump_register(GUSB2PHYCFG(15)),
109 dump_register(GUSB2I2CCTL(0)),
110 dump_register(GUSB2I2CCTL(1)),
111 dump_register(GUSB2I2CCTL(2)),
112 dump_register(GUSB2I2CCTL(3)),
113 dump_register(GUSB2I2CCTL(4)),
114 dump_register(GUSB2I2CCTL(5)),
115 dump_register(GUSB2I2CCTL(6)),
116 dump_register(GUSB2I2CCTL(7)),
117 dump_register(GUSB2I2CCTL(8)),
118 dump_register(GUSB2I2CCTL(9)),
119 dump_register(GUSB2I2CCTL(10)),
120 dump_register(GUSB2I2CCTL(11)),
121 dump_register(GUSB2I2CCTL(12)),
122 dump_register(GUSB2I2CCTL(13)),
123 dump_register(GUSB2I2CCTL(14)),
124 dump_register(GUSB2I2CCTL(15)),
126 dump_register(GUSB2PHYACC(0)),
127 dump_register(GUSB2PHYACC(1)),
128 dump_register(GUSB2PHYACC(2)),
129 dump_register(GUSB2PHYACC(3)),
130 dump_register(GUSB2PHYACC(4)),
131 dump_register(GUSB2PHYACC(5)),
132 dump_register(GUSB2PHYACC(6)),
133 dump_register(GUSB2PHYACC(7)),
134 dump_register(GUSB2PHYACC(8)),
135 dump_register(GUSB2PHYACC(9)),
136 dump_register(GUSB2PHYACC(10)),
137 dump_register(GUSB2PHYACC(11)),
138 dump_register(GUSB2PHYACC(12)),
139 dump_register(GUSB2PHYACC(13)),
140 dump_register(GUSB2PHYACC(14)),
141 dump_register(GUSB2PHYACC(15)),
143 dump_register(GUSB3PIPECTL(0)),
144 dump_register(GUSB3PIPECTL(1)),
145 dump_register(GUSB3PIPECTL(2)),
146 dump_register(GUSB3PIPECTL(3)),
147 dump_register(GUSB3PIPECTL(4)),
148 dump_register(GUSB3PIPECTL(5)),
149 dump_register(GUSB3PIPECTL(6)),
150 dump_register(GUSB3PIPECTL(7)),
151 dump_register(GUSB3PIPECTL(8)),
152 dump_register(GUSB3PIPECTL(9)),
153 dump_register(GUSB3PIPECTL(10)),
154 dump_register(GUSB3PIPECTL(11)),
155 dump_register(GUSB3PIPECTL(12)),
156 dump_register(GUSB3PIPECTL(13)),
157 dump_register(GUSB3PIPECTL(14)),
158 dump_register(GUSB3PIPECTL(15)),
160 dump_register(GTXFIFOSIZ(0)),
161 dump_register(GTXFIFOSIZ(1)),
162 dump_register(GTXFIFOSIZ(2)),
163 dump_register(GTXFIFOSIZ(3)),
164 dump_register(GTXFIFOSIZ(4)),
165 dump_register(GTXFIFOSIZ(5)),
166 dump_register(GTXFIFOSIZ(6)),
167 dump_register(GTXFIFOSIZ(7)),
168 dump_register(GTXFIFOSIZ(8)),
169 dump_register(GTXFIFOSIZ(9)),
170 dump_register(GTXFIFOSIZ(10)),
171 dump_register(GTXFIFOSIZ(11)),
172 dump_register(GTXFIFOSIZ(12)),
173 dump_register(GTXFIFOSIZ(13)),
174 dump_register(GTXFIFOSIZ(14)),
175 dump_register(GTXFIFOSIZ(15)),
176 dump_register(GTXFIFOSIZ(16)),
177 dump_register(GTXFIFOSIZ(17)),
178 dump_register(GTXFIFOSIZ(18)),
179 dump_register(GTXFIFOSIZ(19)),
180 dump_register(GTXFIFOSIZ(20)),
181 dump_register(GTXFIFOSIZ(21)),
182 dump_register(GTXFIFOSIZ(22)),
183 dump_register(GTXFIFOSIZ(23)),
184 dump_register(GTXFIFOSIZ(24)),
185 dump_register(GTXFIFOSIZ(25)),
186 dump_register(GTXFIFOSIZ(26)),
187 dump_register(GTXFIFOSIZ(27)),
188 dump_register(GTXFIFOSIZ(28)),
189 dump_register(GTXFIFOSIZ(29)),
190 dump_register(GTXFIFOSIZ(30)),
191 dump_register(GTXFIFOSIZ(31)),
193 dump_register(GRXFIFOSIZ(0)),
194 dump_register(GRXFIFOSIZ(1)),
195 dump_register(GRXFIFOSIZ(2)),
196 dump_register(GRXFIFOSIZ(3)),
197 dump_register(GRXFIFOSIZ(4)),
198 dump_register(GRXFIFOSIZ(5)),
199 dump_register(GRXFIFOSIZ(6)),
200 dump_register(GRXFIFOSIZ(7)),
201 dump_register(GRXFIFOSIZ(8)),
202 dump_register(GRXFIFOSIZ(9)),
203 dump_register(GRXFIFOSIZ(10)),
204 dump_register(GRXFIFOSIZ(11)),
205 dump_register(GRXFIFOSIZ(12)),
206 dump_register(GRXFIFOSIZ(13)),
207 dump_register(GRXFIFOSIZ(14)),
208 dump_register(GRXFIFOSIZ(15)),
209 dump_register(GRXFIFOSIZ(16)),
210 dump_register(GRXFIFOSIZ(17)),
211 dump_register(GRXFIFOSIZ(18)),
212 dump_register(GRXFIFOSIZ(19)),
213 dump_register(GRXFIFOSIZ(20)),
214 dump_register(GRXFIFOSIZ(21)),
215 dump_register(GRXFIFOSIZ(22)),
216 dump_register(GRXFIFOSIZ(23)),
217 dump_register(GRXFIFOSIZ(24)),
218 dump_register(GRXFIFOSIZ(25)),
219 dump_register(GRXFIFOSIZ(26)),
220 dump_register(GRXFIFOSIZ(27)),
221 dump_register(GRXFIFOSIZ(28)),
222 dump_register(GRXFIFOSIZ(29)),
223 dump_register(GRXFIFOSIZ(30)),
224 dump_register(GRXFIFOSIZ(31)),
226 dump_register(GEVNTADRLO(0)),
227 dump_register(GEVNTADRHI(0)),
228 dump_register(GEVNTSIZ(0)),
229 dump_register(GEVNTCOUNT(0)),
231 dump_register(GHWPARAMS8),
234 dump_register(DEVTEN),
236 dump_register(DGCMDPAR),
237 dump_register(DGCMD),
238 dump_register(DALEPENA),
240 dump_ep_register_set(0),
241 dump_ep_register_set(1),
242 dump_ep_register_set(2),
243 dump_ep_register_set(3),
244 dump_ep_register_set(4),
245 dump_ep_register_set(5),
246 dump_ep_register_set(6),
247 dump_ep_register_set(7),
248 dump_ep_register_set(8),
249 dump_ep_register_set(9),
250 dump_ep_register_set(10),
251 dump_ep_register_set(11),
252 dump_ep_register_set(12),
253 dump_ep_register_set(13),
254 dump_ep_register_set(14),
255 dump_ep_register_set(15),
256 dump_ep_register_set(16),
257 dump_ep_register_set(17),
258 dump_ep_register_set(18),
259 dump_ep_register_set(19),
260 dump_ep_register_set(20),
261 dump_ep_register_set(21),
262 dump_ep_register_set(22),
263 dump_ep_register_set(23),
264 dump_ep_register_set(24),
265 dump_ep_register_set(25),
266 dump_ep_register_set(26),
267 dump_ep_register_set(27),
268 dump_ep_register_set(28),
269 dump_ep_register_set(29),
270 dump_ep_register_set(30),
271 dump_ep_register_set(31),
276 dump_register(OEVTEN),
280 static void dwc3_host_lsp(struct seq_file *s)
282 struct dwc3 *dwc = s->private;
288 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC);
290 sel = dwc->dbg_lsp_select;
291 if (sel == DWC3_LSP_MUX_UNSELECTED) {
292 seq_puts(s, "Write LSP selection to print for host\n");
296 reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel);
298 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
299 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
300 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val);
302 if (dbc_enabled && sel < 256) {
303 reg |= DWC3_GDBGLSPMUX_ENDBC;
304 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
305 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
306 seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val);
310 static void dwc3_gadget_lsp(struct seq_file *s)
312 struct dwc3 *dwc = s->private;
316 for (i = 0; i < 16; i++) {
317 reg = DWC3_GDBGLSPMUX_DEVSELECT(i);
318 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
319 reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
320 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg);
324 static int dwc3_lsp_show(struct seq_file *s, void *unused)
326 struct dwc3 *dwc = s->private;
327 unsigned int current_mode;
331 spin_lock_irqsave(&dwc->lock, flags);
332 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
333 current_mode = DWC3_GSTS_CURMOD(reg);
335 switch (current_mode) {
336 case DWC3_GSTS_CURMOD_HOST:
339 case DWC3_GSTS_CURMOD_DEVICE:
343 seq_puts(s, "Mode is unknown, no LSP register printed\n");
346 spin_unlock_irqrestore(&dwc->lock, flags);
351 static int dwc3_lsp_open(struct inode *inode, struct file *file)
353 return single_open(file, dwc3_lsp_show, inode->i_private);
356 static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf,
357 size_t count, loff_t *ppos)
359 struct seq_file *s = file->private_data;
360 struct dwc3 *dwc = s->private;
362 char buf[32] = { 0 };
366 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
369 ret = kstrtouint(buf, 0, &sel);
373 spin_lock_irqsave(&dwc->lock, flags);
374 dwc->dbg_lsp_select = sel;
375 spin_unlock_irqrestore(&dwc->lock, flags);
380 static const struct file_operations dwc3_lsp_fops = {
381 .open = dwc3_lsp_open,
382 .write = dwc3_lsp_write,
385 .release = single_release,
388 static int dwc3_mode_show(struct seq_file *s, void *unused)
390 struct dwc3 *dwc = s->private;
394 spin_lock_irqsave(&dwc->lock, flags);
395 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
396 spin_unlock_irqrestore(&dwc->lock, flags);
398 switch (DWC3_GCTL_PRTCAP(reg)) {
399 case DWC3_GCTL_PRTCAP_HOST:
400 seq_puts(s, "host\n");
402 case DWC3_GCTL_PRTCAP_DEVICE:
403 seq_puts(s, "device\n");
405 case DWC3_GCTL_PRTCAP_OTG:
406 seq_puts(s, "otg\n");
409 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
415 static int dwc3_mode_open(struct inode *inode, struct file *file)
417 return single_open(file, dwc3_mode_show, inode->i_private);
420 static ssize_t dwc3_mode_write(struct file *file,
421 const char __user *ubuf, size_t count, loff_t *ppos)
423 struct seq_file *s = file->private_data;
424 struct dwc3 *dwc = s->private;
428 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
431 if (dwc->dr_mode != USB_DR_MODE_OTG)
434 if (!strncmp(buf, "host", 4))
435 mode = DWC3_GCTL_PRTCAP_HOST;
437 if (!strncmp(buf, "device", 6))
438 mode = DWC3_GCTL_PRTCAP_DEVICE;
440 if (!strncmp(buf, "otg", 3))
441 mode = DWC3_GCTL_PRTCAP_OTG;
443 dwc3_set_mode(dwc, mode);
448 static const struct file_operations dwc3_mode_fops = {
449 .open = dwc3_mode_open,
450 .write = dwc3_mode_write,
453 .release = single_release,
456 static int dwc3_testmode_show(struct seq_file *s, void *unused)
458 struct dwc3 *dwc = s->private;
462 spin_lock_irqsave(&dwc->lock, flags);
463 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
464 reg &= DWC3_DCTL_TSTCTRL_MASK;
466 spin_unlock_irqrestore(&dwc->lock, flags);
470 seq_puts(s, "no test\n");
473 seq_puts(s, "test_j\n");
476 seq_puts(s, "test_k\n");
478 case USB_TEST_SE0_NAK:
479 seq_puts(s, "test_se0_nak\n");
481 case USB_TEST_PACKET:
482 seq_puts(s, "test_packet\n");
484 case USB_TEST_FORCE_ENABLE:
485 seq_puts(s, "test_force_enable\n");
488 seq_printf(s, "UNKNOWN %d\n", reg);
494 static int dwc3_testmode_open(struct inode *inode, struct file *file)
496 return single_open(file, dwc3_testmode_show, inode->i_private);
499 static ssize_t dwc3_testmode_write(struct file *file,
500 const char __user *ubuf, size_t count, loff_t *ppos)
502 struct seq_file *s = file->private_data;
503 struct dwc3 *dwc = s->private;
508 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
511 if (!strncmp(buf, "test_j", 6))
512 testmode = USB_TEST_J;
513 else if (!strncmp(buf, "test_k", 6))
514 testmode = USB_TEST_K;
515 else if (!strncmp(buf, "test_se0_nak", 12))
516 testmode = USB_TEST_SE0_NAK;
517 else if (!strncmp(buf, "test_packet", 11))
518 testmode = USB_TEST_PACKET;
519 else if (!strncmp(buf, "test_force_enable", 17))
520 testmode = USB_TEST_FORCE_ENABLE;
524 spin_lock_irqsave(&dwc->lock, flags);
525 dwc3_gadget_set_test_mode(dwc, testmode);
526 spin_unlock_irqrestore(&dwc->lock, flags);
531 static const struct file_operations dwc3_testmode_fops = {
532 .open = dwc3_testmode_open,
533 .write = dwc3_testmode_write,
536 .release = single_release,
539 static int dwc3_link_state_show(struct seq_file *s, void *unused)
541 struct dwc3 *dwc = s->private;
543 enum dwc3_link_state state;
547 spin_lock_irqsave(&dwc->lock, flags);
548 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
549 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
550 seq_puts(s, "Not available\n");
551 spin_unlock_irqrestore(&dwc->lock, flags);
555 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
556 state = DWC3_DSTS_USBLNKST(reg);
557 speed = reg & DWC3_DSTS_CONNECTSPD;
559 seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ?
560 dwc3_gadget_link_string(state) :
561 dwc3_gadget_hs_link_string(state));
562 spin_unlock_irqrestore(&dwc->lock, flags);
567 static int dwc3_link_state_open(struct inode *inode, struct file *file)
569 return single_open(file, dwc3_link_state_show, inode->i_private);
572 static ssize_t dwc3_link_state_write(struct file *file,
573 const char __user *ubuf, size_t count, loff_t *ppos)
575 struct seq_file *s = file->private_data;
576 struct dwc3 *dwc = s->private;
578 enum dwc3_link_state state = 0;
583 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
586 if (!strncmp(buf, "SS.Disabled", 11))
587 state = DWC3_LINK_STATE_SS_DIS;
588 else if (!strncmp(buf, "Rx.Detect", 9))
589 state = DWC3_LINK_STATE_RX_DET;
590 else if (!strncmp(buf, "SS.Inactive", 11))
591 state = DWC3_LINK_STATE_SS_INACT;
592 else if (!strncmp(buf, "Recovery", 8))
593 state = DWC3_LINK_STATE_RECOV;
594 else if (!strncmp(buf, "Compliance", 10))
595 state = DWC3_LINK_STATE_CMPLY;
596 else if (!strncmp(buf, "Loopback", 8))
597 state = DWC3_LINK_STATE_LPBK;
601 spin_lock_irqsave(&dwc->lock, flags);
602 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
603 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
604 spin_unlock_irqrestore(&dwc->lock, flags);
608 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
609 speed = reg & DWC3_DSTS_CONNECTSPD;
611 if (speed < DWC3_DSTS_SUPERSPEED &&
612 state != DWC3_LINK_STATE_RECOV) {
613 spin_unlock_irqrestore(&dwc->lock, flags);
617 dwc3_gadget_set_link_state(dwc, state);
618 spin_unlock_irqrestore(&dwc->lock, flags);
623 static const struct file_operations dwc3_link_state_fops = {
624 .open = dwc3_link_state_open,
625 .write = dwc3_link_state_write,
628 .release = single_release,
631 struct dwc3_ep_file_map {
633 const struct file_operations *const fops;
636 static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused)
638 struct dwc3_ep *dep = s->private;
639 struct dwc3 *dwc = dep->dwc;
644 spin_lock_irqsave(&dwc->lock, flags);
645 val = dwc3_core_fifo_space(dep, DWC3_TXFIFO);
647 /* Convert to bytes */
648 mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
649 if (DWC3_IP_IS(DWC32))
650 mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6);
654 seq_printf(s, "%u\n", val);
655 spin_unlock_irqrestore(&dwc->lock, flags);
660 static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused)
662 struct dwc3_ep *dep = s->private;
663 struct dwc3 *dwc = dep->dwc;
668 spin_lock_irqsave(&dwc->lock, flags);
669 val = dwc3_core_fifo_space(dep, DWC3_RXFIFO);
671 /* Convert to bytes */
672 mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
673 if (DWC3_IP_IS(DWC32))
674 mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6);
678 seq_printf(s, "%u\n", val);
679 spin_unlock_irqrestore(&dwc->lock, flags);
684 static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused)
686 struct dwc3_ep *dep = s->private;
687 struct dwc3 *dwc = dep->dwc;
691 spin_lock_irqsave(&dwc->lock, flags);
692 val = dwc3_core_fifo_space(dep, DWC3_TXREQQ);
693 seq_printf(s, "%u\n", val);
694 spin_unlock_irqrestore(&dwc->lock, flags);
699 static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused)
701 struct dwc3_ep *dep = s->private;
702 struct dwc3 *dwc = dep->dwc;
706 spin_lock_irqsave(&dwc->lock, flags);
707 val = dwc3_core_fifo_space(dep, DWC3_RXREQQ);
708 seq_printf(s, "%u\n", val);
709 spin_unlock_irqrestore(&dwc->lock, flags);
714 static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused)
716 struct dwc3_ep *dep = s->private;
717 struct dwc3 *dwc = dep->dwc;
721 spin_lock_irqsave(&dwc->lock, flags);
722 val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ);
723 seq_printf(s, "%u\n", val);
724 spin_unlock_irqrestore(&dwc->lock, flags);
729 static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused)
731 struct dwc3_ep *dep = s->private;
732 struct dwc3 *dwc = dep->dwc;
736 spin_lock_irqsave(&dwc->lock, flags);
737 val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ);
738 seq_printf(s, "%u\n", val);
739 spin_unlock_irqrestore(&dwc->lock, flags);
744 static int dwc3_event_queue_show(struct seq_file *s, void *unused)
746 struct dwc3_ep *dep = s->private;
747 struct dwc3 *dwc = dep->dwc;
751 spin_lock_irqsave(&dwc->lock, flags);
752 val = dwc3_core_fifo_space(dep, DWC3_EVENTQ);
753 seq_printf(s, "%u\n", val);
754 spin_unlock_irqrestore(&dwc->lock, flags);
759 static int dwc3_transfer_type_show(struct seq_file *s, void *unused)
761 struct dwc3_ep *dep = s->private;
762 struct dwc3 *dwc = dep->dwc;
765 spin_lock_irqsave(&dwc->lock, flags);
766 if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) {
771 switch (usb_endpoint_type(dep->endpoint.desc)) {
772 case USB_ENDPOINT_XFER_CONTROL:
773 seq_puts(s, "control\n");
775 case USB_ENDPOINT_XFER_ISOC:
776 seq_puts(s, "isochronous\n");
778 case USB_ENDPOINT_XFER_BULK:
779 seq_puts(s, "bulk\n");
781 case USB_ENDPOINT_XFER_INT:
782 seq_puts(s, "interrupt\n");
789 spin_unlock_irqrestore(&dwc->lock, flags);
794 static int dwc3_trb_ring_show(struct seq_file *s, void *unused)
796 struct dwc3_ep *dep = s->private;
797 struct dwc3 *dwc = dep->dwc;
801 spin_lock_irqsave(&dwc->lock, flags);
802 if (dep->number <= 1) {
807 seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n");
809 for (i = 0; i < DWC3_TRB_NUM; i++) {
810 struct dwc3_trb *trb = &dep->trb_pool[i];
811 unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl);
813 seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d %c%c\n",
814 trb->bph, trb->bpl, trb->size,
815 dwc3_trb_type_string(type),
816 !!(trb->ctrl & DWC3_TRB_CTRL_IOC),
817 !!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI),
818 !!(trb->ctrl & DWC3_TRB_CTRL_CSP),
819 !!(trb->ctrl & DWC3_TRB_CTRL_CHN),
820 !!(trb->ctrl & DWC3_TRB_CTRL_LST),
821 !!(trb->ctrl & DWC3_TRB_CTRL_HWO),
822 dep->trb_enqueue == i ? 'E' : ' ',
823 dep->trb_dequeue == i ? 'D' : ' ');
827 spin_unlock_irqrestore(&dwc->lock, flags);
832 static int dwc3_ep_info_register_show(struct seq_file *s, void *unused)
834 struct dwc3_ep *dep = s->private;
835 struct dwc3 *dwc = dep->dwc;
842 spin_lock_irqsave(&dwc->lock, flags);
843 reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number);
844 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
846 lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0);
847 upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1);
849 ep_info = ((u64)upper_32_bits << 32) | lower_32_bits;
850 seq_printf(s, "0x%016llx\n", ep_info);
851 spin_unlock_irqrestore(&dwc->lock, flags);
856 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size);
857 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size);
858 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue);
859 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue);
860 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue);
861 DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue);
862 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue);
863 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type);
864 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring);
865 DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register);
867 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = {
868 { "tx_fifo_size", &dwc3_tx_fifo_size_fops, },
869 { "rx_fifo_size", &dwc3_rx_fifo_size_fops, },
870 { "tx_request_queue", &dwc3_tx_request_queue_fops, },
871 { "rx_request_queue", &dwc3_rx_request_queue_fops, },
872 { "rx_info_queue", &dwc3_rx_info_queue_fops, },
873 { "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, },
874 { "event_queue", &dwc3_event_queue_fops, },
875 { "transfer_type", &dwc3_transfer_type_fops, },
876 { "trb_ring", &dwc3_trb_ring_fops, },
877 { "GDBGEPINFO", &dwc3_ep_info_register_fops, },
880 static void dwc3_debugfs_create_endpoint_files(struct dwc3_ep *dep,
881 struct dentry *parent)
885 for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) {
886 const struct file_operations *fops = dwc3_ep_file_map[i].fops;
887 const char *name = dwc3_ep_file_map[i].name;
889 debugfs_create_file(name, 0444, parent, dep, fops);
893 void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep)
897 dir = debugfs_create_dir(dep->name, dep->dwc->root);
898 dwc3_debugfs_create_endpoint_files(dep, dir);
901 void dwc3_debugfs_init(struct dwc3 *dwc)
905 dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL);
909 dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED;
911 dwc->regset->regs = dwc3_regs;
912 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs);
913 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START;
915 root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root);
918 debugfs_create_regset32("regdump", 0444, root, dwc->regset);
919 debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops);
921 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE))
922 debugfs_create_file("mode", 0644, root, dwc,
925 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) ||
926 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) {
927 debugfs_create_file("testmode", 0644, root, dwc,
928 &dwc3_testmode_fops);
929 debugfs_create_file("link_state", 0644, root, dwc,
930 &dwc3_link_state_fops);
934 void dwc3_debugfs_exit(struct dwc3 *dwc)
936 debugfs_remove_recursive(dwc->root);