1 // SPDX-License-Identifier: GPL-2.0
3 * otg.c - ChipIdea USB IP core OTG driver
5 * Copyright (C) 2013 Freescale Semiconductor, Inc.
11 * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
15 #include <linux/usb/otg.h>
16 #include <linux/usb/gadget.h>
17 #include <linux/usb/chipidea.h>
25 * hw_read_otgsc returns otgsc register bits value.
27 * @mask: bitfield mask
29 u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
31 struct ci_hdrc_cable *cable;
32 u32 val = hw_read(ci, OP_OTGSC, mask);
35 * If using extcon framework for VBUS and/or ID signal
36 * detection overwrite OTGSC register value
38 cable = &ci->platdata->vbus_extcon;
39 if (!IS_ERR(cable->edev) || ci->role_switch) {
56 cable = &ci->platdata->id_extcon;
57 if (!IS_ERR(cable->edev) || ci->role_switch) {
64 val &= ~OTGSC_ID; /* host */
66 val |= OTGSC_ID; /* device */
78 * hw_write_otgsc updates target bits of OTGSC register.
80 * @mask: bitfield mask
81 * @data: to be written
83 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
85 struct ci_hdrc_cable *cable;
87 cable = &ci->platdata->vbus_extcon;
88 if (!IS_ERR(cable->edev) || ci->role_switch) {
89 if (data & mask & OTGSC_BSVIS)
90 cable->changed = false;
92 /* Don't enable vbus interrupt if using external notifier */
93 if (data & mask & OTGSC_BSVIE) {
94 cable->enabled = true;
96 } else if (mask & OTGSC_BSVIE) {
97 cable->enabled = false;
101 cable = &ci->platdata->id_extcon;
102 if (!IS_ERR(cable->edev) || ci->role_switch) {
103 if (data & mask & OTGSC_IDIS)
104 cable->changed = false;
106 /* Don't enable id interrupt if using external notifier */
107 if (data & mask & OTGSC_IDIE) {
108 cable->enabled = true;
110 } else if (mask & OTGSC_IDIE) {
111 cable->enabled = false;
115 hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
119 * ci_otg_role - pick role based on ID pin state
120 * @ci: the controller
122 enum ci_role ci_otg_role(struct ci_hdrc *ci)
124 enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
131 void ci_handle_vbus_change(struct ci_hdrc *ci)
136 if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
137 usb_gadget_vbus_connect(&ci->gadget);
138 else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
139 usb_gadget_vbus_disconnect(&ci->gadget);
143 * When we switch to device mode, the vbus value should be lower
144 * than OTGSC_BSV before connecting to host.
146 * @ci: the controller
148 * This function returns an error code if timeout
150 static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
152 unsigned long elapse = jiffies + msecs_to_jiffies(5000);
153 u32 mask = OTGSC_BSV;
155 while (hw_read_otgsc(ci, mask)) {
156 if (time_after(jiffies, elapse)) {
157 dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
167 static void ci_handle_id_switch(struct ci_hdrc *ci)
169 enum ci_role role = ci_otg_role(ci);
171 if (role != ci->role) {
172 dev_dbg(ci->dev, "switching from %s to %s\n",
173 ci_role(ci)->name, ci->roles[role]->name);
175 if (ci->vbus_active && ci->role == CI_ROLE_GADGET)
177 * vbus disconnect event is lost due to role
178 * switch occurs during system suspend.
180 usb_gadget_vbus_disconnect(&ci->gadget);
184 if (role == CI_ROLE_GADGET &&
185 IS_ERR(ci->platdata->vbus_extcon.edev))
187 * Wait vbus lower than OTGSC_BSV before connecting
188 * to host. If connecting status is from an external
189 * connector instead of register, we don't need to
190 * care vbus on the board, since it will not affect
191 * external connector status.
193 hw_wait_vbus_lower_bsv(ci);
195 ci_role_start(ci, role);
196 /* vbus change may have already occurred */
197 if (role == CI_ROLE_GADGET)
198 ci_handle_vbus_change(ci);
202 * ci_otg_work - perform otg (vbus/id) event handle
205 static void ci_otg_work(struct work_struct *work)
207 struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
209 if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
214 pm_runtime_get_sync(ci->dev);
217 ci->id_event = false;
218 ci_handle_id_switch(ci);
221 if (ci->b_sess_valid_event) {
222 ci->b_sess_valid_event = false;
223 ci_handle_vbus_change(ci);
226 pm_runtime_put_sync(ci->dev);
233 * ci_hdrc_otg_init - initialize otg struct
234 * @ci: the controller
236 int ci_hdrc_otg_init(struct ci_hdrc *ci)
238 INIT_WORK(&ci->work, ci_otg_work);
239 ci->wq = create_freezable_workqueue("ci_otg");
241 dev_err(ci->dev, "can't create workqueue\n");
245 if (ci_otg_is_fsm_mode(ci))
246 return ci_hdrc_otg_fsm_init(ci);
252 * ci_hdrc_otg_destroy - destroy otg struct
253 * @ci: the controller
255 void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
258 flush_workqueue(ci->wq);
259 destroy_workqueue(ci->wq);
261 /* Disable all OTG irq and clear status */
262 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
263 OTGSC_INT_STATUS_BITS);
264 if (ci_otg_is_fsm_mode(ci))
265 ci_hdrc_otg_fsm_remove(ci);