drivers/usb/chipidea/core.c

   1 /*
   2  * core.c - ChipIdea USB IP core family device controller
   3  *
   4  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
   5  *
   6  * Author: David Lopo
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 /*
  14  * Description: ChipIdea USB IP core family device controller
  15  *
  16  * This driver is composed of several blocks:
  17  * - HW:     hardware interface
  18  * - DBG:    debug facilities (optional)
  19  * - UTIL:   utilities
  20  * - ISR:    interrupts handling
  21  * - ENDPT:  endpoint operations (Gadget API)
  22  * - GADGET: gadget operations (Gadget API)
  23  * - BUS:    bus glue code, bus abstraction layer
  24  *
  25  * Compile Options
  26  * - STALL_IN:  non-empty bulk-in pipes cannot be halted
  27  *              if defined mass storage compliance succeeds but with warnings
  28  *              => case 4: Hi >  Dn
  29  *              => case 5: Hi >  Di
  30  *              => case 8: Hi <> Do
  31  *              if undefined usbtest 13 fails
  32  * - TRACE:     enable function tracing (depends on DEBUG)
  33  *
  34  * Main Features
  35  * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
  36  * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
  37  * - Normal & LPM support
  38  *
  39  * USBTEST Report
  40  * - OK: 0-12, 13 (STALL_IN defined) & 14
  41  * - Not Supported: 15 & 16 (ISO)
  42  *
  43  * TODO List
  44  * - Suspend & Remote Wakeup
  45  */
  46 #include <linux/delay.h>
  47 #include <linux/device.h>
  48 #include <linux/dma-mapping.h>
  49 #include <linux/extcon.h>
  50 #include <linux/phy/phy.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/module.h>
  53 #include <linux/idr.h>
  54 #include <linux/interrupt.h>
  55 #include <linux/io.h>
  56 #include <linux/kernel.h>
  57 #include <linux/slab.h>
  58 #include <linux/pm_runtime.h>
  59 #include <linux/usb/ch9.h>
  60 #include <linux/usb/gadget.h>
  61 #include <linux/usb/otg.h>
  62 #include <linux/usb/chipidea.h>
  63 #include <linux/usb/of.h>
  64 #include <linux/of.h>
  65 #include <linux/phy.h>
  66 #include <linux/regulator/consumer.h>
  67 #include <linux/usb/ehci_def.h>
  68
  69 #include "ci.h"
  70 #include "udc.h"
  71 #include "bits.h"
  72 #include "host.h"
  73 #include "otg.h"
  74 #include "otg_fsm.h"
  75
  76 /* Controller register map */
  77 static const u8 ci_regs_nolpm[] = {
  78         [CAP_CAPLENGTH]         = 0x00U,
  79         [CAP_HCCPARAMS]         = 0x08U,
  80         [CAP_DCCPARAMS]         = 0x24U,
  81         [CAP_TESTMODE]          = 0x38U,
  82         [OP_USBCMD]             = 0x00U,
  83         [OP_USBSTS]             = 0x04U,
  84         [OP_USBINTR]            = 0x08U,
  85         [OP_DEVICEADDR]         = 0x14U,
  86         [OP_ENDPTLISTADDR]      = 0x18U,
  87         [OP_TTCTRL]             = 0x1CU,
  88         [OP_BURSTSIZE]          = 0x20U,
  89         [OP_PORTSC]             = 0x44U,
  90         [OP_DEVLC]              = 0x84U,
  91         [OP_OTGSC]              = 0x64U,
  92         [OP_USBMODE]            = 0x68U,
  93         [OP_ENDPTSETUPSTAT]     = 0x6CU,
  94         [OP_ENDPTPRIME]         = 0x70U,
  95         [OP_ENDPTFLUSH]         = 0x74U,
  96         [OP_ENDPTSTAT]          = 0x78U,
  97         [OP_ENDPTCOMPLETE]      = 0x7CU,
  98         [OP_ENDPTCTRL]          = 0x80U,
  99 };
 100
 101 static const u8 ci_regs_lpm[] = {
 102         [CAP_CAPLENGTH]         = 0x00U,
 103         [CAP_HCCPARAMS]         = 0x08U,
 104         [CAP_DCCPARAMS]         = 0x24U,
 105         [CAP_TESTMODE]          = 0xFCU,
 106         [OP_USBCMD]             = 0x00U,
 107         [OP_USBSTS]             = 0x04U,
 108         [OP_USBINTR]            = 0x08U,
 109         [OP_DEVICEADDR]         = 0x14U,
 110         [OP_ENDPTLISTADDR]      = 0x18U,
 111         [OP_TTCTRL]             = 0x1CU,
 112         [OP_BURSTSIZE]          = 0x20U,
 113         [OP_PORTSC]             = 0x44U,
 114         [OP_DEVLC]              = 0x84U,
 115         [OP_OTGSC]              = 0xC4U,
 116         [OP_USBMODE]            = 0xC8U,
 117         [OP_ENDPTSETUPSTAT]     = 0xD8U,
 118         [OP_ENDPTPRIME]         = 0xDCU,
 119         [OP_ENDPTFLUSH]         = 0xE0U,
 120         [OP_ENDPTSTAT]          = 0xE4U,
 121         [OP_ENDPTCOMPLETE]      = 0xE8U,
 122         [OP_ENDPTCTRL]          = 0xECU,
 123 };
 124
 125 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
 126 {
 127         int i;
 128
 129         for (i = 0; i < OP_ENDPTCTRL; i++)
 130                 ci->hw_bank.regmap[i] =
 131                         (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
 132                         (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
 133
 134         for (; i <= OP_LAST; i++)
 135                 ci->hw_bank.regmap[i] = ci->hw_bank.op +
 136                         4 * (i - OP_ENDPTCTRL) +
 137                         (is_lpm
 138                          ? ci_regs_lpm[OP_ENDPTCTRL]
 139                          : ci_regs_nolpm[OP_ENDPTCTRL]);
 140
 141 }
 142
 143 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
 144 {
 145         int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
 146         enum ci_revision rev = CI_REVISION_UNKNOWN;
 147
 148         if (ver == 0x2) {
 149                 rev = hw_read_id_reg(ci, ID_ID, REVISION)
 150                         >> __ffs(REVISION);
 151                 rev += CI_REVISION_20;
 152         } else if (ver == 0x0) {
 153                 rev = CI_REVISION_1X;
 154         }
 155
 156         return rev;
 157 }
 158
 159 /**
 160  * hw_read_intr_enable: returns interrupt enable register
 161  *
 162  * @ci: the controller
 163  *
 164  * This function returns register data
 165  */
 166 u32 hw_read_intr_enable(struct ci_hdrc *ci)
 167 {
 168         return hw_read(ci, OP_USBINTR, ~0);
 169 }
 170
 171 /**
 172  * hw_read_intr_status: returns interrupt status register
 173  *
 174  * @ci: the controller
 175  *
 176  * This function returns register data
 177  */
 178 u32 hw_read_intr_status(struct ci_hdrc *ci)
 179 {
 180         return hw_read(ci, OP_USBSTS, ~0);
 181 }
 182
 183 /**
 184  * hw_port_test_set: writes port test mode (execute without interruption)
 185  * @mode: new value
 186  *
 187  * This function returns an error code
 188  */
 189 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
 190 {
 191         const u8 TEST_MODE_MAX = 7;
 192
 193         if (mode > TEST_MODE_MAX)
 194                 return -EINVAL;
 195
 196         hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
 197         return 0;
 198 }
 199
 200 /**
 201  * hw_port_test_get: reads port test mode value
 202  *
 203  * @ci: the controller
 204  *
 205  * This function returns port test mode value
 206  */
 207 u8 hw_port_test_get(struct ci_hdrc *ci)
 208 {
 209         return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
 210 }
 211
 212 static void hw_wait_phy_stable(void)
 213 {
 214         /*
 215          * The phy needs some delay to output the stable status from low
 216          * power mode. And for OTGSC, the status inputs are debounced
 217          * using a 1 ms time constant, so, delay 2ms for controller to get
 218          * the stable status, like vbus and id when the phy leaves low power.
 219          */
 220         usleep_range(2000, 2500);
 221 }
 222
 223 /* The PHY enters/leaves low power mode */
 224 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
 225 {
 226         enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
 227         bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
 228
 229         if (enable && !lpm)
 230                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
 231                                 PORTSC_PHCD(ci->hw_bank.lpm));
 232         else if (!enable && lpm)
 233                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
 234                                 0);
 235 }
 236
 237 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
 238 {
 239         u32 reg;
 240
 241         /* bank is a module variable */
 242         ci->hw_bank.abs = base;
 243
 244         ci->hw_bank.cap = ci->hw_bank.abs;
 245         ci->hw_bank.cap += ci->platdata->capoffset;
 246         ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
 247
 248         hw_alloc_regmap(ci, false);
 249         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
 250                 __ffs(HCCPARAMS_LEN);
 251         ci->hw_bank.lpm  = reg;
 252         if (reg)
 253                 hw_alloc_regmap(ci, !!reg);
 254         ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
 255         ci->hw_bank.size += OP_LAST;
 256         ci->hw_bank.size /= sizeof(u32);
 257
 258         reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
 259                 __ffs(DCCPARAMS_DEN);
 260         ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
 261
 262         if (ci->hw_ep_max > ENDPT_MAX)
 263                 return -ENODEV;
 264
 265         ci_hdrc_enter_lpm(ci, false);
 266
 267         /* Disable all interrupts bits */
 268         hw_write(ci, OP_USBINTR, 0xffffffff, 0);
 269
 270         /* Clear all interrupts status bits*/
 271         hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
 272
 273         ci->rev = ci_get_revision(ci);
 274
 275         dev_dbg(ci->dev,
 276                 "ChipIdea HDRC found, revision: %d, lpm: %d; cap: %p op: %p\n",
 277                 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
 278
 279         /* setup lock mode ? */
 280
 281         /* ENDPTSETUPSTAT is '0' by default */
 282
 283         /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
 284
 285         return 0;
 286 }
 287
 288 static void hw_phymode_configure(struct ci_hdrc *ci)
 289 {
 290         u32 portsc, lpm, sts = 0;
 291
 292         switch (ci->platdata->phy_mode) {
 293         case USBPHY_INTERFACE_MODE_UTMI:
 294                 portsc = PORTSC_PTS(PTS_UTMI);
 295                 lpm = DEVLC_PTS(PTS_UTMI);
 296                 break;
 297         case USBPHY_INTERFACE_MODE_UTMIW:
 298                 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
 299                 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
 300                 break;
 301         case USBPHY_INTERFACE_MODE_ULPI:
 302                 portsc = PORTSC_PTS(PTS_ULPI);
 303                 lpm = DEVLC_PTS(PTS_ULPI);
 304                 break;
 305         case USBPHY_INTERFACE_MODE_SERIAL:
 306                 portsc = PORTSC_PTS(PTS_SERIAL);
 307                 lpm = DEVLC_PTS(PTS_SERIAL);
 308                 sts = 1;
 309                 break;
 310         case USBPHY_INTERFACE_MODE_HSIC:
 311                 portsc = PORTSC_PTS(PTS_HSIC);
 312                 lpm = DEVLC_PTS(PTS_HSIC);
 313                 break;
 314         default:
 315                 return;
 316         }
 317
 318         if (ci->hw_bank.lpm) {
 319                 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
 320                 if (sts)
 321                         hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
 322         } else {
 323                 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
 324                 if (sts)
 325                         hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
 326         }
 327 }
 328
 329 /**
 330  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
 331  * interfaces
 332  * @ci: the controller
 333  *
 334  * This function returns an error code if the phy failed to init
 335  */
 336 static int _ci_usb_phy_init(struct ci_hdrc *ci)
 337 {
 338         int ret;
 339
 340         if (ci->phy) {
 341                 ret = phy_init(ci->phy);
 342                 if (ret)
 343                         return ret;
 344
 345                 ret = phy_power_on(ci->phy);
 346                 if (ret) {
 347                         phy_exit(ci->phy);
 348                         return ret;
 349                 }
 350         } else {
 351                 ret = usb_phy_init(ci->usb_phy);
 352         }
 353
 354         return ret;
 355 }
 356
 357 /**
 358  * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
 359  * interfaces
 360  * @ci: the controller
 361  */
 362 static void ci_usb_phy_exit(struct ci_hdrc *ci)
 363 {
 364         if (ci->phy) {
 365                 phy_power_off(ci->phy);
 366                 phy_exit(ci->phy);
 367         } else {
 368                 usb_phy_shutdown(ci->usb_phy);
 369         }
 370 }
 371
 372 /**
 373  * ci_usb_phy_init: initialize phy according to different phy type
 374  * @ci: the controller
 375  *
 376  * This function returns an error code if usb_phy_init has failed
 377  */
 378 static int ci_usb_phy_init(struct ci_hdrc *ci)
 379 {
 380         int ret;
 381
 382         switch (ci->platdata->phy_mode) {
 383         case USBPHY_INTERFACE_MODE_UTMI:
 384         case USBPHY_INTERFACE_MODE_UTMIW:
 385         case USBPHY_INTERFACE_MODE_HSIC:
 386                 ret = _ci_usb_phy_init(ci);
 387                 if (!ret)
 388                         hw_wait_phy_stable();
 389                 else
 390                         return ret;
 391                 hw_phymode_configure(ci);
 392                 break;
 393         case USBPHY_INTERFACE_MODE_ULPI:
 394         case USBPHY_INTERFACE_MODE_SERIAL:
 395                 hw_phymode_configure(ci);
 396                 ret = _ci_usb_phy_init(ci);
 397                 if (ret)
 398                         return ret;
 399                 break;
 400         default:
 401                 ret = _ci_usb_phy_init(ci);
 402                 if (!ret)
 403                         hw_wait_phy_stable();
 404         }
 405
 406         return ret;
 407 }
 408
 409
 410 /**
 411  * ci_platform_configure: do controller configure
 412  * @ci: the controller
 413  *
 414  */
 415 void ci_platform_configure(struct ci_hdrc *ci)
 416 {
 417         bool is_device_mode, is_host_mode;
 418
 419         is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
 420         is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
 421
 422         if (is_device_mode &&
 423                 (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING))
 424                 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
 425
 426         if (is_host_mode &&
 427                 (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING))
 428                 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
 429
 430         if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
 431                 if (ci->hw_bank.lpm)
 432                         hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
 433                 else
 434                         hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
 435         }
 436
 437         if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
 438                 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
 439
 440         hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
 441
 442         if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
 443                 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
 444                         ci->platdata->ahb_burst_config);
 445
 446         /* override burst size, take effect only when ahb_burst_config is 0 */
 447         if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
 448                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
 449                         hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
 450                         ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
 451
 452                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
 453                         hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
 454                                 ci->platdata->rx_burst_size);
 455         }
 456 }
 457
 458 /**
 459  * hw_controller_reset: do controller reset
 460  * @ci: the controller
 461   *
 462  * This function returns an error code
 463  */
 464 static int hw_controller_reset(struct ci_hdrc *ci)
 465 {
 466         int count = 0;
 467
 468         hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
 469         while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
 470                 udelay(10);
 471                 if (count++ > 1000)
 472                         return -ETIMEDOUT;
 473         }
 474
 475         return 0;
 476 }
 477
 478 /**
 479  * hw_device_reset: resets chip (execute without interruption)
 480  * @ci: the controller
 481  *
 482  * This function returns an error code
 483  */
 484 int hw_device_reset(struct ci_hdrc *ci)
 485 {
 486         int ret;
 487
 488         /* should flush & stop before reset */
 489         hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
 490         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
 491
 492         ret = hw_controller_reset(ci);
 493         if (ret) {
 494                 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
 495                 return ret;
 496         }
 497
 498         if (ci->platdata->notify_event)
 499                 ci->platdata->notify_event(ci,
 500                         CI_HDRC_CONTROLLER_RESET_EVENT);
 501
 502         /* USBMODE should be configured step by step */
 503         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
 504         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
 505         /* HW >= 2.3 */
 506         hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
 507
 508         if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
 509                 pr_err("cannot enter in %s device mode", ci_role(ci)->name);
 510                 pr_err("lpm = %i", ci->hw_bank.lpm);
 511                 return -ENODEV;
 512         }
 513
 514         ci_platform_configure(ci);
 515
 516         return 0;
 517 }
 518
 519 static irqreturn_t ci_irq_handler(int irq, void *data)
 520 {
 521         struct ci_hdrc *ci = data;
 522         irqreturn_t ret = IRQ_NONE;
 523         u32 otgsc = 0;
 524
 525         if (ci->in_lpm) {
 526                 disable_irq_nosync(irq);
 527                 ci->wakeup_int = true;
 528                 pm_runtime_get(ci->dev);
 529                 return IRQ_HANDLED;
 530         }
 531
 532         if (ci->is_otg) {
 533                 otgsc = hw_read_otgsc(ci, ~0);
 534                 if (ci_otg_is_fsm_mode(ci)) {
 535                         ret = ci_otg_fsm_irq(ci);
 536                         if (ret == IRQ_HANDLED)
 537                                 return ret;
 538                 }
 539         }
 540
 541         /*
 542          * Handle id change interrupt, it indicates device/host function
 543          * switch.
 544          */
 545         if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
 546                 ci->id_event = true;
 547                 /* Clear ID change irq status */
 548                 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
 549                 ci_otg_queue_work(ci);
 550                 return IRQ_HANDLED;
 551         }
 552
 553         /*
 554          * Handle vbus change interrupt, it indicates device connection
 555          * and disconnection events.
 556          */
 557         if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
 558                 ci->b_sess_valid_event = true;
 559                 /* Clear BSV irq */
 560                 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
 561                 ci_otg_queue_work(ci);
 562                 return IRQ_HANDLED;
 563         }
 564
 565         /* Handle device/host interrupt */
 566         if (ci->role != CI_ROLE_END)
 567                 ret = ci_role(ci)->irq(ci);
 568
 569         return ret;
 570 }
 571
 572 static void ci_irq(struct ci_hdrc *ci)
 573 {
 574         unsigned long flags;
 575
 576         local_irq_save(flags);
 577         ci_irq_handler(ci->irq, ci);
 578         local_irq_restore(flags);
 579 }
 580
 581 static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event,
 582                             void *ptr)
 583 {
 584         struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
 585         struct ci_hdrc *ci = vbus->ci;
 586
 587         if (event)
 588                 vbus->state = true;
 589         else
 590                 vbus->state = false;
 591
 592         vbus->changed = true;
 593
 594         ci_irq(ci);
 595         return NOTIFY_DONE;
 596 }
 597
 598 static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
 599                           void *ptr)
 600 {
 601         struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb);
 602         struct ci_hdrc *ci = id->ci;
 603
 604         if (event)
 605                 id->state = false;
 606         else
 607                 id->state = true;
 608
 609         id->changed = true;
 610
 611         ci_irq(ci);
 612         return NOTIFY_DONE;
 613 }
 614
 615 static int ci_get_platdata(struct device *dev,
 616                 struct ci_hdrc_platform_data *platdata)
 617 {
 618         struct extcon_dev *ext_vbus, *ext_id;
 619         struct ci_hdrc_cable *cable;
 620         int ret;
 621
 622         if (!platdata->phy_mode)
 623                 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
 624
 625         if (!platdata->dr_mode)
 626                 platdata->dr_mode = usb_get_dr_mode(dev);
 627
 628         if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
 629                 platdata->dr_mode = USB_DR_MODE_OTG;
 630
 631         if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
 632                 /* Get the vbus regulator */
 633                 platdata->reg_vbus = devm_regulator_get(dev, "vbus");
 634                 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
 635                         return -EPROBE_DEFER;
 636                 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
 637                         /* no vbus regulator is needed */
 638                         platdata->reg_vbus = NULL;
 639                 } else if (IS_ERR(platdata->reg_vbus)) {
 640                         dev_err(dev, "Getting regulator error: %ld\n",
 641                                 PTR_ERR(platdata->reg_vbus));
 642                         return PTR_ERR(platdata->reg_vbus);
 643                 }
 644                 /* Get TPL support */
 645                 if (!platdata->tpl_support)
 646                         platdata->tpl_support =
 647                                 of_usb_host_tpl_support(dev->of_node);
 648         }
 649
 650         if (platdata->dr_mode == USB_DR_MODE_OTG) {
 651                 /* We can support HNP and SRP of OTG 2.0 */
 652                 platdata->ci_otg_caps.otg_rev = 0x0200;
 653                 platdata->ci_otg_caps.hnp_support = true;
 654                 platdata->ci_otg_caps.srp_support = true;
 655
 656                 /* Update otg capabilities by DT properties */
 657                 ret = of_usb_update_otg_caps(dev->of_node,
 658                                         &platdata->ci_otg_caps);
 659                 if (ret)
 660                         return ret;
 661         }
 662
 663         if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
 664                 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
 665
 666         of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
 667                                      &platdata->phy_clkgate_delay_us);
 668
 669         platdata->itc_setting = 1;
 670
 671         of_property_read_u32(dev->of_node, "itc-setting",
 672                                         &platdata->itc_setting);
 673
 674         ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
 675                                 &platdata->ahb_burst_config);
 676         if (!ret) {
 677                 platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
 678         } else if (ret != -EINVAL) {
 679                 dev_err(dev, "failed to get ahb-burst-config\n");
 680                 return ret;
 681         }
 682
 683         ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
 684                                 &platdata->tx_burst_size);
 685         if (!ret) {
 686                 platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
 687         } else if (ret != -EINVAL) {
 688                 dev_err(dev, "failed to get tx-burst-size-dword\n");
 689                 return ret;
 690         }
 691
 692         ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
 693                                 &platdata->rx_burst_size);
 694         if (!ret) {
 695                 platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
 696         } else if (ret != -EINVAL) {
 697                 dev_err(dev, "failed to get rx-burst-size-dword\n");
 698                 return ret;
 699         }
 700
 701         if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
 702                 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
 703
 704         ext_id = ERR_PTR(-ENODEV);
 705         ext_vbus = ERR_PTR(-ENODEV);
 706         if (of_property_read_bool(dev->of_node, "extcon")) {
 707                 /* Each one of them is not mandatory */
 708                 ext_vbus = extcon_get_edev_by_phandle(dev, 0);
 709                 if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
 710                         return PTR_ERR(ext_vbus);
 711
 712                 ext_id = extcon_get_edev_by_phandle(dev, 1);
 713                 if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
 714                         return PTR_ERR(ext_id);
 715         }
 716
 717         cable = &platdata->vbus_extcon;
 718         cable->nb.notifier_call = ci_vbus_notifier;
 719         cable->edev = ext_vbus;
 720
 721         if (!IS_ERR(ext_vbus)) {
 722                 ret = extcon_get_cable_state_(cable->edev, EXTCON_USB);
 723                 if (ret)
 724                         cable->state = true;
 725                 else
 726                         cable->state = false;
 727         }
 728
 729         cable = &platdata->id_extcon;
 730         cable->nb.notifier_call = ci_id_notifier;
 731         cable->edev = ext_id;
 732
 733         if (!IS_ERR(ext_id)) {
 734                 ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST);
 735                 if (ret)
 736                         cable->state = false;
 737                 else
 738                         cable->state = true;
 739         }
 740         return 0;
 741 }
 742
 743 static int ci_extcon_register(struct ci_hdrc *ci)
 744 {
 745         struct ci_hdrc_cable *id, *vbus;
 746         int ret;
 747
 748         id = &ci->platdata->id_extcon;
 749         id->ci = ci;
 750         if (!IS_ERR(id->edev)) {
 751                 ret = extcon_register_notifier(id->edev, EXTCON_USB_HOST,
 752                                                &id->nb);
 753                 if (ret < 0) {
 754                         dev_err(ci->dev, "register ID failed\n");
 755                         return ret;
 756                 }
 757         }
 758
 759         vbus = &ci->platdata->vbus_extcon;
 760         vbus->ci = ci;
 761         if (!IS_ERR(vbus->edev)) {
 762                 ret = extcon_register_notifier(vbus->edev, EXTCON_USB,
 763                                                &vbus->nb);
 764                 if (ret < 0) {
 765                         extcon_unregister_notifier(id->edev, EXTCON_USB_HOST,
 766                                                    &id->nb);
 767                         dev_err(ci->dev, "register VBUS failed\n");
 768                         return ret;
 769                 }
 770         }
 771
 772         return 0;
 773 }
 774
 775 static void ci_extcon_unregister(struct ci_hdrc *ci)
 776 {
 777         struct ci_hdrc_cable *cable;
 778
 779         cable = &ci->platdata->id_extcon;
 780         if (!IS_ERR(cable->edev))
 781                 extcon_unregister_notifier(cable->edev, EXTCON_USB_HOST,
 782                                            &cable->nb);
 783
 784         cable = &ci->platdata->vbus_extcon;
 785         if (!IS_ERR(cable->edev))
 786                 extcon_unregister_notifier(cable->edev, EXTCON_USB, &cable->nb);
 787 }
 788
 789 static DEFINE_IDA(ci_ida);
 790
 791 struct platform_device *ci_hdrc_add_device(struct device *dev,
 792                         struct resource *res, int nres,
 793                         struct ci_hdrc_platform_data *platdata)
 794 {
 795         struct platform_device *pdev;
 796         int id, ret;
 797
 798         ret = ci_get_platdata(dev, platdata);
 799         if (ret)
 800                 return ERR_PTR(ret);
 801
 802         id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
 803         if (id < 0)
 804                 return ERR_PTR(id);
 805
 806         pdev = platform_device_alloc("ci_hdrc", id);
 807         if (!pdev) {
 808                 ret = -ENOMEM;
 809                 goto put_id;
 810         }
 811
 812         pdev->dev.parent = dev;
 813         pdev->dev.dma_mask = dev->dma_mask;
 814         pdev->dev.dma_parms = dev->dma_parms;
 815         dma_set_coherent_mask(&pdev->dev, dev->coherent_dma_mask);
 816
 817         ret = platform_device_add_resources(pdev, res, nres);
 818         if (ret)
 819                 goto err;
 820
 821         ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
 822         if (ret)
 823                 goto err;
 824
 825         ret = platform_device_add(pdev);
 826         if (ret)
 827                 goto err;
 828
 829         return pdev;
 830
 831 err:
 832         platform_device_put(pdev);
 833 put_id:
 834         ida_simple_remove(&ci_ida, id);
 835         return ERR_PTR(ret);
 836 }
 837 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
 838
 839 void ci_hdrc_remove_device(struct platform_device *pdev)
 840 {
 841         int id = pdev->id;
 842         platform_device_unregister(pdev);
 843         ida_simple_remove(&ci_ida, id);
 844 }
 845 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
 846
 847 static inline void ci_role_destroy(struct ci_hdrc *ci)
 848 {
 849         ci_hdrc_gadget_destroy(ci);
 850         ci_hdrc_host_destroy(ci);
 851         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
 852                 ci_hdrc_otg_destroy(ci);
 853 }
 854
 855 static void ci_get_otg_capable(struct ci_hdrc *ci)
 856 {
 857         if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
 858                 ci->is_otg = false;
 859         else
 860                 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
 861                                 DCCPARAMS_DC | DCCPARAMS_HC)
 862                                         == (DCCPARAMS_DC | DCCPARAMS_HC));
 863         if (ci->is_otg) {
 864                 dev_dbg(ci->dev, "It is OTG capable controller\n");
 865                 /* Disable and clear all OTG irq */
 866                 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
 867                                                         OTGSC_INT_STATUS_BITS);
 868         }
 869 }
 870
 871 static int ci_hdrc_probe(struct platform_device *pdev)
 872 {
 873         struct device   *dev = &pdev->dev;
 874         struct ci_hdrc  *ci;
 875         struct resource *res;
 876         void __iomem    *base;
 877         int             ret;
 878         enum usb_dr_mode dr_mode;
 879
 880         if (!dev_get_platdata(dev)) {
 881                 dev_err(dev, "platform data missing\n");
 882                 return -ENODEV;
 883         }
 884
 885         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 886         base = devm_ioremap_resource(dev, res);
 887         if (IS_ERR(base))
 888                 return PTR_ERR(base);
 889
 890         ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
 891         if (!ci)
 892                 return -ENOMEM;
 893
 894         spin_lock_init(&ci->lock);
 895         ci->dev = dev;
 896         ci->platdata = dev_get_platdata(dev);
 897         ci->imx28_write_fix = !!(ci->platdata->flags &
 898                 CI_HDRC_IMX28_WRITE_FIX);
 899         ci->supports_runtime_pm = !!(ci->platdata->flags &
 900                 CI_HDRC_SUPPORTS_RUNTIME_PM);
 901
 902         ret = hw_device_init(ci, base);
 903         if (ret < 0) {
 904                 dev_err(dev, "can't initialize hardware\n");
 905                 return -ENODEV;
 906         }
 907
 908         if (ci->platdata->phy) {
 909                 ci->phy = ci->platdata->phy;
 910         } else if (ci->platdata->usb_phy) {
 911                 ci->usb_phy = ci->platdata->usb_phy;
 912         } else {
 913                 ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent, "phys",
 914                                                           0);
 915                 ci->phy = devm_phy_get(dev->parent, "usb-phy");
 916
 917                 /* Fallback to grabbing any registered USB2 PHY */
 918                 if (IS_ERR(ci->usb_phy) &&
 919                     PTR_ERR(ci->usb_phy) != -EPROBE_DEFER)
 920                         ci->usb_phy = devm_usb_get_phy(dev->parent,
 921                                                        USB_PHY_TYPE_USB2);
 922
 923                 /* if both generic PHY and USB PHY layers aren't enabled */
 924                 if (PTR_ERR(ci->phy) == -ENOSYS &&
 925                                 PTR_ERR(ci->usb_phy) == -ENXIO)
 926                         return -ENXIO;
 927
 928                 if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
 929                         return -EPROBE_DEFER;
 930
 931                 if (IS_ERR(ci->phy))
 932                         ci->phy = NULL;
 933                 else if (IS_ERR(ci->usb_phy))
 934                         ci->usb_phy = NULL;
 935         }
 936
 937         ret = ci_usb_phy_init(ci);
 938         if (ret) {
 939                 dev_err(dev, "unable to init phy: %d\n", ret);
 940                 return ret;
 941         }
 942
 943         ci->hw_bank.phys = res->start;
 944
 945         ci->irq = platform_get_irq(pdev, 0);
 946         if (ci->irq < 0) {
 947                 dev_err(dev, "missing IRQ\n");
 948                 ret = ci->irq;
 949                 goto deinit_phy;
 950         }
 951
 952         ci_get_otg_capable(ci);
 953
 954         dr_mode = ci->platdata->dr_mode;
 955         /* initialize role(s) before the interrupt is requested */
 956         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
 957                 ret = ci_hdrc_host_init(ci);
 958                 if (ret) {
 959                         if (ret == -ENXIO)
 960                                 dev_info(dev, "doesn't support host\n");
 961                         else
 962                                 goto deinit_phy;
 963                 }
 964         }
 965
 966         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
 967                 ret = ci_hdrc_gadget_init(ci);
 968                 if (ret) {
 969                         if (ret == -ENXIO)
 970                                 dev_info(dev, "doesn't support gadget\n");
 971                         else
 972                                 goto deinit_host;
 973                 }
 974         }
 975
 976         if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
 977                 dev_err(dev, "no supported roles\n");
 978                 ret = -ENODEV;
 979                 goto deinit_gadget;
 980         }
 981
 982         if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
 983                 ret = ci_hdrc_otg_init(ci);
 984                 if (ret) {
 985                         dev_err(dev, "init otg fails, ret = %d\n", ret);
 986                         goto deinit_gadget;
 987                 }
 988         }
 989
 990         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
 991                 if (ci->is_otg) {
 992                         ci->role = ci_otg_role(ci);
 993                         /* Enable ID change irq */
 994                         hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
 995                 } else {
 996                         /*
 997                          * If the controller is not OTG capable, but support
 998                          * role switch, the defalt role is gadget, and the
 999                          * user can switch it through debugfs.
1000                          */
1001                         ci->role = CI_ROLE_GADGET;
1002                 }
1003         } else {
1004                 ci->role = ci->roles[CI_ROLE_HOST]
1005                         ? CI_ROLE_HOST
1006                         : CI_ROLE_GADGET;
1007         }
1008
1009         if (!ci_otg_is_fsm_mode(ci)) {
1010                 /* only update vbus status for peripheral */
1011                 if (ci->role == CI_ROLE_GADGET)
1012                         ci_handle_vbus_change(ci);
1013
1014                 ret = ci_role_start(ci, ci->role);
1015                 if (ret) {
1016                         dev_err(dev, "can't start %s role\n",
1017                                                 ci_role(ci)->name);
1018                         goto stop;
1019                 }
1020         }
1021
1022         platform_set_drvdata(pdev, ci);
1023         ret = devm_request_irq(dev, ci->irq, ci_irq_handler, IRQF_SHARED,
1024                         ci->platdata->name, ci);
1025         if (ret)
1026                 goto stop;
1027
1028         ret = ci_extcon_register(ci);
1029         if (ret)
1030                 goto stop;
1031
1032         if (ci->supports_runtime_pm) {
1033                 pm_runtime_set_active(&pdev->dev);
1034                 pm_runtime_enable(&pdev->dev);
1035                 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1036                 pm_runtime_mark_last_busy(ci->dev);
1037                 pm_runtime_use_autosuspend(&pdev->dev);
1038         }
1039
1040         if (ci_otg_is_fsm_mode(ci))
1041                 ci_hdrc_otg_fsm_start(ci);
1042
1043         device_set_wakeup_capable(&pdev->dev, true);
1044
1045         ret = dbg_create_files(ci);
1046         if (!ret)
1047                 return 0;
1048
1049         ci_extcon_unregister(ci);
1050 stop:
1051         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1052                 ci_hdrc_otg_destroy(ci);
1053 deinit_gadget:
1054         ci_hdrc_gadget_destroy(ci);
1055 deinit_host:
1056         ci_hdrc_host_destroy(ci);
1057 deinit_phy:
1058         ci_usb_phy_exit(ci);
1059
1060         return ret;
1061 }
1062
1063 static int ci_hdrc_remove(struct platform_device *pdev)
1064 {
1065         struct ci_hdrc *ci = platform_get_drvdata(pdev);
1066
1067         if (ci->supports_runtime_pm) {
1068                 pm_runtime_get_sync(&pdev->dev);
1069                 pm_runtime_disable(&pdev->dev);
1070                 pm_runtime_put_noidle(&pdev->dev);
1071         }
1072
1073         dbg_remove_files(ci);
1074         ci_extcon_unregister(ci);
1075         ci_role_destroy(ci);
1076         ci_hdrc_enter_lpm(ci, true);
1077         ci_usb_phy_exit(ci);
1078
1079         return 0;
1080 }
1081
1082 #ifdef CONFIG_PM
1083 /* Prepare wakeup by SRP before suspend */
1084 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1085 {
1086         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1087                                 !hw_read_otgsc(ci, OTGSC_ID)) {
1088                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1089                                                                 PORTSC_PP);
1090                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1091                                                                 PORTSC_WKCN);
1092         }
1093 }
1094
1095 /* Handle SRP when wakeup by data pulse */
1096 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1097 {
1098         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1099                 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1100                 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1101                         ci->fsm.a_srp_det = 1;
1102                         ci->fsm.a_bus_drop = 0;
1103                 } else {
1104                         ci->fsm.id = 1;
1105                 }
1106                 ci_otg_queue_work(ci);
1107         }
1108 }
1109
1110 static void ci_controller_suspend(struct ci_hdrc *ci)
1111 {
1112         disable_irq(ci->irq);
1113         ci_hdrc_enter_lpm(ci, true);
1114         if (ci->platdata->phy_clkgate_delay_us)
1115                 usleep_range(ci->platdata->phy_clkgate_delay_us,
1116                              ci->platdata->phy_clkgate_delay_us + 50);
1117         usb_phy_set_suspend(ci->usb_phy, 1);
1118         ci->in_lpm = true;
1119         enable_irq(ci->irq);
1120 }
1121
1122 /*
1123  * Handle the wakeup interrupt triggered by extcon connector
1124  * We need to call ci_irq again for extcon since the first
1125  * interrupt (wakeup int) only let the controller be out of
1126  * low power mode, but not handle any interrupts.
1127  */
1128 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1129 {
1130         struct ci_hdrc_cable *cable_id, *cable_vbus;
1131         u32 otgsc = hw_read_otgsc(ci, ~0);
1132
1133         cable_id = &ci->platdata->id_extcon;
1134         cable_vbus = &ci->platdata->vbus_extcon;
1135
1136         if (!IS_ERR(cable_id->edev) && ci->is_otg &&
1137                 (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS))
1138                 ci_irq(ci);
1139
1140         if (!IS_ERR(cable_vbus->edev) && ci->is_otg &&
1141                 (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS))
1142                 ci_irq(ci);
1143 }
1144
1145 static int ci_controller_resume(struct device *dev)
1146 {
1147         struct ci_hdrc *ci = dev_get_drvdata(dev);
1148
1149         dev_dbg(dev, "at %s\n", __func__);
1150
1151         if (!ci->in_lpm) {
1152                 WARN_ON(1);
1153                 return 0;
1154         }
1155
1156         ci_hdrc_enter_lpm(ci, false);
1157         if (ci->usb_phy) {
1158                 usb_phy_set_suspend(ci->usb_phy, 0);
1159                 usb_phy_set_wakeup(ci->usb_phy, false);
1160                 hw_wait_phy_stable();
1161         }
1162
1163         ci->in_lpm = false;
1164         if (ci->wakeup_int) {
1165                 ci->wakeup_int = false;
1166                 pm_runtime_mark_last_busy(ci->dev);
1167                 pm_runtime_put_autosuspend(ci->dev);
1168                 enable_irq(ci->irq);
1169                 if (ci_otg_is_fsm_mode(ci))
1170                         ci_otg_fsm_wakeup_by_srp(ci);
1171                 ci_extcon_wakeup_int(ci);
1172         }
1173
1174         return 0;
1175 }
1176
1177 #ifdef CONFIG_PM_SLEEP
1178 static int ci_suspend(struct device *dev)
1179 {
1180         struct ci_hdrc *ci = dev_get_drvdata(dev);
1181
1182         if (ci->wq)
1183                 flush_workqueue(ci->wq);
1184         /*
1185          * Controller needs to be active during suspend, otherwise the core
1186          * may run resume when the parent is at suspend if other driver's
1187          * suspend fails, it occurs before parent's suspend has not started,
1188          * but the core suspend has finished.
1189          */
1190         if (ci->in_lpm)
1191                 pm_runtime_resume(dev);
1192
1193         if (ci->in_lpm) {
1194                 WARN_ON(1);
1195                 return 0;
1196         }
1197
1198         if (device_may_wakeup(dev)) {
1199                 if (ci_otg_is_fsm_mode(ci))
1200                         ci_otg_fsm_suspend_for_srp(ci);
1201
1202                 usb_phy_set_wakeup(ci->usb_phy, true);
1203                 enable_irq_wake(ci->irq);
1204         }
1205
1206         ci_controller_suspend(ci);
1207
1208         return 0;
1209 }
1210
1211 static int ci_resume(struct device *dev)
1212 {
1213         struct ci_hdrc *ci = dev_get_drvdata(dev);
1214         int ret;
1215
1216         if (device_may_wakeup(dev))
1217                 disable_irq_wake(ci->irq);
1218
1219         ret = ci_controller_resume(dev);
1220         if (ret)
1221                 return ret;
1222
1223         if (ci->supports_runtime_pm) {
1224                 pm_runtime_disable(dev);
1225                 pm_runtime_set_active(dev);
1226                 pm_runtime_enable(dev);
1227         }
1228
1229         return ret;
1230 }
1231 #endif /* CONFIG_PM_SLEEP */
1232
1233 static int ci_runtime_suspend(struct device *dev)
1234 {
1235         struct ci_hdrc *ci = dev_get_drvdata(dev);
1236
1237         dev_dbg(dev, "at %s\n", __func__);
1238
1239         if (ci->in_lpm) {
1240                 WARN_ON(1);
1241                 return 0;
1242         }
1243
1244         if (ci_otg_is_fsm_mode(ci))
1245                 ci_otg_fsm_suspend_for_srp(ci);
1246
1247         usb_phy_set_wakeup(ci->usb_phy, true);
1248         ci_controller_suspend(ci);
1249
1250         return 0;
1251 }
1252
1253 static int ci_runtime_resume(struct device *dev)
1254 {
1255         return ci_controller_resume(dev);
1256 }
1257
1258 #endif /* CONFIG_PM */
1259 static const struct dev_pm_ops ci_pm_ops = {
1260         SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1261         SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1262 };
1263
1264 static struct platform_driver ci_hdrc_driver = {
1265         .probe  = ci_hdrc_probe,
1266         .remove = ci_hdrc_remove,
1267         .driver = {
1268                 .name   = "ci_hdrc",
1269                 .pm     = &ci_pm_ops,
1270         },
1271 };
1272
1273 static int __init ci_hdrc_platform_register(void)
1274 {
1275         ci_hdrc_host_driver_init();
1276         return platform_driver_register(&ci_hdrc_driver);
1277 }
1278 module_init(ci_hdrc_platform_register);
1279
1280 static void __exit ci_hdrc_platform_unregister(void)
1281 {
1282         platform_driver_unregister(&ci_hdrc_driver);
1283 }
1284 module_exit(ci_hdrc_platform_unregister);
1285
1286 MODULE_ALIAS("platform:ci_hdrc");
1287 MODULE_LICENSE("GPL v2");
1288 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1289 MODULE_DESCRIPTION("ChipIdea HDRC Driver");