GNU Linux-libre 5.10.153-gnu1
[releases.git] / drivers / usb / chipidea / core.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * core.c - ChipIdea USB IP core family device controller
4  *
5  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6  * Copyright (C) 2020 NXP
7  *
8  * Author: David Lopo
9  *         Peter Chen <peter.chen@nxp.com>
10  *
11  * Main Features:
12  * - Four transfers are supported, usbtest is passed
13  * - USB Certification for gadget: CH9 and Mass Storage are passed
14  * - Low power mode
15  * - USB wakeup
16  */
17 #include <linux/delay.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/extcon.h>
21 #include <linux/phy/phy.h>
22 #include <linux/platform_device.h>
23 #include <linux/module.h>
24 #include <linux/idr.h>
25 #include <linux/interrupt.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/pinctrl/consumer.h>
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h>
33 #include <linux/usb/otg.h>
34 #include <linux/usb/chipidea.h>
35 #include <linux/usb/of.h>
36 #include <linux/of.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/usb/ehci_def.h>
39
40 #include "ci.h"
41 #include "udc.h"
42 #include "bits.h"
43 #include "host.h"
44 #include "otg.h"
45 #include "otg_fsm.h"
46
47 /* Controller register map */
48 static const u8 ci_regs_nolpm[] = {
49         [CAP_CAPLENGTH]         = 0x00U,
50         [CAP_HCCPARAMS]         = 0x08U,
51         [CAP_DCCPARAMS]         = 0x24U,
52         [CAP_TESTMODE]          = 0x38U,
53         [OP_USBCMD]             = 0x00U,
54         [OP_USBSTS]             = 0x04U,
55         [OP_USBINTR]            = 0x08U,
56         [OP_DEVICEADDR]         = 0x14U,
57         [OP_ENDPTLISTADDR]      = 0x18U,
58         [OP_TTCTRL]             = 0x1CU,
59         [OP_BURSTSIZE]          = 0x20U,
60         [OP_ULPI_VIEWPORT]      = 0x30U,
61         [OP_PORTSC]             = 0x44U,
62         [OP_DEVLC]              = 0x84U,
63         [OP_OTGSC]              = 0x64U,
64         [OP_USBMODE]            = 0x68U,
65         [OP_ENDPTSETUPSTAT]     = 0x6CU,
66         [OP_ENDPTPRIME]         = 0x70U,
67         [OP_ENDPTFLUSH]         = 0x74U,
68         [OP_ENDPTSTAT]          = 0x78U,
69         [OP_ENDPTCOMPLETE]      = 0x7CU,
70         [OP_ENDPTCTRL]          = 0x80U,
71 };
72
73 static const u8 ci_regs_lpm[] = {
74         [CAP_CAPLENGTH]         = 0x00U,
75         [CAP_HCCPARAMS]         = 0x08U,
76         [CAP_DCCPARAMS]         = 0x24U,
77         [CAP_TESTMODE]          = 0xFCU,
78         [OP_USBCMD]             = 0x00U,
79         [OP_USBSTS]             = 0x04U,
80         [OP_USBINTR]            = 0x08U,
81         [OP_DEVICEADDR]         = 0x14U,
82         [OP_ENDPTLISTADDR]      = 0x18U,
83         [OP_TTCTRL]             = 0x1CU,
84         [OP_BURSTSIZE]          = 0x20U,
85         [OP_ULPI_VIEWPORT]      = 0x30U,
86         [OP_PORTSC]             = 0x44U,
87         [OP_DEVLC]              = 0x84U,
88         [OP_OTGSC]              = 0xC4U,
89         [OP_USBMODE]            = 0xC8U,
90         [OP_ENDPTSETUPSTAT]     = 0xD8U,
91         [OP_ENDPTPRIME]         = 0xDCU,
92         [OP_ENDPTFLUSH]         = 0xE0U,
93         [OP_ENDPTSTAT]          = 0xE4U,
94         [OP_ENDPTCOMPLETE]      = 0xE8U,
95         [OP_ENDPTCTRL]          = 0xECU,
96 };
97
98 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
99 {
100         int i;
101
102         for (i = 0; i < OP_ENDPTCTRL; i++)
103                 ci->hw_bank.regmap[i] =
104                         (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
105                         (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
106
107         for (; i <= OP_LAST; i++)
108                 ci->hw_bank.regmap[i] = ci->hw_bank.op +
109                         4 * (i - OP_ENDPTCTRL) +
110                         (is_lpm
111                          ? ci_regs_lpm[OP_ENDPTCTRL]
112                          : ci_regs_nolpm[OP_ENDPTCTRL]);
113
114 }
115
116 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
117 {
118         int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
119         enum ci_revision rev = CI_REVISION_UNKNOWN;
120
121         if (ver == 0x2) {
122                 rev = hw_read_id_reg(ci, ID_ID, REVISION)
123                         >> __ffs(REVISION);
124                 rev += CI_REVISION_20;
125         } else if (ver == 0x0) {
126                 rev = CI_REVISION_1X;
127         }
128
129         return rev;
130 }
131
132 /**
133  * hw_read_intr_enable: returns interrupt enable register
134  *
135  * @ci: the controller
136  *
137  * This function returns register data
138  */
139 u32 hw_read_intr_enable(struct ci_hdrc *ci)
140 {
141         return hw_read(ci, OP_USBINTR, ~0);
142 }
143
144 /**
145  * hw_read_intr_status: returns interrupt status register
146  *
147  * @ci: the controller
148  *
149  * This function returns register data
150  */
151 u32 hw_read_intr_status(struct ci_hdrc *ci)
152 {
153         return hw_read(ci, OP_USBSTS, ~0);
154 }
155
156 /**
157  * hw_port_test_set: writes port test mode (execute without interruption)
158  * @ci: the controller
159  * @mode: new value
160  *
161  * This function returns an error code
162  */
163 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
164 {
165         const u8 TEST_MODE_MAX = 7;
166
167         if (mode > TEST_MODE_MAX)
168                 return -EINVAL;
169
170         hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
171         return 0;
172 }
173
174 /**
175  * hw_port_test_get: reads port test mode value
176  *
177  * @ci: the controller
178  *
179  * This function returns port test mode value
180  */
181 u8 hw_port_test_get(struct ci_hdrc *ci)
182 {
183         return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
184 }
185
186 static void hw_wait_phy_stable(void)
187 {
188         /*
189          * The phy needs some delay to output the stable status from low
190          * power mode. And for OTGSC, the status inputs are debounced
191          * using a 1 ms time constant, so, delay 2ms for controller to get
192          * the stable status, like vbus and id when the phy leaves low power.
193          */
194         usleep_range(2000, 2500);
195 }
196
197 /* The PHY enters/leaves low power mode */
198 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
199 {
200         enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
201         bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
202
203         if (enable && !lpm)
204                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
205                                 PORTSC_PHCD(ci->hw_bank.lpm));
206         else if (!enable && lpm)
207                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
208                                 0);
209 }
210
211 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
212 {
213         u32 reg;
214
215         /* bank is a module variable */
216         ci->hw_bank.abs = base;
217
218         ci->hw_bank.cap = ci->hw_bank.abs;
219         ci->hw_bank.cap += ci->platdata->capoffset;
220         ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
221
222         hw_alloc_regmap(ci, false);
223         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
224                 __ffs(HCCPARAMS_LEN);
225         ci->hw_bank.lpm  = reg;
226         if (reg)
227                 hw_alloc_regmap(ci, !!reg);
228         ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
229         ci->hw_bank.size += OP_LAST;
230         ci->hw_bank.size /= sizeof(u32);
231
232         reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
233                 __ffs(DCCPARAMS_DEN);
234         ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
235
236         if (ci->hw_ep_max > ENDPT_MAX)
237                 return -ENODEV;
238
239         ci_hdrc_enter_lpm(ci, false);
240
241         /* Disable all interrupts bits */
242         hw_write(ci, OP_USBINTR, 0xffffffff, 0);
243
244         /* Clear all interrupts status bits*/
245         hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
246
247         ci->rev = ci_get_revision(ci);
248
249         dev_dbg(ci->dev,
250                 "revision: %d, lpm: %d; cap: %px op: %px\n",
251                 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
252
253         /* setup lock mode ? */
254
255         /* ENDPTSETUPSTAT is '0' by default */
256
257         /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
258
259         return 0;
260 }
261
262 void hw_phymode_configure(struct ci_hdrc *ci)
263 {
264         u32 portsc, lpm, sts = 0;
265
266         switch (ci->platdata->phy_mode) {
267         case USBPHY_INTERFACE_MODE_UTMI:
268                 portsc = PORTSC_PTS(PTS_UTMI);
269                 lpm = DEVLC_PTS(PTS_UTMI);
270                 break;
271         case USBPHY_INTERFACE_MODE_UTMIW:
272                 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
273                 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
274                 break;
275         case USBPHY_INTERFACE_MODE_ULPI:
276                 portsc = PORTSC_PTS(PTS_ULPI);
277                 lpm = DEVLC_PTS(PTS_ULPI);
278                 break;
279         case USBPHY_INTERFACE_MODE_SERIAL:
280                 portsc = PORTSC_PTS(PTS_SERIAL);
281                 lpm = DEVLC_PTS(PTS_SERIAL);
282                 sts = 1;
283                 break;
284         case USBPHY_INTERFACE_MODE_HSIC:
285                 portsc = PORTSC_PTS(PTS_HSIC);
286                 lpm = DEVLC_PTS(PTS_HSIC);
287                 break;
288         default:
289                 return;
290         }
291
292         if (ci->hw_bank.lpm) {
293                 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
294                 if (sts)
295                         hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
296         } else {
297                 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
298                 if (sts)
299                         hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
300         }
301 }
302 EXPORT_SYMBOL_GPL(hw_phymode_configure);
303
304 /**
305  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
306  * interfaces
307  * @ci: the controller
308  *
309  * This function returns an error code if the phy failed to init
310  */
311 static int _ci_usb_phy_init(struct ci_hdrc *ci)
312 {
313         int ret;
314
315         if (ci->phy) {
316                 ret = phy_init(ci->phy);
317                 if (ret)
318                         return ret;
319
320                 ret = phy_power_on(ci->phy);
321                 if (ret) {
322                         phy_exit(ci->phy);
323                         return ret;
324                 }
325         } else {
326                 ret = usb_phy_init(ci->usb_phy);
327         }
328
329         return ret;
330 }
331
332 /**
333  * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
334  * interfaces
335  * @ci: the controller
336  */
337 static void ci_usb_phy_exit(struct ci_hdrc *ci)
338 {
339         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
340                 return;
341
342         if (ci->phy) {
343                 phy_power_off(ci->phy);
344                 phy_exit(ci->phy);
345         } else {
346                 usb_phy_shutdown(ci->usb_phy);
347         }
348 }
349
350 /**
351  * ci_usb_phy_init: initialize phy according to different phy type
352  * @ci: the controller
353  *
354  * This function returns an error code if usb_phy_init has failed
355  */
356 static int ci_usb_phy_init(struct ci_hdrc *ci)
357 {
358         int ret;
359
360         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
361                 return 0;
362
363         switch (ci->platdata->phy_mode) {
364         case USBPHY_INTERFACE_MODE_UTMI:
365         case USBPHY_INTERFACE_MODE_UTMIW:
366         case USBPHY_INTERFACE_MODE_HSIC:
367                 ret = _ci_usb_phy_init(ci);
368                 if (!ret)
369                         hw_wait_phy_stable();
370                 else
371                         return ret;
372                 hw_phymode_configure(ci);
373                 break;
374         case USBPHY_INTERFACE_MODE_ULPI:
375         case USBPHY_INTERFACE_MODE_SERIAL:
376                 hw_phymode_configure(ci);
377                 ret = _ci_usb_phy_init(ci);
378                 if (ret)
379                         return ret;
380                 break;
381         default:
382                 ret = _ci_usb_phy_init(ci);
383                 if (!ret)
384                         hw_wait_phy_stable();
385         }
386
387         return ret;
388 }
389
390
391 /**
392  * ci_platform_configure: do controller configure
393  * @ci: the controller
394  *
395  */
396 void ci_platform_configure(struct ci_hdrc *ci)
397 {
398         bool is_device_mode, is_host_mode;
399
400         is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
401         is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
402
403         if (is_device_mode) {
404                 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
405
406                 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
407                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
408                                  USBMODE_CI_SDIS);
409         }
410
411         if (is_host_mode) {
412                 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
413
414                 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
415                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
416                                  USBMODE_CI_SDIS);
417         }
418
419         if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
420                 if (ci->hw_bank.lpm)
421                         hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
422                 else
423                         hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
424         }
425
426         if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
427                 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
428
429         hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
430
431         if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
432                 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
433                         ci->platdata->ahb_burst_config);
434
435         /* override burst size, take effect only when ahb_burst_config is 0 */
436         if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
437                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
438                         hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
439                         ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
440
441                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
442                         hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
443                                 ci->platdata->rx_burst_size);
444         }
445 }
446
447 /**
448  * hw_controller_reset: do controller reset
449  * @ci: the controller
450   *
451  * This function returns an error code
452  */
453 static int hw_controller_reset(struct ci_hdrc *ci)
454 {
455         int count = 0;
456
457         hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
458         while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
459                 udelay(10);
460                 if (count++ > 1000)
461                         return -ETIMEDOUT;
462         }
463
464         return 0;
465 }
466
467 /**
468  * hw_device_reset: resets chip (execute without interruption)
469  * @ci: the controller
470  *
471  * This function returns an error code
472  */
473 int hw_device_reset(struct ci_hdrc *ci)
474 {
475         int ret;
476
477         /* should flush & stop before reset */
478         hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
479         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
480
481         ret = hw_controller_reset(ci);
482         if (ret) {
483                 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
484                 return ret;
485         }
486
487         if (ci->platdata->notify_event) {
488                 ret = ci->platdata->notify_event(ci,
489                         CI_HDRC_CONTROLLER_RESET_EVENT);
490                 if (ret)
491                         return ret;
492         }
493
494         /* USBMODE should be configured step by step */
495         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
496         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
497         /* HW >= 2.3 */
498         hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
499
500         if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
501                 dev_err(ci->dev, "cannot enter in %s device mode\n",
502                         ci_role(ci)->name);
503                 dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
504                 return -ENODEV;
505         }
506
507         ci_platform_configure(ci);
508
509         return 0;
510 }
511
512 static irqreturn_t ci_irq_handler(int irq, void *data)
513 {
514         struct ci_hdrc *ci = data;
515         irqreturn_t ret = IRQ_NONE;
516         u32 otgsc = 0;
517
518         if (ci->in_lpm) {
519                 disable_irq_nosync(irq);
520                 ci->wakeup_int = true;
521                 pm_runtime_get(ci->dev);
522                 return IRQ_HANDLED;
523         }
524
525         if (ci->is_otg) {
526                 otgsc = hw_read_otgsc(ci, ~0);
527                 if (ci_otg_is_fsm_mode(ci)) {
528                         ret = ci_otg_fsm_irq(ci);
529                         if (ret == IRQ_HANDLED)
530                                 return ret;
531                 }
532         }
533
534         /*
535          * Handle id change interrupt, it indicates device/host function
536          * switch.
537          */
538         if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
539                 ci->id_event = true;
540                 /* Clear ID change irq status */
541                 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
542                 ci_otg_queue_work(ci);
543                 return IRQ_HANDLED;
544         }
545
546         /*
547          * Handle vbus change interrupt, it indicates device connection
548          * and disconnection events.
549          */
550         if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
551                 ci->b_sess_valid_event = true;
552                 /* Clear BSV irq */
553                 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
554                 ci_otg_queue_work(ci);
555                 return IRQ_HANDLED;
556         }
557
558         /* Handle device/host interrupt */
559         if (ci->role != CI_ROLE_END)
560                 ret = ci_role(ci)->irq(ci);
561
562         return ret;
563 }
564
565 static void ci_irq(struct ci_hdrc *ci)
566 {
567         unsigned long flags;
568
569         local_irq_save(flags);
570         ci_irq_handler(ci->irq, ci);
571         local_irq_restore(flags);
572 }
573
574 static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
575                              void *ptr)
576 {
577         struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
578         struct ci_hdrc *ci = cbl->ci;
579
580         cbl->connected = event;
581         cbl->changed = true;
582
583         ci_irq(ci);
584         return NOTIFY_DONE;
585 }
586
587 static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw)
588 {
589         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
590         enum usb_role role;
591         unsigned long flags;
592
593         spin_lock_irqsave(&ci->lock, flags);
594         role = ci_role_to_usb_role(ci);
595         spin_unlock_irqrestore(&ci->lock, flags);
596
597         return role;
598 }
599
600 static int ci_usb_role_switch_set(struct usb_role_switch *sw,
601                                   enum usb_role role)
602 {
603         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
604         struct ci_hdrc_cable *cable = NULL;
605         enum usb_role current_role = ci_role_to_usb_role(ci);
606         enum ci_role ci_role = usb_role_to_ci_role(role);
607         unsigned long flags;
608
609         if ((ci_role != CI_ROLE_END && !ci->roles[ci_role]) ||
610             (current_role == role))
611                 return 0;
612
613         pm_runtime_get_sync(ci->dev);
614         /* Stop current role */
615         spin_lock_irqsave(&ci->lock, flags);
616         if (current_role == USB_ROLE_DEVICE)
617                 cable = &ci->platdata->vbus_extcon;
618         else if (current_role == USB_ROLE_HOST)
619                 cable = &ci->platdata->id_extcon;
620
621         if (cable) {
622                 cable->changed = true;
623                 cable->connected = false;
624                 ci_irq(ci);
625                 spin_unlock_irqrestore(&ci->lock, flags);
626                 if (ci->wq && role != USB_ROLE_NONE)
627                         flush_workqueue(ci->wq);
628                 spin_lock_irqsave(&ci->lock, flags);
629         }
630
631         cable = NULL;
632
633         /* Start target role */
634         if (role == USB_ROLE_DEVICE)
635                 cable = &ci->platdata->vbus_extcon;
636         else if (role == USB_ROLE_HOST)
637                 cable = &ci->platdata->id_extcon;
638
639         if (cable) {
640                 cable->changed = true;
641                 cable->connected = true;
642                 ci_irq(ci);
643         }
644         spin_unlock_irqrestore(&ci->lock, flags);
645         pm_runtime_put_sync(ci->dev);
646
647         return 0;
648 }
649
650 static struct usb_role_switch_desc ci_role_switch = {
651         .set = ci_usb_role_switch_set,
652         .get = ci_usb_role_switch_get,
653         .allow_userspace_control = true,
654 };
655
656 static int ci_get_platdata(struct device *dev,
657                 struct ci_hdrc_platform_data *platdata)
658 {
659         struct extcon_dev *ext_vbus, *ext_id;
660         struct ci_hdrc_cable *cable;
661         int ret;
662
663         if (!platdata->phy_mode)
664                 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
665
666         if (!platdata->dr_mode)
667                 platdata->dr_mode = usb_get_dr_mode(dev);
668
669         if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
670                 platdata->dr_mode = USB_DR_MODE_OTG;
671
672         if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
673                 /* Get the vbus regulator */
674                 platdata->reg_vbus = devm_regulator_get_optional(dev, "vbus");
675                 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
676                         return -EPROBE_DEFER;
677                 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
678                         /* no vbus regulator is needed */
679                         platdata->reg_vbus = NULL;
680                 } else if (IS_ERR(platdata->reg_vbus)) {
681                         dev_err(dev, "Getting regulator error: %ld\n",
682                                 PTR_ERR(platdata->reg_vbus));
683                         return PTR_ERR(platdata->reg_vbus);
684                 }
685                 /* Get TPL support */
686                 if (!platdata->tpl_support)
687                         platdata->tpl_support =
688                                 of_usb_host_tpl_support(dev->of_node);
689         }
690
691         if (platdata->dr_mode == USB_DR_MODE_OTG) {
692                 /* We can support HNP and SRP of OTG 2.0 */
693                 platdata->ci_otg_caps.otg_rev = 0x0200;
694                 platdata->ci_otg_caps.hnp_support = true;
695                 platdata->ci_otg_caps.srp_support = true;
696
697                 /* Update otg capabilities by DT properties */
698                 ret = of_usb_update_otg_caps(dev->of_node,
699                                         &platdata->ci_otg_caps);
700                 if (ret)
701                         return ret;
702         }
703
704         if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
705                 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
706
707         of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
708                                      &platdata->phy_clkgate_delay_us);
709
710         platdata->itc_setting = 1;
711
712         of_property_read_u32(dev->of_node, "itc-setting",
713                                         &platdata->itc_setting);
714
715         ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
716                                 &platdata->ahb_burst_config);
717         if (!ret) {
718                 platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
719         } else if (ret != -EINVAL) {
720                 dev_err(dev, "failed to get ahb-burst-config\n");
721                 return ret;
722         }
723
724         ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
725                                 &platdata->tx_burst_size);
726         if (!ret) {
727                 platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
728         } else if (ret != -EINVAL) {
729                 dev_err(dev, "failed to get tx-burst-size-dword\n");
730                 return ret;
731         }
732
733         ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
734                                 &platdata->rx_burst_size);
735         if (!ret) {
736                 platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
737         } else if (ret != -EINVAL) {
738                 dev_err(dev, "failed to get rx-burst-size-dword\n");
739                 return ret;
740         }
741
742         if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
743                 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
744
745         ext_id = ERR_PTR(-ENODEV);
746         ext_vbus = ERR_PTR(-ENODEV);
747         if (of_property_read_bool(dev->of_node, "extcon")) {
748                 /* Each one of them is not mandatory */
749                 ext_vbus = extcon_get_edev_by_phandle(dev, 0);
750                 if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
751                         return PTR_ERR(ext_vbus);
752
753                 ext_id = extcon_get_edev_by_phandle(dev, 1);
754                 if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
755                         return PTR_ERR(ext_id);
756         }
757
758         cable = &platdata->vbus_extcon;
759         cable->nb.notifier_call = ci_cable_notifier;
760         cable->edev = ext_vbus;
761
762         if (!IS_ERR(ext_vbus)) {
763                 ret = extcon_get_state(cable->edev, EXTCON_USB);
764                 if (ret)
765                         cable->connected = true;
766                 else
767                         cable->connected = false;
768         }
769
770         cable = &platdata->id_extcon;
771         cable->nb.notifier_call = ci_cable_notifier;
772         cable->edev = ext_id;
773
774         if (!IS_ERR(ext_id)) {
775                 ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
776                 if (ret)
777                         cable->connected = true;
778                 else
779                         cable->connected = false;
780         }
781
782         if (device_property_read_bool(dev, "usb-role-switch"))
783                 ci_role_switch.fwnode = dev->fwnode;
784
785         platdata->pctl = devm_pinctrl_get(dev);
786         if (!IS_ERR(platdata->pctl)) {
787                 struct pinctrl_state *p;
788
789                 p = pinctrl_lookup_state(platdata->pctl, "default");
790                 if (!IS_ERR(p))
791                         platdata->pins_default = p;
792
793                 p = pinctrl_lookup_state(platdata->pctl, "host");
794                 if (!IS_ERR(p))
795                         platdata->pins_host = p;
796
797                 p = pinctrl_lookup_state(platdata->pctl, "device");
798                 if (!IS_ERR(p))
799                         platdata->pins_device = p;
800         }
801
802         return 0;
803 }
804
805 static int ci_extcon_register(struct ci_hdrc *ci)
806 {
807         struct ci_hdrc_cable *id, *vbus;
808         int ret;
809
810         id = &ci->platdata->id_extcon;
811         id->ci = ci;
812         if (!IS_ERR_OR_NULL(id->edev)) {
813                 ret = devm_extcon_register_notifier(ci->dev, id->edev,
814                                                 EXTCON_USB_HOST, &id->nb);
815                 if (ret < 0) {
816                         dev_err(ci->dev, "register ID failed\n");
817                         return ret;
818                 }
819         }
820
821         vbus = &ci->platdata->vbus_extcon;
822         vbus->ci = ci;
823         if (!IS_ERR_OR_NULL(vbus->edev)) {
824                 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
825                                                 EXTCON_USB, &vbus->nb);
826                 if (ret < 0) {
827                         dev_err(ci->dev, "register VBUS failed\n");
828                         return ret;
829                 }
830         }
831
832         return 0;
833 }
834
835 static DEFINE_IDA(ci_ida);
836
837 struct platform_device *ci_hdrc_add_device(struct device *dev,
838                         struct resource *res, int nres,
839                         struct ci_hdrc_platform_data *platdata)
840 {
841         struct platform_device *pdev;
842         int id, ret;
843
844         ret = ci_get_platdata(dev, platdata);
845         if (ret)
846                 return ERR_PTR(ret);
847
848         id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
849         if (id < 0)
850                 return ERR_PTR(id);
851
852         pdev = platform_device_alloc("ci_hdrc", id);
853         if (!pdev) {
854                 ret = -ENOMEM;
855                 goto put_id;
856         }
857
858         pdev->dev.parent = dev;
859
860         ret = platform_device_add_resources(pdev, res, nres);
861         if (ret)
862                 goto err;
863
864         ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
865         if (ret)
866                 goto err;
867
868         ret = platform_device_add(pdev);
869         if (ret)
870                 goto err;
871
872         return pdev;
873
874 err:
875         platform_device_put(pdev);
876 put_id:
877         ida_simple_remove(&ci_ida, id);
878         return ERR_PTR(ret);
879 }
880 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
881
882 void ci_hdrc_remove_device(struct platform_device *pdev)
883 {
884         int id = pdev->id;
885         platform_device_unregister(pdev);
886         ida_simple_remove(&ci_ida, id);
887 }
888 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
889
890 /**
891  * ci_hdrc_query_available_role: get runtime available operation mode
892  *
893  * The glue layer can get current operation mode (host/peripheral/otg)
894  * This function should be called after ci core device has created.
895  *
896  * @pdev: the platform device of ci core.
897  *
898  * Return runtime usb_dr_mode.
899  */
900 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev)
901 {
902         struct ci_hdrc *ci = platform_get_drvdata(pdev);
903
904         if (!ci)
905                 return USB_DR_MODE_UNKNOWN;
906         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])
907                 return USB_DR_MODE_OTG;
908         else if (ci->roles[CI_ROLE_HOST])
909                 return USB_DR_MODE_HOST;
910         else if (ci->roles[CI_ROLE_GADGET])
911                 return USB_DR_MODE_PERIPHERAL;
912         else
913                 return USB_DR_MODE_UNKNOWN;
914 }
915 EXPORT_SYMBOL_GPL(ci_hdrc_query_available_role);
916
917 static inline void ci_role_destroy(struct ci_hdrc *ci)
918 {
919         ci_hdrc_gadget_destroy(ci);
920         ci_hdrc_host_destroy(ci);
921         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
922                 ci_hdrc_otg_destroy(ci);
923 }
924
925 static void ci_get_otg_capable(struct ci_hdrc *ci)
926 {
927         if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
928                 ci->is_otg = false;
929         else
930                 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
931                                 DCCPARAMS_DC | DCCPARAMS_HC)
932                                         == (DCCPARAMS_DC | DCCPARAMS_HC));
933         if (ci->is_otg) {
934                 dev_dbg(ci->dev, "It is OTG capable controller\n");
935                 /* Disable and clear all OTG irq */
936                 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
937                                                         OTGSC_INT_STATUS_BITS);
938         }
939 }
940
941 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
942                           char *buf)
943 {
944         struct ci_hdrc *ci = dev_get_drvdata(dev);
945
946         if (ci->role != CI_ROLE_END)
947                 return sprintf(buf, "%s\n", ci_role(ci)->name);
948
949         return 0;
950 }
951
952 static ssize_t role_store(struct device *dev,
953                 struct device_attribute *attr, const char *buf, size_t n)
954 {
955         struct ci_hdrc *ci = dev_get_drvdata(dev);
956         enum ci_role role;
957         int ret;
958
959         if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
960                 dev_warn(dev, "Current configuration is not dual-role, quit\n");
961                 return -EPERM;
962         }
963
964         for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
965                 if (!strncmp(buf, ci->roles[role]->name,
966                              strlen(ci->roles[role]->name)))
967                         break;
968
969         if (role == CI_ROLE_END || role == ci->role)
970                 return -EINVAL;
971
972         pm_runtime_get_sync(dev);
973         disable_irq(ci->irq);
974         ci_role_stop(ci);
975         ret = ci_role_start(ci, role);
976         if (!ret && ci->role == CI_ROLE_GADGET)
977                 ci_handle_vbus_change(ci);
978         enable_irq(ci->irq);
979         pm_runtime_put_sync(dev);
980
981         return (ret == 0) ? n : ret;
982 }
983 static DEVICE_ATTR_RW(role);
984
985 static struct attribute *ci_attrs[] = {
986         &dev_attr_role.attr,
987         NULL,
988 };
989 ATTRIBUTE_GROUPS(ci);
990
991 static int ci_hdrc_probe(struct platform_device *pdev)
992 {
993         struct device   *dev = &pdev->dev;
994         struct ci_hdrc  *ci;
995         struct resource *res;
996         void __iomem    *base;
997         int             ret;
998         enum usb_dr_mode dr_mode;
999
1000         if (!dev_get_platdata(dev)) {
1001                 dev_err(dev, "platform data missing\n");
1002                 return -ENODEV;
1003         }
1004
1005         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1006         base = devm_ioremap_resource(dev, res);
1007         if (IS_ERR(base))
1008                 return PTR_ERR(base);
1009
1010         ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
1011         if (!ci)
1012                 return -ENOMEM;
1013
1014         spin_lock_init(&ci->lock);
1015         ci->dev = dev;
1016         ci->platdata = dev_get_platdata(dev);
1017         ci->imx28_write_fix = !!(ci->platdata->flags &
1018                 CI_HDRC_IMX28_WRITE_FIX);
1019         ci->supports_runtime_pm = !!(ci->platdata->flags &
1020                 CI_HDRC_SUPPORTS_RUNTIME_PM);
1021         platform_set_drvdata(pdev, ci);
1022
1023         ret = hw_device_init(ci, base);
1024         if (ret < 0) {
1025                 dev_err(dev, "can't initialize hardware\n");
1026                 return -ENODEV;
1027         }
1028
1029         ret = ci_ulpi_init(ci);
1030         if (ret)
1031                 return ret;
1032
1033         if (ci->platdata->phy) {
1034                 ci->phy = ci->platdata->phy;
1035         } else if (ci->platdata->usb_phy) {
1036                 ci->usb_phy = ci->platdata->usb_phy;
1037         } else {
1038                 /* Look for a generic PHY first */
1039                 ci->phy = devm_phy_get(dev->parent, "usb-phy");
1040
1041                 if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1042                         ret = -EPROBE_DEFER;
1043                         goto ulpi_exit;
1044                 } else if (IS_ERR(ci->phy)) {
1045                         ci->phy = NULL;
1046                 }
1047
1048                 /* Look for a legacy USB PHY from device-tree next */
1049                 if (!ci->phy) {
1050                         ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1051                                                                   "phys", 0);
1052
1053                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1054                                 ret = -EPROBE_DEFER;
1055                                 goto ulpi_exit;
1056                         } else if (IS_ERR(ci->usb_phy)) {
1057                                 ci->usb_phy = NULL;
1058                         }
1059                 }
1060
1061                 /* Look for any registered legacy USB PHY as last resort */
1062                 if (!ci->phy && !ci->usb_phy) {
1063                         ci->usb_phy = devm_usb_get_phy(dev->parent,
1064                                                        USB_PHY_TYPE_USB2);
1065
1066                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1067                                 ret = -EPROBE_DEFER;
1068                                 goto ulpi_exit;
1069                         } else if (IS_ERR(ci->usb_phy)) {
1070                                 ci->usb_phy = NULL;
1071                         }
1072                 }
1073
1074                 /* No USB PHY was found in the end */
1075                 if (!ci->phy && !ci->usb_phy) {
1076                         ret = -ENXIO;
1077                         goto ulpi_exit;
1078                 }
1079         }
1080
1081         ret = ci_usb_phy_init(ci);
1082         if (ret) {
1083                 dev_err(dev, "unable to init phy: %d\n", ret);
1084                 return ret;
1085         }
1086
1087         ci->hw_bank.phys = res->start;
1088
1089         ci->irq = platform_get_irq(pdev, 0);
1090         if (ci->irq < 0) {
1091                 ret = ci->irq;
1092                 goto deinit_phy;
1093         }
1094
1095         ci_get_otg_capable(ci);
1096
1097         dr_mode = ci->platdata->dr_mode;
1098         /* initialize role(s) before the interrupt is requested */
1099         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
1100                 ret = ci_hdrc_host_init(ci);
1101                 if (ret) {
1102                         if (ret == -ENXIO)
1103                                 dev_info(dev, "doesn't support host\n");
1104                         else
1105                                 goto deinit_phy;
1106                 }
1107         }
1108
1109         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
1110                 ret = ci_hdrc_gadget_init(ci);
1111                 if (ret) {
1112                         if (ret == -ENXIO)
1113                                 dev_info(dev, "doesn't support gadget\n");
1114                         else
1115                                 goto deinit_host;
1116                 }
1117         }
1118
1119         if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1120                 dev_err(dev, "no supported roles\n");
1121                 ret = -ENODEV;
1122                 goto deinit_gadget;
1123         }
1124
1125         if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1126                 ret = ci_hdrc_otg_init(ci);
1127                 if (ret) {
1128                         dev_err(dev, "init otg fails, ret = %d\n", ret);
1129                         goto deinit_gadget;
1130                 }
1131         }
1132
1133         if (ci_role_switch.fwnode) {
1134                 ci_role_switch.driver_data = ci;
1135                 ci->role_switch = usb_role_switch_register(dev,
1136                                         &ci_role_switch);
1137                 if (IS_ERR(ci->role_switch)) {
1138                         ret = PTR_ERR(ci->role_switch);
1139                         goto deinit_otg;
1140                 }
1141         }
1142
1143         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
1144                 if (ci->is_otg) {
1145                         ci->role = ci_otg_role(ci);
1146                         /* Enable ID change irq */
1147                         hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
1148                 } else {
1149                         /*
1150                          * If the controller is not OTG capable, but support
1151                          * role switch, the defalt role is gadget, and the
1152                          * user can switch it through debugfs.
1153                          */
1154                         ci->role = CI_ROLE_GADGET;
1155                 }
1156         } else {
1157                 ci->role = ci->roles[CI_ROLE_HOST]
1158                         ? CI_ROLE_HOST
1159                         : CI_ROLE_GADGET;
1160         }
1161
1162         if (!ci_otg_is_fsm_mode(ci)) {
1163                 /* only update vbus status for peripheral */
1164                 if (ci->role == CI_ROLE_GADGET) {
1165                         /* Pull down DP for possible charger detection */
1166                         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1167                         ci_handle_vbus_change(ci);
1168                 }
1169
1170                 ret = ci_role_start(ci, ci->role);
1171                 if (ret) {
1172                         dev_err(dev, "can't start %s role\n",
1173                                                 ci_role(ci)->name);
1174                         goto stop;
1175                 }
1176         }
1177
1178         ret = devm_request_irq(dev, ci->irq, ci_irq_handler, IRQF_SHARED,
1179                         ci->platdata->name, ci);
1180         if (ret)
1181                 goto stop;
1182
1183         ret = ci_extcon_register(ci);
1184         if (ret)
1185                 goto stop;
1186
1187         if (ci->supports_runtime_pm) {
1188                 pm_runtime_set_active(&pdev->dev);
1189                 pm_runtime_enable(&pdev->dev);
1190                 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1191                 pm_runtime_mark_last_busy(ci->dev);
1192                 pm_runtime_use_autosuspend(&pdev->dev);
1193         }
1194
1195         if (ci_otg_is_fsm_mode(ci))
1196                 ci_hdrc_otg_fsm_start(ci);
1197
1198         device_set_wakeup_capable(&pdev->dev, true);
1199         dbg_create_files(ci);
1200
1201         return 0;
1202
1203 stop:
1204         if (ci->role_switch)
1205                 usb_role_switch_unregister(ci->role_switch);
1206 deinit_otg:
1207         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1208                 ci_hdrc_otg_destroy(ci);
1209 deinit_gadget:
1210         ci_hdrc_gadget_destroy(ci);
1211 deinit_host:
1212         ci_hdrc_host_destroy(ci);
1213 deinit_phy:
1214         ci_usb_phy_exit(ci);
1215 ulpi_exit:
1216         ci_ulpi_exit(ci);
1217
1218         return ret;
1219 }
1220
1221 static int ci_hdrc_remove(struct platform_device *pdev)
1222 {
1223         struct ci_hdrc *ci = platform_get_drvdata(pdev);
1224
1225         if (ci->role_switch)
1226                 usb_role_switch_unregister(ci->role_switch);
1227
1228         if (ci->supports_runtime_pm) {
1229                 pm_runtime_get_sync(&pdev->dev);
1230                 pm_runtime_disable(&pdev->dev);
1231                 pm_runtime_put_noidle(&pdev->dev);
1232         }
1233
1234         dbg_remove_files(ci);
1235         ci_role_destroy(ci);
1236         ci_hdrc_enter_lpm(ci, true);
1237         ci_usb_phy_exit(ci);
1238         ci_ulpi_exit(ci);
1239
1240         return 0;
1241 }
1242
1243 #ifdef CONFIG_PM
1244 /* Prepare wakeup by SRP before suspend */
1245 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1246 {
1247         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1248                                 !hw_read_otgsc(ci, OTGSC_ID)) {
1249                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1250                                                                 PORTSC_PP);
1251                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1252                                                                 PORTSC_WKCN);
1253         }
1254 }
1255
1256 /* Handle SRP when wakeup by data pulse */
1257 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1258 {
1259         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1260                 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1261                 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1262                         ci->fsm.a_srp_det = 1;
1263                         ci->fsm.a_bus_drop = 0;
1264                 } else {
1265                         ci->fsm.id = 1;
1266                 }
1267                 ci_otg_queue_work(ci);
1268         }
1269 }
1270
1271 static void ci_controller_suspend(struct ci_hdrc *ci)
1272 {
1273         disable_irq(ci->irq);
1274         ci_hdrc_enter_lpm(ci, true);
1275         if (ci->platdata->phy_clkgate_delay_us)
1276                 usleep_range(ci->platdata->phy_clkgate_delay_us,
1277                              ci->platdata->phy_clkgate_delay_us + 50);
1278         usb_phy_set_suspend(ci->usb_phy, 1);
1279         ci->in_lpm = true;
1280         enable_irq(ci->irq);
1281 }
1282
1283 /*
1284  * Handle the wakeup interrupt triggered by extcon connector
1285  * We need to call ci_irq again for extcon since the first
1286  * interrupt (wakeup int) only let the controller be out of
1287  * low power mode, but not handle any interrupts.
1288  */
1289 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1290 {
1291         struct ci_hdrc_cable *cable_id, *cable_vbus;
1292         u32 otgsc = hw_read_otgsc(ci, ~0);
1293
1294         cable_id = &ci->platdata->id_extcon;
1295         cable_vbus = &ci->platdata->vbus_extcon;
1296
1297         if (!IS_ERR(cable_id->edev) && ci->is_otg &&
1298                 (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS))
1299                 ci_irq(ci);
1300
1301         if (!IS_ERR(cable_vbus->edev) && ci->is_otg &&
1302                 (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS))
1303                 ci_irq(ci);
1304 }
1305
1306 static int ci_controller_resume(struct device *dev)
1307 {
1308         struct ci_hdrc *ci = dev_get_drvdata(dev);
1309         int ret;
1310
1311         dev_dbg(dev, "at %s\n", __func__);
1312
1313         if (!ci->in_lpm) {
1314                 WARN_ON(1);
1315                 return 0;
1316         }
1317
1318         ci_hdrc_enter_lpm(ci, false);
1319
1320         ret = ci_ulpi_resume(ci);
1321         if (ret)
1322                 return ret;
1323
1324         if (ci->usb_phy) {
1325                 usb_phy_set_suspend(ci->usb_phy, 0);
1326                 usb_phy_set_wakeup(ci->usb_phy, false);
1327                 hw_wait_phy_stable();
1328         }
1329
1330         ci->in_lpm = false;
1331         if (ci->wakeup_int) {
1332                 ci->wakeup_int = false;
1333                 pm_runtime_mark_last_busy(ci->dev);
1334                 pm_runtime_put_autosuspend(ci->dev);
1335                 enable_irq(ci->irq);
1336                 if (ci_otg_is_fsm_mode(ci))
1337                         ci_otg_fsm_wakeup_by_srp(ci);
1338                 ci_extcon_wakeup_int(ci);
1339         }
1340
1341         return 0;
1342 }
1343
1344 #ifdef CONFIG_PM_SLEEP
1345 static int ci_suspend(struct device *dev)
1346 {
1347         struct ci_hdrc *ci = dev_get_drvdata(dev);
1348
1349         if (ci->wq)
1350                 flush_workqueue(ci->wq);
1351         /*
1352          * Controller needs to be active during suspend, otherwise the core
1353          * may run resume when the parent is at suspend if other driver's
1354          * suspend fails, it occurs before parent's suspend has not started,
1355          * but the core suspend has finished.
1356          */
1357         if (ci->in_lpm)
1358                 pm_runtime_resume(dev);
1359
1360         if (ci->in_lpm) {
1361                 WARN_ON(1);
1362                 return 0;
1363         }
1364
1365         if (device_may_wakeup(dev)) {
1366                 if (ci_otg_is_fsm_mode(ci))
1367                         ci_otg_fsm_suspend_for_srp(ci);
1368
1369                 usb_phy_set_wakeup(ci->usb_phy, true);
1370                 enable_irq_wake(ci->irq);
1371         }
1372
1373         ci_controller_suspend(ci);
1374
1375         return 0;
1376 }
1377
1378 static int ci_resume(struct device *dev)
1379 {
1380         struct ci_hdrc *ci = dev_get_drvdata(dev);
1381         int ret;
1382
1383         if (device_may_wakeup(dev))
1384                 disable_irq_wake(ci->irq);
1385
1386         ret = ci_controller_resume(dev);
1387         if (ret)
1388                 return ret;
1389
1390         if (ci->supports_runtime_pm) {
1391                 pm_runtime_disable(dev);
1392                 pm_runtime_set_active(dev);
1393                 pm_runtime_enable(dev);
1394         }
1395
1396         return ret;
1397 }
1398 #endif /* CONFIG_PM_SLEEP */
1399
1400 static int ci_runtime_suspend(struct device *dev)
1401 {
1402         struct ci_hdrc *ci = dev_get_drvdata(dev);
1403
1404         dev_dbg(dev, "at %s\n", __func__);
1405
1406         if (ci->in_lpm) {
1407                 WARN_ON(1);
1408                 return 0;
1409         }
1410
1411         if (ci_otg_is_fsm_mode(ci))
1412                 ci_otg_fsm_suspend_for_srp(ci);
1413
1414         usb_phy_set_wakeup(ci->usb_phy, true);
1415         ci_controller_suspend(ci);
1416
1417         return 0;
1418 }
1419
1420 static int ci_runtime_resume(struct device *dev)
1421 {
1422         return ci_controller_resume(dev);
1423 }
1424
1425 #endif /* CONFIG_PM */
1426 static const struct dev_pm_ops ci_pm_ops = {
1427         SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1428         SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1429 };
1430
1431 static struct platform_driver ci_hdrc_driver = {
1432         .probe  = ci_hdrc_probe,
1433         .remove = ci_hdrc_remove,
1434         .driver = {
1435                 .name   = "ci_hdrc",
1436                 .pm     = &ci_pm_ops,
1437                 .dev_groups = ci_groups,
1438         },
1439 };
1440
1441 static int __init ci_hdrc_platform_register(void)
1442 {
1443         ci_hdrc_host_driver_init();
1444         return platform_driver_register(&ci_hdrc_driver);
1445 }
1446 module_init(ci_hdrc_platform_register);
1447
1448 static void __exit ci_hdrc_platform_unregister(void)
1449 {
1450         platform_driver_unregister(&ci_hdrc_driver);
1451 }
1452 module_exit(ci_hdrc_platform_unregister);
1453
1454 MODULE_ALIAS("platform:ci_hdrc");
1455 MODULE_LICENSE("GPL v2");
1456 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1457 MODULE_DESCRIPTION("ChipIdea HDRC Driver");