1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBSS DRD Driver - gadget side.
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
8 * Authors: Pawel Jez <pjez@cadence.com>,
9 * Pawel Laszczak <pawell@cadence.com>
10 * Peter Chen <peter.chen@nxp.com>
15 * At some situations, the controller may get stale data address in TRB
17 * 1. Controller read TRB includes data address
18 * 2. Software updates TRBs includes data address and Cycle bit
19 * 3. Controller read TRB which includes Cycle bit
20 * 4. DMA run with stale data address
22 * To fix this problem, driver needs to make the first TRB in TD as invalid.
23 * After preparing all TRBs driver needs to check the position of DMA and
24 * if the DMA point to the first just added TRB and doorbell is 1,
25 * then driver must defer making this TRB as valid. This TRB will be make
26 * as valid during adding next TRB only if DMA is stopped or at TRBERR
29 * Issue has been fixed in DEV_VER_V3 version of controller.
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
33 * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34 * in correct order. If the first packet in the buffer will not be handled,
35 * then the following packets directed for other endpoints and functions
37 * Additionally the packets directed to one endpoint can block entire on-chip
38 * buffers. In this case transfer to other endpoints also will blocked.
40 * To resolve this issue after raising the descriptor missing interrupt
41 * driver prepares internal usb_request object and use it to arm DMA transfer.
43 * The problematic situation was observed in case when endpoint has been enabled
44 * but no usb_request were queued. Driver try detects such endpoints and will
45 * use this workaround only for these endpoint.
47 * Driver use limited number of buffer. This number can be set by macro
48 * CDNS3_WA2_NUM_BUFFERS.
50 * Such blocking situation was observed on ACM gadget. For this function
51 * host send OUT data packet but ACM function is not prepared for this packet.
52 * It's cause that buffer placed in on chip memory block transfer to other
55 * Issue has been fixed in DEV_VER_V2 version of controller.
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/iopoll.h>
65 #include "gadget-export.h"
70 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
71 struct usb_request *request,
74 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
75 struct usb_request *request);
77 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
78 struct usb_request *request);
81 * cdns3_clear_register_bit - clear bit in given register.
82 * @ptr: address of device controller register to be read and changed
83 * @mask: bits requested to clar
85 static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
87 mask = readl(ptr) & ~mask;
92 * cdns3_set_register_bit - set bit in given register.
93 * @ptr: address of device controller register to be read and changed
94 * @mask: bits requested to set
96 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
98 mask = readl(ptr) | mask;
103 * cdns3_ep_addr_to_index - Macro converts endpoint address to
104 * index of endpoint object in cdns3_device.eps[] container
105 * @ep_addr: endpoint address for which endpoint object is required
108 u8 cdns3_ep_addr_to_index(u8 ep_addr)
110 return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
113 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
114 struct cdns3_endpoint *priv_ep)
118 dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
120 return dma_index / TRB_SIZE;
124 * cdns3_next_request - returns next request from list
125 * @list: list containing requests
127 * Returns request or NULL if no requests in list
129 struct usb_request *cdns3_next_request(struct list_head *list)
131 return list_first_entry_or_null(list, struct usb_request, list);
135 * cdns3_next_align_buf - returns next buffer from list
136 * @list: list containing buffers
138 * Returns buffer or NULL if no buffers in list
140 static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
142 return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
146 * cdns3_next_priv_request - returns next request from list
147 * @list: list containing requests
149 * Returns request or NULL if no requests in list
151 static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
153 return list_first_entry_or_null(list, struct cdns3_request, list);
157 * select_ep - selects endpoint
158 * @priv_dev: extended gadget object
159 * @ep: endpoint address
161 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
163 if (priv_dev->selected_ep == ep)
166 priv_dev->selected_ep = ep;
167 writel(ep, &priv_dev->regs->ep_sel);
171 * cdns3_get_tdl - gets current tdl for selected endpoint.
172 * @priv_dev: extended gadget object
174 * Before calling this function the appropriate endpoint must
175 * be selected by means of cdns3_select_ep function.
177 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
179 if (priv_dev->dev_ver < DEV_VER_V3)
180 return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
182 return readl(&priv_dev->regs->ep_tdl);
185 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
186 struct cdns3_trb *trb)
188 u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
190 return priv_ep->trb_pool_dma + offset;
193 static int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
195 switch (priv_ep->type) {
196 case USB_ENDPOINT_XFER_ISOC:
197 return TRB_ISO_RING_SIZE;
198 case USB_ENDPOINT_XFER_CONTROL:
199 return TRB_CTRL_RING_SIZE;
201 if (priv_ep->use_streams)
202 return TRB_STREAM_RING_SIZE;
204 return TRB_RING_SIZE;
208 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
210 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
212 if (priv_ep->trb_pool) {
213 dma_free_coherent(priv_dev->sysdev,
214 cdns3_ring_size(priv_ep),
215 priv_ep->trb_pool, priv_ep->trb_pool_dma);
216 priv_ep->trb_pool = NULL;
221 * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
222 * @priv_ep: endpoint object
224 * Function will return 0 on success or -ENOMEM on allocation error
226 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
228 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
229 int ring_size = cdns3_ring_size(priv_ep);
230 int num_trbs = ring_size / TRB_SIZE;
231 struct cdns3_trb *link_trb;
233 if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
234 cdns3_free_trb_pool(priv_ep);
236 if (!priv_ep->trb_pool) {
237 priv_ep->trb_pool = dma_alloc_coherent(priv_dev->sysdev,
239 &priv_ep->trb_pool_dma,
240 GFP_DMA32 | GFP_ATOMIC);
241 if (!priv_ep->trb_pool)
244 priv_ep->alloc_ring_size = ring_size;
247 memset(priv_ep->trb_pool, 0, ring_size);
249 priv_ep->num_trbs = num_trbs;
254 /* Initialize the last TRB as Link TRB */
255 link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
257 if (priv_ep->use_streams) {
259 * For stream capable endpoints driver use single correct TRB.
260 * The last trb has zeroed cycle bit
262 link_trb->control = 0;
264 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
265 link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
271 * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
272 * @priv_ep: endpoint object
274 * Endpoint must be selected before call to this function
276 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
278 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
281 trace_cdns3_halt(priv_ep, 1, 1);
283 writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
284 &priv_dev->regs->ep_cmd);
286 /* wait for DFLUSH cleared */
287 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
288 !(val & EP_CMD_DFLUSH), 1, 1000);
289 priv_ep->flags |= EP_STALLED;
290 priv_ep->flags &= ~EP_STALL_PENDING;
294 * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
295 * @priv_dev: extended gadget object
297 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
301 writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
303 cdns3_allow_enable_l1(priv_dev, 0);
304 priv_dev->hw_configured_flag = 0;
305 priv_dev->onchip_used_size = 0;
306 priv_dev->out_mem_is_allocated = 0;
307 priv_dev->wait_for_setup = 0;
308 priv_dev->using_streams = 0;
310 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
311 if (priv_dev->eps[i])
312 priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
316 * cdns3_ep_inc_trb - increment a trb index.
317 * @index: Pointer to the TRB index to increment.
319 * @trb_in_seg: number of TRBs in segment
321 * The index should never point to the link TRB. After incrementing,
322 * if it is point to the link TRB, wrap around to the beginning and revert
323 * cycle state bit The
324 * link TRB is always at the last TRB entry.
326 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
329 if (*index == (trb_in_seg - 1)) {
336 * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
337 * @priv_ep: The endpoint whose enqueue pointer we're incrementing
339 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
341 priv_ep->free_trbs--;
342 cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
346 * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
347 * @priv_ep: The endpoint whose dequeue pointer we're incrementing
349 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
351 priv_ep->free_trbs++;
352 cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
356 * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
357 * @priv_dev: Extended gadget object
358 * @enable: Enable/disable permit to transition to L1.
360 * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
361 * then controller answer with ACK handshake.
362 * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
363 * then controller answer with NYET handshake.
365 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
368 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
370 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
373 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
377 reg = readl(&priv_dev->regs->usb_sts);
379 if (DEV_SUPERSPEED(reg))
380 return USB_SPEED_SUPER;
381 else if (DEV_HIGHSPEED(reg))
382 return USB_SPEED_HIGH;
383 else if (DEV_FULLSPEED(reg))
384 return USB_SPEED_FULL;
385 else if (DEV_LOWSPEED(reg))
386 return USB_SPEED_LOW;
387 return USB_SPEED_UNKNOWN;
391 * cdns3_start_all_request - add to ring all request not started
392 * @priv_dev: Extended gadget object
393 * @priv_ep: The endpoint for whom request will be started.
395 * Returns return ENOMEM if transfer ring i not enough TRBs to start
398 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
399 struct cdns3_endpoint *priv_ep)
401 struct usb_request *request;
403 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
406 * If the last pending transfer is INTERNAL
407 * OR streams are enabled for this endpoint
408 * do NOT start new transfer till the last one is pending
410 if (!pending_empty) {
411 struct cdns3_request *priv_req;
413 request = cdns3_next_request(&priv_ep->pending_req_list);
414 priv_req = to_cdns3_request(request);
415 if ((priv_req->flags & REQUEST_INTERNAL) ||
416 (priv_ep->flags & EP_TDLCHK_EN) ||
417 priv_ep->use_streams) {
418 dev_dbg(priv_dev->dev, "Blocking external request\n");
423 while (!list_empty(&priv_ep->deferred_req_list)) {
424 request = cdns3_next_request(&priv_ep->deferred_req_list);
426 if (!priv_ep->use_streams) {
427 ret = cdns3_ep_run_transfer(priv_ep, request);
429 priv_ep->stream_sg_idx = 0;
430 ret = cdns3_ep_run_stream_transfer(priv_ep, request);
435 list_del(&request->list);
436 list_add_tail(&request->list,
437 &priv_ep->pending_req_list);
438 if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
442 priv_ep->flags &= ~EP_RING_FULL;
447 * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
448 * driver try to detect whether endpoint need additional internal
449 * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
450 * if before first DESCMISS interrupt the DMA will be armed.
452 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
453 if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
454 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
455 (reg) |= EP_STS_EN_DESCMISEN; \
458 static void __cdns3_descmiss_copy_data(struct usb_request *request,
459 struct usb_request *descmiss_req)
461 int length = request->actual + descmiss_req->actual;
462 struct scatterlist *s = request->sg;
465 if (length <= request->length) {
466 memcpy(&((u8 *)request->buf)[request->actual],
468 descmiss_req->actual);
469 request->actual = length;
471 /* It should never occures */
472 request->status = -ENOMEM;
475 if (length <= sg_dma_len(s)) {
476 void *p = phys_to_virt(sg_dma_address(s));
478 memcpy(&((u8 *)p)[request->actual],
480 descmiss_req->actual);
481 request->actual = length;
483 request->status = -ENOMEM;
489 * cdns3_wa2_descmiss_copy_data copy data from internal requests to
490 * request queued by class driver.
491 * @priv_ep: extended endpoint object
492 * @request: request object
494 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
495 struct usb_request *request)
497 struct usb_request *descmiss_req;
498 struct cdns3_request *descmiss_priv_req;
500 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
504 cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
505 descmiss_req = &descmiss_priv_req->request;
507 /* driver can't touch pending request */
508 if (descmiss_priv_req->flags & REQUEST_PENDING)
511 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
512 request->status = descmiss_req->status;
513 __cdns3_descmiss_copy_data(request, descmiss_req);
514 list_del_init(&descmiss_priv_req->list);
515 kfree(descmiss_req->buf);
516 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
517 --priv_ep->wa2_counter;
524 static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
525 struct cdns3_endpoint *priv_ep,
526 struct cdns3_request *priv_req)
528 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
529 priv_req->flags & REQUEST_INTERNAL) {
530 struct usb_request *req;
532 req = cdns3_next_request(&priv_ep->deferred_req_list);
534 priv_ep->descmis_req = NULL;
539 /* unmap the gadget request before copying data */
540 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
543 cdns3_wa2_descmiss_copy_data(priv_ep, req);
544 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
545 req->length != req->actual) {
546 /* wait for next part of transfer */
547 /* re-map the gadget request buffer*/
548 usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
549 usb_endpoint_dir_in(priv_ep->endpoint.desc));
553 if (req->status == -EINPROGRESS)
556 list_del_init(&req->list);
557 cdns3_start_all_request(priv_dev, priv_ep);
561 return &priv_req->request;
564 static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
565 struct cdns3_endpoint *priv_ep,
566 struct cdns3_request *priv_req)
571 * If transfer was queued before DESCMISS appear than we
572 * can disable handling of DESCMISS interrupt. Driver assumes that it
573 * can disable special treatment for this endpoint.
575 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
578 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
579 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
580 reg = readl(&priv_dev->regs->ep_sts_en);
581 reg &= ~EP_STS_EN_DESCMISEN;
582 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
583 writel(reg, &priv_dev->regs->ep_sts_en);
586 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
587 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
588 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
591 * DESCMISS transfer has been finished, so data will be
592 * directly copied from internal allocated usb_request
595 if (pending_empty && !descmiss_empty &&
596 !(priv_req->flags & REQUEST_INTERNAL)) {
597 cdns3_wa2_descmiss_copy_data(priv_ep,
600 trace_cdns3_wa2(priv_ep, "get internal stored data");
602 list_add_tail(&priv_req->request.list,
603 &priv_ep->pending_req_list);
604 cdns3_gadget_giveback(priv_ep, priv_req,
605 priv_req->request.status);
608 * Intentionally driver returns positive value as
609 * correct value. It informs that transfer has
616 * Driver will wait for completion DESCMISS transfer,
617 * before starts new, not DESCMISS transfer.
619 if (!pending_empty && !descmiss_empty) {
620 trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
624 if (priv_req->flags & REQUEST_INTERNAL)
625 list_add_tail(&priv_req->list,
626 &priv_ep->wa2_descmiss_req_list);
632 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
634 struct cdns3_request *priv_req;
636 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
639 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
640 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
642 trace_cdns3_wa2(priv_ep, "removes eldest request");
644 kfree(priv_req->request.buf);
645 list_del_init(&priv_req->list);
646 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
648 --priv_ep->wa2_counter;
656 * cdns3_wa2_descmissing_packet - handles descriptor missing event.
657 * @priv_ep: extended gadget object
659 * This function is used only for WA2. For more information see Work around 2
662 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
664 struct cdns3_request *priv_req;
665 struct usb_request *request;
666 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
668 /* check for pending transfer */
669 if (!pending_empty) {
670 trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
674 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
675 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
676 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
679 trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
681 if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
682 trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
683 cdns3_wa2_remove_old_request(priv_ep);
686 request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
691 priv_req = to_cdns3_request(request);
692 priv_req->flags |= REQUEST_INTERNAL;
694 /* if this field is still assigned it indicate that transfer related
695 * with this request has not been finished yet. Driver in this
696 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
697 * flag to previous one. It will indicate that current request is
698 * part of the previous one.
700 if (priv_ep->descmis_req)
701 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
703 priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
705 priv_ep->wa2_counter++;
707 if (!priv_req->request.buf) {
708 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
712 priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
713 priv_ep->descmis_req = priv_req;
715 __cdns3_gadget_ep_queue(&priv_ep->endpoint,
716 &priv_ep->descmis_req->request,
722 dev_err(priv_ep->cdns3_dev->dev,
723 "Failed: No sufficient memory for DESCMIS\n");
726 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
728 u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
731 u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
733 writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
734 &priv_dev->regs->ep_cmd);
738 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
743 cdns3_select_ep(priv_dev, 0);
745 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
747 if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
748 u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
749 struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
751 if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
752 outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
753 u8 pending_empty = list_empty(&outq_ep->pending_req_list);
755 if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
756 (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
762 cdns3_select_ep(priv_dev, outq_ep->num |
764 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
765 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
767 outq_ep->flags |= EP_TDLCHK_EN;
768 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
771 cdns3_wa2_enable_detection(priv_dev, outq_ep,
773 writel(ep_sts_en_reg,
774 &priv_dev->regs->ep_sts_en);
775 /* reset tdl value to zero */
776 cdns3_wa2_reset_tdl(priv_dev);
778 * Memory barrier - Reset tdl before ringing the
782 if (EP_CMD_DRDY & ep_cmd_reg) {
783 trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
786 trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
788 * ring doorbell to generate DESCMIS irq
791 &priv_dev->regs->ep_cmd);
799 * cdns3_gadget_giveback - call struct usb_request's ->complete callback
800 * @priv_ep: The endpoint to whom the request belongs to
801 * @priv_req: The request we're giving back
802 * @status: completion code for the request
804 * Must be called with controller's lock held and interrupts disabled. This
805 * function will unmap @req and call its ->complete() callback to notify upper
806 * layers that it has completed.
808 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
809 struct cdns3_request *priv_req,
812 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
813 struct usb_request *request = &priv_req->request;
815 list_del_init(&request->list);
817 if (request->status == -EINPROGRESS)
818 request->status = status;
820 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
823 if ((priv_req->flags & REQUEST_UNALIGNED) &&
824 priv_ep->dir == USB_DIR_OUT && !request->status)
825 memcpy(request->buf, priv_req->aligned_buf->buf,
828 priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
829 /* All TRBs have finished, clear the counter */
830 priv_req->finished_trb = 0;
831 trace_cdns3_gadget_giveback(priv_req);
833 if (priv_dev->dev_ver < DEV_VER_V2) {
834 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
840 if (request->complete) {
841 spin_unlock(&priv_dev->lock);
842 usb_gadget_giveback_request(&priv_ep->endpoint,
844 spin_lock(&priv_dev->lock);
847 if (request->buf == priv_dev->zlp_buf)
848 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
851 static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
853 /* Work around for stale data address in TRB*/
854 if (priv_ep->wa1_set) {
855 trace_cdns3_wa1(priv_ep, "restore cycle bit");
857 priv_ep->wa1_set = 0;
858 priv_ep->wa1_trb_index = 0xFFFF;
859 if (priv_ep->wa1_cycle_bit) {
860 priv_ep->wa1_trb->control =
861 priv_ep->wa1_trb->control | cpu_to_le32(0x1);
863 priv_ep->wa1_trb->control =
864 priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
869 static void cdns3_free_aligned_request_buf(struct work_struct *work)
871 struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
873 struct cdns3_aligned_buf *buf, *tmp;
876 spin_lock_irqsave(&priv_dev->lock, flags);
878 list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
880 list_del(&buf->list);
883 * Re-enable interrupts to free DMA capable memory.
884 * Driver can't free this memory with disabled
887 spin_unlock_irqrestore(&priv_dev->lock, flags);
888 dma_free_coherent(priv_dev->sysdev, buf->size,
891 spin_lock_irqsave(&priv_dev->lock, flags);
895 spin_unlock_irqrestore(&priv_dev->lock, flags);
898 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
900 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
901 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
902 struct cdns3_aligned_buf *buf;
904 /* check if buffer is aligned to 8. */
905 if (!((uintptr_t)priv_req->request.buf & 0x7))
908 buf = priv_req->aligned_buf;
910 if (!buf || priv_req->request.length > buf->size) {
911 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
915 buf->size = priv_req->request.length;
917 buf->buf = dma_alloc_coherent(priv_dev->sysdev,
926 if (priv_req->aligned_buf) {
927 trace_cdns3_free_aligned_request(priv_req);
928 priv_req->aligned_buf->in_use = 0;
929 queue_work(system_freezable_wq,
930 &priv_dev->aligned_buf_wq);
934 priv_req->aligned_buf = buf;
936 list_add_tail(&buf->list,
937 &priv_dev->aligned_buf_list);
940 if (priv_ep->dir == USB_DIR_IN) {
941 memcpy(buf->buf, priv_req->request.buf,
942 priv_req->request.length);
945 priv_req->flags |= REQUEST_UNALIGNED;
946 trace_cdns3_prepare_aligned_request(priv_req);
951 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
952 struct cdns3_trb *trb)
954 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
956 if (!priv_ep->wa1_set) {
959 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
962 priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
963 priv_ep->wa1_set = 1;
964 priv_ep->wa1_trb = trb;
965 priv_ep->wa1_trb_index = priv_ep->enqueue;
966 trace_cdns3_wa1(priv_ep, "set guard");
973 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
974 struct cdns3_endpoint *priv_ep)
979 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
980 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
982 if (!doorbell || dma_index != priv_ep->wa1_trb_index)
983 cdns3_wa1_restore_cycle_bit(priv_ep);
986 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
987 struct usb_request *request)
989 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
990 struct cdns3_request *priv_req;
991 struct cdns3_trb *trb;
997 unsigned int sg_idx = priv_ep->stream_sg_idx;
999 priv_req = to_cdns3_request(request);
1000 address = priv_ep->endpoint.desc->bEndpointAddress;
1002 priv_ep->flags |= EP_PENDING_REQUEST;
1004 /* must allocate buffer aligned to 8 */
1005 if (priv_req->flags & REQUEST_UNALIGNED)
1006 trb_dma = priv_req->aligned_buf->dma;
1008 trb_dma = request->dma;
1010 /* For stream capable endpoints driver use only single TD. */
1011 trb = priv_ep->trb_pool + priv_ep->enqueue;
1012 priv_req->start_trb = priv_ep->enqueue;
1013 priv_req->end_trb = priv_req->start_trb;
1014 priv_req->trb = trb;
1016 cdns3_select_ep(priv_ep->cdns3_dev, address);
1018 control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1019 TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1021 if (!request->num_sgs) {
1022 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1023 length = request->length;
1025 trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
1026 length = request->sg[sg_idx].length;
1029 tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1031 trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
1034 * For DEV_VER_V2 controller version we have enabled
1035 * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1036 * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1038 if (priv_dev->dev_ver >= DEV_VER_V2) {
1039 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1040 trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
1042 priv_req->flags |= REQUEST_PENDING;
1044 trb->control = cpu_to_le32(control);
1046 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1049 * Memory barrier - Cycle Bit must be set before trb->length and
1050 * trb->buffer fields.
1054 /* always first element */
1055 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1056 &priv_dev->regs->ep_traddr);
1058 if (!(priv_ep->flags & EP_STALLED)) {
1059 trace_cdns3_ring(priv_ep);
1060 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1061 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1063 priv_ep->prime_flag = false;
1066 * Controller version DEV_VER_V2 tdl calculation
1070 if (priv_dev->dev_ver < DEV_VER_V2)
1071 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1072 &priv_dev->regs->ep_cmd);
1073 else if (priv_dev->dev_ver > DEV_VER_V2)
1074 writel(tdl, &priv_dev->regs->ep_tdl);
1076 priv_ep->last_stream_id = priv_req->request.stream_id;
1077 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1078 writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1079 EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1081 trace_cdns3_doorbell_epx(priv_ep->name,
1082 readl(&priv_dev->regs->ep_traddr));
1085 /* WORKAROUND for transition to L0 */
1086 __cdns3_gadget_wakeup(priv_dev);
1091 static void cdns3_rearm_drdy_if_needed(struct cdns3_endpoint *priv_ep)
1093 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1095 if (priv_dev->dev_ver < DEV_VER_V3)
1098 if (readl(&priv_dev->regs->ep_sts) & EP_STS_TRBERR) {
1099 writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts);
1100 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1105 * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1106 * @priv_ep: endpoint object
1107 * @request: request object
1109 * Returns zero on success or negative value on failure
1111 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1112 struct usb_request *request)
1114 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1115 struct cdns3_request *priv_req;
1116 struct cdns3_trb *trb;
1117 struct cdns3_trb *link_trb = NULL;
1126 struct scatterlist *s = NULL;
1127 bool sg_supported = !!(request->num_mapped_sgs);
1129 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1130 num_trb = priv_ep->interval;
1132 num_trb = sg_supported ? request->num_mapped_sgs : 1;
1134 if (num_trb > priv_ep->free_trbs) {
1135 priv_ep->flags |= EP_RING_FULL;
1139 priv_req = to_cdns3_request(request);
1140 address = priv_ep->endpoint.desc->bEndpointAddress;
1142 priv_ep->flags |= EP_PENDING_REQUEST;
1144 /* must allocate buffer aligned to 8 */
1145 if (priv_req->flags & REQUEST_UNALIGNED)
1146 trb_dma = priv_req->aligned_buf->dma;
1148 trb_dma = request->dma;
1150 trb = priv_ep->trb_pool + priv_ep->enqueue;
1151 priv_req->start_trb = priv_ep->enqueue;
1152 priv_req->trb = trb;
1154 cdns3_select_ep(priv_ep->cdns3_dev, address);
1157 if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
1158 int doorbell, dma_index;
1161 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1162 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1164 /* Driver can't update LINK TRB if it is current processed. */
1165 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1166 priv_ep->flags |= EP_DEFERRED_DRDY;
1170 /*updating C bt in Link TRB before starting DMA*/
1171 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1173 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1174 * that DMA stuck at the LINK TRB.
1175 * On the other hand, removing TRB_CHAIN for longer TRs for
1176 * epXout cause that DMA stuck after handling LINK TRB.
1177 * To eliminate this strange behavioral driver set TRB_CHAIN
1178 * bit only for TR size > 2.
1180 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1181 TRBS_PER_SEGMENT > 2)
1184 link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1185 TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
1188 if (priv_dev->dev_ver <= DEV_VER_V2)
1189 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1194 /* set incorrect Cycle Bit for first trb*/
1195 control = priv_ep->pcs ? 0 : TRB_CYCLE;
1197 if (priv_dev->dev_ver >= DEV_VER_V2) {
1200 td_size = DIV_ROUND_UP(request->length,
1201 priv_ep->endpoint.maxpacket);
1202 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1203 trb->length = TRB_TDL_SS_SIZE(td_size);
1205 control |= TRB_TDL_HS_SIZE(td_size);
1212 control |= TRB_TYPE(TRB_NORMAL);
1214 trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1215 length = sg_dma_len(s);
1217 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1218 length = request->length;
1221 if (priv_ep->flags & EP_TDLCHK_EN)
1222 total_tdl += DIV_ROUND_UP(length,
1223 priv_ep->endpoint.maxpacket);
1225 trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
1227 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1230 * first trb should be prepared as last to avoid processing
1236 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
1237 control |= TRB_IOC | TRB_ISP;
1239 /* for last element in TD or in SG list */
1240 if (sg_iter == (num_trb - 1) && sg_iter != 0)
1241 control |= pcs | TRB_IOC | TRB_ISP;
1245 trb->control = cpu_to_le32(control);
1247 priv_req->trb->control = cpu_to_le32(control);
1250 trb->control |= TRB_ISP;
1251 /* Don't set chain bit for last TRB */
1252 if (sg_iter < num_trb - 1)
1253 trb->control |= TRB_CHAIN;
1260 priv_req->end_trb = priv_ep->enqueue;
1261 cdns3_ep_inc_enq(priv_ep);
1262 trb = priv_ep->trb_pool + priv_ep->enqueue;
1264 } while (sg_iter < num_trb);
1266 trb = priv_req->trb;
1268 priv_req->flags |= REQUEST_PENDING;
1269 priv_req->num_of_trb = num_trb;
1272 trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
1274 if (priv_dev->dev_ver < DEV_VER_V2 &&
1275 (priv_ep->flags & EP_TDLCHK_EN)) {
1276 u16 tdl = total_tdl;
1277 u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1279 if (tdl > EP_CMD_TDL_MAX) {
1280 tdl = EP_CMD_TDL_MAX;
1281 priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1284 if (old_tdl < tdl) {
1286 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1287 &priv_dev->regs->ep_cmd);
1292 * Memory barrier - cycle bit must be set before other filds in trb.
1296 /* give the TD to the consumer*/
1298 trb->control = trb->control ^ cpu_to_le32(1);
1300 if (priv_dev->dev_ver <= DEV_VER_V2)
1301 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1306 while (i < num_trb) {
1307 trace_cdns3_prepare_trb(priv_ep, trb + i);
1308 if (trb + i == link_trb) {
1309 trb = priv_ep->trb_pool;
1310 num_trb = num_trb - i;
1317 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1321 * Memory barrier - Cycle Bit must be set before trb->length and
1322 * trb->buffer fields.
1327 * For DMULT mode we can set address to transfer ring only once after
1328 * enabling endpoint.
1330 if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1332 * Until SW is not ready to handle the OUT transfer the ISO OUT
1333 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1334 * EP_CFG_ENABLE must be set before updating ep_traddr.
1336 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir &&
1337 !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1338 priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1339 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1343 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1344 priv_req->start_trb * TRB_SIZE),
1345 &priv_dev->regs->ep_traddr);
1347 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1350 if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1351 trace_cdns3_ring(priv_ep);
1352 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1353 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1354 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1355 cdns3_rearm_drdy_if_needed(priv_ep);
1356 trace_cdns3_doorbell_epx(priv_ep->name,
1357 readl(&priv_dev->regs->ep_traddr));
1360 /* WORKAROUND for transition to L0 */
1361 __cdns3_gadget_wakeup(priv_dev);
1366 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1368 struct cdns3_endpoint *priv_ep;
1371 if (priv_dev->hw_configured_flag)
1374 writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1376 cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1377 USB_CONF_U1EN | USB_CONF_U2EN);
1379 priv_dev->hw_configured_flag = 1;
1381 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1383 priv_ep = ep_to_cdns3_ep(ep);
1384 cdns3_start_all_request(priv_dev, priv_ep);
1388 cdns3_allow_enable_l1(priv_dev, 1);
1392 * cdns3_trb_handled - check whether trb has been handled by DMA
1394 * @priv_ep: extended endpoint object.
1395 * @priv_req: request object for checking
1397 * Endpoint must be selected before invoking this function.
1399 * Returns false if request has not been handled by DMA, else returns true.
1403 * DQ = priv_ep->dequeue - dequeue position
1404 * EQ = priv_ep->enqueue - enqueue position
1405 * ST = priv_req->start_trb - index of first TRB in transfer ring
1406 * ET = priv_req->end_trb - index of last TRB in transfer ring
1407 * CI = current_index - index of processed TRB by DMA.
1409 * As first step, we check if the TRB between the ST and ET.
1410 * Then, we check if cycle bit for index priv_ep->dequeue
1414 * 1. priv_ep->dequeue never equals to current_index.
1415 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
1416 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1417 * and priv_ep->free_trbs is zero.
1418 * This case indicate that TR is full.
1420 * At below two cases, the request have been handled.
1421 * Case 1 - priv_ep->dequeue < current_index
1422 * SR ... EQ ... DQ ... CI ... ER
1423 * SR ... DQ ... CI ... EQ ... ER
1425 * Case 2 - priv_ep->dequeue > current_index
1426 * This situation takes place when CI go through the LINK TRB at the end of
1428 * SR ... CI ... EQ ... DQ ... ER
1430 static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
1431 struct cdns3_request *priv_req)
1433 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1434 struct cdns3_trb *trb;
1435 int current_index = 0;
1439 current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1440 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1442 /* current trb doesn't belong to this request */
1443 if (priv_req->start_trb < priv_req->end_trb) {
1444 if (priv_ep->dequeue > priv_req->end_trb)
1447 if (priv_ep->dequeue < priv_req->start_trb)
1451 if ((priv_req->start_trb > priv_req->end_trb) &&
1452 (priv_ep->dequeue > priv_req->end_trb) &&
1453 (priv_ep->dequeue < priv_req->start_trb))
1456 if ((priv_req->start_trb == priv_req->end_trb) &&
1457 (priv_ep->dequeue != priv_req->end_trb))
1460 trb = &priv_ep->trb_pool[priv_ep->dequeue];
1462 if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
1465 if (doorbell == 1 && current_index == priv_ep->dequeue)
1468 /* The corner case for TRBS_PER_SEGMENT equal 2). */
1469 if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1474 if (priv_ep->enqueue == priv_ep->dequeue &&
1475 priv_ep->free_trbs == 0) {
1477 } else if (priv_ep->dequeue < current_index) {
1478 if ((current_index == (priv_ep->num_trbs - 1)) &&
1483 } else if (priv_ep->dequeue > current_index) {
1488 trace_cdns3_request_handled(priv_req, current_index, handled);
1493 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1494 struct cdns3_endpoint *priv_ep)
1496 struct cdns3_request *priv_req;
1497 struct usb_request *request;
1498 struct cdns3_trb *trb;
1499 bool request_handled = false;
1500 bool transfer_end = false;
1502 while (!list_empty(&priv_ep->pending_req_list)) {
1503 request = cdns3_next_request(&priv_ep->pending_req_list);
1504 priv_req = to_cdns3_request(request);
1506 trb = priv_ep->trb_pool + priv_ep->dequeue;
1508 /* The TRB was changed as link TRB, and the request was handled at ep_dequeue */
1509 while (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
1510 trace_cdns3_complete_trb(priv_ep, trb);
1511 cdns3_ep_inc_deq(priv_ep);
1512 trb = priv_ep->trb_pool + priv_ep->dequeue;
1515 if (!request->stream_id) {
1516 /* Re-select endpoint. It could be changed by other CPU
1517 * during handling usb_gadget_giveback_request.
1519 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1521 while (cdns3_trb_handled(priv_ep, priv_req)) {
1522 priv_req->finished_trb++;
1523 if (priv_req->finished_trb >= priv_req->num_of_trb)
1524 request_handled = true;
1526 trb = priv_ep->trb_pool + priv_ep->dequeue;
1527 trace_cdns3_complete_trb(priv_ep, trb);
1531 TRB_LEN(le32_to_cpu(trb->length));
1533 if (priv_req->num_of_trb > 1 &&
1534 le32_to_cpu(trb->control) & TRB_SMM &&
1535 le32_to_cpu(trb->control) & TRB_CHAIN)
1536 transfer_end = true;
1538 cdns3_ep_inc_deq(priv_ep);
1541 if (request_handled) {
1542 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1543 request_handled = false;
1544 transfer_end = false;
1546 goto prepare_next_td;
1549 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1550 TRBS_PER_SEGMENT == 2)
1553 /* Re-select endpoint. It could be changed by other CPU
1554 * during handling usb_gadget_giveback_request.
1556 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1558 trb = priv_ep->trb_pool;
1559 trace_cdns3_complete_trb(priv_ep, trb);
1561 if (trb != priv_req->trb)
1562 dev_warn(priv_dev->dev,
1563 "request_trb=0x%p, queue_trb=0x%p\n",
1564 priv_req->trb, trb);
1566 request->actual += TRB_LEN(le32_to_cpu(trb->length));
1568 if (!request->num_sgs ||
1569 (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1570 priv_ep->stream_sg_idx = 0;
1571 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1573 priv_ep->stream_sg_idx++;
1574 cdns3_ep_run_stream_transfer(priv_ep, request);
1579 priv_ep->flags &= ~EP_PENDING_REQUEST;
1582 if (!(priv_ep->flags & EP_STALLED) &&
1583 !(priv_ep->flags & EP_STALL_PENDING))
1584 cdns3_start_all_request(priv_dev, priv_ep);
1587 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1589 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1591 cdns3_wa1_restore_cycle_bit(priv_ep);
1594 trace_cdns3_ring(priv_ep);
1596 /* Cycle Bit must be updated before arming DMA. */
1598 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1600 __cdns3_gadget_wakeup(priv_dev);
1602 trace_cdns3_doorbell_epx(priv_ep->name,
1603 readl(&priv_dev->regs->ep_traddr));
1607 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1609 u16 tdl = priv_ep->pending_tdl;
1610 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1612 if (tdl > EP_CMD_TDL_MAX) {
1613 tdl = EP_CMD_TDL_MAX;
1614 priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1616 priv_ep->pending_tdl = 0;
1619 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1623 * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1624 * @priv_ep: endpoint object
1628 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1630 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1632 struct usb_request *deferred_request;
1633 struct usb_request *pending_request;
1636 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1638 trace_cdns3_epx_irq(priv_dev, priv_ep);
1640 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1641 writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1643 if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1644 bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1646 tdl = cdns3_get_tdl(priv_dev);
1649 * Continue the previous transfer:
1650 * There is some racing between ERDY and PRIME. The device send
1651 * ERDY and almost in the same time Host send PRIME. It cause
1652 * that host ignore the ERDY packet and driver has to send it
1655 if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
1656 EP_STS_HOSTPP(ep_sts_reg))) {
1657 writel(EP_CMD_ERDY |
1658 EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1659 &priv_dev->regs->ep_cmd);
1660 ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1662 priv_ep->prime_flag = true;
1664 pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1665 deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1667 if (deferred_request && !pending_request) {
1668 cdns3_start_all_request(priv_dev, priv_ep);
1673 if (ep_sts_reg & EP_STS_TRBERR) {
1674 if (priv_ep->flags & EP_STALL_PENDING &&
1675 !(ep_sts_reg & EP_STS_DESCMIS &&
1676 priv_dev->dev_ver < DEV_VER_V2)) {
1677 cdns3_ep_stall_flush(priv_ep);
1681 * For isochronous transfer driver completes request on
1682 * IOC or on TRBERR. IOC appears only when device receive
1683 * OUT data packet. If host disable stream or lost some packet
1684 * then the only way to finish all queued transfer is to do it
1687 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1688 !priv_ep->wa1_set) {
1689 if (!priv_ep->dir) {
1690 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1692 ep_cfg &= ~EP_CFG_ENABLE;
1693 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1694 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1695 priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
1697 cdns3_transfer_completed(priv_dev, priv_ep);
1698 } else if (!(priv_ep->flags & EP_STALLED) &&
1699 !(priv_ep->flags & EP_STALL_PENDING)) {
1700 if (priv_ep->flags & EP_DEFERRED_DRDY) {
1701 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1702 cdns3_start_all_request(priv_dev, priv_ep);
1704 cdns3_rearm_transfer(priv_ep,
1710 if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1711 (ep_sts_reg & EP_STS_IOT)) {
1712 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1713 if (ep_sts_reg & EP_STS_ISP)
1714 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1716 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1719 if (!priv_ep->use_streams) {
1720 if ((ep_sts_reg & EP_STS_IOC) ||
1721 (ep_sts_reg & EP_STS_ISP)) {
1722 cdns3_transfer_completed(priv_dev, priv_ep);
1723 } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1724 priv_ep->pending_tdl) {
1725 /* handle IOT with pending tdl */
1726 cdns3_reprogram_tdl(priv_ep);
1728 } else if (priv_ep->dir == USB_DIR_OUT) {
1729 priv_ep->ep_sts_pending |= ep_sts_reg;
1730 } else if (ep_sts_reg & EP_STS_IOT) {
1731 cdns3_transfer_completed(priv_dev, priv_ep);
1736 * MD_EXIT interrupt sets when stream capable endpoint exits
1737 * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1739 if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1740 (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1741 priv_ep->ep_sts_pending = 0;
1742 cdns3_transfer_completed(priv_dev, priv_ep);
1746 * WA2: this condition should only be meet when
1747 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1748 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1749 * In other cases this interrupt will be disabled.
1751 if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1752 !(priv_ep->flags & EP_STALLED))
1753 cdns3_wa2_descmissing_packet(priv_ep);
1758 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1760 if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect)
1761 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1765 * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1766 * @priv_dev: extended gadget object
1767 * @usb_ists: bitmap representation of device's reported interrupts
1768 * (usb_ists register value)
1770 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1772 __must_hold(&priv_dev->lock)
1776 trace_cdns3_usb_irq(priv_dev, usb_ists);
1777 if (usb_ists & USB_ISTS_L1ENTI) {
1779 * WORKAROUND: CDNS3 controller has issue with hardware resuming
1780 * from L1. To fix it, if any DMA transfer is pending driver
1781 * must starts driving resume signal immediately.
1783 if (readl(&priv_dev->regs->drbl))
1784 __cdns3_gadget_wakeup(priv_dev);
1787 /* Connection detected */
1788 if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1789 speed = cdns3_get_speed(priv_dev);
1790 priv_dev->gadget.speed = speed;
1791 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1792 cdns3_ep0_config(priv_dev);
1795 /* Disconnection detected */
1796 if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1797 spin_unlock(&priv_dev->lock);
1798 cdns3_disconnect_gadget(priv_dev);
1799 spin_lock(&priv_dev->lock);
1800 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1801 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1802 cdns3_hw_reset_eps_config(priv_dev);
1805 if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1806 if (priv_dev->gadget_driver &&
1807 priv_dev->gadget_driver->suspend) {
1808 spin_unlock(&priv_dev->lock);
1809 priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1810 spin_lock(&priv_dev->lock);
1814 if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1815 if (priv_dev->gadget_driver &&
1816 priv_dev->gadget_driver->resume) {
1817 spin_unlock(&priv_dev->lock);
1818 priv_dev->gadget_driver->resume(&priv_dev->gadget);
1819 spin_lock(&priv_dev->lock);
1824 if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1825 if (priv_dev->gadget_driver) {
1826 spin_unlock(&priv_dev->lock);
1827 usb_gadget_udc_reset(&priv_dev->gadget,
1828 priv_dev->gadget_driver);
1829 spin_lock(&priv_dev->lock);
1831 /*read again to check the actual speed*/
1832 speed = cdns3_get_speed(priv_dev);
1833 priv_dev->gadget.speed = speed;
1834 cdns3_hw_reset_eps_config(priv_dev);
1835 cdns3_ep0_config(priv_dev);
1841 * cdns3_device_irq_handler- interrupt handler for device part of controller
1843 * @irq: irq number for cdns3 core device
1844 * @data: structure of cdns3
1846 * Returns IRQ_HANDLED or IRQ_NONE
1848 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1850 struct cdns3_device *priv_dev = data;
1851 struct cdns3 *cdns = dev_get_drvdata(priv_dev->dev);
1852 irqreturn_t ret = IRQ_NONE;
1858 /* check USB device interrupt */
1859 reg = readl(&priv_dev->regs->usb_ists);
1861 /* After masking interrupts the new interrupts won't be
1862 * reported in usb_ists/ep_ists. In order to not lose some
1863 * of them driver disables only detected interrupts.
1864 * They will be enabled ASAP after clearing source of
1865 * interrupt. This an unusual behavior only applies to
1866 * usb_ists register.
1868 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1869 /* mask deferred interrupt. */
1870 writel(reg, &priv_dev->regs->usb_ien);
1871 ret = IRQ_WAKE_THREAD;
1874 /* check endpoint interrupt */
1875 reg = readl(&priv_dev->regs->ep_ists);
1877 writel(0, &priv_dev->regs->ep_ien);
1878 ret = IRQ_WAKE_THREAD;
1885 * cdns3_device_thread_irq_handler- interrupt handler for device part
1888 * @irq: irq number for cdns3 core device
1889 * @data: structure of cdns3
1891 * Returns IRQ_HANDLED or IRQ_NONE
1893 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1895 struct cdns3_device *priv_dev = data;
1896 irqreturn_t ret = IRQ_NONE;
1897 unsigned long flags;
1901 spin_lock_irqsave(&priv_dev->lock, flags);
1903 reg = readl(&priv_dev->regs->usb_ists);
1905 writel(reg, &priv_dev->regs->usb_ists);
1906 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1907 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1911 reg = readl(&priv_dev->regs->ep_ists);
1913 /* handle default endpoint OUT */
1914 if (reg & EP_ISTS_EP_OUT0) {
1915 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1919 /* handle default endpoint IN */
1920 if (reg & EP_ISTS_EP_IN0) {
1921 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1925 /* check if interrupt from non default endpoint, if no exit */
1926 reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1930 for_each_set_bit(bit, ®,
1931 sizeof(u32) * BITS_PER_BYTE) {
1932 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1936 if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
1937 cdns3_wa2_check_outq_status(priv_dev);
1940 writel(~0, &priv_dev->regs->ep_ien);
1941 spin_unlock_irqrestore(&priv_dev->lock, flags);
1947 * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1949 * The real reservation will occur during write to EP_CFG register,
1950 * this function is used to check if the 'size' reservation is allowed.
1952 * @priv_dev: extended gadget object
1953 * @size: the size (KB) for EP would like to allocate
1954 * @is_in: endpoint direction
1956 * Return 0 if the required size can met or negative value on failure
1958 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1959 int size, int is_in)
1963 /* 2KB are reserved for EP0*/
1964 remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1967 if (remained < size)
1970 priv_dev->onchip_used_size += size;
1975 * ALL OUT EPs are shared the same chunk onchip memory, so
1976 * driver checks if it already has assigned enough buffers
1978 if (priv_dev->out_mem_is_allocated >= size)
1981 required = size - priv_dev->out_mem_is_allocated;
1983 if (required > remained)
1986 priv_dev->out_mem_is_allocated += required;
1987 priv_dev->onchip_used_size += required;
1993 static void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1994 struct cdns3_endpoint *priv_ep)
1996 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1998 /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1999 if (priv_dev->dev_ver <= DEV_VER_V2)
2000 writel(USB_CONF_DMULT, ®s->usb_conf);
2002 if (priv_dev->dev_ver == DEV_VER_V2)
2003 writel(USB_CONF2_EN_TDL_TRB, ®s->usb_conf2);
2005 if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
2009 mask = BIT(priv_ep->num + 16);
2011 mask = BIT(priv_ep->num);
2013 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
2014 cdns3_set_register_bit(®s->tdl_from_trb, mask);
2015 cdns3_set_register_bit(®s->tdl_beh, mask);
2016 cdns3_set_register_bit(®s->tdl_beh2, mask);
2017 cdns3_set_register_bit(®s->dma_adv_td, mask);
2020 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2021 cdns3_set_register_bit(®s->tdl_from_trb, mask);
2023 cdns3_set_register_bit(®s->dtrans, mask);
2028 * cdns3_ep_config Configure hardware endpoint
2029 * @priv_ep: extended endpoint object
2030 * @enable: set EP_CFG_ENABLE bit in ep_cfg register.
2032 int cdns3_ep_config(struct cdns3_endpoint *priv_ep, bool enable)
2034 bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
2035 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2036 u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
2037 u32 max_packet_size = 0;
2044 buffering = CDNS3_EP_BUF_SIZE - 1;
2046 cdns3_configure_dmult(priv_dev, priv_ep);
2048 switch (priv_ep->type) {
2049 case USB_ENDPOINT_XFER_INT:
2050 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
2052 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2053 ep_cfg |= EP_CFG_TDL_CHK;
2055 case USB_ENDPOINT_XFER_BULK:
2056 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
2058 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2059 ep_cfg |= EP_CFG_TDL_CHK;
2062 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
2063 mult = CDNS3_EP_ISO_HS_MULT - 1;
2064 buffering = mult + 1;
2067 switch (priv_dev->gadget.speed) {
2068 case USB_SPEED_FULL:
2069 max_packet_size = is_iso_ep ? 1023 : 64;
2071 case USB_SPEED_HIGH:
2072 max_packet_size = is_iso_ep ? 1024 : 512;
2074 case USB_SPEED_SUPER:
2075 /* It's limitation that driver assumes in driver. */
2077 max_packet_size = 1024;
2078 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2079 maxburst = CDNS3_EP_ISO_SS_BURST - 1;
2080 buffering = (mult + 1) *
2083 if (priv_ep->interval > 1)
2086 maxburst = CDNS3_EP_BUF_SIZE - 1;
2090 /* all other speed are not supported */
2094 if (max_packet_size == 1024)
2095 priv_ep->trb_burst_size = 128;
2096 else if (max_packet_size >= 512)
2097 priv_ep->trb_burst_size = 64;
2099 priv_ep->trb_burst_size = 16;
2101 /* onchip buffer is only allocated before configuration */
2102 if (!priv_dev->hw_configured_flag) {
2103 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2106 dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2112 ep_cfg |= EP_CFG_ENABLE;
2114 if (priv_ep->use_streams && priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2115 if (priv_dev->dev_ver >= DEV_VER_V3) {
2116 u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
2119 * Stream capable endpoints are handled by using ep_tdl
2120 * register. Other endpoints use TDL from TRB feature.
2122 cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb,
2126 /* Enable Stream Bit TDL chk and SID chk */
2127 ep_cfg |= EP_CFG_STREAM_EN | EP_CFG_TDL_CHK | EP_CFG_SID_CHK;
2130 ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2132 EP_CFG_BUFFERING(buffering) |
2133 EP_CFG_MAXBURST(maxburst);
2135 cdns3_select_ep(priv_dev, bEndpointAddress);
2136 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2137 priv_ep->flags |= EP_CONFIGURED;
2139 dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2140 priv_ep->name, ep_cfg);
2145 /* Find correct direction for HW endpoint according to description */
2146 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2147 struct cdns3_endpoint *priv_ep)
2149 return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2150 (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2154 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2155 struct usb_endpoint_descriptor *desc)
2158 struct cdns3_endpoint *priv_ep;
2160 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2163 /* ep name pattern likes epXin or epXout */
2164 char c[2] = {ep->name[2], '\0'};
2166 ret = kstrtoul(c, 10, &num);
2168 return ERR_PTR(ret);
2170 priv_ep = ep_to_cdns3_ep(ep);
2171 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2172 if (!(priv_ep->flags & EP_CLAIMED)) {
2179 return ERR_PTR(-ENOENT);
2183 * Cadence IP has one limitation that all endpoints must be configured
2184 * (Type & MaxPacketSize) before setting configuration through hardware
2185 * register, it means we can't change endpoints configuration after
2186 * set_configuration.
2188 * This function set EP_CLAIMED flag which is added when the gadget driver
2189 * uses usb_ep_autoconfig to configure specific endpoint;
2190 * When the udc driver receives set_configurion request,
2191 * it goes through all claimed endpoints, and configure all endpoints
2194 * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2195 * ep_cfg register which can be changed after set_configuration, and do
2196 * some software operation accordingly.
2199 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2200 struct usb_endpoint_descriptor *desc,
2201 struct usb_ss_ep_comp_descriptor *comp_desc)
2203 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2204 struct cdns3_endpoint *priv_ep;
2205 unsigned long flags;
2207 priv_ep = cdns3_find_available_ep(priv_dev, desc);
2208 if (IS_ERR(priv_ep)) {
2209 dev_err(priv_dev->dev, "no available ep\n");
2213 dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2215 spin_lock_irqsave(&priv_dev->lock, flags);
2216 priv_ep->endpoint.desc = desc;
2217 priv_ep->dir = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2218 priv_ep->type = usb_endpoint_type(desc);
2219 priv_ep->flags |= EP_CLAIMED;
2220 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2222 spin_unlock_irqrestore(&priv_dev->lock, flags);
2223 return &priv_ep->endpoint;
2227 * cdns3_gadget_ep_alloc_request Allocates request
2228 * @ep: endpoint object associated with request
2229 * @gfp_flags: gfp flags
2231 * Returns allocated request address, NULL on allocation error
2233 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2236 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2237 struct cdns3_request *priv_req;
2239 priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2243 priv_req->priv_ep = priv_ep;
2245 trace_cdns3_alloc_request(priv_req);
2246 return &priv_req->request;
2250 * cdns3_gadget_ep_free_request Free memory occupied by request
2251 * @ep: endpoint object associated with request
2252 * @request: request to free memory
2254 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2255 struct usb_request *request)
2257 struct cdns3_request *priv_req = to_cdns3_request(request);
2259 if (priv_req->aligned_buf)
2260 priv_req->aligned_buf->in_use = 0;
2262 trace_cdns3_free_request(priv_req);
2267 * cdns3_gadget_ep_enable Enable endpoint
2268 * @ep: endpoint object
2269 * @desc: endpoint descriptor
2271 * Returns 0 on success, error code elsewhere
2273 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2274 const struct usb_endpoint_descriptor *desc)
2276 struct cdns3_endpoint *priv_ep;
2277 struct cdns3_device *priv_dev;
2278 const struct usb_ss_ep_comp_descriptor *comp_desc;
2279 u32 reg = EP_STS_EN_TRBERREN;
2280 u32 bEndpointAddress;
2281 unsigned long flags;
2287 pr_debug("usbss: ep not configured?\n");
2291 priv_ep = ep_to_cdns3_ep(ep);
2292 priv_dev = priv_ep->cdns3_dev;
2293 comp_desc = priv_ep->endpoint.comp_desc;
2295 if (!desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2296 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2300 if (!desc->wMaxPacketSize) {
2301 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2305 if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2306 "%s is already enabled\n", priv_ep->name))
2309 spin_lock_irqsave(&priv_dev->lock, flags);
2311 priv_ep->endpoint.desc = desc;
2312 priv_ep->type = usb_endpoint_type(desc);
2313 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2315 if (priv_ep->interval > ISO_MAX_INTERVAL &&
2316 priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2317 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2324 bEndpointAddress = priv_ep->num | priv_ep->dir;
2325 cdns3_select_ep(priv_dev, bEndpointAddress);
2328 * For some versions of controller at some point during ISO OUT traffic
2329 * DMA reads Transfer Ring for the EP which has never got doorbell.
2330 * This issue was detected only on simulation, but to avoid this issue
2331 * driver add protection against it. To fix it driver enable ISO OUT
2332 * endpoint before setting DRBL. This special treatment of ISO OUT
2333 * endpoints are recommended by controller specification.
2335 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2338 if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2340 * Enable stream support (SS mode) related interrupts
2341 * in EP_STS_EN Register
2343 if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2344 reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2345 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2346 EP_STS_EN_STREAMREN;
2347 priv_ep->use_streams = true;
2348 ret = cdns3_ep_config(priv_ep, enable);
2349 priv_dev->using_streams |= true;
2352 ret = cdns3_ep_config(priv_ep, enable);
2358 ret = cdns3_allocate_trb_pool(priv_ep);
2362 bEndpointAddress = priv_ep->num | priv_ep->dir;
2363 cdns3_select_ep(priv_dev, bEndpointAddress);
2365 trace_cdns3_gadget_ep_enable(priv_ep);
2367 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2369 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2370 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2373 if (unlikely(ret)) {
2374 cdns3_free_trb_pool(priv_ep);
2379 /* enable interrupt for selected endpoint */
2380 cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2381 BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2383 if (priv_dev->dev_ver < DEV_VER_V2)
2384 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2386 writel(reg, &priv_dev->regs->ep_sts_en);
2389 priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2390 EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2391 priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2392 priv_ep->wa1_set = 0;
2393 priv_ep->enqueue = 0;
2394 priv_ep->dequeue = 0;
2395 reg = readl(&priv_dev->regs->ep_sts);
2396 priv_ep->pcs = !!EP_STS_CCS(reg);
2397 priv_ep->ccs = !!EP_STS_CCS(reg);
2398 /* one TRB is reserved for link TRB used in DMULT mode*/
2399 priv_ep->free_trbs = priv_ep->num_trbs - 1;
2401 spin_unlock_irqrestore(&priv_dev->lock, flags);
2407 * cdns3_gadget_ep_disable Disable endpoint
2408 * @ep: endpoint object
2410 * Returns 0 on success, error code elsewhere
2412 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2414 struct cdns3_endpoint *priv_ep;
2415 struct cdns3_request *priv_req;
2416 struct cdns3_device *priv_dev;
2417 struct usb_request *request;
2418 unsigned long flags;
2424 pr_err("usbss: invalid parameters\n");
2428 priv_ep = ep_to_cdns3_ep(ep);
2429 priv_dev = priv_ep->cdns3_dev;
2431 if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2432 "%s is already disabled\n", priv_ep->name))
2435 spin_lock_irqsave(&priv_dev->lock, flags);
2437 trace_cdns3_gadget_ep_disable(priv_ep);
2439 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2441 ep_cfg = readl(&priv_dev->regs->ep_cfg);
2442 ep_cfg &= ~EP_CFG_ENABLE;
2443 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2446 * Driver needs some time before resetting endpoint.
2447 * It need waits for clearing DBUSY bit or for timeout expired.
2448 * 10us is enough time for controller to stop transfer.
2450 readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2451 !(val & EP_STS_DBUSY), 1, 10);
2452 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2454 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2455 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2458 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2461 while (!list_empty(&priv_ep->pending_req_list)) {
2462 request = cdns3_next_request(&priv_ep->pending_req_list);
2464 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2468 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2469 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2471 kfree(priv_req->request.buf);
2472 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2473 &priv_req->request);
2474 list_del_init(&priv_req->list);
2475 --priv_ep->wa2_counter;
2478 while (!list_empty(&priv_ep->deferred_req_list)) {
2479 request = cdns3_next_request(&priv_ep->deferred_req_list);
2481 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2485 priv_ep->descmis_req = NULL;
2488 priv_ep->flags &= ~EP_ENABLED;
2489 priv_ep->use_streams = false;
2491 spin_unlock_irqrestore(&priv_dev->lock, flags);
2497 * cdns3_gadget_ep_queue Transfer data on endpoint
2498 * @ep: endpoint object
2499 * @request: request object
2500 * @gfp_flags: gfp flags
2502 * Returns 0 on success, error code elsewhere
2504 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2505 struct usb_request *request,
2508 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2509 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2510 struct cdns3_request *priv_req;
2513 request->actual = 0;
2514 request->status = -EINPROGRESS;
2515 priv_req = to_cdns3_request(request);
2516 trace_cdns3_ep_queue(priv_req);
2518 if (priv_dev->dev_ver < DEV_VER_V2) {
2519 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2522 if (ret == EINPROGRESS)
2526 ret = cdns3_prepare_aligned_request_buf(priv_req);
2530 ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2531 usb_endpoint_dir_in(ep->desc));
2535 list_add_tail(&request->list, &priv_ep->deferred_req_list);
2538 * For stream capable endpoint if prime irq flag is set then only start
2540 * If hardware endpoint configuration has not been set yet then
2541 * just queue request in deferred list. Transfer will be started in
2542 * cdns3_set_hw_configuration.
2544 if (!request->stream_id) {
2545 if (priv_dev->hw_configured_flag &&
2546 !(priv_ep->flags & EP_STALLED) &&
2547 !(priv_ep->flags & EP_STALL_PENDING))
2548 cdns3_start_all_request(priv_dev, priv_ep);
2550 if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2551 cdns3_start_all_request(priv_dev, priv_ep);
2557 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2560 struct usb_request *zlp_request;
2561 struct cdns3_endpoint *priv_ep;
2562 struct cdns3_device *priv_dev;
2563 unsigned long flags;
2566 if (!request || !ep)
2569 priv_ep = ep_to_cdns3_ep(ep);
2570 priv_dev = priv_ep->cdns3_dev;
2572 spin_lock_irqsave(&priv_dev->lock, flags);
2574 ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2576 if (ret == 0 && request->zero && request->length &&
2577 (request->length % ep->maxpacket == 0)) {
2578 struct cdns3_request *priv_req;
2580 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2581 zlp_request->buf = priv_dev->zlp_buf;
2582 zlp_request->length = 0;
2584 priv_req = to_cdns3_request(zlp_request);
2585 priv_req->flags |= REQUEST_ZLP;
2587 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2589 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2592 spin_unlock_irqrestore(&priv_dev->lock, flags);
2597 * cdns3_gadget_ep_dequeue Remove request from transfer queue
2598 * @ep: endpoint object associated with request
2599 * @request: request object
2601 * Returns 0 on success, error code elsewhere
2603 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2604 struct usb_request *request)
2606 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2607 struct cdns3_device *priv_dev;
2608 struct usb_request *req, *req_temp;
2609 struct cdns3_request *priv_req;
2610 struct cdns3_trb *link_trb;
2611 u8 req_on_hw_ring = 0;
2612 unsigned long flags;
2615 if (!ep || !request || !ep->desc)
2618 priv_dev = priv_ep->cdns3_dev;
2620 spin_lock_irqsave(&priv_dev->lock, flags);
2622 priv_req = to_cdns3_request(request);
2624 trace_cdns3_ep_dequeue(priv_req);
2626 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2628 list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2630 if (request == req) {
2636 list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2645 link_trb = priv_req->trb;
2647 /* Update ring only if removed request is on pending_req_list list */
2648 if (req_on_hw_ring && link_trb) {
2649 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2650 ((priv_req->end_trb + 1) * TRB_SIZE)));
2651 link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2652 TRB_TYPE(TRB_LINK) | TRB_CHAIN);
2654 if (priv_ep->wa1_trb == priv_req->trb)
2655 cdns3_wa1_restore_cycle_bit(priv_ep);
2658 cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2661 spin_unlock_irqrestore(&priv_dev->lock, flags);
2666 * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
2667 * Should be called after acquiring spin_lock and selecting ep
2668 * @priv_ep: endpoint object to set stall on.
2670 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2672 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2674 trace_cdns3_halt(priv_ep, 1, 0);
2676 if (!(priv_ep->flags & EP_STALLED)) {
2677 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2679 if (!(ep_sts_reg & EP_STS_DBUSY))
2680 cdns3_ep_stall_flush(priv_ep);
2682 priv_ep->flags |= EP_STALL_PENDING;
2687 * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
2688 * Should be called after acquiring spin_lock and selecting ep
2689 * @priv_ep: endpoint object to clear stall on
2691 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2693 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2694 struct usb_request *request;
2695 struct cdns3_request *priv_req;
2696 struct cdns3_trb *trb = NULL;
2697 struct cdns3_trb trb_tmp;
2701 trace_cdns3_halt(priv_ep, 0, 0);
2703 request = cdns3_next_request(&priv_ep->pending_req_list);
2705 priv_req = to_cdns3_request(request);
2706 trb = priv_req->trb;
2709 trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2713 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2715 /* wait for EPRST cleared */
2716 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2717 !(val & EP_CMD_EPRST), 1, 100);
2721 priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2727 cdns3_rearm_transfer(priv_ep, 1);
2730 cdns3_start_all_request(priv_dev, priv_ep);
2735 * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
2736 * @ep: endpoint object to set/clear stall on
2737 * @value: 1 for set stall, 0 for clear stall
2739 * Returns 0 on success, error code elsewhere
2741 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2743 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2744 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2745 unsigned long flags;
2748 if (!(priv_ep->flags & EP_ENABLED))
2751 spin_lock_irqsave(&priv_dev->lock, flags);
2753 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2756 priv_ep->flags &= ~EP_WEDGE;
2757 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2759 __cdns3_gadget_ep_set_halt(priv_ep);
2762 spin_unlock_irqrestore(&priv_dev->lock, flags);
2767 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2769 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2770 .enable = cdns3_gadget_ep_enable,
2771 .disable = cdns3_gadget_ep_disable,
2772 .alloc_request = cdns3_gadget_ep_alloc_request,
2773 .free_request = cdns3_gadget_ep_free_request,
2774 .queue = cdns3_gadget_ep_queue,
2775 .dequeue = cdns3_gadget_ep_dequeue,
2776 .set_halt = cdns3_gadget_ep_set_halt,
2777 .set_wedge = cdns3_gadget_ep_set_wedge,
2781 * cdns3_gadget_get_frame Returns number of actual ITP frame
2782 * @gadget: gadget object
2784 * Returns number of actual ITP frame
2786 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2788 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2790 return readl(&priv_dev->regs->usb_itpn);
2793 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2795 enum usb_device_speed speed;
2797 speed = cdns3_get_speed(priv_dev);
2799 if (speed >= USB_SPEED_SUPER)
2802 /* Start driving resume signaling to indicate remote wakeup. */
2803 writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2808 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2810 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2811 unsigned long flags;
2814 spin_lock_irqsave(&priv_dev->lock, flags);
2815 ret = __cdns3_gadget_wakeup(priv_dev);
2816 spin_unlock_irqrestore(&priv_dev->lock, flags);
2820 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2823 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2824 unsigned long flags;
2826 spin_lock_irqsave(&priv_dev->lock, flags);
2827 priv_dev->is_selfpowered = !!is_selfpowered;
2828 spin_unlock_irqrestore(&priv_dev->lock, flags);
2832 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2834 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2837 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2839 writel(~0, &priv_dev->regs->ep_ists);
2840 writel(~0, &priv_dev->regs->usb_ists);
2841 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2847 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2849 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2852 cdns3_ep0_config(priv_dev);
2854 /* enable interrupts for endpoint 0 (in and out) */
2855 writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, ®s->ep_ien);
2858 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2859 * revision of controller.
2861 if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2862 reg = readl(®s->dbg_link1);
2864 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2865 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2866 DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2867 writel(reg, ®s->dbg_link1);
2871 * By default some platforms has set protected access to memory.
2872 * This cause problem with cache, so driver restore non-secure
2875 reg = readl(®s->dma_axi_ctrl);
2876 reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2877 DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2878 writel(reg, ®s->dma_axi_ctrl);
2880 /* enable generic interrupt*/
2881 writel(USB_IEN_INIT, ®s->usb_ien);
2882 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf);
2883 /* keep Fast Access bit */
2884 writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
2886 cdns3_configure_dmult(priv_dev, NULL);
2890 * cdns3_gadget_udc_start Gadget start
2891 * @gadget: gadget object
2892 * @driver: driver which operates on this gadget
2894 * Returns 0 on success, error code elsewhere
2896 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2897 struct usb_gadget_driver *driver)
2899 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2900 unsigned long flags;
2901 enum usb_device_speed max_speed = driver->max_speed;
2903 spin_lock_irqsave(&priv_dev->lock, flags);
2904 priv_dev->gadget_driver = driver;
2906 /* limit speed if necessary */
2907 max_speed = min(driver->max_speed, gadget->max_speed);
2909 switch (max_speed) {
2910 case USB_SPEED_FULL:
2911 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2912 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2914 case USB_SPEED_HIGH:
2915 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2917 case USB_SPEED_SUPER:
2920 dev_err(priv_dev->dev,
2921 "invalid maximum_speed parameter %d\n",
2924 case USB_SPEED_UNKNOWN:
2925 /* default to superspeed */
2926 max_speed = USB_SPEED_SUPER;
2930 cdns3_gadget_config(priv_dev);
2931 spin_unlock_irqrestore(&priv_dev->lock, flags);
2936 * cdns3_gadget_udc_stop Stops gadget
2937 * @gadget: gadget object
2941 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2943 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2944 struct cdns3_endpoint *priv_ep;
2945 u32 bEndpointAddress;
2949 priv_dev->gadget_driver = NULL;
2951 priv_dev->onchip_used_size = 0;
2952 priv_dev->out_mem_is_allocated = 0;
2953 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2955 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2956 priv_ep = ep_to_cdns3_ep(ep);
2957 bEndpointAddress = priv_ep->num | priv_ep->dir;
2958 cdns3_select_ep(priv_dev, bEndpointAddress);
2959 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2960 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2961 !(val & EP_CMD_EPRST), 1, 100);
2963 priv_ep->flags &= ~EP_CLAIMED;
2966 /* disable interrupt for device */
2967 writel(0, &priv_dev->regs->usb_ien);
2968 writel(0, &priv_dev->regs->usb_pwr);
2969 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2974 static const struct usb_gadget_ops cdns3_gadget_ops = {
2975 .get_frame = cdns3_gadget_get_frame,
2976 .wakeup = cdns3_gadget_wakeup,
2977 .set_selfpowered = cdns3_gadget_set_selfpowered,
2978 .pullup = cdns3_gadget_pullup,
2979 .udc_start = cdns3_gadget_udc_start,
2980 .udc_stop = cdns3_gadget_udc_stop,
2981 .match_ep = cdns3_gadget_match_ep,
2984 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
2988 /* ep0 OUT point to ep0 IN. */
2989 priv_dev->eps[16] = NULL;
2991 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
2992 if (priv_dev->eps[i]) {
2993 cdns3_free_trb_pool(priv_dev->eps[i]);
2994 devm_kfree(priv_dev->dev, priv_dev->eps[i]);
2999 * cdns3_init_eps Initializes software endpoints of gadget
3000 * @priv_dev: extended gadget object
3002 * Returns 0 on success, error code elsewhere
3004 static int cdns3_init_eps(struct cdns3_device *priv_dev)
3006 u32 ep_enabled_reg, iso_ep_reg;
3007 struct cdns3_endpoint *priv_ep;
3008 int ep_dir, ep_number;
3013 /* Read it from USB_CAP3 to USB_CAP5 */
3014 ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
3015 iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
3017 dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
3019 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
3020 ep_dir = i >> 4; /* i div 16 */
3021 ep_number = i & 0xF; /* i % 16 */
3024 if (!(ep_enabled_reg & ep_mask))
3027 if (ep_dir && !ep_number) {
3028 priv_dev->eps[i] = priv_dev->eps[0];
3032 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
3037 /* set parent of endpoint object */
3038 priv_ep->cdns3_dev = priv_dev;
3039 priv_dev->eps[i] = priv_ep;
3040 priv_ep->num = ep_number;
3041 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
3044 ret = cdns3_init_ep0(priv_dev, priv_ep);
3046 dev_err(priv_dev->dev, "Failed to init ep0\n");
3050 snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
3051 ep_number, !!ep_dir ? "in" : "out");
3052 priv_ep->endpoint.name = priv_ep->name;
3054 usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
3055 CDNS3_EP_MAX_PACKET_LIMIT);
3056 priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
3057 priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
3059 priv_ep->endpoint.caps.dir_in = 1;
3061 priv_ep->endpoint.caps.dir_out = 1;
3063 if (iso_ep_reg & ep_mask)
3064 priv_ep->endpoint.caps.type_iso = 1;
3066 priv_ep->endpoint.caps.type_bulk = 1;
3067 priv_ep->endpoint.caps.type_int = 1;
3069 list_add_tail(&priv_ep->endpoint.ep_list,
3070 &priv_dev->gadget.ep_list);
3075 dev_dbg(priv_dev->dev, "Initialized %s support: %s %s\n",
3077 priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
3078 priv_ep->endpoint.caps.type_iso ? "ISO" : "");
3080 INIT_LIST_HEAD(&priv_ep->pending_req_list);
3081 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
3082 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
3087 cdns3_free_all_eps(priv_dev);
3091 static void cdns3_gadget_release(struct device *dev)
3093 struct cdns3_device *priv_dev = container_of(dev,
3094 struct cdns3_device, gadget.dev);
3099 void cdns3_gadget_exit(struct cdns3 *cdns)
3101 struct cdns3_device *priv_dev;
3103 priv_dev = cdns->gadget_dev;
3106 pm_runtime_mark_last_busy(cdns->dev);
3107 pm_runtime_put_autosuspend(cdns->dev);
3109 usb_del_gadget(&priv_dev->gadget);
3110 devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
3112 cdns3_free_all_eps(priv_dev);
3114 while (!list_empty(&priv_dev->aligned_buf_list)) {
3115 struct cdns3_aligned_buf *buf;
3117 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3118 dma_free_coherent(priv_dev->sysdev, buf->size,
3122 list_del(&buf->list);
3126 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3127 priv_dev->setup_dma);
3129 kfree(priv_dev->zlp_buf);
3130 usb_put_gadget(&priv_dev->gadget);
3131 cdns->gadget_dev = NULL;
3132 cdns3_drd_gadget_off(cdns);
3135 static int cdns3_gadget_start(struct cdns3 *cdns)
3137 struct cdns3_device *priv_dev;
3141 priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3145 usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3146 cdns3_gadget_release);
3147 cdns->gadget_dev = priv_dev;
3148 priv_dev->sysdev = cdns->dev;
3149 priv_dev->dev = cdns->dev;
3150 priv_dev->regs = cdns->dev_regs;
3152 device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3153 &priv_dev->onchip_buffers);
3155 if (priv_dev->onchip_buffers <= 0) {
3156 u32 reg = readl(&priv_dev->regs->usb_cap2);
3158 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3161 if (!priv_dev->onchip_buffers)
3162 priv_dev->onchip_buffers = 256;
3164 max_speed = usb_get_maximum_speed(cdns->dev);
3166 /* Check the maximum_speed parameter */
3167 switch (max_speed) {
3168 case USB_SPEED_FULL:
3169 case USB_SPEED_HIGH:
3170 case USB_SPEED_SUPER:
3173 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3176 case USB_SPEED_UNKNOWN:
3177 /* default to superspeed */
3178 max_speed = USB_SPEED_SUPER;
3182 /* fill gadget fields */
3183 priv_dev->gadget.max_speed = max_speed;
3184 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3185 priv_dev->gadget.ops = &cdns3_gadget_ops;
3186 priv_dev->gadget.name = "usb-ss-gadget";
3187 priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3188 priv_dev->gadget.irq = cdns->dev_irq;
3190 spin_lock_init(&priv_dev->lock);
3191 INIT_WORK(&priv_dev->pending_status_wq,
3192 cdns3_pending_setup_status_handler);
3194 INIT_WORK(&priv_dev->aligned_buf_wq,
3195 cdns3_free_aligned_request_buf);
3197 /* initialize endpoint container */
3198 INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3199 INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3201 ret = cdns3_init_eps(priv_dev);
3203 dev_err(priv_dev->dev, "Failed to create endpoints\n");
3207 /* allocate memory for setup packet buffer */
3208 priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3209 &priv_dev->setup_dma, GFP_DMA);
3210 if (!priv_dev->setup_buf) {
3215 priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3217 dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3218 readl(&priv_dev->regs->usb_cap6));
3219 dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3220 readl(&priv_dev->regs->usb_cap1));
3221 dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3222 readl(&priv_dev->regs->usb_cap2));
3224 priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3225 if (priv_dev->dev_ver >= DEV_VER_V2)
3226 priv_dev->gadget.sg_supported = 1;
3228 priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3229 if (!priv_dev->zlp_buf) {
3234 /* add USB gadget device */
3235 ret = usb_add_gadget(&priv_dev->gadget);
3237 dev_err(priv_dev->dev, "Failed to add gadget\n");
3243 kfree(priv_dev->zlp_buf);
3245 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3246 priv_dev->setup_dma);
3248 cdns3_free_all_eps(priv_dev);
3250 usb_put_gadget(&priv_dev->gadget);
3251 cdns->gadget_dev = NULL;
3255 static int __cdns3_gadget_init(struct cdns3 *cdns)
3259 /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3260 ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3262 dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3266 cdns3_drd_gadget_on(cdns);
3267 pm_runtime_get_sync(cdns->dev);
3269 ret = cdns3_gadget_start(cdns);
3271 pm_runtime_put_sync(cdns->dev);
3276 * Because interrupt line can be shared with other components in
3277 * driver it can't use IRQF_ONESHOT flag here.
3279 ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3280 cdns3_device_irq_handler,
3281 cdns3_device_thread_irq_handler,
3282 IRQF_SHARED, dev_name(cdns->dev),
3290 cdns3_gadget_exit(cdns);
3294 static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
3295 __must_hold(&cdns->lock)
3297 struct cdns3_device *priv_dev = cdns->gadget_dev;
3299 spin_unlock(&cdns->lock);
3300 cdns3_disconnect_gadget(priv_dev);
3301 spin_lock(&cdns->lock);
3303 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3304 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3305 cdns3_hw_reset_eps_config(priv_dev);
3307 /* disable interrupt for device */
3308 writel(0, &priv_dev->regs->usb_ien);
3313 static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
3315 struct cdns3_device *priv_dev = cdns->gadget_dev;
3317 if (!priv_dev->gadget_driver)
3320 cdns3_gadget_config(priv_dev);
3326 * cdns3_gadget_init - initialize device structure
3328 * @cdns: cdns3 instance
3330 * This function initializes the gadget.
3332 int cdns3_gadget_init(struct cdns3 *cdns)
3334 struct cdns3_role_driver *rdrv;
3336 rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3340 rdrv->start = __cdns3_gadget_init;
3341 rdrv->stop = cdns3_gadget_exit;
3342 rdrv->suspend = cdns3_gadget_suspend;
3343 rdrv->resume = cdns3_gadget_resume;
3344 rdrv->state = CDNS3_ROLE_STATE_INACTIVE;
3345 rdrv->name = "gadget";
3346 cdns->roles[USB_ROLE_DEVICE] = rdrv;