GNU Linux-libre 6.7.9-gnu
[releases.git] / drivers / usb / cdns3 / cdns3-gadget.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cadence USBSS DRD Driver - gadget side.
4  *
5  * Copyright (C) 2018-2019 Cadence Design Systems.
6  * Copyright (C) 2017-2018 NXP
7  *
8  * Authors: Pawel Jez <pjez@cadence.com>,
9  *          Pawel Laszczak <pawell@cadence.com>
10  *          Peter Chen <peter.chen@nxp.com>
11  */
12
13 /*
14  * Work around 1:
15  * At some situations, the controller may get stale data address in TRB
16  * at below sequences:
17  * 1. Controller read TRB includes data address
18  * 2. Software updates TRBs includes data address and Cycle bit
19  * 3. Controller read TRB which includes Cycle bit
20  * 4. DMA run with stale data address
21  *
22  * To fix this problem, driver needs to make the first TRB in TD as invalid.
23  * After preparing all TRBs driver needs to check the position of DMA and
24  * if the DMA point to the first just added TRB and doorbell is 1,
25  * then driver must defer making this TRB as valid. This TRB will be make
26  * as valid during adding next TRB only if DMA is stopped or at TRBERR
27  * interrupt.
28  *
29  * Issue has been fixed in DEV_VER_V3 version of controller.
30  *
31  * Work around 2:
32  * Controller for OUT endpoints has shared on-chip buffers for all incoming
33  * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34  * in correct order. If the first packet in the buffer will not be handled,
35  * then the following packets directed for other endpoints and  functions
36  * will be blocked.
37  * Additionally the packets directed to one endpoint can block entire on-chip
38  * buffers. In this case transfer to other endpoints also will blocked.
39  *
40  * To resolve this issue after raising the descriptor missing interrupt
41  * driver prepares internal usb_request object and use it to arm DMA transfer.
42  *
43  * The problematic situation was observed in case when endpoint has been enabled
44  * but no usb_request were queued. Driver try detects such endpoints and will
45  * use this workaround only for these endpoint.
46  *
47  * Driver use limited number of buffer. This number can be set by macro
48  * CDNS3_WA2_NUM_BUFFERS.
49  *
50  * Such blocking situation was observed on ACM gadget. For this function
51  * host send OUT data packet but ACM function is not prepared for this packet.
52  * It's cause that buffer placed in on chip memory block transfer to other
53  * endpoints.
54  *
55  * Issue has been fixed in DEV_VER_V2 version of controller.
56  *
57  */
58
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/dmapool.h>
63 #include <linux/iopoll.h>
64 #include <linux/property.h>
65
66 #include "core.h"
67 #include "gadget-export.h"
68 #include "cdns3-gadget.h"
69 #include "cdns3-trace.h"
70 #include "drd.h"
71
72 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
73                                    struct usb_request *request,
74                                    gfp_t gfp_flags);
75
76 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
77                                  struct usb_request *request);
78
79 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
80                                         struct usb_request *request);
81
82 /**
83  * cdns3_clear_register_bit - clear bit in given register.
84  * @ptr: address of device controller register to be read and changed
85  * @mask: bits requested to clar
86  */
87 static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
88 {
89         mask = readl(ptr) & ~mask;
90         writel(mask, ptr);
91 }
92
93 /**
94  * cdns3_set_register_bit - set bit in given register.
95  * @ptr: address of device controller register to be read and changed
96  * @mask: bits requested to set
97  */
98 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
99 {
100         mask = readl(ptr) | mask;
101         writel(mask, ptr);
102 }
103
104 /**
105  * cdns3_ep_addr_to_index - Macro converts endpoint address to
106  * index of endpoint object in cdns3_device.eps[] container
107  * @ep_addr: endpoint address for which endpoint object is required
108  *
109  */
110 u8 cdns3_ep_addr_to_index(u8 ep_addr)
111 {
112         return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
113 }
114
115 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
116                              struct cdns3_endpoint *priv_ep)
117 {
118         int dma_index;
119
120         dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
121
122         return dma_index / TRB_SIZE;
123 }
124
125 /**
126  * cdns3_next_request - returns next request from list
127  * @list: list containing requests
128  *
129  * Returns request or NULL if no requests in list
130  */
131 struct usb_request *cdns3_next_request(struct list_head *list)
132 {
133         return list_first_entry_or_null(list, struct usb_request, list);
134 }
135
136 /**
137  * cdns3_next_align_buf - returns next buffer from list
138  * @list: list containing buffers
139  *
140  * Returns buffer or NULL if no buffers in list
141  */
142 static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
143 {
144         return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
145 }
146
147 /**
148  * cdns3_next_priv_request - returns next request from list
149  * @list: list containing requests
150  *
151  * Returns request or NULL if no requests in list
152  */
153 static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
154 {
155         return list_first_entry_or_null(list, struct cdns3_request, list);
156 }
157
158 /**
159  * cdns3_select_ep - selects endpoint
160  * @priv_dev:  extended gadget object
161  * @ep: endpoint address
162  */
163 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
164 {
165         if (priv_dev->selected_ep == ep)
166                 return;
167
168         priv_dev->selected_ep = ep;
169         writel(ep, &priv_dev->regs->ep_sel);
170 }
171
172 /**
173  * cdns3_get_tdl - gets current tdl for selected endpoint.
174  * @priv_dev:  extended gadget object
175  *
176  * Before calling this function the appropriate endpoint must
177  * be selected by means of cdns3_select_ep function.
178  */
179 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
180 {
181         if (priv_dev->dev_ver < DEV_VER_V3)
182                 return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
183         else
184                 return readl(&priv_dev->regs->ep_tdl);
185 }
186
187 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
188                                  struct cdns3_trb *trb)
189 {
190         u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
191
192         return priv_ep->trb_pool_dma + offset;
193 }
194
195 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
196 {
197         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
198
199         if (priv_ep->trb_pool) {
200                 dma_pool_free(priv_dev->eps_dma_pool,
201                               priv_ep->trb_pool, priv_ep->trb_pool_dma);
202                 priv_ep->trb_pool = NULL;
203         }
204 }
205
206 /**
207  * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
208  * @priv_ep:  endpoint object
209  *
210  * Function will return 0 on success or -ENOMEM on allocation error
211  */
212 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
213 {
214         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
215         int ring_size = TRB_RING_SIZE;
216         int num_trbs = ring_size / TRB_SIZE;
217         struct cdns3_trb *link_trb;
218
219         if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
220                 cdns3_free_trb_pool(priv_ep);
221
222         if (!priv_ep->trb_pool) {
223                 priv_ep->trb_pool = dma_pool_alloc(priv_dev->eps_dma_pool,
224                                                    GFP_ATOMIC,
225                                                    &priv_ep->trb_pool_dma);
226
227                 if (!priv_ep->trb_pool)
228                         return -ENOMEM;
229
230                 priv_ep->alloc_ring_size = ring_size;
231         }
232
233         memset(priv_ep->trb_pool, 0, ring_size);
234
235         priv_ep->num_trbs = num_trbs;
236
237         if (!priv_ep->num)
238                 return 0;
239
240         /* Initialize the last TRB as Link TRB */
241         link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
242
243         if (priv_ep->use_streams) {
244                 /*
245                  * For stream capable endpoints driver use single correct TRB.
246                  * The last trb has zeroed cycle bit
247                  */
248                 link_trb->control = 0;
249         } else {
250                 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
251                 link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
252         }
253         return 0;
254 }
255
256 /**
257  * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
258  * @priv_ep: endpoint object
259  *
260  * Endpoint must be selected before call to this function
261  */
262 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
263 {
264         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
265         int val;
266
267         trace_cdns3_halt(priv_ep, 1, 1);
268
269         writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
270                &priv_dev->regs->ep_cmd);
271
272         /* wait for DFLUSH cleared */
273         readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
274                                   !(val & EP_CMD_DFLUSH), 1, 1000);
275         priv_ep->flags |= EP_STALLED;
276         priv_ep->flags &= ~EP_STALL_PENDING;
277 }
278
279 /**
280  * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
281  * @priv_dev: extended gadget object
282  */
283 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
284 {
285         int i;
286
287         writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
288
289         cdns3_allow_enable_l1(priv_dev, 0);
290         priv_dev->hw_configured_flag = 0;
291         priv_dev->onchip_used_size = 0;
292         priv_dev->out_mem_is_allocated = 0;
293         priv_dev->wait_for_setup = 0;
294         priv_dev->using_streams = 0;
295
296         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
297                 if (priv_dev->eps[i])
298                         priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
299 }
300
301 /**
302  * cdns3_ep_inc_trb - increment a trb index.
303  * @index: Pointer to the TRB index to increment.
304  * @cs: Cycle state
305  * @trb_in_seg: number of TRBs in segment
306  *
307  * The index should never point to the link TRB. After incrementing,
308  * if it is point to the link TRB, wrap around to the beginning and revert
309  * cycle state bit The
310  * link TRB is always at the last TRB entry.
311  */
312 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
313 {
314         (*index)++;
315         if (*index == (trb_in_seg - 1)) {
316                 *index = 0;
317                 *cs ^=  1;
318         }
319 }
320
321 /**
322  * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
323  * @priv_ep: The endpoint whose enqueue pointer we're incrementing
324  */
325 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
326 {
327         priv_ep->free_trbs--;
328         cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
329 }
330
331 /**
332  * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
333  * @priv_ep: The endpoint whose dequeue pointer we're incrementing
334  */
335 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
336 {
337         priv_ep->free_trbs++;
338         cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
339 }
340
341 /**
342  * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
343  * @priv_dev: Extended gadget object
344  * @enable: Enable/disable permit to transition to L1.
345  *
346  * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
347  * then controller answer with ACK handshake.
348  * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
349  * then controller answer with NYET handshake.
350  */
351 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
352 {
353         if (enable)
354                 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
355         else
356                 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
357 }
358
359 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
360 {
361         u32 reg;
362
363         reg = readl(&priv_dev->regs->usb_sts);
364
365         if (DEV_SUPERSPEED(reg))
366                 return USB_SPEED_SUPER;
367         else if (DEV_HIGHSPEED(reg))
368                 return USB_SPEED_HIGH;
369         else if (DEV_FULLSPEED(reg))
370                 return USB_SPEED_FULL;
371         else if (DEV_LOWSPEED(reg))
372                 return USB_SPEED_LOW;
373         return USB_SPEED_UNKNOWN;
374 }
375
376 /**
377  * cdns3_start_all_request - add to ring all request not started
378  * @priv_dev: Extended gadget object
379  * @priv_ep: The endpoint for whom request will be started.
380  *
381  * Returns return ENOMEM if transfer ring i not enough TRBs to start
382  *         all requests.
383  */
384 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
385                                    struct cdns3_endpoint *priv_ep)
386 {
387         struct usb_request *request;
388         int ret = 0;
389         u8 pending_empty = list_empty(&priv_ep->pending_req_list);
390
391         /*
392          * If the last pending transfer is INTERNAL
393          * OR streams are enabled for this endpoint
394          * do NOT start new transfer till the last one is pending
395          */
396         if (!pending_empty) {
397                 struct cdns3_request *priv_req;
398
399                 request = cdns3_next_request(&priv_ep->pending_req_list);
400                 priv_req = to_cdns3_request(request);
401                 if ((priv_req->flags & REQUEST_INTERNAL) ||
402                     (priv_ep->flags & EP_TDLCHK_EN) ||
403                         priv_ep->use_streams) {
404                         dev_dbg(priv_dev->dev, "Blocking external request\n");
405                         return ret;
406                 }
407         }
408
409         while (!list_empty(&priv_ep->deferred_req_list)) {
410                 request = cdns3_next_request(&priv_ep->deferred_req_list);
411
412                 if (!priv_ep->use_streams) {
413                         ret = cdns3_ep_run_transfer(priv_ep, request);
414                 } else {
415                         priv_ep->stream_sg_idx = 0;
416                         ret = cdns3_ep_run_stream_transfer(priv_ep, request);
417                 }
418                 if (ret)
419                         return ret;
420
421                 list_move_tail(&request->list, &priv_ep->pending_req_list);
422                 if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
423                         break;
424         }
425
426         priv_ep->flags &= ~EP_RING_FULL;
427         return ret;
428 }
429
430 /*
431  * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
432  * driver try to detect whether endpoint need additional internal
433  * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
434  * if before first DESCMISS interrupt the DMA will be armed.
435  */
436 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
437         if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
438                 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
439                 (reg) |= EP_STS_EN_DESCMISEN; \
440         } } while (0)
441
442 static void __cdns3_descmiss_copy_data(struct usb_request *request,
443         struct usb_request *descmiss_req)
444 {
445         int length = request->actual + descmiss_req->actual;
446         struct scatterlist *s = request->sg;
447
448         if (!s) {
449                 if (length <= request->length) {
450                         memcpy(&((u8 *)request->buf)[request->actual],
451                                descmiss_req->buf,
452                                descmiss_req->actual);
453                         request->actual = length;
454                 } else {
455                         /* It should never occures */
456                         request->status = -ENOMEM;
457                 }
458         } else {
459                 if (length <= sg_dma_len(s)) {
460                         void *p = phys_to_virt(sg_dma_address(s));
461
462                         memcpy(&((u8 *)p)[request->actual],
463                                 descmiss_req->buf,
464                                 descmiss_req->actual);
465                         request->actual = length;
466                 } else {
467                         request->status = -ENOMEM;
468                 }
469         }
470 }
471
472 /**
473  * cdns3_wa2_descmiss_copy_data - copy data from internal requests to
474  * request queued by class driver.
475  * @priv_ep: extended endpoint object
476  * @request: request object
477  */
478 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
479                                          struct usb_request *request)
480 {
481         struct usb_request *descmiss_req;
482         struct cdns3_request *descmiss_priv_req;
483
484         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
485                 int chunk_end;
486
487                 descmiss_priv_req =
488                         cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
489                 descmiss_req = &descmiss_priv_req->request;
490
491                 /* driver can't touch pending request */
492                 if (descmiss_priv_req->flags & REQUEST_PENDING)
493                         break;
494
495                 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
496                 request->status = descmiss_req->status;
497                 __cdns3_descmiss_copy_data(request, descmiss_req);
498                 list_del_init(&descmiss_priv_req->list);
499                 kfree(descmiss_req->buf);
500                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
501                 --priv_ep->wa2_counter;
502
503                 if (!chunk_end)
504                         break;
505         }
506 }
507
508 static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
509                                                      struct cdns3_endpoint *priv_ep,
510                                                      struct cdns3_request *priv_req)
511 {
512         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
513             priv_req->flags & REQUEST_INTERNAL) {
514                 struct usb_request *req;
515
516                 req = cdns3_next_request(&priv_ep->deferred_req_list);
517
518                 priv_ep->descmis_req = NULL;
519
520                 if (!req)
521                         return NULL;
522
523                 /* unmap the gadget request before copying data */
524                 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
525                                                 priv_ep->dir);
526
527                 cdns3_wa2_descmiss_copy_data(priv_ep, req);
528                 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
529                     req->length != req->actual) {
530                         /* wait for next part of transfer */
531                         /* re-map the gadget request buffer*/
532                         usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
533                                 usb_endpoint_dir_in(priv_ep->endpoint.desc));
534                         return NULL;
535                 }
536
537                 if (req->status == -EINPROGRESS)
538                         req->status = 0;
539
540                 list_del_init(&req->list);
541                 cdns3_start_all_request(priv_dev, priv_ep);
542                 return req;
543         }
544
545         return &priv_req->request;
546 }
547
548 static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
549                                      struct cdns3_endpoint *priv_ep,
550                                      struct cdns3_request *priv_req)
551 {
552         int deferred = 0;
553
554         /*
555          * If transfer was queued before DESCMISS appear than we
556          * can disable handling of DESCMISS interrupt. Driver assumes that it
557          * can disable special treatment for this endpoint.
558          */
559         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
560                 u32 reg;
561
562                 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
563                 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
564                 reg = readl(&priv_dev->regs->ep_sts_en);
565                 reg &= ~EP_STS_EN_DESCMISEN;
566                 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
567                 writel(reg, &priv_dev->regs->ep_sts_en);
568         }
569
570         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
571                 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
572                 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
573
574                 /*
575                  *  DESCMISS transfer has been finished, so data will be
576                  *  directly copied from internal allocated usb_request
577                  *  objects.
578                  */
579                 if (pending_empty && !descmiss_empty &&
580                     !(priv_req->flags & REQUEST_INTERNAL)) {
581                         cdns3_wa2_descmiss_copy_data(priv_ep,
582                                                      &priv_req->request);
583
584                         trace_cdns3_wa2(priv_ep, "get internal stored data");
585
586                         list_add_tail(&priv_req->request.list,
587                                       &priv_ep->pending_req_list);
588                         cdns3_gadget_giveback(priv_ep, priv_req,
589                                               priv_req->request.status);
590
591                         /*
592                          * Intentionally driver returns positive value as
593                          * correct value. It informs that transfer has
594                          * been finished.
595                          */
596                         return EINPROGRESS;
597                 }
598
599                 /*
600                  * Driver will wait for completion DESCMISS transfer,
601                  * before starts new, not DESCMISS transfer.
602                  */
603                 if (!pending_empty && !descmiss_empty) {
604                         trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
605                         deferred = 1;
606                 }
607
608                 if (priv_req->flags & REQUEST_INTERNAL)
609                         list_add_tail(&priv_req->list,
610                                       &priv_ep->wa2_descmiss_req_list);
611         }
612
613         return deferred;
614 }
615
616 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
617 {
618         struct cdns3_request *priv_req;
619
620         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
621                 u8 chain;
622
623                 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
624                 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
625
626                 trace_cdns3_wa2(priv_ep, "removes eldest request");
627
628                 kfree(priv_req->request.buf);
629                 list_del_init(&priv_req->list);
630                 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
631                                              &priv_req->request);
632                 --priv_ep->wa2_counter;
633
634                 if (!chain)
635                         break;
636         }
637 }
638
639 /**
640  * cdns3_wa2_descmissing_packet - handles descriptor missing event.
641  * @priv_ep: extended gadget object
642  *
643  * This function is used only for WA2. For more information see Work around 2
644  * description.
645  */
646 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
647 {
648         struct cdns3_request *priv_req;
649         struct usb_request *request;
650         u8 pending_empty = list_empty(&priv_ep->pending_req_list);
651
652         /* check for pending transfer */
653         if (!pending_empty) {
654                 trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
655                 return;
656         }
657
658         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
659                 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
660                 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
661         }
662
663         trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
664
665         if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
666                 trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
667                 cdns3_wa2_remove_old_request(priv_ep);
668         }
669
670         request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
671                                                 GFP_ATOMIC);
672         if (!request)
673                 goto err;
674
675         priv_req = to_cdns3_request(request);
676         priv_req->flags |= REQUEST_INTERNAL;
677
678         /* if this field is still assigned it indicate that transfer related
679          * with this request has not been finished yet. Driver in this
680          * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
681          * flag to previous one. It will indicate that current request is
682          * part of the previous one.
683          */
684         if (priv_ep->descmis_req)
685                 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
686
687         priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
688                                         GFP_ATOMIC);
689         priv_ep->wa2_counter++;
690
691         if (!priv_req->request.buf) {
692                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
693                 goto err;
694         }
695
696         priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
697         priv_ep->descmis_req = priv_req;
698
699         __cdns3_gadget_ep_queue(&priv_ep->endpoint,
700                                 &priv_ep->descmis_req->request,
701                                 GFP_ATOMIC);
702
703         return;
704
705 err:
706         dev_err(priv_ep->cdns3_dev->dev,
707                 "Failed: No sufficient memory for DESCMIS\n");
708 }
709
710 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
711 {
712         u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
713
714         if (tdl) {
715                 u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
716
717                 writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
718                        &priv_dev->regs->ep_cmd);
719         }
720 }
721
722 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
723 {
724         u32 ep_sts_reg;
725
726         /* select EP0-out */
727         cdns3_select_ep(priv_dev, 0);
728
729         ep_sts_reg = readl(&priv_dev->regs->ep_sts);
730
731         if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
732                 u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
733                 struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
734
735                 if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
736                     outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
737                         u8 pending_empty = list_empty(&outq_ep->pending_req_list);
738
739                         if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
740                             (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
741                             !pending_empty) {
742                         } else {
743                                 u32 ep_sts_en_reg;
744                                 u32 ep_cmd_reg;
745
746                                 cdns3_select_ep(priv_dev, outq_ep->num |
747                                                 outq_ep->dir);
748                                 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
749                                 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
750
751                                 outq_ep->flags |= EP_TDLCHK_EN;
752                                 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
753                                                        EP_CFG_TDL_CHK);
754
755                                 cdns3_wa2_enable_detection(priv_dev, outq_ep,
756                                                            ep_sts_en_reg);
757                                 writel(ep_sts_en_reg,
758                                        &priv_dev->regs->ep_sts_en);
759                                 /* reset tdl value to zero */
760                                 cdns3_wa2_reset_tdl(priv_dev);
761                                 /*
762                                  * Memory barrier - Reset tdl before ringing the
763                                  * doorbell.
764                                  */
765                                 wmb();
766                                 if (EP_CMD_DRDY & ep_cmd_reg) {
767                                         trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
768
769                                 } else {
770                                         trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
771                                         /*
772                                          * ring doorbell to generate DESCMIS irq
773                                          */
774                                         writel(EP_CMD_DRDY,
775                                                &priv_dev->regs->ep_cmd);
776                                 }
777                         }
778                 }
779         }
780 }
781
782 /**
783  * cdns3_gadget_giveback - call struct usb_request's ->complete callback
784  * @priv_ep: The endpoint to whom the request belongs to
785  * @priv_req: The request we're giving back
786  * @status: completion code for the request
787  *
788  * Must be called with controller's lock held and interrupts disabled. This
789  * function will unmap @req and call its ->complete() callback to notify upper
790  * layers that it has completed.
791  */
792 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
793                            struct cdns3_request *priv_req,
794                            int status)
795 {
796         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
797         struct usb_request *request = &priv_req->request;
798
799         list_del_init(&request->list);
800
801         if (request->status == -EINPROGRESS)
802                 request->status = status;
803
804         if (likely(!(priv_req->flags & REQUEST_UNALIGNED)))
805                 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
806                                         priv_ep->dir);
807
808         if ((priv_req->flags & REQUEST_UNALIGNED) &&
809             priv_ep->dir == USB_DIR_OUT && !request->status) {
810                 /* Make DMA buffer CPU accessible */
811                 dma_sync_single_for_cpu(priv_dev->sysdev,
812                         priv_req->aligned_buf->dma,
813                         request->actual,
814                         priv_req->aligned_buf->dir);
815                 memcpy(request->buf, priv_req->aligned_buf->buf,
816                        request->actual);
817         }
818
819         priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
820         /* All TRBs have finished, clear the counter */
821         priv_req->finished_trb = 0;
822         trace_cdns3_gadget_giveback(priv_req);
823
824         if (priv_dev->dev_ver < DEV_VER_V2) {
825                 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
826                                                     priv_req);
827                 if (!request)
828                         return;
829         }
830
831         /*
832          * zlp request is appended by driver, needn't call usb_gadget_giveback_request() to notify
833          * gadget composite driver.
834          */
835         if (request->complete && request->buf != priv_dev->zlp_buf) {
836                 spin_unlock(&priv_dev->lock);
837                 usb_gadget_giveback_request(&priv_ep->endpoint,
838                                             request);
839                 spin_lock(&priv_dev->lock);
840         }
841
842         if (request->buf == priv_dev->zlp_buf)
843                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
844 }
845
846 static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
847 {
848         /* Work around for stale data address in TRB*/
849         if (priv_ep->wa1_set) {
850                 trace_cdns3_wa1(priv_ep, "restore cycle bit");
851
852                 priv_ep->wa1_set = 0;
853                 priv_ep->wa1_trb_index = 0xFFFF;
854                 if (priv_ep->wa1_cycle_bit) {
855                         priv_ep->wa1_trb->control =
856                                 priv_ep->wa1_trb->control | cpu_to_le32(0x1);
857                 } else {
858                         priv_ep->wa1_trb->control =
859                                 priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
860                 }
861         }
862 }
863
864 static void cdns3_free_aligned_request_buf(struct work_struct *work)
865 {
866         struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
867                                         aligned_buf_wq);
868         struct cdns3_aligned_buf *buf, *tmp;
869         unsigned long flags;
870
871         spin_lock_irqsave(&priv_dev->lock, flags);
872
873         list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
874                 if (!buf->in_use) {
875                         list_del(&buf->list);
876
877                         /*
878                          * Re-enable interrupts to free DMA capable memory.
879                          * Driver can't free this memory with disabled
880                          * interrupts.
881                          */
882                         spin_unlock_irqrestore(&priv_dev->lock, flags);
883                         dma_free_noncoherent(priv_dev->sysdev, buf->size,
884                                           buf->buf, buf->dma, buf->dir);
885                         kfree(buf);
886                         spin_lock_irqsave(&priv_dev->lock, flags);
887                 }
888         }
889
890         spin_unlock_irqrestore(&priv_dev->lock, flags);
891 }
892
893 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
894 {
895         struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
896         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
897         struct cdns3_aligned_buf *buf;
898
899         /* check if buffer is aligned to 8. */
900         if (!((uintptr_t)priv_req->request.buf & 0x7))
901                 return 0;
902
903         buf = priv_req->aligned_buf;
904
905         if (!buf || priv_req->request.length > buf->size) {
906                 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
907                 if (!buf)
908                         return -ENOMEM;
909
910                 buf->size = priv_req->request.length;
911                 buf->dir = usb_endpoint_dir_in(priv_ep->endpoint.desc) ?
912                         DMA_TO_DEVICE : DMA_FROM_DEVICE;
913
914                 buf->buf = dma_alloc_noncoherent(priv_dev->sysdev,
915                                               buf->size,
916                                               &buf->dma,
917                                               buf->dir,
918                                               GFP_ATOMIC);
919                 if (!buf->buf) {
920                         kfree(buf);
921                         return -ENOMEM;
922                 }
923
924                 if (priv_req->aligned_buf) {
925                         trace_cdns3_free_aligned_request(priv_req);
926                         priv_req->aligned_buf->in_use = 0;
927                         queue_work(system_freezable_wq,
928                                    &priv_dev->aligned_buf_wq);
929                 }
930
931                 buf->in_use = 1;
932                 priv_req->aligned_buf = buf;
933
934                 list_add_tail(&buf->list,
935                               &priv_dev->aligned_buf_list);
936         }
937
938         if (priv_ep->dir == USB_DIR_IN) {
939                 /* Make DMA buffer CPU accessible */
940                 dma_sync_single_for_cpu(priv_dev->sysdev,
941                         buf->dma, buf->size, buf->dir);
942                 memcpy(buf->buf, priv_req->request.buf,
943                        priv_req->request.length);
944         }
945
946         /* Transfer DMA buffer ownership back to device */
947         dma_sync_single_for_device(priv_dev->sysdev,
948                         buf->dma, buf->size, buf->dir);
949
950         priv_req->flags |= REQUEST_UNALIGNED;
951         trace_cdns3_prepare_aligned_request(priv_req);
952
953         return 0;
954 }
955
956 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
957                                   struct cdns3_trb *trb)
958 {
959         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
960
961         if (!priv_ep->wa1_set) {
962                 u32 doorbell;
963
964                 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
965
966                 if (doorbell) {
967                         priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
968                         priv_ep->wa1_set = 1;
969                         priv_ep->wa1_trb = trb;
970                         priv_ep->wa1_trb_index = priv_ep->enqueue;
971                         trace_cdns3_wa1(priv_ep, "set guard");
972                         return 0;
973                 }
974         }
975         return 1;
976 }
977
978 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
979                                              struct cdns3_endpoint *priv_ep)
980 {
981         int dma_index;
982         u32 doorbell;
983
984         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
985         dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
986
987         if (!doorbell || dma_index != priv_ep->wa1_trb_index)
988                 cdns3_wa1_restore_cycle_bit(priv_ep);
989 }
990
991 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
992                                         struct usb_request *request)
993 {
994         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
995         struct cdns3_request *priv_req;
996         struct cdns3_trb *trb;
997         dma_addr_t trb_dma;
998         int address;
999         u32 control;
1000         u32 length;
1001         u32 tdl;
1002         unsigned int sg_idx = priv_ep->stream_sg_idx;
1003
1004         priv_req = to_cdns3_request(request);
1005         address = priv_ep->endpoint.desc->bEndpointAddress;
1006
1007         priv_ep->flags |= EP_PENDING_REQUEST;
1008
1009         /* must allocate buffer aligned to 8 */
1010         if (priv_req->flags & REQUEST_UNALIGNED)
1011                 trb_dma = priv_req->aligned_buf->dma;
1012         else
1013                 trb_dma = request->dma;
1014
1015         /*  For stream capable endpoints driver use only single TD. */
1016         trb = priv_ep->trb_pool + priv_ep->enqueue;
1017         priv_req->start_trb = priv_ep->enqueue;
1018         priv_req->end_trb = priv_req->start_trb;
1019         priv_req->trb = trb;
1020
1021         cdns3_select_ep(priv_ep->cdns3_dev, address);
1022
1023         control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1024                   TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1025
1026         if (!request->num_sgs) {
1027                 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1028                 length = request->length;
1029         } else {
1030                 trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
1031                 length = request->sg[sg_idx].length;
1032         }
1033
1034         tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1035
1036         trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
1037
1038         /*
1039          * For DEV_VER_V2 controller version we have enabled
1040          * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1041          * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1042          */
1043         if (priv_dev->dev_ver >= DEV_VER_V2) {
1044                 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1045                         trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
1046         }
1047         priv_req->flags |= REQUEST_PENDING;
1048
1049         trb->control = cpu_to_le32(control);
1050
1051         trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1052
1053         /*
1054          * Memory barrier - Cycle Bit must be set before trb->length  and
1055          * trb->buffer fields.
1056          */
1057         wmb();
1058
1059         /* always first element */
1060         writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1061                &priv_dev->regs->ep_traddr);
1062
1063         if (!(priv_ep->flags & EP_STALLED)) {
1064                 trace_cdns3_ring(priv_ep);
1065                 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1066                 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1067
1068                 priv_ep->prime_flag = false;
1069
1070                 /*
1071                  * Controller version DEV_VER_V2 tdl calculation
1072                  * is based on TRB
1073                  */
1074
1075                 if (priv_dev->dev_ver < DEV_VER_V2)
1076                         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1077                                &priv_dev->regs->ep_cmd);
1078                 else if (priv_dev->dev_ver > DEV_VER_V2)
1079                         writel(tdl, &priv_dev->regs->ep_tdl);
1080
1081                 priv_ep->last_stream_id = priv_req->request.stream_id;
1082                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1083                 writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1084                        EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1085
1086                 trace_cdns3_doorbell_epx(priv_ep->name,
1087                                          readl(&priv_dev->regs->ep_traddr));
1088         }
1089
1090         /* WORKAROUND for transition to L0 */
1091         __cdns3_gadget_wakeup(priv_dev);
1092
1093         return 0;
1094 }
1095
1096 static void cdns3_rearm_drdy_if_needed(struct cdns3_endpoint *priv_ep)
1097 {
1098         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1099
1100         if (priv_dev->dev_ver < DEV_VER_V3)
1101                 return;
1102
1103         if (readl(&priv_dev->regs->ep_sts) & EP_STS_TRBERR) {
1104                 writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts);
1105                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1106         }
1107 }
1108
1109 /**
1110  * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1111  * @priv_ep: endpoint object
1112  * @request: request object
1113  *
1114  * Returns zero on success or negative value on failure
1115  */
1116 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1117                                  struct usb_request *request)
1118 {
1119         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1120         struct cdns3_request *priv_req;
1121         struct cdns3_trb *trb;
1122         struct cdns3_trb *link_trb = NULL;
1123         dma_addr_t trb_dma;
1124         u32 togle_pcs = 1;
1125         int sg_iter = 0;
1126         int num_trb_req;
1127         int trb_burst;
1128         int num_trb;
1129         int address;
1130         u32 control;
1131         int pcs;
1132         u16 total_tdl = 0;
1133         struct scatterlist *s = NULL;
1134         bool sg_supported = !!(request->num_mapped_sgs);
1135
1136         num_trb_req = sg_supported ? request->num_mapped_sgs : 1;
1137
1138         /* ISO transfer require each SOF have a TD, each TD include some TRBs */
1139         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1140                 num_trb = priv_ep->interval * num_trb_req;
1141         else
1142                 num_trb = num_trb_req;
1143
1144         priv_req = to_cdns3_request(request);
1145         address = priv_ep->endpoint.desc->bEndpointAddress;
1146
1147         priv_ep->flags |= EP_PENDING_REQUEST;
1148
1149         /* must allocate buffer aligned to 8 */
1150         if (priv_req->flags & REQUEST_UNALIGNED)
1151                 trb_dma = priv_req->aligned_buf->dma;
1152         else
1153                 trb_dma = request->dma;
1154
1155         trb = priv_ep->trb_pool + priv_ep->enqueue;
1156         priv_req->start_trb = priv_ep->enqueue;
1157         priv_req->trb = trb;
1158
1159         cdns3_select_ep(priv_ep->cdns3_dev, address);
1160
1161         /* prepare ring */
1162         if ((priv_ep->enqueue + num_trb)  >= (priv_ep->num_trbs - 1)) {
1163                 int doorbell, dma_index;
1164                 u32 ch_bit = 0;
1165
1166                 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1167                 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1168
1169                 /* Driver can't update LINK TRB if it is current processed. */
1170                 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1171                         priv_ep->flags |= EP_DEFERRED_DRDY;
1172                         return -ENOBUFS;
1173                 }
1174
1175                 /*updating C bt in  Link TRB before starting DMA*/
1176                 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1177                 /*
1178                  * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1179                  * that DMA stuck at the LINK TRB.
1180                  * On the other hand, removing TRB_CHAIN for longer TRs for
1181                  * epXout cause that DMA stuck after handling LINK TRB.
1182                  * To eliminate this strange behavioral driver set TRB_CHAIN
1183                  * bit only for TR size > 2.
1184                  */
1185                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1186                     TRBS_PER_SEGMENT > 2)
1187                         ch_bit = TRB_CHAIN;
1188
1189                 link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1190                                     TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
1191
1192                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
1193                         /*
1194                          * ISO require LINK TRB must be first one of TD.
1195                          * Fill LINK TRBs for left trb space to simply software process logic.
1196                          */
1197                         while (priv_ep->enqueue) {
1198                                 *trb = *link_trb;
1199                                 trace_cdns3_prepare_trb(priv_ep, trb);
1200
1201                                 cdns3_ep_inc_enq(priv_ep);
1202                                 trb = priv_ep->trb_pool + priv_ep->enqueue;
1203                                 priv_req->trb = trb;
1204                         }
1205                 }
1206         }
1207
1208         if (num_trb > priv_ep->free_trbs) {
1209                 priv_ep->flags |= EP_RING_FULL;
1210                 return -ENOBUFS;
1211         }
1212
1213         if (priv_dev->dev_ver <= DEV_VER_V2)
1214                 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1215
1216         /* set incorrect Cycle Bit for first trb*/
1217         control = priv_ep->pcs ? 0 : TRB_CYCLE;
1218         trb->length = 0;
1219         if (priv_dev->dev_ver >= DEV_VER_V2) {
1220                 u16 td_size;
1221
1222                 td_size = DIV_ROUND_UP(request->length,
1223                                        priv_ep->endpoint.maxpacket);
1224                 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1225                         trb->length = cpu_to_le32(TRB_TDL_SS_SIZE(td_size));
1226                 else
1227                         control |= TRB_TDL_HS_SIZE(td_size);
1228         }
1229
1230         do {
1231                 u32 length;
1232
1233                 if (!(sg_iter % num_trb_req) && sg_supported)
1234                         s = request->sg;
1235
1236                 /* fill TRB */
1237                 control |= TRB_TYPE(TRB_NORMAL);
1238                 if (sg_supported) {
1239                         trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1240                         length = sg_dma_len(s);
1241                 } else {
1242                         trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1243                         length = request->length;
1244                 }
1245
1246                 if (priv_ep->flags & EP_TDLCHK_EN)
1247                         total_tdl += DIV_ROUND_UP(length,
1248                                                priv_ep->endpoint.maxpacket);
1249
1250                 trb_burst = priv_ep->trb_burst_size;
1251
1252                 /*
1253                  * Supposed DMA cross 4k bounder problem should be fixed at DEV_VER_V2, but still
1254                  * met problem when do ISO transfer if sg enabled.
1255                  *
1256                  * Data pattern likes below when sg enabled, package size is 1k and mult is 2
1257                  *       [UVC Header(8B) ] [data(3k - 8)] ...
1258                  *
1259                  * The received data at offset 0xd000 will get 0xc000 data, len 0x70. Error happen
1260                  * as below pattern:
1261                  *      0xd000: wrong
1262                  *      0xe000: wrong
1263                  *      0xf000: correct
1264                  *      0x10000: wrong
1265                  *      0x11000: wrong
1266                  *      0x12000: correct
1267                  *      ...
1268                  *
1269                  * But it is still unclear about why error have not happen below 0xd000, it should
1270                  * cross 4k bounder. But anyway, the below code can fix this problem.
1271                  *
1272                  * To avoid DMA cross 4k bounder at ISO transfer, reduce burst len according to 16.
1273                  */
1274                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && priv_dev->dev_ver <= DEV_VER_V2)
1275                         if (ALIGN_DOWN(trb->buffer, SZ_4K) !=
1276                             ALIGN_DOWN(trb->buffer + length, SZ_4K))
1277                                 trb_burst = 16;
1278
1279                 trb->length |= cpu_to_le32(TRB_BURST_LEN(trb_burst) |
1280                                         TRB_LEN(length));
1281                 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1282
1283                 /*
1284                  * first trb should be prepared as last to avoid processing
1285                  *  transfer to early
1286                  */
1287                 if (sg_iter != 0)
1288                         control |= pcs;
1289
1290                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
1291                         control |= TRB_IOC | TRB_ISP;
1292                 } else {
1293                         /* for last element in TD or in SG list */
1294                         if (sg_iter == (num_trb - 1) && sg_iter != 0)
1295                                 control |= pcs | TRB_IOC | TRB_ISP;
1296                 }
1297
1298                 if (sg_iter)
1299                         trb->control = cpu_to_le32(control);
1300                 else
1301                         priv_req->trb->control = cpu_to_le32(control);
1302
1303                 if (sg_supported) {
1304                         trb->control |= cpu_to_le32(TRB_ISP);
1305                         /* Don't set chain bit for last TRB */
1306                         if ((sg_iter % num_trb_req) < num_trb_req - 1)
1307                                 trb->control |= cpu_to_le32(TRB_CHAIN);
1308
1309                         s = sg_next(s);
1310                 }
1311
1312                 control = 0;
1313                 ++sg_iter;
1314                 priv_req->end_trb = priv_ep->enqueue;
1315                 cdns3_ep_inc_enq(priv_ep);
1316                 trb = priv_ep->trb_pool + priv_ep->enqueue;
1317                 trb->length = 0;
1318         } while (sg_iter < num_trb);
1319
1320         trb = priv_req->trb;
1321
1322         priv_req->flags |= REQUEST_PENDING;
1323         priv_req->num_of_trb = num_trb;
1324
1325         if (sg_iter == 1)
1326                 trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
1327
1328         if (priv_dev->dev_ver < DEV_VER_V2 &&
1329             (priv_ep->flags & EP_TDLCHK_EN)) {
1330                 u16 tdl = total_tdl;
1331                 u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1332
1333                 if (tdl > EP_CMD_TDL_MAX) {
1334                         tdl = EP_CMD_TDL_MAX;
1335                         priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1336                 }
1337
1338                 if (old_tdl < tdl) {
1339                         tdl -= old_tdl;
1340                         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1341                                &priv_dev->regs->ep_cmd);
1342                 }
1343         }
1344
1345         /*
1346          * Memory barrier - cycle bit must be set before other filds in trb.
1347          */
1348         wmb();
1349
1350         /* give the TD to the consumer*/
1351         if (togle_pcs)
1352                 trb->control = trb->control ^ cpu_to_le32(1);
1353
1354         if (priv_dev->dev_ver <= DEV_VER_V2)
1355                 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1356
1357         if (num_trb > 1) {
1358                 int i = 0;
1359
1360                 while (i < num_trb) {
1361                         trace_cdns3_prepare_trb(priv_ep, trb + i);
1362                         if (trb + i == link_trb) {
1363                                 trb = priv_ep->trb_pool;
1364                                 num_trb = num_trb - i;
1365                                 i = 0;
1366                         } else {
1367                                 i++;
1368                         }
1369                 }
1370         } else {
1371                 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1372         }
1373
1374         /*
1375          * Memory barrier - Cycle Bit must be set before trb->length  and
1376          * trb->buffer fields.
1377          */
1378         wmb();
1379
1380         /*
1381          * For DMULT mode we can set address to transfer ring only once after
1382          * enabling endpoint.
1383          */
1384         if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1385                 /*
1386                  * Until SW is not ready to handle the OUT transfer the ISO OUT
1387                  * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1388                  * EP_CFG_ENABLE must be set before updating ep_traddr.
1389                  */
1390                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir &&
1391                     !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1392                         priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1393                         cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1394                                                EP_CFG_ENABLE);
1395                 }
1396
1397                 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1398                                         priv_req->start_trb * TRB_SIZE),
1399                                         &priv_dev->regs->ep_traddr);
1400
1401                 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1402         }
1403
1404         if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1405                 trace_cdns3_ring(priv_ep);
1406                 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1407                 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1408                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1409                 cdns3_rearm_drdy_if_needed(priv_ep);
1410                 trace_cdns3_doorbell_epx(priv_ep->name,
1411                                          readl(&priv_dev->regs->ep_traddr));
1412         }
1413
1414         /* WORKAROUND for transition to L0 */
1415         __cdns3_gadget_wakeup(priv_dev);
1416
1417         return 0;
1418 }
1419
1420 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1421 {
1422         struct cdns3_endpoint *priv_ep;
1423         struct usb_ep *ep;
1424
1425         if (priv_dev->hw_configured_flag)
1426                 return;
1427
1428         writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1429
1430         cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1431                                USB_CONF_U1EN | USB_CONF_U2EN);
1432
1433         priv_dev->hw_configured_flag = 1;
1434
1435         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1436                 if (ep->enabled) {
1437                         priv_ep = ep_to_cdns3_ep(ep);
1438                         cdns3_start_all_request(priv_dev, priv_ep);
1439                 }
1440         }
1441
1442         cdns3_allow_enable_l1(priv_dev, 1);
1443 }
1444
1445 /**
1446  * cdns3_trb_handled - check whether trb has been handled by DMA
1447  *
1448  * @priv_ep: extended endpoint object.
1449  * @priv_req: request object for checking
1450  *
1451  * Endpoint must be selected before invoking this function.
1452  *
1453  * Returns false if request has not been handled by DMA, else returns true.
1454  *
1455  * SR - start ring
1456  * ER -  end ring
1457  * DQ = priv_ep->dequeue - dequeue position
1458  * EQ = priv_ep->enqueue -  enqueue position
1459  * ST = priv_req->start_trb - index of first TRB in transfer ring
1460  * ET = priv_req->end_trb - index of last TRB in transfer ring
1461  * CI = current_index - index of processed TRB by DMA.
1462  *
1463  * As first step, we check if the TRB between the ST and ET.
1464  * Then, we check if cycle bit for index priv_ep->dequeue
1465  * is correct.
1466  *
1467  * some rules:
1468  * 1. priv_ep->dequeue never equals to current_index.
1469  * 2  priv_ep->enqueue never exceed priv_ep->dequeue
1470  * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1471  *    and priv_ep->free_trbs is zero.
1472  *    This case indicate that TR is full.
1473  *
1474  * At below two cases, the request have been handled.
1475  * Case 1 - priv_ep->dequeue < current_index
1476  *      SR ... EQ ... DQ ... CI ... ER
1477  *      SR ... DQ ... CI ... EQ ... ER
1478  *
1479  * Case 2 - priv_ep->dequeue > current_index
1480  * This situation takes place when CI go through the LINK TRB at the end of
1481  * transfer ring.
1482  *      SR ... CI ... EQ ... DQ ... ER
1483  */
1484 static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
1485                                   struct cdns3_request *priv_req)
1486 {
1487         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1488         struct cdns3_trb *trb;
1489         int current_index = 0;
1490         int handled = 0;
1491         int doorbell;
1492
1493         current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1494         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1495
1496         /* current trb doesn't belong to this request */
1497         if (priv_req->start_trb < priv_req->end_trb) {
1498                 if (priv_ep->dequeue > priv_req->end_trb)
1499                         goto finish;
1500
1501                 if (priv_ep->dequeue < priv_req->start_trb)
1502                         goto finish;
1503         }
1504
1505         if ((priv_req->start_trb > priv_req->end_trb) &&
1506                 (priv_ep->dequeue > priv_req->end_trb) &&
1507                 (priv_ep->dequeue < priv_req->start_trb))
1508                 goto finish;
1509
1510         if ((priv_req->start_trb == priv_req->end_trb) &&
1511                 (priv_ep->dequeue != priv_req->end_trb))
1512                 goto finish;
1513
1514         trb = &priv_ep->trb_pool[priv_ep->dequeue];
1515
1516         if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
1517                 goto finish;
1518
1519         if (doorbell == 1 && current_index == priv_ep->dequeue)
1520                 goto finish;
1521
1522         /* The corner case for TRBS_PER_SEGMENT equal 2). */
1523         if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1524                 handled = 1;
1525                 goto finish;
1526         }
1527
1528         if (priv_ep->enqueue == priv_ep->dequeue &&
1529             priv_ep->free_trbs == 0) {
1530                 handled = 1;
1531         } else if (priv_ep->dequeue < current_index) {
1532                 if ((current_index == (priv_ep->num_trbs - 1)) &&
1533                     !priv_ep->dequeue)
1534                         goto finish;
1535
1536                 handled = 1;
1537         } else if (priv_ep->dequeue  > current_index) {
1538                         handled = 1;
1539         }
1540
1541 finish:
1542         trace_cdns3_request_handled(priv_req, current_index, handled);
1543
1544         return handled;
1545 }
1546
1547 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1548                                      struct cdns3_endpoint *priv_ep)
1549 {
1550         struct cdns3_request *priv_req;
1551         struct usb_request *request;
1552         struct cdns3_trb *trb;
1553         bool request_handled = false;
1554         bool transfer_end = false;
1555
1556         while (!list_empty(&priv_ep->pending_req_list)) {
1557                 request = cdns3_next_request(&priv_ep->pending_req_list);
1558                 priv_req = to_cdns3_request(request);
1559
1560                 trb = priv_ep->trb_pool + priv_ep->dequeue;
1561
1562                 /* The TRB was changed as link TRB, and the request was handled at ep_dequeue */
1563                 while (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
1564
1565                         /* ISO ep_traddr may stop at LINK TRB */
1566                         if (priv_ep->dequeue == cdns3_get_dma_pos(priv_dev, priv_ep) &&
1567                             priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1568                                 break;
1569
1570                         trace_cdns3_complete_trb(priv_ep, trb);
1571                         cdns3_ep_inc_deq(priv_ep);
1572                         trb = priv_ep->trb_pool + priv_ep->dequeue;
1573                 }
1574
1575                 if (!request->stream_id) {
1576                         /* Re-select endpoint. It could be changed by other CPU
1577                          * during handling usb_gadget_giveback_request.
1578                          */
1579                         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1580
1581                         while (cdns3_trb_handled(priv_ep, priv_req)) {
1582                                 priv_req->finished_trb++;
1583                                 if (priv_req->finished_trb >= priv_req->num_of_trb)
1584                                         request_handled = true;
1585
1586                                 trb = priv_ep->trb_pool + priv_ep->dequeue;
1587                                 trace_cdns3_complete_trb(priv_ep, trb);
1588
1589                                 if (!transfer_end)
1590                                         request->actual +=
1591                                                 TRB_LEN(le32_to_cpu(trb->length));
1592
1593                                 if (priv_req->num_of_trb > 1 &&
1594                                         le32_to_cpu(trb->control) & TRB_SMM &&
1595                                         le32_to_cpu(trb->control) & TRB_CHAIN)
1596                                         transfer_end = true;
1597
1598                                 cdns3_ep_inc_deq(priv_ep);
1599                         }
1600
1601                         if (request_handled) {
1602                                 /* TRBs are duplicated by priv_ep->interval time for ISO IN */
1603                                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && priv_ep->dir)
1604                                         request->actual /= priv_ep->interval;
1605
1606                                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1607                                 request_handled = false;
1608                                 transfer_end = false;
1609                         } else {
1610                                 goto prepare_next_td;
1611                         }
1612
1613                         if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1614                             TRBS_PER_SEGMENT == 2)
1615                                 break;
1616                 } else {
1617                         /* Re-select endpoint. It could be changed by other CPU
1618                          * during handling usb_gadget_giveback_request.
1619                          */
1620                         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1621
1622                         trb = priv_ep->trb_pool;
1623                         trace_cdns3_complete_trb(priv_ep, trb);
1624
1625                         if (trb != priv_req->trb)
1626                                 dev_warn(priv_dev->dev,
1627                                          "request_trb=0x%p, queue_trb=0x%p\n",
1628                                          priv_req->trb, trb);
1629
1630                         request->actual += TRB_LEN(le32_to_cpu(trb->length));
1631
1632                         if (!request->num_sgs ||
1633                             (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1634                                 priv_ep->stream_sg_idx = 0;
1635                                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1636                         } else {
1637                                 priv_ep->stream_sg_idx++;
1638                                 cdns3_ep_run_stream_transfer(priv_ep, request);
1639                         }
1640                         break;
1641                 }
1642         }
1643         priv_ep->flags &= ~EP_PENDING_REQUEST;
1644
1645 prepare_next_td:
1646         if (!(priv_ep->flags & EP_STALLED) &&
1647             !(priv_ep->flags & EP_STALL_PENDING))
1648                 cdns3_start_all_request(priv_dev, priv_ep);
1649 }
1650
1651 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1652 {
1653         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1654
1655         cdns3_wa1_restore_cycle_bit(priv_ep);
1656
1657         if (rearm) {
1658                 trace_cdns3_ring(priv_ep);
1659
1660                 /* Cycle Bit must be updated before arming DMA. */
1661                 wmb();
1662                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1663
1664                 __cdns3_gadget_wakeup(priv_dev);
1665
1666                 trace_cdns3_doorbell_epx(priv_ep->name,
1667                                          readl(&priv_dev->regs->ep_traddr));
1668         }
1669 }
1670
1671 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1672 {
1673         u16 tdl = priv_ep->pending_tdl;
1674         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1675
1676         if (tdl > EP_CMD_TDL_MAX) {
1677                 tdl = EP_CMD_TDL_MAX;
1678                 priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1679         } else {
1680                 priv_ep->pending_tdl = 0;
1681         }
1682
1683         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1684 }
1685
1686 /**
1687  * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1688  * @priv_ep: endpoint object
1689  *
1690  * Returns 0
1691  */
1692 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1693 {
1694         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1695         u32 ep_sts_reg;
1696         struct usb_request *deferred_request;
1697         struct usb_request *pending_request;
1698         u32 tdl = 0;
1699
1700         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1701
1702         trace_cdns3_epx_irq(priv_dev, priv_ep);
1703
1704         ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1705         writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1706
1707         if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1708                 bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1709
1710                 tdl = cdns3_get_tdl(priv_dev);
1711
1712                 /*
1713                  * Continue the previous transfer:
1714                  * There is some racing between ERDY and PRIME. The device send
1715                  * ERDY and almost in the same time Host send PRIME. It cause
1716                  * that host ignore the ERDY packet and driver has to send it
1717                  * again.
1718                  */
1719                 if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
1720                     EP_STS_HOSTPP(ep_sts_reg))) {
1721                         writel(EP_CMD_ERDY |
1722                                EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1723                                &priv_dev->regs->ep_cmd);
1724                         ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1725                 } else {
1726                         priv_ep->prime_flag = true;
1727
1728                         pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1729                         deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1730
1731                         if (deferred_request && !pending_request) {
1732                                 cdns3_start_all_request(priv_dev, priv_ep);
1733                         }
1734                 }
1735         }
1736
1737         if (ep_sts_reg & EP_STS_TRBERR) {
1738                 if (priv_ep->flags & EP_STALL_PENDING &&
1739                     !(ep_sts_reg & EP_STS_DESCMIS &&
1740                     priv_dev->dev_ver < DEV_VER_V2)) {
1741                         cdns3_ep_stall_flush(priv_ep);
1742                 }
1743
1744                 /*
1745                  * For isochronous transfer driver completes request on
1746                  * IOC or on TRBERR. IOC appears only when device receive
1747                  * OUT data packet. If host disable stream or lost some packet
1748                  * then the only way to finish all queued transfer is to do it
1749                  * on TRBERR event.
1750                  */
1751                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1752                     !priv_ep->wa1_set) {
1753                         if (!priv_ep->dir) {
1754                                 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1755
1756                                 ep_cfg &= ~EP_CFG_ENABLE;
1757                                 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1758                                 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1759                                 priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
1760                         }
1761                         cdns3_transfer_completed(priv_dev, priv_ep);
1762                 } else if (!(priv_ep->flags & EP_STALLED) &&
1763                           !(priv_ep->flags & EP_STALL_PENDING)) {
1764                         if (priv_ep->flags & EP_DEFERRED_DRDY) {
1765                                 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1766                                 cdns3_start_all_request(priv_dev, priv_ep);
1767                         } else {
1768                                 cdns3_rearm_transfer(priv_ep,
1769                                                      priv_ep->wa1_set);
1770                         }
1771                 }
1772         }
1773
1774         if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1775             (ep_sts_reg & EP_STS_IOT)) {
1776                 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1777                         if (ep_sts_reg & EP_STS_ISP)
1778                                 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1779                         else
1780                                 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1781                 }
1782
1783                 if (!priv_ep->use_streams) {
1784                         if ((ep_sts_reg & EP_STS_IOC) ||
1785                             (ep_sts_reg & EP_STS_ISP)) {
1786                                 cdns3_transfer_completed(priv_dev, priv_ep);
1787                         } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1788                                    priv_ep->pending_tdl) {
1789                                 /* handle IOT with pending tdl */
1790                                 cdns3_reprogram_tdl(priv_ep);
1791                         }
1792                 } else if (priv_ep->dir == USB_DIR_OUT) {
1793                         priv_ep->ep_sts_pending |= ep_sts_reg;
1794                 } else if (ep_sts_reg & EP_STS_IOT) {
1795                         cdns3_transfer_completed(priv_dev, priv_ep);
1796                 }
1797         }
1798
1799         /*
1800          * MD_EXIT interrupt sets when stream capable endpoint exits
1801          * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1802          */
1803         if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1804             (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1805                 priv_ep->ep_sts_pending = 0;
1806                 cdns3_transfer_completed(priv_dev, priv_ep);
1807         }
1808
1809         /*
1810          * WA2: this condition should only be meet when
1811          * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1812          * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1813          * In other cases this interrupt will be disabled.
1814          */
1815         if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1816             !(priv_ep->flags & EP_STALLED))
1817                 cdns3_wa2_descmissing_packet(priv_ep);
1818
1819         return 0;
1820 }
1821
1822 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1823 {
1824         if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect)
1825                 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1826 }
1827
1828 /**
1829  * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1830  * @priv_dev: extended gadget object
1831  * @usb_ists: bitmap representation of device's reported interrupts
1832  * (usb_ists register value)
1833  */
1834 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1835                                               u32 usb_ists)
1836 __must_hold(&priv_dev->lock)
1837 {
1838         int speed = 0;
1839
1840         trace_cdns3_usb_irq(priv_dev, usb_ists);
1841         if (usb_ists & USB_ISTS_L1ENTI) {
1842                 /*
1843                  * WORKAROUND: CDNS3 controller has issue with hardware resuming
1844                  * from L1. To fix it, if any DMA transfer is pending driver
1845                  * must starts driving resume signal immediately.
1846                  */
1847                 if (readl(&priv_dev->regs->drbl))
1848                         __cdns3_gadget_wakeup(priv_dev);
1849         }
1850
1851         /* Connection detected */
1852         if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1853                 speed = cdns3_get_speed(priv_dev);
1854                 priv_dev->gadget.speed = speed;
1855                 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1856                 cdns3_ep0_config(priv_dev);
1857         }
1858
1859         /* Disconnection detected */
1860         if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1861                 spin_unlock(&priv_dev->lock);
1862                 cdns3_disconnect_gadget(priv_dev);
1863                 spin_lock(&priv_dev->lock);
1864                 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1865                 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1866                 cdns3_hw_reset_eps_config(priv_dev);
1867         }
1868
1869         if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1870                 if (priv_dev->gadget_driver &&
1871                     priv_dev->gadget_driver->suspend) {
1872                         spin_unlock(&priv_dev->lock);
1873                         priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1874                         spin_lock(&priv_dev->lock);
1875                 }
1876         }
1877
1878         if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1879                 if (priv_dev->gadget_driver &&
1880                     priv_dev->gadget_driver->resume) {
1881                         spin_unlock(&priv_dev->lock);
1882                         priv_dev->gadget_driver->resume(&priv_dev->gadget);
1883                         spin_lock(&priv_dev->lock);
1884                 }
1885         }
1886
1887         /* reset*/
1888         if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1889                 if (priv_dev->gadget_driver) {
1890                         spin_unlock(&priv_dev->lock);
1891                         usb_gadget_udc_reset(&priv_dev->gadget,
1892                                              priv_dev->gadget_driver);
1893                         spin_lock(&priv_dev->lock);
1894
1895                         /*read again to check the actual speed*/
1896                         speed = cdns3_get_speed(priv_dev);
1897                         priv_dev->gadget.speed = speed;
1898                         cdns3_hw_reset_eps_config(priv_dev);
1899                         cdns3_ep0_config(priv_dev);
1900                 }
1901         }
1902 }
1903
1904 /**
1905  * cdns3_device_irq_handler - interrupt handler for device part of controller
1906  *
1907  * @irq: irq number for cdns3 core device
1908  * @data: structure of cdns3
1909  *
1910  * Returns IRQ_HANDLED or IRQ_NONE
1911  */
1912 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1913 {
1914         struct cdns3_device *priv_dev = data;
1915         struct cdns *cdns = dev_get_drvdata(priv_dev->dev);
1916         irqreturn_t ret = IRQ_NONE;
1917         u32 reg;
1918
1919         if (cdns->in_lpm)
1920                 return ret;
1921
1922         /* check USB device interrupt */
1923         reg = readl(&priv_dev->regs->usb_ists);
1924         if (reg) {
1925                 /* After masking interrupts the new interrupts won't be
1926                  * reported in usb_ists/ep_ists. In order to not lose some
1927                  * of them driver disables only detected interrupts.
1928                  * They will be enabled ASAP after clearing source of
1929                  * interrupt. This an unusual behavior only applies to
1930                  * usb_ists register.
1931                  */
1932                 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1933                 /* mask deferred interrupt. */
1934                 writel(reg, &priv_dev->regs->usb_ien);
1935                 ret = IRQ_WAKE_THREAD;
1936         }
1937
1938         /* check endpoint interrupt */
1939         reg = readl(&priv_dev->regs->ep_ists);
1940         if (reg) {
1941                 writel(0, &priv_dev->regs->ep_ien);
1942                 ret = IRQ_WAKE_THREAD;
1943         }
1944
1945         return ret;
1946 }
1947
1948 /**
1949  * cdns3_device_thread_irq_handler - interrupt handler for device part
1950  * of controller
1951  *
1952  * @irq: irq number for cdns3 core device
1953  * @data: structure of cdns3
1954  *
1955  * Returns IRQ_HANDLED or IRQ_NONE
1956  */
1957 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1958 {
1959         struct cdns3_device *priv_dev = data;
1960         irqreturn_t ret = IRQ_NONE;
1961         unsigned long flags;
1962         unsigned int bit;
1963         unsigned long reg;
1964
1965         spin_lock_irqsave(&priv_dev->lock, flags);
1966
1967         reg = readl(&priv_dev->regs->usb_ists);
1968         if (reg) {
1969                 writel(reg, &priv_dev->regs->usb_ists);
1970                 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1971                 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1972                 ret = IRQ_HANDLED;
1973         }
1974
1975         reg = readl(&priv_dev->regs->ep_ists);
1976
1977         /* handle default endpoint OUT */
1978         if (reg & EP_ISTS_EP_OUT0) {
1979                 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1980                 ret = IRQ_HANDLED;
1981         }
1982
1983         /* handle default endpoint IN */
1984         if (reg & EP_ISTS_EP_IN0) {
1985                 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1986                 ret = IRQ_HANDLED;
1987         }
1988
1989         /* check if interrupt from non default endpoint, if no exit */
1990         reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1991         if (!reg)
1992                 goto irqend;
1993
1994         for_each_set_bit(bit, &reg,
1995                          sizeof(u32) * BITS_PER_BYTE) {
1996                 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1997                 ret = IRQ_HANDLED;
1998         }
1999
2000         if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
2001                 cdns3_wa2_check_outq_status(priv_dev);
2002
2003 irqend:
2004         writel(~0, &priv_dev->regs->ep_ien);
2005         spin_unlock_irqrestore(&priv_dev->lock, flags);
2006
2007         return ret;
2008 }
2009
2010 /**
2011  * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
2012  *
2013  * The real reservation will occur during write to EP_CFG register,
2014  * this function is used to check if the 'size' reservation is allowed.
2015  *
2016  * @priv_dev: extended gadget object
2017  * @size: the size (KB) for EP would like to allocate
2018  * @is_in: endpoint direction
2019  *
2020  * Return 0 if the required size can met or negative value on failure
2021  */
2022 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
2023                                           int size, int is_in)
2024 {
2025         int remained;
2026
2027         /* 2KB are reserved for EP0*/
2028         remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
2029
2030         if (is_in) {
2031                 if (remained < size)
2032                         return -EPERM;
2033
2034                 priv_dev->onchip_used_size += size;
2035         } else {
2036                 int required;
2037
2038                 /**
2039                  *  ALL OUT EPs are shared the same chunk onchip memory, so
2040                  * driver checks if it already has assigned enough buffers
2041                  */
2042                 if (priv_dev->out_mem_is_allocated >= size)
2043                         return 0;
2044
2045                 required = size - priv_dev->out_mem_is_allocated;
2046
2047                 if (required > remained)
2048                         return -EPERM;
2049
2050                 priv_dev->out_mem_is_allocated += required;
2051                 priv_dev->onchip_used_size += required;
2052         }
2053
2054         return 0;
2055 }
2056
2057 static void cdns3_configure_dmult(struct cdns3_device *priv_dev,
2058                                   struct cdns3_endpoint *priv_ep)
2059 {
2060         struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2061
2062         /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
2063         if (priv_dev->dev_ver <= DEV_VER_V2)
2064                 writel(USB_CONF_DMULT, &regs->usb_conf);
2065
2066         if (priv_dev->dev_ver == DEV_VER_V2)
2067                 writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
2068
2069         if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
2070                 u32 mask;
2071
2072                 if (priv_ep->dir)
2073                         mask = BIT(priv_ep->num + 16);
2074                 else
2075                         mask = BIT(priv_ep->num);
2076
2077                 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
2078                         cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2079                         cdns3_set_register_bit(&regs->tdl_beh, mask);
2080                         cdns3_set_register_bit(&regs->tdl_beh2, mask);
2081                         cdns3_set_register_bit(&regs->dma_adv_td, mask);
2082                 }
2083
2084                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2085                         cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2086
2087                 cdns3_set_register_bit(&regs->dtrans, mask);
2088         }
2089 }
2090
2091 /**
2092  * cdns3_ep_config - Configure hardware endpoint
2093  * @priv_ep: extended endpoint object
2094  * @enable: set EP_CFG_ENABLE bit in ep_cfg register.
2095  */
2096 int cdns3_ep_config(struct cdns3_endpoint *priv_ep, bool enable)
2097 {
2098         bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
2099         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2100         u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
2101         u32 max_packet_size = priv_ep->wMaxPacketSize;
2102         u8 maxburst = priv_ep->bMaxBurst;
2103         u32 ep_cfg = 0;
2104         u8 buffering;
2105         int ret;
2106
2107         buffering = priv_dev->ep_buf_size - 1;
2108
2109         cdns3_configure_dmult(priv_dev, priv_ep);
2110
2111         switch (priv_ep->type) {
2112         case USB_ENDPOINT_XFER_INT:
2113                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
2114
2115                 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2116                         ep_cfg |= EP_CFG_TDL_CHK;
2117                 break;
2118         case USB_ENDPOINT_XFER_BULK:
2119                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
2120
2121                 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2122                         ep_cfg |= EP_CFG_TDL_CHK;
2123                 break;
2124         default:
2125                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
2126                 buffering = (priv_ep->bMaxBurst + 1) * (priv_ep->mult + 1) - 1;
2127         }
2128
2129         switch (priv_dev->gadget.speed) {
2130         case USB_SPEED_FULL:
2131                 max_packet_size = is_iso_ep ? 1023 : 64;
2132                 break;
2133         case USB_SPEED_HIGH:
2134                 max_packet_size = is_iso_ep ? 1024 : 512;
2135                 break;
2136         case USB_SPEED_SUPER:
2137                 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
2138                         max_packet_size = 1024;
2139                         maxburst = priv_dev->ep_buf_size - 1;
2140                 }
2141                 break;
2142         default:
2143                 /* all other speed are not supported */
2144                 return -EINVAL;
2145         }
2146
2147         if (max_packet_size == 1024)
2148                 priv_ep->trb_burst_size = 128;
2149         else if (max_packet_size >= 512)
2150                 priv_ep->trb_burst_size = 64;
2151         else
2152                 priv_ep->trb_burst_size = 16;
2153
2154         /*
2155          * In versions preceding DEV_VER_V2, for example, iMX8QM, there exit the bugs
2156          * in the DMA. These bugs occur when the trb_burst_size exceeds 16 and the
2157          * address is not aligned to 128 Bytes (which is a product of the 64-bit AXI
2158          * and AXI maximum burst length of 16 or 0xF+1, dma_axi_ctrl0[3:0]). This
2159          * results in data corruption when it crosses the 4K border. The corruption
2160          * specifically occurs from the position (4K - (address & 0x7F)) to 4K.
2161          *
2162          * So force trb_burst_size to 16 at such platform.
2163          */
2164         if (priv_dev->dev_ver < DEV_VER_V2)
2165                 priv_ep->trb_burst_size = 16;
2166
2167         buffering = min_t(u8, buffering, EP_CFG_BUFFERING_MAX);
2168         maxburst = min_t(u8, maxburst, EP_CFG_MAXBURST_MAX);
2169
2170         /* onchip buffer is only allocated before configuration */
2171         if (!priv_dev->hw_configured_flag) {
2172                 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2173                                                      !!priv_ep->dir);
2174                 if (ret) {
2175                         dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2176                         return ret;
2177                 }
2178         }
2179
2180         if (enable)
2181                 ep_cfg |= EP_CFG_ENABLE;
2182
2183         if (priv_ep->use_streams && priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2184                 if (priv_dev->dev_ver >= DEV_VER_V3) {
2185                         u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
2186
2187                         /*
2188                          * Stream capable endpoints are handled by using ep_tdl
2189                          * register. Other endpoints use TDL from TRB feature.
2190                          */
2191                         cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb,
2192                                                  mask);
2193                 }
2194
2195                 /*  Enable Stream Bit TDL chk and SID chk */
2196                 ep_cfg |=  EP_CFG_STREAM_EN | EP_CFG_TDL_CHK | EP_CFG_SID_CHK;
2197         }
2198
2199         ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2200                   EP_CFG_MULT(priv_ep->mult) |                  /* must match EP setting */
2201                   EP_CFG_BUFFERING(buffering) |
2202                   EP_CFG_MAXBURST(maxburst);
2203
2204         cdns3_select_ep(priv_dev, bEndpointAddress);
2205         writel(ep_cfg, &priv_dev->regs->ep_cfg);
2206         priv_ep->flags |= EP_CONFIGURED;
2207
2208         dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2209                 priv_ep->name, ep_cfg);
2210
2211         return 0;
2212 }
2213
2214 /* Find correct direction for HW endpoint according to description */
2215 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2216                                    struct cdns3_endpoint *priv_ep)
2217 {
2218         return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2219                (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2220 }
2221
2222 static struct
2223 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2224                                         struct usb_endpoint_descriptor *desc)
2225 {
2226         struct usb_ep *ep;
2227         struct cdns3_endpoint *priv_ep;
2228
2229         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2230                 unsigned long num;
2231                 int ret;
2232                 /* ep name pattern likes epXin or epXout */
2233                 char c[2] = {ep->name[2], '\0'};
2234
2235                 ret = kstrtoul(c, 10, &num);
2236                 if (ret)
2237                         return ERR_PTR(ret);
2238
2239                 priv_ep = ep_to_cdns3_ep(ep);
2240                 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2241                         if (!(priv_ep->flags & EP_CLAIMED)) {
2242                                 priv_ep->num  = num;
2243                                 return priv_ep;
2244                         }
2245                 }
2246         }
2247
2248         return ERR_PTR(-ENOENT);
2249 }
2250
2251 /*
2252  *  Cadence IP has one limitation that all endpoints must be configured
2253  * (Type & MaxPacketSize) before setting configuration through hardware
2254  * register, it means we can't change endpoints configuration after
2255  * set_configuration.
2256  *
2257  * This function set EP_CLAIMED flag which is added when the gadget driver
2258  * uses usb_ep_autoconfig to configure specific endpoint;
2259  * When the udc driver receives set_configurion request,
2260  * it goes through all claimed endpoints, and configure all endpoints
2261  * accordingly.
2262  *
2263  * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2264  * ep_cfg register which can be changed after set_configuration, and do
2265  * some software operation accordingly.
2266  */
2267 static struct
2268 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2269                               struct usb_endpoint_descriptor *desc,
2270                               struct usb_ss_ep_comp_descriptor *comp_desc)
2271 {
2272         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2273         struct cdns3_endpoint *priv_ep;
2274         unsigned long flags;
2275
2276         priv_ep = cdns3_find_available_ep(priv_dev, desc);
2277         if (IS_ERR(priv_ep)) {
2278                 dev_err(priv_dev->dev, "no available ep\n");
2279                 return NULL;
2280         }
2281
2282         dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2283
2284         spin_lock_irqsave(&priv_dev->lock, flags);
2285         priv_ep->endpoint.desc = desc;
2286         priv_ep->dir  = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2287         priv_ep->type = usb_endpoint_type(desc);
2288         priv_ep->flags |= EP_CLAIMED;
2289         priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2290         priv_ep->wMaxPacketSize =  usb_endpoint_maxp(desc);
2291         priv_ep->mult = USB_EP_MAXP_MULT(priv_ep->wMaxPacketSize);
2292         priv_ep->wMaxPacketSize &= USB_ENDPOINT_MAXP_MASK;
2293         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && comp_desc) {
2294                 priv_ep->mult =  USB_SS_MULT(comp_desc->bmAttributes) - 1;
2295                 priv_ep->bMaxBurst = comp_desc->bMaxBurst;
2296         }
2297
2298         spin_unlock_irqrestore(&priv_dev->lock, flags);
2299         return &priv_ep->endpoint;
2300 }
2301
2302 /**
2303  * cdns3_gadget_ep_alloc_request - Allocates request
2304  * @ep: endpoint object associated with request
2305  * @gfp_flags: gfp flags
2306  *
2307  * Returns allocated request address, NULL on allocation error
2308  */
2309 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2310                                                   gfp_t gfp_flags)
2311 {
2312         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2313         struct cdns3_request *priv_req;
2314
2315         priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2316         if (!priv_req)
2317                 return NULL;
2318
2319         priv_req->priv_ep = priv_ep;
2320
2321         trace_cdns3_alloc_request(priv_req);
2322         return &priv_req->request;
2323 }
2324
2325 /**
2326  * cdns3_gadget_ep_free_request - Free memory occupied by request
2327  * @ep: endpoint object associated with request
2328  * @request: request to free memory
2329  */
2330 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2331                                   struct usb_request *request)
2332 {
2333         struct cdns3_request *priv_req = to_cdns3_request(request);
2334
2335         if (priv_req->aligned_buf)
2336                 priv_req->aligned_buf->in_use = 0;
2337
2338         trace_cdns3_free_request(priv_req);
2339         kfree(priv_req);
2340 }
2341
2342 /**
2343  * cdns3_gadget_ep_enable - Enable endpoint
2344  * @ep: endpoint object
2345  * @desc: endpoint descriptor
2346  *
2347  * Returns 0 on success, error code elsewhere
2348  */
2349 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2350                                   const struct usb_endpoint_descriptor *desc)
2351 {
2352         struct cdns3_endpoint *priv_ep;
2353         struct cdns3_device *priv_dev;
2354         const struct usb_ss_ep_comp_descriptor *comp_desc;
2355         u32 reg = EP_STS_EN_TRBERREN;
2356         u32 bEndpointAddress;
2357         unsigned long flags;
2358         int enable = 1;
2359         int ret = 0;
2360         int val;
2361
2362         if (!ep) {
2363                 pr_debug("usbss: ep not configured?\n");
2364                 return -EINVAL;
2365         }
2366
2367         priv_ep = ep_to_cdns3_ep(ep);
2368         priv_dev = priv_ep->cdns3_dev;
2369         comp_desc = priv_ep->endpoint.comp_desc;
2370
2371         if (!desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2372                 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2373                 return -EINVAL;
2374         }
2375
2376         if (!desc->wMaxPacketSize) {
2377                 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2378                 return -EINVAL;
2379         }
2380
2381         if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2382                           "%s is already enabled\n", priv_ep->name))
2383                 return 0;
2384
2385         spin_lock_irqsave(&priv_dev->lock, flags);
2386
2387         priv_ep->endpoint.desc = desc;
2388         priv_ep->type = usb_endpoint_type(desc);
2389         priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2390
2391         if (priv_ep->interval > ISO_MAX_INTERVAL &&
2392             priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2393                 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2394                         ISO_MAX_INTERVAL);
2395
2396                 ret =  -EINVAL;
2397                 goto exit;
2398         }
2399
2400         bEndpointAddress = priv_ep->num | priv_ep->dir;
2401         cdns3_select_ep(priv_dev, bEndpointAddress);
2402
2403         /*
2404          * For some versions of controller at some point during ISO OUT traffic
2405          * DMA reads Transfer Ring for the EP which has never got doorbell.
2406          * This issue was detected only on simulation, but to avoid this issue
2407          * driver add protection against it. To fix it driver enable ISO OUT
2408          * endpoint before setting DRBL. This special treatment of ISO OUT
2409          * endpoints are recommended by controller specification.
2410          */
2411         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir)
2412                 enable = 0;
2413
2414         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2415                 /*
2416                  * Enable stream support (SS mode) related interrupts
2417                  * in EP_STS_EN Register
2418                  */
2419                 if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2420                         reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2421                                 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2422                                 EP_STS_EN_STREAMREN;
2423                         priv_ep->use_streams = true;
2424                         ret = cdns3_ep_config(priv_ep, enable);
2425                         priv_dev->using_streams |= true;
2426                 }
2427         } else {
2428                 ret = cdns3_ep_config(priv_ep, enable);
2429         }
2430
2431         if (ret)
2432                 goto exit;
2433
2434         ret = cdns3_allocate_trb_pool(priv_ep);
2435         if (ret)
2436                 goto exit;
2437
2438         bEndpointAddress = priv_ep->num | priv_ep->dir;
2439         cdns3_select_ep(priv_dev, bEndpointAddress);
2440
2441         trace_cdns3_gadget_ep_enable(priv_ep);
2442
2443         writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2444
2445         ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2446                                         !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2447                                         1, 1000);
2448
2449         if (unlikely(ret)) {
2450                 cdns3_free_trb_pool(priv_ep);
2451                 ret =  -EINVAL;
2452                 goto exit;
2453         }
2454
2455         /* enable interrupt for selected endpoint */
2456         cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2457                                BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2458
2459         if (priv_dev->dev_ver < DEV_VER_V2)
2460                 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2461
2462         writel(reg, &priv_dev->regs->ep_sts_en);
2463
2464         ep->desc = desc;
2465         priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2466                             EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2467         priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2468         priv_ep->wa1_set = 0;
2469         priv_ep->enqueue = 0;
2470         priv_ep->dequeue = 0;
2471         reg = readl(&priv_dev->regs->ep_sts);
2472         priv_ep->pcs = !!EP_STS_CCS(reg);
2473         priv_ep->ccs = !!EP_STS_CCS(reg);
2474         /* one TRB is reserved for link TRB used in DMULT mode*/
2475         priv_ep->free_trbs = priv_ep->num_trbs - 1;
2476 exit:
2477         spin_unlock_irqrestore(&priv_dev->lock, flags);
2478
2479         return ret;
2480 }
2481
2482 /**
2483  * cdns3_gadget_ep_disable - Disable endpoint
2484  * @ep: endpoint object
2485  *
2486  * Returns 0 on success, error code elsewhere
2487  */
2488 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2489 {
2490         struct cdns3_endpoint *priv_ep;
2491         struct cdns3_request *priv_req;
2492         struct cdns3_device *priv_dev;
2493         struct usb_request *request;
2494         unsigned long flags;
2495         int ret = 0;
2496         u32 ep_cfg;
2497         int val;
2498
2499         if (!ep) {
2500                 pr_err("usbss: invalid parameters\n");
2501                 return -EINVAL;
2502         }
2503
2504         priv_ep = ep_to_cdns3_ep(ep);
2505         priv_dev = priv_ep->cdns3_dev;
2506
2507         if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2508                           "%s is already disabled\n", priv_ep->name))
2509                 return 0;
2510
2511         spin_lock_irqsave(&priv_dev->lock, flags);
2512
2513         trace_cdns3_gadget_ep_disable(priv_ep);
2514
2515         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2516
2517         ep_cfg = readl(&priv_dev->regs->ep_cfg);
2518         ep_cfg &= ~EP_CFG_ENABLE;
2519         writel(ep_cfg, &priv_dev->regs->ep_cfg);
2520
2521         /**
2522          * Driver needs some time before resetting endpoint.
2523          * It need waits for clearing DBUSY bit or for timeout expired.
2524          * 10us is enough time for controller to stop transfer.
2525          */
2526         readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2527                                   !(val & EP_STS_DBUSY), 1, 10);
2528         writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2529
2530         readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2531                                   !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2532                                   1, 1000);
2533         if (unlikely(ret))
2534                 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2535                         priv_ep->name);
2536
2537         while (!list_empty(&priv_ep->pending_req_list)) {
2538                 request = cdns3_next_request(&priv_ep->pending_req_list);
2539
2540                 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2541                                       -ESHUTDOWN);
2542         }
2543
2544         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2545                 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2546                 list_del_init(&priv_req->list);
2547
2548                 kfree(priv_req->request.buf);
2549                 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2550                                              &priv_req->request);
2551                 --priv_ep->wa2_counter;
2552         }
2553
2554         while (!list_empty(&priv_ep->deferred_req_list)) {
2555                 request = cdns3_next_request(&priv_ep->deferred_req_list);
2556
2557                 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2558                                       -ESHUTDOWN);
2559         }
2560
2561         priv_ep->descmis_req = NULL;
2562
2563         ep->desc = NULL;
2564         priv_ep->flags &= ~EP_ENABLED;
2565         priv_ep->use_streams = false;
2566
2567         spin_unlock_irqrestore(&priv_dev->lock, flags);
2568
2569         return ret;
2570 }
2571
2572 /**
2573  * __cdns3_gadget_ep_queue - Transfer data on endpoint
2574  * @ep: endpoint object
2575  * @request: request object
2576  * @gfp_flags: gfp flags
2577  *
2578  * Returns 0 on success, error code elsewhere
2579  */
2580 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2581                                    struct usb_request *request,
2582                                    gfp_t gfp_flags)
2583 {
2584         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2585         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2586         struct cdns3_request *priv_req;
2587         int ret = 0;
2588
2589         request->actual = 0;
2590         request->status = -EINPROGRESS;
2591         priv_req = to_cdns3_request(request);
2592         trace_cdns3_ep_queue(priv_req);
2593
2594         if (priv_dev->dev_ver < DEV_VER_V2) {
2595                 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2596                                                 priv_req);
2597
2598                 if (ret == EINPROGRESS)
2599                         return 0;
2600         }
2601
2602         ret = cdns3_prepare_aligned_request_buf(priv_req);
2603         if (ret < 0)
2604                 return ret;
2605
2606         if (likely(!(priv_req->flags & REQUEST_UNALIGNED))) {
2607                 ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2608                                             usb_endpoint_dir_in(ep->desc));
2609                 if (ret)
2610                         return ret;
2611         }
2612
2613         list_add_tail(&request->list, &priv_ep->deferred_req_list);
2614
2615         /*
2616          * For stream capable endpoint if prime irq flag is set then only start
2617          * request.
2618          * If hardware endpoint configuration has not been set yet then
2619          * just queue request in deferred list. Transfer will be started in
2620          * cdns3_set_hw_configuration.
2621          */
2622         if (!request->stream_id) {
2623                 if (priv_dev->hw_configured_flag &&
2624                     !(priv_ep->flags & EP_STALLED) &&
2625                     !(priv_ep->flags & EP_STALL_PENDING))
2626                         cdns3_start_all_request(priv_dev, priv_ep);
2627         } else {
2628                 if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2629                         cdns3_start_all_request(priv_dev, priv_ep);
2630         }
2631
2632         return 0;
2633 }
2634
2635 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2636                                  gfp_t gfp_flags)
2637 {
2638         struct usb_request *zlp_request;
2639         struct cdns3_endpoint *priv_ep;
2640         struct cdns3_device *priv_dev;
2641         unsigned long flags;
2642         int ret;
2643
2644         if (!request || !ep)
2645                 return -EINVAL;
2646
2647         priv_ep = ep_to_cdns3_ep(ep);
2648         priv_dev = priv_ep->cdns3_dev;
2649
2650         spin_lock_irqsave(&priv_dev->lock, flags);
2651
2652         ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2653
2654         if (ret == 0 && request->zero && request->length &&
2655             (request->length % ep->maxpacket == 0)) {
2656                 struct cdns3_request *priv_req;
2657
2658                 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2659                 zlp_request->buf = priv_dev->zlp_buf;
2660                 zlp_request->length = 0;
2661
2662                 priv_req = to_cdns3_request(zlp_request);
2663                 priv_req->flags |= REQUEST_ZLP;
2664
2665                 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2666                         priv_ep->name);
2667                 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2668         }
2669
2670         spin_unlock_irqrestore(&priv_dev->lock, flags);
2671         return ret;
2672 }
2673
2674 /**
2675  * cdns3_gadget_ep_dequeue - Remove request from transfer queue
2676  * @ep: endpoint object associated with request
2677  * @request: request object
2678  *
2679  * Returns 0 on success, error code elsewhere
2680  */
2681 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2682                             struct usb_request *request)
2683 {
2684         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2685         struct cdns3_device *priv_dev;
2686         struct usb_request *req, *req_temp;
2687         struct cdns3_request *priv_req;
2688         struct cdns3_trb *link_trb;
2689         u8 req_on_hw_ring = 0;
2690         unsigned long flags;
2691         int ret = 0;
2692         int val;
2693
2694         if (!ep || !request || !ep->desc)
2695                 return -EINVAL;
2696
2697         priv_dev = priv_ep->cdns3_dev;
2698
2699         spin_lock_irqsave(&priv_dev->lock, flags);
2700
2701         priv_req = to_cdns3_request(request);
2702
2703         trace_cdns3_ep_dequeue(priv_req);
2704
2705         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2706
2707         list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2708                                  list) {
2709                 if (request == req) {
2710                         req_on_hw_ring = 1;
2711                         goto found;
2712                 }
2713         }
2714
2715         list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2716                                  list) {
2717                 if (request == req)
2718                         goto found;
2719         }
2720
2721         goto not_found;
2722
2723 found:
2724         link_trb = priv_req->trb;
2725
2726         /* Update ring only if removed request is on pending_req_list list */
2727         if (req_on_hw_ring && link_trb) {
2728                 /* Stop DMA */
2729                 writel(EP_CMD_DFLUSH, &priv_dev->regs->ep_cmd);
2730
2731                 /* wait for DFLUSH cleared */
2732                 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2733                                           !(val & EP_CMD_DFLUSH), 1, 1000);
2734
2735                 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2736                         ((priv_req->end_trb + 1) * TRB_SIZE)));
2737                 link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2738                                     TRB_TYPE(TRB_LINK) | TRB_CHAIN);
2739
2740                 if (priv_ep->wa1_trb == priv_req->trb)
2741                         cdns3_wa1_restore_cycle_bit(priv_ep);
2742         }
2743
2744         cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2745
2746         req = cdns3_next_request(&priv_ep->pending_req_list);
2747         if (req)
2748                 cdns3_rearm_transfer(priv_ep, 1);
2749
2750 not_found:
2751         spin_unlock_irqrestore(&priv_dev->lock, flags);
2752         return ret;
2753 }
2754
2755 /**
2756  * __cdns3_gadget_ep_set_halt - Sets stall on selected endpoint
2757  * Should be called after acquiring spin_lock and selecting ep
2758  * @priv_ep: endpoint object to set stall on.
2759  */
2760 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2761 {
2762         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2763
2764         trace_cdns3_halt(priv_ep, 1, 0);
2765
2766         if (!(priv_ep->flags & EP_STALLED)) {
2767                 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2768
2769                 if (!(ep_sts_reg & EP_STS_DBUSY))
2770                         cdns3_ep_stall_flush(priv_ep);
2771                 else
2772                         priv_ep->flags |= EP_STALL_PENDING;
2773         }
2774 }
2775
2776 /**
2777  * __cdns3_gadget_ep_clear_halt - Clears stall on selected endpoint
2778  * Should be called after acquiring spin_lock and selecting ep
2779  * @priv_ep: endpoint object to clear stall on
2780  */
2781 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2782 {
2783         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2784         struct usb_request *request;
2785         struct cdns3_request *priv_req;
2786         struct cdns3_trb *trb = NULL;
2787         struct cdns3_trb trb_tmp;
2788         int ret;
2789         int val;
2790
2791         trace_cdns3_halt(priv_ep, 0, 0);
2792
2793         request = cdns3_next_request(&priv_ep->pending_req_list);
2794         if (request) {
2795                 priv_req = to_cdns3_request(request);
2796                 trb = priv_req->trb;
2797                 if (trb) {
2798                         trb_tmp = *trb;
2799                         trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2800                 }
2801         }
2802
2803         writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2804
2805         /* wait for EPRST cleared */
2806         ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2807                                         !(val & EP_CMD_EPRST), 1, 100);
2808         if (ret)
2809                 return -EINVAL;
2810
2811         priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2812
2813         if (request) {
2814                 if (trb)
2815                         *trb = trb_tmp;
2816
2817                 cdns3_rearm_transfer(priv_ep, 1);
2818         }
2819
2820         cdns3_start_all_request(priv_dev, priv_ep);
2821         return ret;
2822 }
2823
2824 /**
2825  * cdns3_gadget_ep_set_halt - Sets/clears stall on selected endpoint
2826  * @ep: endpoint object to set/clear stall on
2827  * @value: 1 for set stall, 0 for clear stall
2828  *
2829  * Returns 0 on success, error code elsewhere
2830  */
2831 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2832 {
2833         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2834         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2835         unsigned long flags;
2836         int ret = 0;
2837
2838         if (!(priv_ep->flags & EP_ENABLED))
2839                 return -EPERM;
2840
2841         spin_lock_irqsave(&priv_dev->lock, flags);
2842
2843         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2844
2845         if (!value) {
2846                 priv_ep->flags &= ~EP_WEDGE;
2847                 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2848         } else {
2849                 __cdns3_gadget_ep_set_halt(priv_ep);
2850         }
2851
2852         spin_unlock_irqrestore(&priv_dev->lock, flags);
2853
2854         return ret;
2855 }
2856
2857 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2858
2859 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2860         .enable = cdns3_gadget_ep_enable,
2861         .disable = cdns3_gadget_ep_disable,
2862         .alloc_request = cdns3_gadget_ep_alloc_request,
2863         .free_request = cdns3_gadget_ep_free_request,
2864         .queue = cdns3_gadget_ep_queue,
2865         .dequeue = cdns3_gadget_ep_dequeue,
2866         .set_halt = cdns3_gadget_ep_set_halt,
2867         .set_wedge = cdns3_gadget_ep_set_wedge,
2868 };
2869
2870 /**
2871  * cdns3_gadget_get_frame - Returns number of actual ITP frame
2872  * @gadget: gadget object
2873  *
2874  * Returns number of actual ITP frame
2875  */
2876 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2877 {
2878         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2879
2880         return readl(&priv_dev->regs->usb_itpn);
2881 }
2882
2883 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2884 {
2885         enum usb_device_speed speed;
2886
2887         speed = cdns3_get_speed(priv_dev);
2888
2889         if (speed >= USB_SPEED_SUPER)
2890                 return 0;
2891
2892         /* Start driving resume signaling to indicate remote wakeup. */
2893         writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2894
2895         return 0;
2896 }
2897
2898 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2899 {
2900         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2901         unsigned long flags;
2902         int ret = 0;
2903
2904         spin_lock_irqsave(&priv_dev->lock, flags);
2905         ret = __cdns3_gadget_wakeup(priv_dev);
2906         spin_unlock_irqrestore(&priv_dev->lock, flags);
2907         return ret;
2908 }
2909
2910 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2911                                         int is_selfpowered)
2912 {
2913         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2914         unsigned long flags;
2915
2916         spin_lock_irqsave(&priv_dev->lock, flags);
2917         priv_dev->is_selfpowered = !!is_selfpowered;
2918         spin_unlock_irqrestore(&priv_dev->lock, flags);
2919         return 0;
2920 }
2921
2922 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2923 {
2924         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2925
2926         if (is_on) {
2927                 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2928         } else {
2929                 writel(~0, &priv_dev->regs->ep_ists);
2930                 writel(~0, &priv_dev->regs->usb_ists);
2931                 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2932         }
2933
2934         return 0;
2935 }
2936
2937 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2938 {
2939         struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2940         u32 reg;
2941
2942         cdns3_ep0_config(priv_dev);
2943
2944         /* enable interrupts for endpoint 0 (in and out) */
2945         writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
2946
2947         /*
2948          * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2949          * revision of controller.
2950          */
2951         if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2952                 reg = readl(&regs->dbg_link1);
2953
2954                 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2955                 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2956                        DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2957                 writel(reg, &regs->dbg_link1);
2958         }
2959
2960         /*
2961          * By default some platforms has set protected access to memory.
2962          * This cause problem with cache, so driver restore non-secure
2963          * access to memory.
2964          */
2965         reg = readl(&regs->dma_axi_ctrl);
2966         reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2967                DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2968         writel(reg, &regs->dma_axi_ctrl);
2969
2970         /* enable generic interrupt*/
2971         writel(USB_IEN_INIT, &regs->usb_ien);
2972         writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2973         /*  keep Fast Access bit */
2974         writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
2975
2976         cdns3_configure_dmult(priv_dev, NULL);
2977 }
2978
2979 /**
2980  * cdns3_gadget_udc_start - Gadget start
2981  * @gadget: gadget object
2982  * @driver: driver which operates on this gadget
2983  *
2984  * Returns 0 on success, error code elsewhere
2985  */
2986 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2987                                   struct usb_gadget_driver *driver)
2988 {
2989         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2990         unsigned long flags;
2991         enum usb_device_speed max_speed = driver->max_speed;
2992
2993         spin_lock_irqsave(&priv_dev->lock, flags);
2994         priv_dev->gadget_driver = driver;
2995
2996         /* limit speed if necessary */
2997         max_speed = min(driver->max_speed, gadget->max_speed);
2998
2999         switch (max_speed) {
3000         case USB_SPEED_FULL:
3001                 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
3002                 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
3003                 break;
3004         case USB_SPEED_HIGH:
3005                 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
3006                 break;
3007         case USB_SPEED_SUPER:
3008                 break;
3009         default:
3010                 dev_err(priv_dev->dev,
3011                         "invalid maximum_speed parameter %d\n",
3012                         max_speed);
3013                 fallthrough;
3014         case USB_SPEED_UNKNOWN:
3015                 /* default to superspeed */
3016                 max_speed = USB_SPEED_SUPER;
3017                 break;
3018         }
3019
3020         cdns3_gadget_config(priv_dev);
3021         spin_unlock_irqrestore(&priv_dev->lock, flags);
3022         return 0;
3023 }
3024
3025 /**
3026  * cdns3_gadget_udc_stop - Stops gadget
3027  * @gadget: gadget object
3028  *
3029  * Returns 0
3030  */
3031 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
3032 {
3033         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
3034         struct cdns3_endpoint *priv_ep;
3035         u32 bEndpointAddress;
3036         struct usb_ep *ep;
3037         int val;
3038
3039         priv_dev->gadget_driver = NULL;
3040
3041         priv_dev->onchip_used_size = 0;
3042         priv_dev->out_mem_is_allocated = 0;
3043         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3044
3045         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
3046                 priv_ep = ep_to_cdns3_ep(ep);
3047                 bEndpointAddress = priv_ep->num | priv_ep->dir;
3048                 cdns3_select_ep(priv_dev, bEndpointAddress);
3049                 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
3050                 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
3051                                           !(val & EP_CMD_EPRST), 1, 100);
3052
3053                 priv_ep->flags &= ~EP_CLAIMED;
3054         }
3055
3056         /* disable interrupt for device */
3057         writel(0, &priv_dev->regs->usb_ien);
3058         writel(0, &priv_dev->regs->usb_pwr);
3059         writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
3060
3061         return 0;
3062 }
3063
3064 /**
3065  * cdns3_gadget_check_config - ensure cdns3 can support the USB configuration
3066  * @gadget: pointer to the USB gadget
3067  *
3068  * Used to record the maximum number of endpoints being used in a USB composite
3069  * device. (across all configurations)  This is to be used in the calculation
3070  * of the TXFIFO sizes when resizing internal memory for individual endpoints.
3071  * It will help ensured that the resizing logic reserves enough space for at
3072  * least one max packet.
3073  */
3074 static int cdns3_gadget_check_config(struct usb_gadget *gadget)
3075 {
3076         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
3077         struct cdns3_endpoint *priv_ep;
3078         struct usb_ep *ep;
3079         int n_in = 0;
3080         int iso = 0;
3081         int out = 1;
3082         int total;
3083         int n;
3084
3085         list_for_each_entry(ep, &gadget->ep_list, ep_list) {
3086                 priv_ep = ep_to_cdns3_ep(ep);
3087                 if (!(priv_ep->flags & EP_CLAIMED))
3088                         continue;
3089
3090                 n = (priv_ep->mult + 1) * (priv_ep->bMaxBurst + 1);
3091                 if (ep->address & USB_DIR_IN) {
3092                         /*
3093                          * ISO transfer: DMA start move data when get ISO, only transfer
3094                          * data as min(TD size, iso). No benefit for allocate bigger
3095                          * internal memory than 'iso'.
3096                          */
3097                         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
3098                                 iso += n;
3099                         else
3100                                 n_in++;
3101                 } else {
3102                         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
3103                                 out = max_t(int, out, n);
3104                 }
3105         }
3106
3107         /* 2KB are reserved for EP0, 1KB for out*/
3108         total = 2 + n_in + out + iso;
3109
3110         if (total > priv_dev->onchip_buffers)
3111                 return -ENOMEM;
3112
3113         priv_dev->ep_buf_size = (priv_dev->onchip_buffers - 2 - iso) / (n_in + out);
3114
3115         return 0;
3116 }
3117
3118 static const struct usb_gadget_ops cdns3_gadget_ops = {
3119         .get_frame = cdns3_gadget_get_frame,
3120         .wakeup = cdns3_gadget_wakeup,
3121         .set_selfpowered = cdns3_gadget_set_selfpowered,
3122         .pullup = cdns3_gadget_pullup,
3123         .udc_start = cdns3_gadget_udc_start,
3124         .udc_stop = cdns3_gadget_udc_stop,
3125         .match_ep = cdns3_gadget_match_ep,
3126         .check_config = cdns3_gadget_check_config,
3127 };
3128
3129 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
3130 {
3131         int i;
3132
3133         /* ep0 OUT point to ep0 IN. */
3134         priv_dev->eps[16] = NULL;
3135
3136         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
3137                 if (priv_dev->eps[i]) {
3138                         cdns3_free_trb_pool(priv_dev->eps[i]);
3139                         devm_kfree(priv_dev->dev, priv_dev->eps[i]);
3140                 }
3141 }
3142
3143 /**
3144  * cdns3_init_eps - Initializes software endpoints of gadget
3145  * @priv_dev: extended gadget object
3146  *
3147  * Returns 0 on success, error code elsewhere
3148  */
3149 static int cdns3_init_eps(struct cdns3_device *priv_dev)
3150 {
3151         u32 ep_enabled_reg, iso_ep_reg;
3152         struct cdns3_endpoint *priv_ep;
3153         int ep_dir, ep_number;
3154         u32 ep_mask;
3155         int ret = 0;
3156         int i;
3157
3158         /* Read it from USB_CAP3 to USB_CAP5 */
3159         ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
3160         iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
3161
3162         dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
3163
3164         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
3165                 ep_dir = i >> 4;        /* i div 16 */
3166                 ep_number = i & 0xF;    /* i % 16 */
3167                 ep_mask = BIT(i);
3168
3169                 if (!(ep_enabled_reg & ep_mask))
3170                         continue;
3171
3172                 if (ep_dir && !ep_number) {
3173                         priv_dev->eps[i] = priv_dev->eps[0];
3174                         continue;
3175                 }
3176
3177                 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
3178                                        GFP_KERNEL);
3179                 if (!priv_ep)
3180                         goto err;
3181
3182                 /* set parent of endpoint object */
3183                 priv_ep->cdns3_dev = priv_dev;
3184                 priv_dev->eps[i] = priv_ep;
3185                 priv_ep->num = ep_number;
3186                 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
3187
3188                 if (!ep_number) {
3189                         ret = cdns3_init_ep0(priv_dev, priv_ep);
3190                         if (ret) {
3191                                 dev_err(priv_dev->dev, "Failed to init ep0\n");
3192                                 goto err;
3193                         }
3194                 } else {
3195                         snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
3196                                  ep_number, !!ep_dir ? "in" : "out");
3197                         priv_ep->endpoint.name = priv_ep->name;
3198
3199                         usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
3200                                                    CDNS3_EP_MAX_PACKET_LIMIT);
3201                         priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
3202                         priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
3203                         if (ep_dir)
3204                                 priv_ep->endpoint.caps.dir_in = 1;
3205                         else
3206                                 priv_ep->endpoint.caps.dir_out = 1;
3207
3208                         if (iso_ep_reg & ep_mask)
3209                                 priv_ep->endpoint.caps.type_iso = 1;
3210
3211                         priv_ep->endpoint.caps.type_bulk = 1;
3212                         priv_ep->endpoint.caps.type_int = 1;
3213
3214                         list_add_tail(&priv_ep->endpoint.ep_list,
3215                                       &priv_dev->gadget.ep_list);
3216                 }
3217
3218                 priv_ep->flags = 0;
3219
3220                 dev_dbg(priv_dev->dev, "Initialized  %s support: %s %s\n",
3221                          priv_ep->name,
3222                          priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
3223                          priv_ep->endpoint.caps.type_iso ? "ISO" : "");
3224
3225                 INIT_LIST_HEAD(&priv_ep->pending_req_list);
3226                 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
3227                 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
3228         }
3229
3230         return 0;
3231 err:
3232         cdns3_free_all_eps(priv_dev);
3233         return -ENOMEM;
3234 }
3235
3236 static void cdns3_gadget_release(struct device *dev)
3237 {
3238         struct cdns3_device *priv_dev = container_of(dev,
3239                         struct cdns3_device, gadget.dev);
3240
3241         kfree(priv_dev);
3242 }
3243
3244 static void cdns3_gadget_exit(struct cdns *cdns)
3245 {
3246         struct cdns3_device *priv_dev;
3247
3248         priv_dev = cdns->gadget_dev;
3249
3250
3251         pm_runtime_mark_last_busy(cdns->dev);
3252         pm_runtime_put_autosuspend(cdns->dev);
3253
3254         usb_del_gadget(&priv_dev->gadget);
3255         devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
3256
3257         cdns3_free_all_eps(priv_dev);
3258
3259         while (!list_empty(&priv_dev->aligned_buf_list)) {
3260                 struct cdns3_aligned_buf *buf;
3261
3262                 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3263                 dma_free_noncoherent(priv_dev->sysdev, buf->size,
3264                                   buf->buf,
3265                                   buf->dma,
3266                                   buf->dir);
3267
3268                 list_del(&buf->list);
3269                 kfree(buf);
3270         }
3271
3272         dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3273                           priv_dev->setup_dma);
3274         dma_pool_destroy(priv_dev->eps_dma_pool);
3275
3276         kfree(priv_dev->zlp_buf);
3277         usb_put_gadget(&priv_dev->gadget);
3278         cdns->gadget_dev = NULL;
3279         cdns_drd_gadget_off(cdns);
3280 }
3281
3282 static int cdns3_gadget_start(struct cdns *cdns)
3283 {
3284         struct cdns3_device *priv_dev;
3285         u32 max_speed;
3286         int ret;
3287
3288         priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3289         if (!priv_dev)
3290                 return -ENOMEM;
3291
3292         usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3293                         cdns3_gadget_release);
3294         cdns->gadget_dev = priv_dev;
3295         priv_dev->sysdev = cdns->dev;
3296         priv_dev->dev = cdns->dev;
3297         priv_dev->regs = cdns->dev_regs;
3298
3299         device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3300                                  &priv_dev->onchip_buffers);
3301
3302         if (priv_dev->onchip_buffers <=  0) {
3303                 u32 reg = readl(&priv_dev->regs->usb_cap2);
3304
3305                 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3306         }
3307
3308         if (!priv_dev->onchip_buffers)
3309                 priv_dev->onchip_buffers = 256;
3310
3311         max_speed = usb_get_maximum_speed(cdns->dev);
3312
3313         /* Check the maximum_speed parameter */
3314         switch (max_speed) {
3315         case USB_SPEED_FULL:
3316         case USB_SPEED_HIGH:
3317         case USB_SPEED_SUPER:
3318                 break;
3319         default:
3320                 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3321                         max_speed);
3322                 fallthrough;
3323         case USB_SPEED_UNKNOWN:
3324                 /* default to superspeed */
3325                 max_speed = USB_SPEED_SUPER;
3326                 break;
3327         }
3328
3329         /* fill gadget fields */
3330         priv_dev->gadget.max_speed = max_speed;
3331         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3332         priv_dev->gadget.ops = &cdns3_gadget_ops;
3333         priv_dev->gadget.name = "usb-ss-gadget";
3334         priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3335         priv_dev->gadget.irq = cdns->dev_irq;
3336
3337         spin_lock_init(&priv_dev->lock);
3338         INIT_WORK(&priv_dev->pending_status_wq,
3339                   cdns3_pending_setup_status_handler);
3340
3341         INIT_WORK(&priv_dev->aligned_buf_wq,
3342                   cdns3_free_aligned_request_buf);
3343
3344         /* initialize endpoint container */
3345         INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3346         INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3347         priv_dev->eps_dma_pool = dma_pool_create("cdns3_eps_dma_pool",
3348                                                  priv_dev->sysdev,
3349                                                  TRB_RING_SIZE, 8, 0);
3350         if (!priv_dev->eps_dma_pool) {
3351                 dev_err(priv_dev->dev, "Failed to create TRB dma pool\n");
3352                 ret = -ENOMEM;
3353                 goto err1;
3354         }
3355
3356         ret = cdns3_init_eps(priv_dev);
3357         if (ret) {
3358                 dev_err(priv_dev->dev, "Failed to create endpoints\n");
3359                 goto err1;
3360         }
3361
3362         /* allocate memory for setup packet buffer */
3363         priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3364                                                  &priv_dev->setup_dma, GFP_DMA);
3365         if (!priv_dev->setup_buf) {
3366                 ret = -ENOMEM;
3367                 goto err2;
3368         }
3369
3370         priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3371
3372         dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3373                 readl(&priv_dev->regs->usb_cap6));
3374         dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3375                 readl(&priv_dev->regs->usb_cap1));
3376         dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3377                 readl(&priv_dev->regs->usb_cap2));
3378
3379         priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3380         if (priv_dev->dev_ver >= DEV_VER_V2)
3381                 priv_dev->gadget.sg_supported = 1;
3382
3383         priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3384         if (!priv_dev->zlp_buf) {
3385                 ret = -ENOMEM;
3386                 goto err3;
3387         }
3388
3389         /* add USB gadget device */
3390         ret = usb_add_gadget(&priv_dev->gadget);
3391         if (ret < 0) {
3392                 dev_err(priv_dev->dev, "Failed to add gadget\n");
3393                 goto err4;
3394         }
3395
3396         return 0;
3397 err4:
3398         kfree(priv_dev->zlp_buf);
3399 err3:
3400         dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3401                           priv_dev->setup_dma);
3402 err2:
3403         cdns3_free_all_eps(priv_dev);
3404 err1:
3405         dma_pool_destroy(priv_dev->eps_dma_pool);
3406
3407         usb_put_gadget(&priv_dev->gadget);
3408         cdns->gadget_dev = NULL;
3409         return ret;
3410 }
3411
3412 static int __cdns3_gadget_init(struct cdns *cdns)
3413 {
3414         int ret = 0;
3415
3416         /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3417         ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3418         if (ret) {
3419                 dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3420                 return ret;
3421         }
3422
3423         cdns_drd_gadget_on(cdns);
3424         pm_runtime_get_sync(cdns->dev);
3425
3426         ret = cdns3_gadget_start(cdns);
3427         if (ret) {
3428                 pm_runtime_put_sync(cdns->dev);
3429                 return ret;
3430         }
3431
3432         /*
3433          * Because interrupt line can be shared with other components in
3434          * driver it can't use IRQF_ONESHOT flag here.
3435          */
3436         ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3437                                         cdns3_device_irq_handler,
3438                                         cdns3_device_thread_irq_handler,
3439                                         IRQF_SHARED, dev_name(cdns->dev),
3440                                         cdns->gadget_dev);
3441
3442         if (ret)
3443                 goto err0;
3444
3445         return 0;
3446 err0:
3447         cdns3_gadget_exit(cdns);
3448         return ret;
3449 }
3450
3451 static int cdns3_gadget_suspend(struct cdns *cdns, bool do_wakeup)
3452 __must_hold(&cdns->lock)
3453 {
3454         struct cdns3_device *priv_dev = cdns->gadget_dev;
3455
3456         spin_unlock(&cdns->lock);
3457         cdns3_disconnect_gadget(priv_dev);
3458         spin_lock(&cdns->lock);
3459
3460         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3461         usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3462         cdns3_hw_reset_eps_config(priv_dev);
3463
3464         /* disable interrupt for device */
3465         writel(0, &priv_dev->regs->usb_ien);
3466
3467         return 0;
3468 }
3469
3470 static int cdns3_gadget_resume(struct cdns *cdns, bool hibernated)
3471 {
3472         struct cdns3_device *priv_dev = cdns->gadget_dev;
3473
3474         if (!priv_dev->gadget_driver)
3475                 return 0;
3476
3477         cdns3_gadget_config(priv_dev);
3478         if (hibernated)
3479                 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
3480
3481         return 0;
3482 }
3483
3484 /**
3485  * cdns3_gadget_init - initialize device structure
3486  *
3487  * @cdns: cdns instance
3488  *
3489  * This function initializes the gadget.
3490  */
3491 int cdns3_gadget_init(struct cdns *cdns)
3492 {
3493         struct cdns_role_driver *rdrv;
3494
3495         rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3496         if (!rdrv)
3497                 return -ENOMEM;
3498
3499         rdrv->start     = __cdns3_gadget_init;
3500         rdrv->stop      = cdns3_gadget_exit;
3501         rdrv->suspend   = cdns3_gadget_suspend;
3502         rdrv->resume    = cdns3_gadget_resume;
3503         rdrv->state     = CDNS_ROLE_STATE_INACTIVE;
3504         rdrv->name      = "gadget";
3505         cdns->roles[USB_ROLE_DEVICE] = rdrv;
3506
3507         return 0;
3508 }