GNU Linux-libre 4.9.337-gnu1
[releases.git] / drivers / tty / serial / uartlite.c
1 /*
2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
3  *
4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
6  *
7  * This file is licensed under the terms of the GNU General Public License
8  * version 2.  This program is licensed "as is" without any warranty of any
9  * kind, whether express or implied.
10  */
11
12 #include <linux/platform_device.h>
13 #include <linux/module.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/tty.h>
18 #include <linux/tty_flip.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
27
28 #define ULITE_NAME              "ttyUL"
29 #define ULITE_MAJOR             204
30 #define ULITE_MINOR             187
31 #define ULITE_NR_UARTS          16
32
33 /* ---------------------------------------------------------------------
34  * Register definitions
35  *
36  * For register details see datasheet:
37  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
38  */
39
40 #define ULITE_RX                0x00
41 #define ULITE_TX                0x04
42 #define ULITE_STATUS            0x08
43 #define ULITE_CONTROL           0x0c
44
45 #define ULITE_REGION            16
46
47 #define ULITE_STATUS_RXVALID    0x01
48 #define ULITE_STATUS_RXFULL     0x02
49 #define ULITE_STATUS_TXEMPTY    0x04
50 #define ULITE_STATUS_TXFULL     0x08
51 #define ULITE_STATUS_IE         0x10
52 #define ULITE_STATUS_OVERRUN    0x20
53 #define ULITE_STATUS_FRAME      0x40
54 #define ULITE_STATUS_PARITY     0x80
55
56 #define ULITE_CONTROL_RST_TX    0x01
57 #define ULITE_CONTROL_RST_RX    0x02
58 #define ULITE_CONTROL_IE        0x10
59
60 struct uartlite_reg_ops {
61         u32 (*in)(void __iomem *addr);
62         void (*out)(u32 val, void __iomem *addr);
63 };
64
65 static u32 uartlite_inbe32(void __iomem *addr)
66 {
67         return ioread32be(addr);
68 }
69
70 static void uartlite_outbe32(u32 val, void __iomem *addr)
71 {
72         iowrite32be(val, addr);
73 }
74
75 static const struct uartlite_reg_ops uartlite_be = {
76         .in = uartlite_inbe32,
77         .out = uartlite_outbe32,
78 };
79
80 static u32 uartlite_inle32(void __iomem *addr)
81 {
82         return ioread32(addr);
83 }
84
85 static void uartlite_outle32(u32 val, void __iomem *addr)
86 {
87         iowrite32(val, addr);
88 }
89
90 static const struct uartlite_reg_ops uartlite_le = {
91         .in = uartlite_inle32,
92         .out = uartlite_outle32,
93 };
94
95 static inline u32 uart_in32(u32 offset, struct uart_port *port)
96 {
97         const struct uartlite_reg_ops *reg_ops = port->private_data;
98
99         return reg_ops->in(port->membase + offset);
100 }
101
102 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
103 {
104         const struct uartlite_reg_ops *reg_ops = port->private_data;
105
106         reg_ops->out(val, port->membase + offset);
107 }
108
109 static struct uart_port ulite_ports[ULITE_NR_UARTS];
110
111 /* ---------------------------------------------------------------------
112  * Core UART driver operations
113  */
114
115 static int ulite_receive(struct uart_port *port, int stat)
116 {
117         struct tty_port *tport = &port->state->port;
118         unsigned char ch = 0;
119         char flag = TTY_NORMAL;
120
121         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
122                      | ULITE_STATUS_FRAME)) == 0)
123                 return 0;
124
125         /* stats */
126         if (stat & ULITE_STATUS_RXVALID) {
127                 port->icount.rx++;
128                 ch = uart_in32(ULITE_RX, port);
129
130                 if (stat & ULITE_STATUS_PARITY)
131                         port->icount.parity++;
132         }
133
134         if (stat & ULITE_STATUS_OVERRUN)
135                 port->icount.overrun++;
136
137         if (stat & ULITE_STATUS_FRAME)
138                 port->icount.frame++;
139
140
141         /* drop byte with parity error if IGNPAR specificed */
142         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
143                 stat &= ~ULITE_STATUS_RXVALID;
144
145         stat &= port->read_status_mask;
146
147         if (stat & ULITE_STATUS_PARITY)
148                 flag = TTY_PARITY;
149
150
151         stat &= ~port->ignore_status_mask;
152
153         if (stat & ULITE_STATUS_RXVALID)
154                 tty_insert_flip_char(tport, ch, flag);
155
156         if (stat & ULITE_STATUS_FRAME)
157                 tty_insert_flip_char(tport, 0, TTY_FRAME);
158
159         if (stat & ULITE_STATUS_OVERRUN)
160                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
161
162         return 1;
163 }
164
165 static int ulite_transmit(struct uart_port *port, int stat)
166 {
167         struct circ_buf *xmit  = &port->state->xmit;
168
169         if (stat & ULITE_STATUS_TXFULL)
170                 return 0;
171
172         if (port->x_char) {
173                 uart_out32(port->x_char, ULITE_TX, port);
174                 port->x_char = 0;
175                 port->icount.tx++;
176                 return 1;
177         }
178
179         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
180                 return 0;
181
182         uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
183         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
184         port->icount.tx++;
185
186         /* wake up */
187         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
188                 uart_write_wakeup(port);
189
190         return 1;
191 }
192
193 static irqreturn_t ulite_isr(int irq, void *dev_id)
194 {
195         struct uart_port *port = dev_id;
196         int stat, busy, n = 0;
197         unsigned long flags;
198
199         do {
200                 spin_lock_irqsave(&port->lock, flags);
201                 stat = uart_in32(ULITE_STATUS, port);
202                 busy  = ulite_receive(port, stat);
203                 busy |= ulite_transmit(port, stat);
204                 spin_unlock_irqrestore(&port->lock, flags);
205                 n++;
206         } while (busy);
207
208         /* work done? */
209         if (n > 1) {
210                 tty_flip_buffer_push(&port->state->port);
211                 return IRQ_HANDLED;
212         } else {
213                 return IRQ_NONE;
214         }
215 }
216
217 static unsigned int ulite_tx_empty(struct uart_port *port)
218 {
219         unsigned long flags;
220         unsigned int ret;
221
222         spin_lock_irqsave(&port->lock, flags);
223         ret = uart_in32(ULITE_STATUS, port);
224         spin_unlock_irqrestore(&port->lock, flags);
225
226         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
227 }
228
229 static unsigned int ulite_get_mctrl(struct uart_port *port)
230 {
231         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
232 }
233
234 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
235 {
236         /* N/A */
237 }
238
239 static void ulite_stop_tx(struct uart_port *port)
240 {
241         /* N/A */
242 }
243
244 static void ulite_start_tx(struct uart_port *port)
245 {
246         ulite_transmit(port, uart_in32(ULITE_STATUS, port));
247 }
248
249 static void ulite_stop_rx(struct uart_port *port)
250 {
251         /* don't forward any more data (like !CREAD) */
252         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
253                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
254 }
255
256 static void ulite_break_ctl(struct uart_port *port, int ctl)
257 {
258         /* N/A */
259 }
260
261 static int ulite_startup(struct uart_port *port)
262 {
263         int ret;
264
265         ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
266                           "uartlite", port);
267         if (ret)
268                 return ret;
269
270         uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
271                 ULITE_CONTROL, port);
272         uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
273
274         return 0;
275 }
276
277 static void ulite_shutdown(struct uart_port *port)
278 {
279         uart_out32(0, ULITE_CONTROL, port);
280         uart_in32(ULITE_CONTROL, port); /* dummy */
281         free_irq(port->irq, port);
282 }
283
284 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
285                               struct ktermios *old)
286 {
287         unsigned long flags;
288         unsigned int baud;
289
290         spin_lock_irqsave(&port->lock, flags);
291
292         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
293                 | ULITE_STATUS_TXFULL;
294
295         if (termios->c_iflag & INPCK)
296                 port->read_status_mask |=
297                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
298
299         port->ignore_status_mask = 0;
300         if (termios->c_iflag & IGNPAR)
301                 port->ignore_status_mask |= ULITE_STATUS_PARITY
302                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
303
304         /* ignore all characters if CREAD is not set */
305         if ((termios->c_cflag & CREAD) == 0)
306                 port->ignore_status_mask |=
307                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
308                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
309
310         /* update timeout */
311         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
312         uart_update_timeout(port, termios->c_cflag, baud);
313
314         spin_unlock_irqrestore(&port->lock, flags);
315 }
316
317 static const char *ulite_type(struct uart_port *port)
318 {
319         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
320 }
321
322 static void ulite_release_port(struct uart_port *port)
323 {
324         release_mem_region(port->mapbase, ULITE_REGION);
325         iounmap(port->membase);
326         port->membase = NULL;
327 }
328
329 static int ulite_request_port(struct uart_port *port)
330 {
331         int ret;
332
333         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
334                  port, (unsigned long long) port->mapbase);
335
336         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
337                 dev_err(port->dev, "Memory region busy\n");
338                 return -EBUSY;
339         }
340
341         port->membase = ioremap(port->mapbase, ULITE_REGION);
342         if (!port->membase) {
343                 dev_err(port->dev, "Unable to map registers\n");
344                 release_mem_region(port->mapbase, ULITE_REGION);
345                 return -EBUSY;
346         }
347
348         port->private_data = (void *)&uartlite_be;
349         ret = uart_in32(ULITE_CONTROL, port);
350         uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
351         ret = uart_in32(ULITE_STATUS, port);
352         /* Endianess detection */
353         if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
354                 port->private_data = (void *)&uartlite_le;
355
356         return 0;
357 }
358
359 static void ulite_config_port(struct uart_port *port, int flags)
360 {
361         if (!ulite_request_port(port))
362                 port->type = PORT_UARTLITE;
363 }
364
365 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
366 {
367         /* we don't want the core code to modify any port params */
368         return -EINVAL;
369 }
370
371 #ifdef CONFIG_CONSOLE_POLL
372 static int ulite_get_poll_char(struct uart_port *port)
373 {
374         if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
375                 return NO_POLL_CHAR;
376
377         return uart_in32(ULITE_RX, port);
378 }
379
380 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
381 {
382         while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
383                 cpu_relax();
384
385         /* write char to device */
386         uart_out32(ch, ULITE_TX, port);
387 }
388 #endif
389
390 static const struct uart_ops ulite_ops = {
391         .tx_empty       = ulite_tx_empty,
392         .set_mctrl      = ulite_set_mctrl,
393         .get_mctrl      = ulite_get_mctrl,
394         .stop_tx        = ulite_stop_tx,
395         .start_tx       = ulite_start_tx,
396         .stop_rx        = ulite_stop_rx,
397         .break_ctl      = ulite_break_ctl,
398         .startup        = ulite_startup,
399         .shutdown       = ulite_shutdown,
400         .set_termios    = ulite_set_termios,
401         .type           = ulite_type,
402         .release_port   = ulite_release_port,
403         .request_port   = ulite_request_port,
404         .config_port    = ulite_config_port,
405         .verify_port    = ulite_verify_port,
406 #ifdef CONFIG_CONSOLE_POLL
407         .poll_get_char  = ulite_get_poll_char,
408         .poll_put_char  = ulite_put_poll_char,
409 #endif
410 };
411
412 /* ---------------------------------------------------------------------
413  * Console driver operations
414  */
415
416 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
417 static void ulite_console_wait_tx(struct uart_port *port)
418 {
419         u8 val;
420         unsigned long timeout;
421
422         /*
423          * Spin waiting for TX fifo to have space available.
424          * When using the Microblaze Debug Module this can take up to 1s
425          */
426         timeout = jiffies + msecs_to_jiffies(1000);
427         while (1) {
428                 val = uart_in32(ULITE_STATUS, port);
429                 if ((val & ULITE_STATUS_TXFULL) == 0)
430                         break;
431                 if (time_after(jiffies, timeout)) {
432                         dev_warn(port->dev,
433                                  "timeout waiting for TX buffer empty\n");
434                         break;
435                 }
436                 cpu_relax();
437         }
438 }
439
440 static void ulite_console_putchar(struct uart_port *port, int ch)
441 {
442         ulite_console_wait_tx(port);
443         uart_out32(ch, ULITE_TX, port);
444 }
445
446 static void ulite_console_write(struct console *co, const char *s,
447                                 unsigned int count)
448 {
449         struct uart_port *port = &ulite_ports[co->index];
450         unsigned long flags;
451         unsigned int ier;
452         int locked = 1;
453
454         if (oops_in_progress) {
455                 locked = spin_trylock_irqsave(&port->lock, flags);
456         } else
457                 spin_lock_irqsave(&port->lock, flags);
458
459         /* save and disable interrupt */
460         ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
461         uart_out32(0, ULITE_CONTROL, port);
462
463         uart_console_write(port, s, count, ulite_console_putchar);
464
465         ulite_console_wait_tx(port);
466
467         /* restore interrupt state */
468         if (ier)
469                 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
470
471         if (locked)
472                 spin_unlock_irqrestore(&port->lock, flags);
473 }
474
475 static int ulite_console_setup(struct console *co, char *options)
476 {
477         struct uart_port *port;
478         int baud = 9600;
479         int bits = 8;
480         int parity = 'n';
481         int flow = 'n';
482
483         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
484                 return -EINVAL;
485
486         port = &ulite_ports[co->index];
487
488         /* Has the device been initialized yet? */
489         if (!port->mapbase) {
490                 pr_debug("console on ttyUL%i not present\n", co->index);
491                 return -ENODEV;
492         }
493
494         /* not initialized yet? */
495         if (!port->membase) {
496                 if (ulite_request_port(port))
497                         return -ENODEV;
498         }
499
500         if (options)
501                 uart_parse_options(options, &baud, &parity, &bits, &flow);
502
503         return uart_set_options(port, co, baud, parity, bits, flow);
504 }
505
506 static struct uart_driver ulite_uart_driver;
507
508 static struct console ulite_console = {
509         .name   = ULITE_NAME,
510         .write  = ulite_console_write,
511         .device = uart_console_device,
512         .setup  = ulite_console_setup,
513         .flags  = CON_PRINTBUFFER,
514         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
515         .data   = &ulite_uart_driver,
516 };
517
518 static int __init ulite_console_init(void)
519 {
520         register_console(&ulite_console);
521         return 0;
522 }
523
524 console_initcall(ulite_console_init);
525
526 static void early_uartlite_putc(struct uart_port *port, int c)
527 {
528         /*
529          * Limit how many times we'll spin waiting for TX FIFO status.
530          * This will prevent lockups if the base address is incorrectly
531          * set, or any other issue on the UARTLITE.
532          * This limit is pretty arbitrary, unless we are at about 10 baud
533          * we'll never timeout on a working UART.
534          */
535
536         unsigned retries = 1000000;
537         /* read status bit - 0x8 offset */
538         while (--retries && (readl(port->membase + 8) & (1 << 3)))
539                 ;
540
541         /* Only attempt the iowrite if we didn't timeout */
542         /* write to TX_FIFO - 0x4 offset */
543         if (retries)
544                 writel(c & 0xff, port->membase + 4);
545 }
546
547 static void early_uartlite_write(struct console *console,
548                                  const char *s, unsigned n)
549 {
550         struct earlycon_device *device = console->data;
551         uart_console_write(&device->port, s, n, early_uartlite_putc);
552 }
553
554 static int __init early_uartlite_setup(struct earlycon_device *device,
555                                        const char *options)
556 {
557         if (!device->port.membase)
558                 return -ENODEV;
559
560         device->con->write = early_uartlite_write;
561         return 0;
562 }
563 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
564 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
565 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
566
567 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
568
569 static struct uart_driver ulite_uart_driver = {
570         .owner          = THIS_MODULE,
571         .driver_name    = "uartlite",
572         .dev_name       = ULITE_NAME,
573         .major          = ULITE_MAJOR,
574         .minor          = ULITE_MINOR,
575         .nr             = ULITE_NR_UARTS,
576 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
577         .cons           = &ulite_console,
578 #endif
579 };
580
581 /* ---------------------------------------------------------------------
582  * Port assignment functions (mapping devices to uart_port structures)
583  */
584
585 /** ulite_assign: register a uartlite device with the driver
586  *
587  * @dev: pointer to device structure
588  * @id: requested id number.  Pass -1 for automatic port assignment
589  * @base: base address of uartlite registers
590  * @irq: irq number for uartlite
591  *
592  * Returns: 0 on success, <0 otherwise
593  */
594 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
595 {
596         struct uart_port *port;
597         int rc;
598
599         /* if id = -1; then scan for a free id and use that */
600         if (id < 0) {
601                 for (id = 0; id < ULITE_NR_UARTS; id++)
602                         if (ulite_ports[id].mapbase == 0)
603                                 break;
604         }
605         if (id < 0 || id >= ULITE_NR_UARTS) {
606                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
607                 return -EINVAL;
608         }
609
610         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
611                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
612                         ULITE_NAME, id);
613                 return -EBUSY;
614         }
615
616         port = &ulite_ports[id];
617
618         spin_lock_init(&port->lock);
619         port->fifosize = 16;
620         port->regshift = 2;
621         port->iotype = UPIO_MEM;
622         port->iobase = 1; /* mark port in use */
623         port->mapbase = base;
624         port->membase = NULL;
625         port->ops = &ulite_ops;
626         port->irq = irq;
627         port->flags = UPF_BOOT_AUTOCONF;
628         port->dev = dev;
629         port->type = PORT_UNKNOWN;
630         port->line = id;
631
632         dev_set_drvdata(dev, port);
633
634         /* Register the port */
635         rc = uart_add_one_port(&ulite_uart_driver, port);
636         if (rc) {
637                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
638                 port->mapbase = 0;
639                 dev_set_drvdata(dev, NULL);
640                 return rc;
641         }
642
643         return 0;
644 }
645
646 /** ulite_release: register a uartlite device with the driver
647  *
648  * @dev: pointer to device structure
649  */
650 static int ulite_release(struct device *dev)
651 {
652         struct uart_port *port = dev_get_drvdata(dev);
653         int rc = 0;
654
655         if (port) {
656                 rc = uart_remove_one_port(&ulite_uart_driver, port);
657                 dev_set_drvdata(dev, NULL);
658                 port->mapbase = 0;
659         }
660
661         return rc;
662 }
663
664 /* ---------------------------------------------------------------------
665  * Platform bus binding
666  */
667
668 #if defined(CONFIG_OF)
669 /* Match table for of_platform binding */
670 static const struct of_device_id ulite_of_match[] = {
671         { .compatible = "xlnx,opb-uartlite-1.00.b", },
672         { .compatible = "xlnx,xps-uartlite-1.00.a", },
673         {}
674 };
675 MODULE_DEVICE_TABLE(of, ulite_of_match);
676 #endif /* CONFIG_OF */
677
678 static int ulite_probe(struct platform_device *pdev)
679 {
680         struct resource *res;
681         int irq;
682         int id = pdev->id;
683 #ifdef CONFIG_OF
684         const __be32 *prop;
685
686         prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
687         if (prop)
688                 id = be32_to_cpup(prop);
689 #endif
690
691         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
692         if (!res)
693                 return -ENODEV;
694
695         irq = platform_get_irq(pdev, 0);
696         if (irq <= 0)
697                 return -ENXIO;
698
699         return ulite_assign(&pdev->dev, id, res->start, irq);
700 }
701
702 static int ulite_remove(struct platform_device *pdev)
703 {
704         return ulite_release(&pdev->dev);
705 }
706
707 /* work with hotplug and coldplug */
708 MODULE_ALIAS("platform:uartlite");
709
710 static struct platform_driver ulite_platform_driver = {
711         .probe = ulite_probe,
712         .remove = ulite_remove,
713         .driver = {
714                 .name  = "uartlite",
715                 .of_match_table = of_match_ptr(ulite_of_match),
716         },
717 };
718
719 /* ---------------------------------------------------------------------
720  * Module setup/teardown
721  */
722
723 static int __init ulite_init(void)
724 {
725         int ret;
726
727         pr_debug("uartlite: calling uart_register_driver()\n");
728         ret = uart_register_driver(&ulite_uart_driver);
729         if (ret)
730                 goto err_uart;
731
732         pr_debug("uartlite: calling platform_driver_register()\n");
733         ret = platform_driver_register(&ulite_platform_driver);
734         if (ret)
735                 goto err_plat;
736
737         return 0;
738
739 err_plat:
740         uart_unregister_driver(&ulite_uart_driver);
741 err_uart:
742         pr_err("registering uartlite driver failed: err=%i", ret);
743         return ret;
744 }
745
746 static void __exit ulite_exit(void)
747 {
748         platform_driver_unregister(&ulite_platform_driver);
749         if (ulite_uart_driver.state)
750                 uart_unregister_driver(&ulite_uart_driver);
751 }
752
753 module_init(ulite_init);
754 module_exit(ulite_exit);
755
756 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
757 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
758 MODULE_LICENSE("GPL");