1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for SA11x0 serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/platform_data/sa11x0-serial.h>
16 #include <linux/platform_device.h>
17 #include <linux/tty.h>
18 #include <linux/tty_flip.h>
19 #include <linux/serial_core.h>
20 #include <linux/serial.h>
24 #include <mach/hardware.h>
25 #include <mach/irqs.h>
27 #include "serial_mctrl_gpio.h"
29 /* We've been assigned a range on the "Low-density serial ports" major */
30 #define SERIAL_SA1100_MAJOR 204
35 #define SA1100_ISR_PASS_LIMIT 256
38 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
40 #define SM_TO_UTSR0(x) ((x) & 0xff)
41 #define SM_TO_UTSR1(x) ((x) >> 8)
42 #define UTSR0_TO_SM(x) ((x))
43 #define UTSR1_TO_SM(x) ((x) << 8)
45 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
46 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
47 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
48 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
49 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
50 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
51 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
53 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
54 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
55 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
56 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
57 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
58 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
59 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
62 * This is the size of our serial port register set.
64 #define UART_PORT_SIZE 0x24
67 * This determines how often we check the modem status signals
68 * for any change. They generally aren't connected to an IRQ
69 * so we have to poll them. We also check immediately before
70 * filling the TX fifo incase CTS has been dropped.
72 #define MCTRL_TIMEOUT (250*HZ/1000)
75 struct uart_port port;
76 struct timer_list timer;
77 unsigned int old_status;
78 struct mctrl_gpios *gpios;
82 * Handle any change of modem status signal since we were last called.
84 static void sa1100_mctrl_check(struct sa1100_port *sport)
86 unsigned int status, changed;
88 status = sport->port.ops->get_mctrl(&sport->port);
89 changed = status ^ sport->old_status;
94 sport->old_status = status;
96 if (changed & TIOCM_RI)
97 sport->port.icount.rng++;
98 if (changed & TIOCM_DSR)
99 sport->port.icount.dsr++;
100 if (changed & TIOCM_CAR)
101 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
102 if (changed & TIOCM_CTS)
103 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
105 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
109 * This is our per-port timeout handler, for checking the
110 * modem status signals.
112 static void sa1100_timeout(struct timer_list *t)
114 struct sa1100_port *sport = from_timer(sport, t, timer);
117 if (sport->port.state) {
118 uart_port_lock_irqsave(&sport->port, &flags);
119 sa1100_mctrl_check(sport);
120 uart_port_unlock_irqrestore(&sport->port, flags);
122 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
127 * interrupts disabled on entry
129 static void sa1100_stop_tx(struct uart_port *port)
131 struct sa1100_port *sport =
132 container_of(port, struct sa1100_port, port);
135 utcr3 = UART_GET_UTCR3(sport);
136 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
137 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
141 * port locked and interrupts disabled
143 static void sa1100_start_tx(struct uart_port *port)
145 struct sa1100_port *sport =
146 container_of(port, struct sa1100_port, port);
149 utcr3 = UART_GET_UTCR3(sport);
150 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
151 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
157 static void sa1100_stop_rx(struct uart_port *port)
159 struct sa1100_port *sport =
160 container_of(port, struct sa1100_port, port);
163 utcr3 = UART_GET_UTCR3(sport);
164 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
168 * Set the modem control timer to fire immediately.
170 static void sa1100_enable_ms(struct uart_port *port)
172 struct sa1100_port *sport =
173 container_of(port, struct sa1100_port, port);
175 mod_timer(&sport->timer, jiffies);
177 mctrl_gpio_enable_ms(sport->gpios);
181 sa1100_rx_chars(struct sa1100_port *sport)
186 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
187 UTSR0_TO_SM(UART_GET_UTSR0(sport));
188 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
189 ch = UART_GET_CHAR(sport);
191 sport->port.icount.rx++;
196 * note that the error handling code is
197 * out of the main execution path
199 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
200 if (status & UTSR1_TO_SM(UTSR1_PRE))
201 sport->port.icount.parity++;
202 else if (status & UTSR1_TO_SM(UTSR1_FRE))
203 sport->port.icount.frame++;
204 if (status & UTSR1_TO_SM(UTSR1_ROR))
205 sport->port.icount.overrun++;
207 status &= sport->port.read_status_mask;
209 if (status & UTSR1_TO_SM(UTSR1_PRE))
211 else if (status & UTSR1_TO_SM(UTSR1_FRE))
214 sport->port.sysrq = 0;
217 if (uart_handle_sysrq_char(&sport->port, ch))
220 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
223 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
224 UTSR0_TO_SM(UART_GET_UTSR0(sport));
227 tty_flip_buffer_push(&sport->port.state->port);
230 static void sa1100_tx_chars(struct sa1100_port *sport)
235 * Check the modem control lines before
236 * transmitting anything.
238 sa1100_mctrl_check(sport);
240 uart_port_tx(&sport->port, ch,
241 UART_GET_UTSR1(sport) & UTSR1_TNF,
242 UART_PUT_CHAR(sport, ch));
245 static irqreturn_t sa1100_int(int irq, void *dev_id)
247 struct sa1100_port *sport = dev_id;
248 unsigned int status, pass_counter = 0;
250 uart_port_lock(&sport->port);
251 status = UART_GET_UTSR0(sport);
252 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
254 if (status & (UTSR0_RFS | UTSR0_RID)) {
255 /* Clear the receiver idle bit, if set */
256 if (status & UTSR0_RID)
257 UART_PUT_UTSR0(sport, UTSR0_RID);
258 sa1100_rx_chars(sport);
261 /* Clear the relevant break bits */
262 if (status & (UTSR0_RBB | UTSR0_REB))
263 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
265 if (status & UTSR0_RBB)
266 sport->port.icount.brk++;
268 if (status & UTSR0_REB)
269 uart_handle_break(&sport->port);
271 if (status & UTSR0_TFS)
272 sa1100_tx_chars(sport);
273 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
275 status = UART_GET_UTSR0(sport);
276 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
278 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
279 uart_port_unlock(&sport->port);
285 * Return TIOCSER_TEMT when transmitter is not busy.
287 static unsigned int sa1100_tx_empty(struct uart_port *port)
289 struct sa1100_port *sport =
290 container_of(port, struct sa1100_port, port);
292 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
295 static unsigned int sa1100_get_mctrl(struct uart_port *port)
297 struct sa1100_port *sport =
298 container_of(port, struct sa1100_port, port);
299 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
301 mctrl_gpio_get(sport->gpios, &ret);
306 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
308 struct sa1100_port *sport =
309 container_of(port, struct sa1100_port, port);
311 mctrl_gpio_set(sport->gpios, mctrl);
315 * Interrupts always disabled.
317 static void sa1100_break_ctl(struct uart_port *port, int break_state)
319 struct sa1100_port *sport =
320 container_of(port, struct sa1100_port, port);
324 uart_port_lock_irqsave(&sport->port, &flags);
325 utcr3 = UART_GET_UTCR3(sport);
326 if (break_state == -1)
330 UART_PUT_UTCR3(sport, utcr3);
331 uart_port_unlock_irqrestore(&sport->port, flags);
334 static int sa1100_startup(struct uart_port *port)
336 struct sa1100_port *sport =
337 container_of(port, struct sa1100_port, port);
343 retval = request_irq(sport->port.irq, sa1100_int, 0,
344 "sa11x0-uart", sport);
349 * Finally, clear and enable interrupts
351 UART_PUT_UTSR0(sport, -1);
352 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
355 * Enable modem status interrupts
357 uart_port_lock_irq(&sport->port);
358 sa1100_enable_ms(&sport->port);
359 uart_port_unlock_irq(&sport->port);
364 static void sa1100_shutdown(struct uart_port *port)
366 struct sa1100_port *sport =
367 container_of(port, struct sa1100_port, port);
372 del_timer_sync(&sport->timer);
377 free_irq(sport->port.irq, sport);
380 * Disable all interrupts, port and break condition.
382 UART_PUT_UTCR3(sport, 0);
386 sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
387 const struct ktermios *old)
389 struct sa1100_port *sport =
390 container_of(port, struct sa1100_port, port);
392 unsigned int utcr0, old_utcr3, baud, quot;
393 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
396 * We only support CS7 and CS8.
398 while ((termios->c_cflag & CSIZE) != CS7 &&
399 (termios->c_cflag & CSIZE) != CS8) {
400 termios->c_cflag &= ~CSIZE;
401 termios->c_cflag |= old_csize;
405 if ((termios->c_cflag & CSIZE) == CS8)
410 if (termios->c_cflag & CSTOPB)
412 if (termios->c_cflag & PARENB) {
414 if (!(termios->c_cflag & PARODD))
419 * Ask the core to calculate the divisor for us.
421 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
422 quot = uart_get_divisor(port, baud);
424 del_timer_sync(&sport->timer);
426 uart_port_lock_irqsave(&sport->port, &flags);
428 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
429 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
430 if (termios->c_iflag & INPCK)
431 sport->port.read_status_mask |=
432 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
433 if (termios->c_iflag & (BRKINT | PARMRK))
434 sport->port.read_status_mask |=
435 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
438 * Characters to ignore
440 sport->port.ignore_status_mask = 0;
441 if (termios->c_iflag & IGNPAR)
442 sport->port.ignore_status_mask |=
443 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
444 if (termios->c_iflag & IGNBRK) {
445 sport->port.ignore_status_mask |=
446 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
448 * If we're ignoring parity and break indicators,
449 * ignore overruns too (for real raw support).
451 if (termios->c_iflag & IGNPAR)
452 sport->port.ignore_status_mask |=
453 UTSR1_TO_SM(UTSR1_ROR);
457 * Update the per-port timeout.
459 uart_update_timeout(port, termios->c_cflag, baud);
462 * disable interrupts and drain transmitter
464 old_utcr3 = UART_GET_UTCR3(sport);
465 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
467 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
470 /* then, disable everything */
471 UART_PUT_UTCR3(sport, 0);
473 /* set the parity, stop bits and data size */
474 UART_PUT_UTCR0(sport, utcr0);
476 /* set the baud rate */
478 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
479 UART_PUT_UTCR2(sport, (quot & 0xff));
481 UART_PUT_UTSR0(sport, -1);
483 UART_PUT_UTCR3(sport, old_utcr3);
485 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
486 sa1100_enable_ms(&sport->port);
488 uart_port_unlock_irqrestore(&sport->port, flags);
491 static const char *sa1100_type(struct uart_port *port)
493 struct sa1100_port *sport =
494 container_of(port, struct sa1100_port, port);
496 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
500 * Release the memory region(s) being used by 'port'.
502 static void sa1100_release_port(struct uart_port *port)
504 struct sa1100_port *sport =
505 container_of(port, struct sa1100_port, port);
507 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
511 * Request the memory region(s) being used by 'port'.
513 static int sa1100_request_port(struct uart_port *port)
515 struct sa1100_port *sport =
516 container_of(port, struct sa1100_port, port);
518 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
519 "sa11x0-uart") != NULL ? 0 : -EBUSY;
523 * Configure/autoconfigure the port.
525 static void sa1100_config_port(struct uart_port *port, int flags)
527 struct sa1100_port *sport =
528 container_of(port, struct sa1100_port, port);
530 if (flags & UART_CONFIG_TYPE &&
531 sa1100_request_port(&sport->port) == 0)
532 sport->port.type = PORT_SA1100;
536 * Verify the new serial_struct (for TIOCSSERIAL).
537 * The only change we allow are to the flags and type, and
538 * even then only between PORT_SA1100 and PORT_UNKNOWN
541 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
543 struct sa1100_port *sport =
544 container_of(port, struct sa1100_port, port);
547 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
549 if (sport->port.irq != ser->irq)
551 if (ser->io_type != SERIAL_IO_MEM)
553 if (sport->port.uartclk / 16 != ser->baud_base)
555 if ((void *)sport->port.mapbase != ser->iomem_base)
557 if (sport->port.iobase != ser->port)
564 static struct uart_ops sa1100_pops = {
565 .tx_empty = sa1100_tx_empty,
566 .set_mctrl = sa1100_set_mctrl,
567 .get_mctrl = sa1100_get_mctrl,
568 .stop_tx = sa1100_stop_tx,
569 .start_tx = sa1100_start_tx,
570 .stop_rx = sa1100_stop_rx,
571 .enable_ms = sa1100_enable_ms,
572 .break_ctl = sa1100_break_ctl,
573 .startup = sa1100_startup,
574 .shutdown = sa1100_shutdown,
575 .set_termios = sa1100_set_termios,
577 .release_port = sa1100_release_port,
578 .request_port = sa1100_request_port,
579 .config_port = sa1100_config_port,
580 .verify_port = sa1100_verify_port,
583 static struct sa1100_port sa1100_ports[NR_PORTS];
586 * Setup the SA1100 serial ports. Note that we don't include the IrDA
587 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
589 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
590 * Which serial port this ends up being depends on the machine you're
591 * running this kernel on. I'm not convinced that this is a good idea,
592 * but that's the way it traditionally works.
594 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
597 static void __init sa1100_init_ports(void)
599 static int first = 1;
606 for (i = 0; i < NR_PORTS; i++) {
607 sa1100_ports[i].port.uartclk = 3686400;
608 sa1100_ports[i].port.ops = &sa1100_pops;
609 sa1100_ports[i].port.fifosize = 8;
610 sa1100_ports[i].port.line = i;
611 sa1100_ports[i].port.iotype = UPIO_MEM;
612 timer_setup(&sa1100_ports[i].timer, sa1100_timeout, 0);
616 * make transmit lines outputs, so that when the port
617 * is closed, the output is in the MARK state.
619 PPDR |= PPC_TXD1 | PPC_TXD3;
620 PPSR |= PPC_TXD1 | PPC_TXD3;
623 void sa1100_register_uart_fns(struct sa1100_port_fns *fns)
626 sa1100_pops.get_mctrl = fns->get_mctrl;
628 sa1100_pops.set_mctrl = fns->set_mctrl;
630 sa1100_pops.pm = fns->pm;
632 * FIXME: fns->set_wake is unused - this should be called from
633 * the suspend() callback if device_may_wakeup(dev)) is set.
637 void __init sa1100_register_uart(int idx, int port)
639 if (idx >= NR_PORTS) {
640 printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
646 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
647 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
648 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
649 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
653 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
654 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
655 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
656 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
660 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
661 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
662 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
663 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
667 printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
672 #ifdef CONFIG_SERIAL_SA1100_CONSOLE
673 static void sa1100_console_putchar(struct uart_port *port, unsigned char ch)
675 struct sa1100_port *sport =
676 container_of(port, struct sa1100_port, port);
678 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
680 UART_PUT_CHAR(sport, ch);
684 * Interrupts are disabled on entering
687 sa1100_console_write(struct console *co, const char *s, unsigned int count)
689 struct sa1100_port *sport = &sa1100_ports[co->index];
690 unsigned int old_utcr3, status;
693 * First, save UTCR3 and then disable interrupts
695 old_utcr3 = UART_GET_UTCR3(sport);
696 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
699 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
702 * Finally, wait for transmitter to become empty
706 status = UART_GET_UTSR1(sport);
707 } while (status & UTSR1_TBY);
708 UART_PUT_UTCR3(sport, old_utcr3);
712 * If the port was already initialised (eg, by a boot loader),
713 * try to determine the current setup.
716 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
717 int *parity, int *bits)
721 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
722 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
723 /* ok, the port was enabled */
724 unsigned int utcr0, quot;
726 utcr0 = UART_GET_UTCR0(sport);
729 if (utcr0 & UTCR0_PE) {
730 if (utcr0 & UTCR0_OES)
736 if (utcr0 & UTCR0_DSS)
741 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
743 *baud = sport->port.uartclk / (16 * (quot + 1));
748 sa1100_console_setup(struct console *co, char *options)
750 struct sa1100_port *sport;
757 * Check whether an invalid uart number has been specified, and
758 * if so, search for the first available port that does have
761 if (co->index == -1 || co->index >= NR_PORTS)
763 sport = &sa1100_ports[co->index];
766 uart_parse_options(options, &baud, &parity, &bits, &flow);
768 sa1100_console_get_options(sport, &baud, &parity, &bits);
770 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
773 static struct uart_driver sa1100_reg;
774 static struct console sa1100_console = {
776 .write = sa1100_console_write,
777 .device = uart_console_device,
778 .setup = sa1100_console_setup,
779 .flags = CON_PRINTBUFFER,
784 static int __init sa1100_rs_console_init(void)
787 register_console(&sa1100_console);
790 console_initcall(sa1100_rs_console_init);
792 #define SA1100_CONSOLE &sa1100_console
794 #define SA1100_CONSOLE NULL
797 static struct uart_driver sa1100_reg = {
798 .owner = THIS_MODULE,
799 .driver_name = "ttySA",
801 .major = SERIAL_SA1100_MAJOR,
802 .minor = MINOR_START,
804 .cons = SA1100_CONSOLE,
807 static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
809 struct sa1100_port *sport = platform_get_drvdata(dev);
812 uart_suspend_port(&sa1100_reg, &sport->port);
817 static int sa1100_serial_resume(struct platform_device *dev)
819 struct sa1100_port *sport = platform_get_drvdata(dev);
822 uart_resume_port(&sa1100_reg, &sport->port);
827 static int sa1100_serial_add_one_port(struct sa1100_port *sport, struct platform_device *dev)
829 sport->port.dev = &dev->dev;
830 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SA1100_CONSOLE);
832 // mctrl_gpio_init() requires that the GPIO driver supports interrupts,
833 // but we need to support GPIO drivers for hardware that has no such
834 // interrupts. Use mctrl_gpio_init_noauto() instead.
835 sport->gpios = mctrl_gpio_init_noauto(sport->port.dev, 0);
836 if (IS_ERR(sport->gpios)) {
837 int err = PTR_ERR(sport->gpios);
839 dev_err(sport->port.dev, "failed to get mctrl gpios: %d\n",
842 if (err == -EPROBE_DEFER)
848 platform_set_drvdata(dev, sport);
850 return uart_add_one_port(&sa1100_reg, &sport->port);
853 static int sa1100_serial_probe(struct platform_device *dev)
855 struct resource *res;
858 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
862 for (i = 0; i < NR_PORTS; i++)
863 if (sa1100_ports[i].port.mapbase == res->start)
868 sa1100_serial_add_one_port(&sa1100_ports[i], dev);
873 static int sa1100_serial_remove(struct platform_device *pdev)
875 struct sa1100_port *sport = platform_get_drvdata(pdev);
878 uart_remove_one_port(&sa1100_reg, &sport->port);
883 static struct platform_driver sa11x0_serial_driver = {
884 .probe = sa1100_serial_probe,
885 .remove = sa1100_serial_remove,
886 .suspend = sa1100_serial_suspend,
887 .resume = sa1100_serial_resume,
889 .name = "sa11x0-uart",
893 static int __init sa1100_serial_init(void)
897 printk(KERN_INFO "Serial: SA11x0 driver\n");
901 ret = uart_register_driver(&sa1100_reg);
903 ret = platform_driver_register(&sa11x0_serial_driver);
905 uart_unregister_driver(&sa1100_reg);
910 static void __exit sa1100_serial_exit(void)
912 platform_driver_unregister(&sa11x0_serial_driver);
913 uart_unregister_driver(&sa1100_reg);
916 module_init(sa1100_serial_init);
917 module_exit(sa1100_serial_exit);
919 MODULE_AUTHOR("Deep Blue Solutions Ltd");
920 MODULE_DESCRIPTION("SA1100 generic serial port driver");
921 MODULE_LICENSE("GPL");
922 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
923 MODULE_ALIAS("platform:sa11x0-uart");