1 // SPDX-License-Identifier: GPL-2.0
3 * Based on meson_uart.c, by AMLOGIC, INC.
5 * Copyright (C) 2014 Carlo Caione <carlo@caione.org>
9 #include <linux/console.h>
10 #include <linux/delay.h>
11 #include <linux/init.h>
13 #include <linux/iopoll.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/serial.h>
19 #include <linux/serial_core.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
23 /* Register offsets */
24 #define AML_UART_WFIFO 0x00
25 #define AML_UART_RFIFO 0x04
26 #define AML_UART_CONTROL 0x08
27 #define AML_UART_STATUS 0x0c
28 #define AML_UART_MISC 0x10
29 #define AML_UART_REG5 0x14
31 /* AML_UART_CONTROL bits */
32 #define AML_UART_TX_EN BIT(12)
33 #define AML_UART_RX_EN BIT(13)
34 #define AML_UART_TWO_WIRE_EN BIT(15)
35 #define AML_UART_STOP_BIT_LEN_MASK (0x03 << 16)
36 #define AML_UART_STOP_BIT_1SB (0x00 << 16)
37 #define AML_UART_STOP_BIT_2SB (0x01 << 16)
38 #define AML_UART_PARITY_TYPE BIT(18)
39 #define AML_UART_PARITY_EN BIT(19)
40 #define AML_UART_TX_RST BIT(22)
41 #define AML_UART_RX_RST BIT(23)
42 #define AML_UART_CLEAR_ERR BIT(24)
43 #define AML_UART_RX_INT_EN BIT(27)
44 #define AML_UART_TX_INT_EN BIT(28)
45 #define AML_UART_DATA_LEN_MASK (0x03 << 20)
46 #define AML_UART_DATA_LEN_8BIT (0x00 << 20)
47 #define AML_UART_DATA_LEN_7BIT (0x01 << 20)
48 #define AML_UART_DATA_LEN_6BIT (0x02 << 20)
49 #define AML_UART_DATA_LEN_5BIT (0x03 << 20)
51 /* AML_UART_STATUS bits */
52 #define AML_UART_PARITY_ERR BIT(16)
53 #define AML_UART_FRAME_ERR BIT(17)
54 #define AML_UART_TX_FIFO_WERR BIT(18)
55 #define AML_UART_RX_EMPTY BIT(20)
56 #define AML_UART_TX_FULL BIT(21)
57 #define AML_UART_TX_EMPTY BIT(22)
58 #define AML_UART_XMIT_BUSY BIT(25)
59 #define AML_UART_ERR (AML_UART_PARITY_ERR | \
60 AML_UART_FRAME_ERR | \
61 AML_UART_TX_FIFO_WERR)
63 /* AML_UART_MISC bits */
64 #define AML_UART_XMIT_IRQ(c) (((c) & 0xff) << 8)
65 #define AML_UART_RECV_IRQ(c) ((c) & 0xff)
67 /* AML_UART_REG5 bits */
68 #define AML_UART_BAUD_MASK 0x7fffff
69 #define AML_UART_BAUD_USE BIT(23)
70 #define AML_UART_BAUD_XTAL BIT(24)
72 #define AML_UART_PORT_NUM 12
73 #define AML_UART_PORT_OFFSET 6
74 #define AML_UART_DEV_NAME "ttyAML"
76 #define AML_UART_POLL_USEC 5
77 #define AML_UART_TIMEOUT_USEC 10000
79 static struct uart_driver meson_uart_driver;
81 static struct uart_port *meson_ports[AML_UART_PORT_NUM];
83 static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
87 static unsigned int meson_uart_get_mctrl(struct uart_port *port)
92 static unsigned int meson_uart_tx_empty(struct uart_port *port)
96 val = readl(port->membase + AML_UART_STATUS);
97 val &= (AML_UART_TX_EMPTY | AML_UART_XMIT_BUSY);
98 return (val == AML_UART_TX_EMPTY) ? TIOCSER_TEMT : 0;
101 static void meson_uart_stop_tx(struct uart_port *port)
105 val = readl(port->membase + AML_UART_CONTROL);
106 val &= ~AML_UART_TX_INT_EN;
107 writel(val, port->membase + AML_UART_CONTROL);
110 static void meson_uart_stop_rx(struct uart_port *port)
114 val = readl(port->membase + AML_UART_CONTROL);
115 val &= ~AML_UART_RX_EN;
116 writel(val, port->membase + AML_UART_CONTROL);
119 static void meson_uart_shutdown(struct uart_port *port)
124 free_irq(port->irq, port);
126 spin_lock_irqsave(&port->lock, flags);
128 val = readl(port->membase + AML_UART_CONTROL);
129 val &= ~AML_UART_RX_EN;
130 val &= ~(AML_UART_RX_INT_EN | AML_UART_TX_INT_EN);
131 writel(val, port->membase + AML_UART_CONTROL);
133 spin_unlock_irqrestore(&port->lock, flags);
136 static void meson_uart_start_tx(struct uart_port *port)
138 struct circ_buf *xmit = &port->state->xmit;
142 if (uart_tx_stopped(port)) {
143 meson_uart_stop_tx(port);
147 while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
149 writel(port->x_char, port->membase + AML_UART_WFIFO);
155 if (uart_circ_empty(xmit))
158 ch = xmit->buf[xmit->tail];
159 writel(ch, port->membase + AML_UART_WFIFO);
160 xmit->tail = (xmit->tail+1) & (SERIAL_XMIT_SIZE - 1);
164 if (!uart_circ_empty(xmit)) {
165 val = readl(port->membase + AML_UART_CONTROL);
166 val |= AML_UART_TX_INT_EN;
167 writel(val, port->membase + AML_UART_CONTROL);
170 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
171 uart_write_wakeup(port);
174 static void meson_receive_chars(struct uart_port *port)
176 struct tty_port *tport = &port->state->port;
178 u32 ostatus, status, ch, mode;
183 ostatus = status = readl(port->membase + AML_UART_STATUS);
185 if (status & AML_UART_ERR) {
186 if (status & AML_UART_TX_FIFO_WERR)
187 port->icount.overrun++;
188 else if (status & AML_UART_FRAME_ERR)
189 port->icount.frame++;
190 else if (status & AML_UART_PARITY_ERR)
191 port->icount.frame++;
193 mode = readl(port->membase + AML_UART_CONTROL);
194 mode |= AML_UART_CLEAR_ERR;
195 writel(mode, port->membase + AML_UART_CONTROL);
197 /* It doesn't clear to 0 automatically */
198 mode &= ~AML_UART_CLEAR_ERR;
199 writel(mode, port->membase + AML_UART_CONTROL);
201 status &= port->read_status_mask;
202 if (status & AML_UART_FRAME_ERR)
204 else if (status & AML_UART_PARITY_ERR)
208 ch = readl(port->membase + AML_UART_RFIFO);
211 if ((ostatus & AML_UART_FRAME_ERR) && (ch == 0)) {
214 if (uart_handle_break(port))
218 if (uart_handle_sysrq_char(port, ch))
221 if ((status & port->ignore_status_mask) == 0)
222 tty_insert_flip_char(tport, ch, flag);
224 if (status & AML_UART_TX_FIFO_WERR)
225 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
227 } while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY));
229 spin_unlock(&port->lock);
230 tty_flip_buffer_push(tport);
231 spin_lock(&port->lock);
234 static irqreturn_t meson_uart_interrupt(int irq, void *dev_id)
236 struct uart_port *port = (struct uart_port *)dev_id;
238 spin_lock(&port->lock);
240 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY))
241 meson_receive_chars(port);
243 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
244 if (readl(port->membase + AML_UART_CONTROL) & AML_UART_TX_INT_EN)
245 meson_uart_start_tx(port);
248 spin_unlock(&port->lock);
253 static const char *meson_uart_type(struct uart_port *port)
255 return (port->type == PORT_MESON) ? "meson_uart" : NULL;
259 * This function is called only from probe() using a temporary io mapping
260 * in order to perform a reset before setting up the device. Since the
261 * temporarily mapped region was successfully requested, there can be no
262 * console on this port at this time. Hence it is not necessary for this
263 * function to acquire the port->lock. (Since there is no console on this
264 * port at this time, the port->lock is not initialized yet.)
266 static void meson_uart_reset(struct uart_port *port)
270 val = readl(port->membase + AML_UART_CONTROL);
271 val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLEAR_ERR);
272 writel(val, port->membase + AML_UART_CONTROL);
274 val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLEAR_ERR);
275 writel(val, port->membase + AML_UART_CONTROL);
278 static int meson_uart_startup(struct uart_port *port)
284 spin_lock_irqsave(&port->lock, flags);
286 val = readl(port->membase + AML_UART_CONTROL);
287 val |= AML_UART_CLEAR_ERR;
288 writel(val, port->membase + AML_UART_CONTROL);
289 val &= ~AML_UART_CLEAR_ERR;
290 writel(val, port->membase + AML_UART_CONTROL);
292 val |= (AML_UART_RX_EN | AML_UART_TX_EN);
293 writel(val, port->membase + AML_UART_CONTROL);
295 val |= (AML_UART_RX_INT_EN | AML_UART_TX_INT_EN);
296 writel(val, port->membase + AML_UART_CONTROL);
298 val = (AML_UART_RECV_IRQ(1) | AML_UART_XMIT_IRQ(port->fifosize / 2));
299 writel(val, port->membase + AML_UART_MISC);
301 spin_unlock_irqrestore(&port->lock, flags);
303 ret = request_irq(port->irq, meson_uart_interrupt, 0,
309 static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
313 while (!meson_uart_tx_empty(port))
316 if (port->uartclk == 24000000) {
317 val = ((port->uartclk / 3) / baud) - 1;
318 val |= AML_UART_BAUD_XTAL;
320 val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1;
322 val |= AML_UART_BAUD_USE;
323 writel(val, port->membase + AML_UART_REG5);
326 static void meson_uart_set_termios(struct uart_port *port,
327 struct ktermios *termios,
328 struct ktermios *old)
330 unsigned int cflags, iflags, baud;
334 spin_lock_irqsave(&port->lock, flags);
336 cflags = termios->c_cflag;
337 iflags = termios->c_iflag;
339 val = readl(port->membase + AML_UART_CONTROL);
341 val &= ~AML_UART_DATA_LEN_MASK;
342 switch (cflags & CSIZE) {
344 val |= AML_UART_DATA_LEN_8BIT;
347 val |= AML_UART_DATA_LEN_7BIT;
350 val |= AML_UART_DATA_LEN_6BIT;
353 val |= AML_UART_DATA_LEN_5BIT;
358 val |= AML_UART_PARITY_EN;
360 val &= ~AML_UART_PARITY_EN;
363 val |= AML_UART_PARITY_TYPE;
365 val &= ~AML_UART_PARITY_TYPE;
367 val &= ~AML_UART_STOP_BIT_LEN_MASK;
369 val |= AML_UART_STOP_BIT_2SB;
371 val |= AML_UART_STOP_BIT_1SB;
373 if (cflags & CRTSCTS)
374 val &= ~AML_UART_TWO_WIRE_EN;
376 val |= AML_UART_TWO_WIRE_EN;
378 writel(val, port->membase + AML_UART_CONTROL);
380 baud = uart_get_baud_rate(port, termios, old, 50, 4000000);
381 meson_uart_change_speed(port, baud);
383 port->read_status_mask = AML_UART_TX_FIFO_WERR;
385 port->read_status_mask |= AML_UART_PARITY_ERR |
388 port->ignore_status_mask = 0;
390 port->ignore_status_mask |= AML_UART_PARITY_ERR |
393 uart_update_timeout(port, termios->c_cflag, baud);
394 spin_unlock_irqrestore(&port->lock, flags);
397 static int meson_uart_verify_port(struct uart_port *port,
398 struct serial_struct *ser)
402 if (port->type != PORT_MESON)
404 if (port->irq != ser->irq)
406 if (ser->baud_base < 9600)
411 static void meson_uart_release_port(struct uart_port *port)
413 devm_iounmap(port->dev, port->membase);
414 port->membase = NULL;
415 devm_release_mem_region(port->dev, port->mapbase, port->mapsize);
418 static int meson_uart_request_port(struct uart_port *port)
420 if (!devm_request_mem_region(port->dev, port->mapbase, port->mapsize,
421 dev_name(port->dev))) {
422 dev_err(port->dev, "Memory region busy\n");
426 port->membase = devm_ioremap(port->dev, port->mapbase,
434 static void meson_uart_config_port(struct uart_port *port, int flags)
436 if (flags & UART_CONFIG_TYPE) {
437 port->type = PORT_MESON;
438 meson_uart_request_port(port);
442 #ifdef CONFIG_CONSOLE_POLL
444 * Console polling routines for writing and reading from the uart while
445 * in an interrupt or debug context (i.e. kgdb).
448 static int meson_uart_poll_get_char(struct uart_port *port)
453 spin_lock_irqsave(&port->lock, flags);
455 if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)
458 c = readl(port->membase + AML_UART_RFIFO);
460 spin_unlock_irqrestore(&port->lock, flags);
465 static void meson_uart_poll_put_char(struct uart_port *port, unsigned char c)
471 spin_lock_irqsave(&port->lock, flags);
473 /* Wait until FIFO is empty or timeout */
474 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
475 reg & AML_UART_TX_EMPTY,
477 AML_UART_TIMEOUT_USEC);
478 if (ret == -ETIMEDOUT) {
479 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
483 /* Write the character */
484 writel(c, port->membase + AML_UART_WFIFO);
486 /* Wait until FIFO is empty or timeout */
487 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
488 reg & AML_UART_TX_EMPTY,
490 AML_UART_TIMEOUT_USEC);
491 if (ret == -ETIMEDOUT)
492 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
495 spin_unlock_irqrestore(&port->lock, flags);
498 #endif /* CONFIG_CONSOLE_POLL */
500 static const struct uart_ops meson_uart_ops = {
501 .set_mctrl = meson_uart_set_mctrl,
502 .get_mctrl = meson_uart_get_mctrl,
503 .tx_empty = meson_uart_tx_empty,
504 .start_tx = meson_uart_start_tx,
505 .stop_tx = meson_uart_stop_tx,
506 .stop_rx = meson_uart_stop_rx,
507 .startup = meson_uart_startup,
508 .shutdown = meson_uart_shutdown,
509 .set_termios = meson_uart_set_termios,
510 .type = meson_uart_type,
511 .config_port = meson_uart_config_port,
512 .request_port = meson_uart_request_port,
513 .release_port = meson_uart_release_port,
514 .verify_port = meson_uart_verify_port,
515 #ifdef CONFIG_CONSOLE_POLL
516 .poll_get_char = meson_uart_poll_get_char,
517 .poll_put_char = meson_uart_poll_put_char,
521 #ifdef CONFIG_SERIAL_MESON_CONSOLE
522 static void meson_uart_enable_tx_engine(struct uart_port *port)
526 val = readl(port->membase + AML_UART_CONTROL);
527 val |= AML_UART_TX_EN;
528 writel(val, port->membase + AML_UART_CONTROL);
531 static void meson_console_putchar(struct uart_port *port, int ch)
536 while (readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)
538 writel(ch, port->membase + AML_UART_WFIFO);
541 static void meson_serial_port_write(struct uart_port *port, const char *s,
548 local_irq_save(flags);
551 } else if (oops_in_progress) {
552 locked = spin_trylock(&port->lock);
554 spin_lock(&port->lock);
558 val = readl(port->membase + AML_UART_CONTROL);
559 tmp = val & ~(AML_UART_TX_INT_EN | AML_UART_RX_INT_EN);
560 writel(tmp, port->membase + AML_UART_CONTROL);
562 uart_console_write(port, s, count, meson_console_putchar);
563 writel(val, port->membase + AML_UART_CONTROL);
566 spin_unlock(&port->lock);
567 local_irq_restore(flags);
570 static void meson_serial_console_write(struct console *co, const char *s,
573 struct uart_port *port;
575 port = meson_ports[co->index];
579 meson_serial_port_write(port, s, count);
582 static int meson_serial_console_setup(struct console *co, char *options)
584 struct uart_port *port;
590 if (co->index < 0 || co->index >= AML_UART_PORT_NUM)
593 port = meson_ports[co->index];
594 if (!port || !port->membase)
597 meson_uart_enable_tx_engine(port);
600 uart_parse_options(options, &baud, &parity, &bits, &flow);
602 return uart_set_options(port, co, baud, parity, bits, flow);
605 static struct console meson_serial_console = {
606 .name = AML_UART_DEV_NAME,
607 .write = meson_serial_console_write,
608 .device = uart_console_device,
609 .setup = meson_serial_console_setup,
610 .flags = CON_PRINTBUFFER,
612 .data = &meson_uart_driver,
615 static int __init meson_serial_console_init(void)
617 register_console(&meson_serial_console);
620 console_initcall(meson_serial_console_init);
622 static void meson_serial_early_console_write(struct console *co,
626 struct earlycon_device *dev = co->data;
628 meson_serial_port_write(&dev->port, s, count);
632 meson_serial_early_console_setup(struct earlycon_device *device, const char *opt)
634 if (!device->port.membase)
637 meson_uart_enable_tx_engine(&device->port);
638 device->con->write = meson_serial_early_console_write;
641 /* Legacy bindings, should be removed when no more used */
642 OF_EARLYCON_DECLARE(meson, "amlogic,meson-uart",
643 meson_serial_early_console_setup);
644 /* Stable bindings */
645 OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
646 meson_serial_early_console_setup);
648 #define MESON_SERIAL_CONSOLE (&meson_serial_console)
650 #define MESON_SERIAL_CONSOLE NULL
653 static struct uart_driver meson_uart_driver = {
654 .owner = THIS_MODULE,
655 .driver_name = "meson_uart",
656 .dev_name = AML_UART_DEV_NAME,
657 .nr = AML_UART_PORT_NUM,
658 .cons = MESON_SERIAL_CONSOLE,
661 static inline struct clk *meson_uart_probe_clock(struct device *dev,
664 struct clk *clk = NULL;
667 clk = devm_clk_get(dev, id);
671 ret = clk_prepare_enable(clk);
673 dev_err(dev, "couldn't enable clk\n");
677 devm_add_action_or_reset(dev,
678 (void(*)(void *))clk_disable_unprepare,
685 * This function gets clocks in the legacy non-stable DT bindings.
686 * This code will be remove once all the platforms switch to the
689 static int meson_uart_probe_clocks_legacy(struct platform_device *pdev,
690 struct uart_port *port)
692 struct clk *clk = NULL;
694 clk = meson_uart_probe_clock(&pdev->dev, NULL);
698 port->uartclk = clk_get_rate(clk);
703 static int meson_uart_probe_clocks(struct platform_device *pdev,
704 struct uart_port *port)
706 struct clk *clk_xtal = NULL;
707 struct clk *clk_pclk = NULL;
708 struct clk *clk_baud = NULL;
710 clk_pclk = meson_uart_probe_clock(&pdev->dev, "pclk");
711 if (IS_ERR(clk_pclk))
712 return PTR_ERR(clk_pclk);
714 clk_xtal = meson_uart_probe_clock(&pdev->dev, "xtal");
715 if (IS_ERR(clk_xtal))
716 return PTR_ERR(clk_xtal);
718 clk_baud = meson_uart_probe_clock(&pdev->dev, "baud");
719 if (IS_ERR(clk_baud))
720 return PTR_ERR(clk_baud);
722 port->uartclk = clk_get_rate(clk_baud);
727 static int meson_uart_probe(struct platform_device *pdev)
729 struct resource *res_mem, *res_irq;
730 struct uart_port *port;
734 if (pdev->dev.of_node)
735 pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
738 for (id = AML_UART_PORT_OFFSET; id < AML_UART_PORT_NUM; id++) {
739 if (!meson_ports[id]) {
746 if (pdev->id < 0 || pdev->id >= AML_UART_PORT_NUM)
749 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
753 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
757 if (meson_ports[pdev->id]) {
758 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
762 port = devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL);
766 /* Use legacy way until all platforms switch to new bindings */
767 if (of_device_is_compatible(pdev->dev.of_node, "amlogic,meson-uart"))
768 ret = meson_uart_probe_clocks_legacy(pdev, port);
770 ret = meson_uart_probe_clocks(pdev, port);
775 port->iotype = UPIO_MEM;
776 port->mapbase = res_mem->start;
777 port->mapsize = resource_size(res_mem);
778 port->irq = res_irq->start;
779 port->flags = UPF_BOOT_AUTOCONF | UPF_LOW_LATENCY;
780 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MESON_CONSOLE);
781 port->dev = &pdev->dev;
782 port->line = pdev->id;
783 port->type = PORT_MESON;
785 port->ops = &meson_uart_ops;
788 meson_ports[pdev->id] = port;
789 platform_set_drvdata(pdev, port);
791 /* reset port before registering (and possibly registering console) */
792 if (meson_uart_request_port(port) >= 0) {
793 meson_uart_reset(port);
794 meson_uart_release_port(port);
797 ret = uart_add_one_port(&meson_uart_driver, port);
799 meson_ports[pdev->id] = NULL;
804 static int meson_uart_remove(struct platform_device *pdev)
806 struct uart_port *port;
808 port = platform_get_drvdata(pdev);
809 uart_remove_one_port(&meson_uart_driver, port);
810 meson_ports[pdev->id] = NULL;
815 static const struct of_device_id meson_uart_dt_match[] = {
816 /* Legacy bindings, should be removed when no more used */
817 { .compatible = "amlogic,meson-uart" },
818 /* Stable bindings */
819 { .compatible = "amlogic,meson6-uart" },
820 { .compatible = "amlogic,meson8-uart" },
821 { .compatible = "amlogic,meson8b-uart" },
822 { .compatible = "amlogic,meson-gx-uart" },
825 MODULE_DEVICE_TABLE(of, meson_uart_dt_match);
827 static struct platform_driver meson_uart_platform_driver = {
828 .probe = meson_uart_probe,
829 .remove = meson_uart_remove,
831 .name = "meson_uart",
832 .of_match_table = meson_uart_dt_match,
836 static int __init meson_uart_init(void)
840 ret = uart_register_driver(&meson_uart_driver);
844 ret = platform_driver_register(&meson_uart_platform_driver);
846 uart_unregister_driver(&meson_uart_driver);
851 static void __exit meson_uart_exit(void)
853 platform_driver_unregister(&meson_uart_platform_driver);
854 uart_unregister_driver(&meson_uart_driver);
857 module_init(meson_uart_init);
858 module_exit(meson_uart_exit);
860 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
861 MODULE_DESCRIPTION("Amlogic Meson serial port driver");
862 MODULE_LICENSE("GPL v2");