1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for CPM (SCC/SMC) serial ports; core driver
5 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
6 * Based on ppc8xx.c by Thomas Gleixner
7 * Based on drivers/serial/amba.c by Russell King
9 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
10 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
12 * Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
13 * (C) 2004 Intracom, S.A.
14 * (C) 2005-2006 MontaVista Software, Inc.
15 * Vitaly Bordug <vbordug@ru.mvista.com>
18 #include <linux/module.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 #include <linux/ioport.h>
22 #include <linux/init.h>
23 #include <linux/serial.h>
24 #include <linux/console.h>
25 #include <linux/sysrq.h>
26 #include <linux/device.h>
27 #include <linux/memblock.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/of_address.h>
30 #include <linux/of_irq.h>
31 #include <linux/of_platform.h>
32 #include <linux/gpio/consumer.h>
33 #include <linux/clk.h>
35 #include <sysdev/fsl_soc.h>
39 #include <asm/delay.h>
42 #include <linux/serial_core.h>
43 #include <linux/kernel.h>
48 /**************************************************************/
50 static int cpm_uart_tx_pump(struct uart_port *port);
51 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
53 /**************************************************************/
55 #define HW_BUF_SPD_THRESHOLD 2400
57 static void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
59 cpm_command(port->command, cmd);
63 * Check, if transmit buffers are processed
65 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
67 struct uart_cpm_port *pinfo =
68 container_of(port, struct uart_cpm_port, port);
69 cbd_t __iomem *bdp = pinfo->tx_bd_base;
73 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
76 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
83 pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
88 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
90 struct uart_cpm_port *pinfo =
91 container_of(port, struct uart_cpm_port, port);
93 if (pinfo->gpios[GPIO_RTS])
94 gpiod_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
96 if (pinfo->gpios[GPIO_DTR])
97 gpiod_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
100 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
102 struct uart_cpm_port *pinfo =
103 container_of(port, struct uart_cpm_port, port);
104 unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
106 if (pinfo->gpios[GPIO_CTS]) {
107 if (gpiod_get_value(pinfo->gpios[GPIO_CTS]))
111 if (pinfo->gpios[GPIO_DSR]) {
112 if (gpiod_get_value(pinfo->gpios[GPIO_DSR]))
116 if (pinfo->gpios[GPIO_DCD]) {
117 if (gpiod_get_value(pinfo->gpios[GPIO_DCD]))
121 if (pinfo->gpios[GPIO_RI]) {
122 if (!gpiod_get_value(pinfo->gpios[GPIO_RI]))
132 static void cpm_uart_stop_tx(struct uart_port *port)
134 struct uart_cpm_port *pinfo =
135 container_of(port, struct uart_cpm_port, port);
136 smc_t __iomem *smcp = pinfo->smcp;
137 scc_t __iomem *sccp = pinfo->sccp;
139 pr_debug("CPM uart[%d]:stop tx\n", port->line);
142 clrbits8(&smcp->smc_smcm, SMCM_TX);
144 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
150 static void cpm_uart_start_tx(struct uart_port *port)
152 struct uart_cpm_port *pinfo =
153 container_of(port, struct uart_cpm_port, port);
154 smc_t __iomem *smcp = pinfo->smcp;
155 scc_t __iomem *sccp = pinfo->sccp;
157 pr_debug("CPM uart[%d]:start tx\n", port->line);
160 if (in_8(&smcp->smc_smcm) & SMCM_TX)
163 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
167 if (cpm_uart_tx_pump(port) != 0) {
169 setbits8(&smcp->smc_smcm, SMCM_TX);
171 setbits16(&sccp->scc_sccm, UART_SCCM_TX);
179 static void cpm_uart_stop_rx(struct uart_port *port)
181 struct uart_cpm_port *pinfo =
182 container_of(port, struct uart_cpm_port, port);
183 smc_t __iomem *smcp = pinfo->smcp;
184 scc_t __iomem *sccp = pinfo->sccp;
186 pr_debug("CPM uart[%d]:stop rx\n", port->line);
189 clrbits8(&smcp->smc_smcm, SMCM_RX);
191 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
197 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
199 struct uart_cpm_port *pinfo =
200 container_of(port, struct uart_cpm_port, port);
202 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
206 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
208 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
212 * Transmit characters, refill buffer descriptor, if possible
214 static void cpm_uart_int_tx(struct uart_port *port)
216 pr_debug("CPM uart[%d]:TX INT\n", port->line);
218 cpm_uart_tx_pump(port);
221 #ifdef CONFIG_CONSOLE_POLL
222 static int serial_polled;
228 static void cpm_uart_int_rx(struct uart_port *port)
233 struct tty_port *tport = &port->state->port;
234 struct uart_cpm_port *pinfo =
235 container_of(port, struct uart_cpm_port, port);
240 pr_debug("CPM uart[%d]:RX INT\n", port->line);
242 /* Just loop through the closed BDs and copy the characters into
247 #ifdef CONFIG_CONSOLE_POLL
248 if (unlikely(serial_polled)) {
254 status = in_be16(&bdp->cbd_sc);
255 /* If this one is empty, return happy */
256 if (status & BD_SC_EMPTY)
259 /* get number of characters, and check spce in flip-buffer */
260 i = in_be16(&bdp->cbd_datlen);
262 /* If we have not enough room in tty flip buffer, then we try
263 * later, which will be the next rx-interrupt or a timeout
265 if (tty_buffer_request_room(tport, i) < i) {
266 printk(KERN_WARNING "No room in flip buffer\n");
271 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
273 /* loop through the buffer */
280 (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
282 if (uart_handle_sysrq_char(port, ch))
284 #ifdef CONFIG_CONSOLE_POLL
285 if (unlikely(serial_polled)) {
291 tty_insert_flip_char(tport, ch, flg);
293 } /* End while (i--) */
295 /* This BD is ready to be used again. Clear status. get next */
296 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
297 BD_SC_OV | BD_SC_ID);
298 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
300 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
301 bdp = pinfo->rx_bd_base;
307 /* Write back buffer pointer */
310 /* activate BH processing */
311 tty_flip_buffer_push(tport);
315 /* Error processing */
319 if (status & BD_SC_BR)
321 if (status & BD_SC_PR)
322 port->icount.parity++;
323 if (status & BD_SC_FR)
324 port->icount.frame++;
325 if (status & BD_SC_OV)
326 port->icount.overrun++;
328 /* Mask out ignored conditions */
329 status &= port->read_status_mask;
331 /* Handle the remaining ones */
332 if (status & BD_SC_BR)
334 else if (status & BD_SC_PR)
336 else if (status & BD_SC_FR)
339 /* overrun does not affect the current character ! */
340 if (status & BD_SC_OV) {
343 /* We skip this buffer */
344 /* CHECK: Is really nothing senseful there */
345 /* ASSUMPTION: it contains nothing valid */
353 * Asynchron mode interrupt handler
355 static irqreturn_t cpm_uart_int(int irq, void *data)
358 struct uart_port *port = data;
359 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
360 smc_t __iomem *smcp = pinfo->smcp;
361 scc_t __iomem *sccp = pinfo->sccp;
363 pr_debug("CPM uart[%d]:IRQ\n", port->line);
366 events = in_8(&smcp->smc_smce);
367 out_8(&smcp->smc_smce, events);
368 if (events & SMCM_BRKE)
369 uart_handle_break(port);
370 if (events & SMCM_RX)
371 cpm_uart_int_rx(port);
372 if (events & SMCM_TX)
373 cpm_uart_int_tx(port);
375 events = in_be16(&sccp->scc_scce);
376 out_be16(&sccp->scc_scce, events);
377 if (events & UART_SCCM_BRKE)
378 uart_handle_break(port);
379 if (events & UART_SCCM_RX)
380 cpm_uart_int_rx(port);
381 if (events & UART_SCCM_TX)
382 cpm_uart_int_tx(port);
384 return (events) ? IRQ_HANDLED : IRQ_NONE;
387 static int cpm_uart_startup(struct uart_port *port)
390 struct uart_cpm_port *pinfo =
391 container_of(port, struct uart_cpm_port, port);
393 pr_debug("CPM uart[%d]:startup\n", port->line);
395 /* If the port is not the console, make sure rx is disabled. */
396 if (!(pinfo->flags & FLAG_CONSOLE)) {
397 /* Disable UART rx */
399 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
400 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
402 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
403 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
405 cpm_uart_initbd(pinfo);
407 out_be32(&pinfo->smcup->smc_rstate, 0);
408 out_be32(&pinfo->smcup->smc_tstate, 0);
409 out_be16(&pinfo->smcup->smc_rbptr,
410 in_be16(&pinfo->smcup->smc_rbase));
411 out_be16(&pinfo->smcup->smc_tbptr,
412 in_be16(&pinfo->smcup->smc_tbase));
414 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
417 /* Install interrupt handler. */
418 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
424 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
425 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
427 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
428 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
434 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
436 set_current_state(TASK_UNINTERRUPTIBLE);
437 schedule_timeout(pinfo->wait_closing);
443 static void cpm_uart_shutdown(struct uart_port *port)
445 struct uart_cpm_port *pinfo =
446 container_of(port, struct uart_cpm_port, port);
448 pr_debug("CPM uart[%d]:shutdown\n", port->line);
450 /* free interrupt handler */
451 free_irq(port->irq, port);
453 /* If the port is not the console, disable Rx and Tx. */
454 if (!(pinfo->flags & FLAG_CONSOLE)) {
455 /* Wait for all the BDs marked sent */
456 while(!cpm_uart_tx_empty(port)) {
457 set_current_state(TASK_UNINTERRUPTIBLE);
461 if (pinfo->wait_closing)
462 cpm_uart_wait_until_send(pinfo);
466 smc_t __iomem *smcp = pinfo->smcp;
467 clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
468 clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
470 scc_t __iomem *sccp = pinfo->sccp;
471 clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
472 clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
475 /* Shut them really down and reinit buffer descriptors */
477 out_be16(&pinfo->smcup->smc_brkcr, 0);
478 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
480 out_be16(&pinfo->sccup->scc_brkcr, 0);
481 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
484 cpm_uart_initbd(pinfo);
488 static void cpm_uart_set_termios(struct uart_port *port,
489 struct ktermios *termios,
490 const struct ktermios *old)
494 u16 cval, scval, prev_mode;
495 struct uart_cpm_port *pinfo =
496 container_of(port, struct uart_cpm_port, port);
497 smc_t __iomem *smcp = pinfo->smcp;
498 scc_t __iomem *sccp = pinfo->sccp;
501 pr_debug("CPM uart[%d]:set_termios\n", port->line);
503 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
504 if (baud < HW_BUF_SPD_THRESHOLD || port->flags & UPF_LOW_LATENCY)
505 pinfo->rx_fifosize = 1;
507 pinfo->rx_fifosize = RX_BUF_SIZE;
509 /* MAXIDL is the timeout after which a receive buffer is closed
510 * when not full if no more characters are received.
511 * We calculate it from the baudrate so that the duration is
512 * always the same at standard rates: about 4ms.
514 maxidl = baud / 2400;
523 if (termios->c_cflag & CSTOPB) {
524 cval |= SMCMR_SL; /* Two stops */
525 scval |= SCU_PSMR_SL;
528 if (termios->c_cflag & PARENB) {
530 scval |= SCU_PSMR_PEN;
531 if (!(termios->c_cflag & PARODD)) {
532 cval |= SMCMR_PM_EVEN;
533 scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
540 uart_update_timeout(port, termios->c_cflag, baud);
543 * Set up parity check flag
545 port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
546 if (termios->c_iflag & INPCK)
547 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
548 if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
549 port->read_status_mask |= BD_SC_BR;
552 * Characters to ignore
554 port->ignore_status_mask = 0;
555 if (termios->c_iflag & IGNPAR)
556 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
557 if (termios->c_iflag & IGNBRK) {
558 port->ignore_status_mask |= BD_SC_BR;
560 * If we're ignore parity and break indicators, ignore
561 * overruns too. (For real raw support).
563 if (termios->c_iflag & IGNPAR)
564 port->ignore_status_mask |= BD_SC_OV;
567 * !!! ignore all characters if CREAD is not set
569 if ((termios->c_cflag & CREAD) == 0)
570 port->read_status_mask &= ~BD_SC_EMPTY;
572 uart_port_lock_irqsave(port, &flags);
575 unsigned int bits = tty_get_frame_size(termios->c_cflag);
578 * MRBLR can be changed while an SMC/SCC is operating only
579 * if it is done in a single bus cycle with one 16-bit move
580 * (not two 8-bit bus cycles back-to-back). This occurs when
581 * the cp shifts control to the next RxBD, so the change does
582 * not take effect immediately. To guarantee the exact RxBD
583 * on which the change occurs, change MRBLR only while the
584 * SMC/SCC receiver is disabled.
586 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
587 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
589 /* Set the mode register. We want to keep a copy of the
590 * enables, because we want to put them back if they were
593 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
594 /* Output in *one* operation, so we don't interrupt RX/TX if they
595 * were already enabled.
596 * Character length programmed into the register is frame bits minus 1.
598 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits - 1) | cval |
599 SMCMR_SM_UART | prev_mode);
601 unsigned int bits = tty_get_char_size(termios->c_cflag);
603 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
604 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
605 out_be16(&sccp->scc_psmr, (UART_LCR_WLEN(bits) << 12) | scval);
609 clk_set_rate(pinfo->clk, baud);
611 cpm_setbrg(pinfo->brg - 1, baud);
612 uart_port_unlock_irqrestore(port, flags);
615 static const char *cpm_uart_type(struct uart_port *port)
617 pr_debug("CPM uart[%d]:uart_type\n", port->line);
619 return port->type == PORT_CPM ? "CPM UART" : NULL;
623 * verify the new serial_struct (for TIOCSSERIAL).
625 static int cpm_uart_verify_port(struct uart_port *port,
626 struct serial_struct *ser)
630 pr_debug("CPM uart[%d]:verify_port\n", port->line);
632 if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
634 if (ser->irq < 0 || ser->irq >= nr_irqs)
636 if (ser->baud_base < 9600)
642 * Transmit characters, refill buffer descriptor, if possible
644 static int cpm_uart_tx_pump(struct uart_port *port)
649 struct uart_cpm_port *pinfo =
650 container_of(port, struct uart_cpm_port, port);
651 struct circ_buf *xmit = &port->state->xmit;
653 /* Handle xon/xoff */
655 /* Pick next descriptor and fill from buffer */
658 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
662 out_be16(&bdp->cbd_datlen, 1);
663 setbits16(&bdp->cbd_sc, BD_SC_READY);
665 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
666 bdp = pinfo->tx_bd_base;
676 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
677 cpm_uart_stop_tx(port);
681 /* Pick next descriptor and fill from buffer */
684 while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) && !uart_circ_empty(xmit)) {
686 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
687 while (count < pinfo->tx_fifosize) {
688 *p++ = xmit->buf[xmit->tail];
689 uart_xmit_advance(port, 1);
691 if (uart_circ_empty(xmit))
694 out_be16(&bdp->cbd_datlen, count);
695 setbits16(&bdp->cbd_sc, BD_SC_READY);
697 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
698 bdp = pinfo->tx_bd_base;
704 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
705 uart_write_wakeup(port);
707 if (uart_circ_empty(xmit)) {
708 cpm_uart_stop_tx(port);
716 * init buffer descriptors
718 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
724 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
726 /* Set the physical address of the host memory
727 * buffers in the buffer descriptors, and the
728 * virtual address for us to work with.
730 mem_addr = pinfo->mem_addr;
731 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
732 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
733 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
734 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
735 mem_addr += pinfo->rx_fifosize;
738 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
739 out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
741 /* Set the physical address of the host memory
742 * buffers in the buffer descriptors, and the
743 * virtual address for us to work with.
745 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
746 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
747 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
748 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
749 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
750 mem_addr += pinfo->tx_fifosize;
753 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
754 out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
757 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
760 scc_uart_t __iomem *sup;
762 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
768 out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
769 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
770 out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
771 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
773 /* Set up the uart parameters in the
777 out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB);
778 out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB);
780 out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
781 out_be16(&sup->scc_maxidl, 0x10);
782 out_be16(&sup->scc_brkcr, 1);
783 out_be16(&sup->scc_parec, 0);
784 out_be16(&sup->scc_frmec, 0);
785 out_be16(&sup->scc_nosec, 0);
786 out_be16(&sup->scc_brkec, 0);
787 out_be16(&sup->scc_uaddr1, 0);
788 out_be16(&sup->scc_uaddr2, 0);
789 out_be16(&sup->scc_toseq, 0);
790 out_be16(&sup->scc_char1, 0x8000);
791 out_be16(&sup->scc_char2, 0x8000);
792 out_be16(&sup->scc_char3, 0x8000);
793 out_be16(&sup->scc_char4, 0x8000);
794 out_be16(&sup->scc_char5, 0x8000);
795 out_be16(&sup->scc_char6, 0x8000);
796 out_be16(&sup->scc_char7, 0x8000);
797 out_be16(&sup->scc_char8, 0x8000);
798 out_be16(&sup->scc_rccm, 0xc0ff);
800 /* Send the CPM an initialize command.
802 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
804 /* Set UART mode, 8 bit, no parity, one stop.
805 * Enable receive and transmit.
807 out_be32(&scp->scc_gsmrh, 0);
808 out_be32(&scp->scc_gsmrl,
809 SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
811 /* Enable rx interrupts and clear all pending events. */
812 out_be16(&scp->scc_sccm, 0);
813 out_be16(&scp->scc_scce, 0xffff);
814 out_be16(&scp->scc_dsr, 0x7e7e);
815 out_be16(&scp->scc_psmr, 0x3000);
817 setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
820 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
823 smc_uart_t __iomem *up;
825 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
831 out_be16(&pinfo->smcup->smc_rbase,
832 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
833 out_be16(&pinfo->smcup->smc_tbase,
834 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
837 * In case SMC is being relocated...
839 out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
840 out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
841 out_be32(&up->smc_rstate, 0);
842 out_be32(&up->smc_tstate, 0);
843 out_be16(&up->smc_brkcr, 1); /* number of break chars */
844 out_be16(&up->smc_brkec, 0);
846 /* Set up the uart parameters in the
849 out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB);
850 out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB);
852 /* Using idle character time requires some additional tuning. */
853 out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
854 out_be16(&up->smc_maxidl, 0x10);
855 out_be16(&up->smc_brklen, 0);
856 out_be16(&up->smc_brkec, 0);
857 out_be16(&up->smc_brkcr, 1);
859 /* Set UART mode, 8 bit, no parity, one stop.
860 * Enable receive and transmit.
862 out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
864 /* Enable only rx interrupts clear all pending events. */
865 out_8(&sp->smc_smcm, 0);
866 out_8(&sp->smc_smce, 0xff);
868 setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
872 * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
873 * receive buffer descriptors from dual port ram, and a character
874 * buffer area from host mem. If we are allocating for the console we need
875 * to do it from bootmem
877 static int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
881 unsigned long dp_offset;
883 dma_addr_t dma_addr = 0;
885 pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line);
887 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
888 dp_offset = cpm_muram_alloc(dpmemsz, 8);
889 if (IS_ERR_VALUE(dp_offset)) {
890 pr_err("%s: could not allocate buffer descriptors\n", __func__);
894 dp_mem = cpm_muram_addr(dp_offset);
896 memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
897 L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
898 if (IS_ENABLED(CONFIG_CPM1) && is_con) {
899 /* was hostalloc but changed cause it blows away the */
900 /* large tlb mapping when pinning the kernel area */
901 mem_addr = (u8 __force *)cpm_muram_addr(cpm_muram_alloc(memsz, 8));
902 dma_addr = cpm_muram_dma((void __iomem *)mem_addr);
904 mem_addr = kzalloc(memsz, GFP_NOWAIT);
905 dma_addr = virt_to_bus(mem_addr);
907 mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr,
912 cpm_muram_free(dp_offset);
913 pr_err("%s: could not allocate coherent memory\n", __func__);
917 pinfo->dp_addr = dp_offset;
918 pinfo->mem_addr = mem_addr;
919 pinfo->dma_addr = dma_addr;
920 pinfo->mem_size = memsz;
922 pinfo->rx_buf = mem_addr;
923 pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
924 * pinfo->rx_fifosize);
926 pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem;
927 pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
932 static void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
934 dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos *
935 pinfo->rx_fifosize) +
936 L1_CACHE_ALIGN(pinfo->tx_nrfifos *
937 pinfo->tx_fifosize), (void __force *)pinfo->mem_addr,
940 cpm_muram_free(pinfo->dp_addr);
944 * Initialize port. This is called from early_console stuff
945 * so we have to be careful here !
947 static int cpm_uart_request_port(struct uart_port *port)
949 struct uart_cpm_port *pinfo =
950 container_of(port, struct uart_cpm_port, port);
953 pr_debug("CPM uart[%d]:request port\n", port->line);
955 if (pinfo->flags & FLAG_CONSOLE)
959 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
960 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
962 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
963 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
966 ret = cpm_uart_allocbuf(pinfo, 0);
971 cpm_uart_initbd(pinfo);
973 cpm_uart_init_smc(pinfo);
975 cpm_uart_init_scc(pinfo);
980 static void cpm_uart_release_port(struct uart_port *port)
982 struct uart_cpm_port *pinfo =
983 container_of(port, struct uart_cpm_port, port);
985 if (!(pinfo->flags & FLAG_CONSOLE))
986 cpm_uart_freebuf(pinfo);
990 * Configure/autoconfigure the port.
992 static void cpm_uart_config_port(struct uart_port *port, int flags)
994 pr_debug("CPM uart[%d]:config_port\n", port->line);
996 if (flags & UART_CONFIG_TYPE) {
997 port->type = PORT_CPM;
998 cpm_uart_request_port(port);
1002 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
1004 * Write a string to the serial port
1005 * Note that this is called with interrupts already disabled
1007 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
1008 const char *string, u_int count, bool handle_linefeed)
1011 cbd_t __iomem *bdp, *bdbase;
1012 unsigned char *cpm_outp_addr;
1014 /* Get the address of the host memory buffer.
1016 bdp = pinfo->tx_cur;
1017 bdbase = pinfo->tx_bd_base;
1020 * Now, do each character. This is not as bad as it looks
1021 * since this is a holding FIFO and not a transmitting FIFO.
1022 * We could add the complexity of filling the entire transmit
1023 * buffer, but we would just wait longer between accesses......
1025 for (i = 0; i < count; i++, string++) {
1026 /* Wait for transmitter fifo to empty.
1027 * Ready indicates output is ready, and xmt is doing
1028 * that, not that it is ready for us to send.
1030 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1033 /* Send the character out.
1034 * If the buffer address is in the CPM DPRAM, don't
1037 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1039 *cpm_outp_addr = *string;
1041 out_be16(&bdp->cbd_datlen, 1);
1042 setbits16(&bdp->cbd_sc, BD_SC_READY);
1044 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1049 /* if a LF, also do CR... */
1050 if (handle_linefeed && *string == 10) {
1051 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1054 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1056 *cpm_outp_addr = 13;
1058 out_be16(&bdp->cbd_datlen, 1);
1059 setbits16(&bdp->cbd_sc, BD_SC_READY);
1061 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1069 * Finally, Wait for transmitter & holding register to empty
1070 * and restore the IER
1072 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1075 pinfo->tx_cur = bdp;
1079 #ifdef CONFIG_CONSOLE_POLL
1080 /* Serial polling routines for writing and reading from the uart while
1081 * in an interrupt or debug context.
1084 #define GDB_BUF_SIZE 512 /* power of 2, please */
1086 static char poll_buf[GDB_BUF_SIZE];
1088 static int poll_chars;
1090 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1093 volatile cbd_t *bdp;
1096 /* Get the address of the host memory buffer.
1098 bdp = pinfo->rx_cur;
1099 if (bdp->cbd_sc & BD_SC_EMPTY)
1100 return NO_POLL_CHAR;
1102 /* If the buffer address is in the CPM DPRAM, don't
1105 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1108 i = c = bdp->cbd_datlen;
1113 bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1114 bdp->cbd_sc |= BD_SC_EMPTY;
1116 if (bdp->cbd_sc & BD_SC_WRAP)
1117 bdp = pinfo->rx_bd_base;
1120 pinfo->rx_cur = (cbd_t *)bdp;
1125 static int cpm_get_poll_char(struct uart_port *port)
1127 struct uart_cpm_port *pinfo =
1128 container_of(port, struct uart_cpm_port, port);
1130 if (!serial_polled) {
1134 if (poll_chars <= 0) {
1135 int ret = poll_wait_key(poll_buf, pinfo);
1137 if (ret == NO_POLL_CHAR)
1146 static void cpm_put_poll_char(struct uart_port *port,
1149 struct uart_cpm_port *pinfo =
1150 container_of(port, struct uart_cpm_port, port);
1154 cpm_uart_early_write(pinfo, ch, 1, false);
1157 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1158 static struct uart_port *udbg_port;
1160 static void udbg_cpm_putc(char c)
1163 cpm_put_poll_char(udbg_port, '\r');
1164 cpm_put_poll_char(udbg_port, c);
1167 static int udbg_cpm_getc_poll(void)
1169 int c = cpm_get_poll_char(udbg_port);
1171 return c == NO_POLL_CHAR ? -1 : c;
1174 static int udbg_cpm_getc(void)
1178 while ((c = udbg_cpm_getc_poll()) == -1)
1182 #endif /* CONFIG_SERIAL_CPM_CONSOLE */
1184 #endif /* CONFIG_CONSOLE_POLL */
1186 static const struct uart_ops cpm_uart_pops = {
1187 .tx_empty = cpm_uart_tx_empty,
1188 .set_mctrl = cpm_uart_set_mctrl,
1189 .get_mctrl = cpm_uart_get_mctrl,
1190 .stop_tx = cpm_uart_stop_tx,
1191 .start_tx = cpm_uart_start_tx,
1192 .stop_rx = cpm_uart_stop_rx,
1193 .break_ctl = cpm_uart_break_ctl,
1194 .startup = cpm_uart_startup,
1195 .shutdown = cpm_uart_shutdown,
1196 .set_termios = cpm_uart_set_termios,
1197 .type = cpm_uart_type,
1198 .release_port = cpm_uart_release_port,
1199 .request_port = cpm_uart_request_port,
1200 .config_port = cpm_uart_config_port,
1201 .verify_port = cpm_uart_verify_port,
1202 #ifdef CONFIG_CONSOLE_POLL
1203 .poll_get_char = cpm_get_poll_char,
1204 .poll_put_char = cpm_put_poll_char,
1208 static struct uart_cpm_port cpm_uart_ports[UART_NR];
1210 static void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
1211 struct device_node *np)
1214 unsigned long offset;
1215 struct resource res;
1216 resource_size_t len;
1218 /* Don't remap parameter RAM if it has already been initialized
1219 * during console setup.
1221 if (IS_SMC(port) && port->smcup)
1223 else if (!IS_SMC(port) && port->sccup)
1226 if (of_address_to_resource(np, 1, &res))
1229 len = resource_size(&res);
1230 pram = ioremap(res.start, len);
1234 if (!IS_ENABLED(CONFIG_CPM2) || !IS_SMC(port))
1238 pr_warn("cpm_uart[%d]: device tree references "
1239 "SMC pram, using boot loader/wrapper pram mapping. "
1240 "Please fix your device tree to reference the pram "
1241 "base register instead.\n",
1246 offset = cpm_muram_alloc(64, 64);
1247 out_be16(pram, offset);
1249 return cpm_muram_addr(offset);
1252 static void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
1254 if (!IS_ENABLED(CONFIG_CPM2) || !IS_SMC(port))
1258 static int cpm_uart_init_port(struct device_node *np,
1259 struct uart_cpm_port *pinfo)
1262 void __iomem *mem, *pram;
1263 struct device *dev = pinfo->port.dev;
1268 data = of_get_property(np, "clock", NULL);
1270 struct clk *clk = clk_get(NULL, (const char*)data);
1275 data = of_get_property(np, "fsl,cpm-brg", &len);
1276 if (!data || len != 4) {
1277 printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1278 "fsl,cpm-brg property.\n", np);
1284 data = of_get_property(np, "fsl,cpm-command", &len);
1285 if (!data || len != 4) {
1286 printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1287 "fsl,cpm-command property.\n", np);
1290 pinfo->command = *data;
1292 mem = of_iomap(np, 0);
1296 if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1297 of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1299 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1300 } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1301 of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1302 pinfo->flags |= FLAG_SMC;
1304 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1315 pinfo->tx_nrfifos = TX_NUM_FIFO;
1316 pinfo->tx_fifosize = TX_BUF_SIZE;
1317 pinfo->rx_nrfifos = RX_NUM_FIFO;
1318 pinfo->rx_fifosize = RX_BUF_SIZE;
1320 pinfo->port.uartclk = ppc_proc_freq;
1321 pinfo->port.mapbase = (unsigned long)mem;
1322 pinfo->port.type = PORT_CPM;
1323 pinfo->port.ops = &cpm_uart_pops;
1324 pinfo->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_CPM_CONSOLE);
1325 pinfo->port.iotype = UPIO_MEM;
1326 pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1327 spin_lock_init(&pinfo->port.lock);
1329 for (i = 0; i < NUM_GPIOS; i++) {
1330 struct gpio_desc *gpiod;
1332 pinfo->gpios[i] = NULL;
1334 gpiod = devm_gpiod_get_index_optional(dev, NULL, i, GPIOD_ASIS);
1336 if (IS_ERR(gpiod)) {
1337 ret = PTR_ERR(gpiod);
1342 if (i == GPIO_RTS || i == GPIO_DTR)
1343 ret = gpiod_direction_output(gpiod, 0);
1345 ret = gpiod_direction_input(gpiod);
1347 pr_err("can't set direction for gpio #%d: %d\n",
1351 pinfo->gpios[i] = gpiod;
1355 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1356 #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_CPM_CONSOLE)
1362 return cpm_uart_request_port(&pinfo->port);
1365 cpm_uart_unmap_pram(pinfo, pram);
1371 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1373 * Print a string to the serial port trying not to disturb
1374 * any possible real use of the port...
1376 * Note that this is called with interrupts already disabled
1378 static void cpm_uart_console_write(struct console *co, const char *s,
1381 struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1382 unsigned long flags;
1384 if (unlikely(oops_in_progress)) {
1385 local_irq_save(flags);
1386 cpm_uart_early_write(pinfo, s, count, true);
1387 local_irq_restore(flags);
1389 uart_port_lock_irqsave(&pinfo->port, &flags);
1390 cpm_uart_early_write(pinfo, s, count, true);
1391 uart_port_unlock_irqrestore(&pinfo->port, flags);
1396 static int __init cpm_uart_console_setup(struct console *co, char *options)
1403 struct uart_cpm_port *pinfo;
1404 struct uart_port *port;
1406 struct device_node *np;
1409 if (co->index >= UART_NR) {
1410 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1415 for_each_node_by_type(np, "serial") {
1416 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1417 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1418 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1419 !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1422 if (i++ == co->index)
1429 pinfo = &cpm_uart_ports[co->index];
1431 pinfo->flags |= FLAG_CONSOLE;
1432 port = &pinfo->port;
1434 ret = cpm_uart_init_port(np, pinfo);
1440 uart_parse_options(options, &baud, &parity, &bits, &flow);
1442 baud = get_baudrate();
1447 if (IS_SMC(pinfo)) {
1448 out_be16(&pinfo->smcup->smc_brkcr, 0);
1449 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1450 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1451 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1453 out_be16(&pinfo->sccup->scc_brkcr, 0);
1454 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1455 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1456 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1459 ret = cpm_uart_allocbuf(pinfo, 1);
1464 cpm_uart_initbd(pinfo);
1467 cpm_uart_init_smc(pinfo);
1469 cpm_uart_init_scc(pinfo);
1471 uart_set_options(port, co, baud, parity, bits, flow);
1472 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1474 #ifdef CONFIG_CONSOLE_POLL
1476 udbg_port = &pinfo->port;
1477 udbg_putc = udbg_cpm_putc;
1478 udbg_getc = udbg_cpm_getc;
1479 udbg_getc_poll = udbg_cpm_getc_poll;
1486 static struct uart_driver cpm_reg;
1487 static struct console cpm_scc_uart_console = {
1489 .write = cpm_uart_console_write,
1490 .device = uart_console_device,
1491 .setup = cpm_uart_console_setup,
1492 .flags = CON_PRINTBUFFER,
1497 static int __init cpm_uart_console_init(void)
1500 register_console(&cpm_scc_uart_console);
1504 console_initcall(cpm_uart_console_init);
1506 #define CPM_UART_CONSOLE &cpm_scc_uart_console
1508 #define CPM_UART_CONSOLE NULL
1511 static struct uart_driver cpm_reg = {
1512 .owner = THIS_MODULE,
1513 .driver_name = "ttyCPM",
1514 .dev_name = "ttyCPM",
1515 .major = SERIAL_CPM_MAJOR,
1516 .minor = SERIAL_CPM_MINOR,
1517 .cons = CPM_UART_CONSOLE,
1521 static int probe_index;
1523 static int cpm_uart_probe(struct platform_device *ofdev)
1525 int index = probe_index++;
1526 struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1529 pinfo->port.line = index;
1531 if (index >= UART_NR)
1534 platform_set_drvdata(ofdev, pinfo);
1536 /* initialize the device pointer for the port */
1537 pinfo->port.dev = &ofdev->dev;
1539 pinfo->port.irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
1540 if (!pinfo->port.irq)
1543 ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1545 return uart_add_one_port(&cpm_reg, &pinfo->port);
1547 irq_dispose_mapping(pinfo->port.irq);
1552 static void cpm_uart_remove(struct platform_device *ofdev)
1554 struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1556 uart_remove_one_port(&cpm_reg, &pinfo->port);
1559 static const struct of_device_id cpm_uart_match[] = {
1561 .compatible = "fsl,cpm1-smc-uart",
1564 .compatible = "fsl,cpm1-scc-uart",
1567 .compatible = "fsl,cpm2-smc-uart",
1570 .compatible = "fsl,cpm2-scc-uart",
1574 MODULE_DEVICE_TABLE(of, cpm_uart_match);
1576 static struct platform_driver cpm_uart_driver = {
1579 .of_match_table = cpm_uart_match,
1581 .probe = cpm_uart_probe,
1582 .remove_new = cpm_uart_remove,
1585 static int __init cpm_uart_init(void)
1587 int ret = uart_register_driver(&cpm_reg);
1591 ret = platform_driver_register(&cpm_uart_driver);
1593 uart_unregister_driver(&cpm_reg);
1598 static void __exit cpm_uart_exit(void)
1600 platform_driver_unregister(&cpm_uart_driver);
1601 uart_unregister_driver(&cpm_reg);
1604 module_init(cpm_uart_init);
1605 module_exit(cpm_uart_exit);
1607 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1608 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1609 MODULE_LICENSE("GPL");
1610 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);